r2083 - trunk/src/target/u-boot/patches

[laforge at sita.openmoko.org]

Author: laforge
Date: 2007-05-25 01:17:19 +0200 (Fri, 25 May 2007)
New Revision: 2083

Modified:
   trunk/src/target/u-boot/patches/uboot-hxd8.patch
Log:
implement [untested] hxd8 multiple nand chip support


Modified: trunk/src/target/u-boot/patches/uboot-hxd8.patch
===================================================================
--- trunk/src/target/u-boot/patches/uboot-hxd8.patch	2007-05-24 23:14:10 UTC (rev 2082)
+++ trunk/src/target/u-boot/patches/uboot-hxd8.patch	2007-05-24 23:17:19 UTC (rev 2083)
@@ -88,7 +88,7 @@
 ===================================================================
 --- /dev/null
 +++ u-boot/board/hxd8/hxd8.c
-@@ -0,0 +1,172 @@
+@@ -0,0 +1,204 @@
 +/*
 + * (C) Copyright 2007 by OpenMoko, Inc.
 + * Author: Harald Welte <laforge at openmoko.org>
@@ -120,6 +120,8 @@
 + */
 +
 +#include <common.h>
++#include <nand.h>
++#include <pcf50606.h>
 +#include <s3c2440.h>
 +
 +DECLARE_GLOBAL_DATA_PTR;
@@ -190,7 +192,7 @@
 +	gpio->GPADAT = 0x0001C000;
 +	gpio->GPBCON = 0x00045542;
 +	gpio->GPBUP = 0x000007FF;
-+	gpio->GPCCON = 0xAAAA55A9;
++	gpio->GPCCON = 0xAAAA02A9;
 +	gpio->GPCUP = 0x0000FFFF;
 +	gpio->GPDCON = 0xAAAAAAAA;
 +	gpio->GPDUP = 0x0000FFFF;
@@ -260,7 +262,37 @@
 +char *dynpart_names[] = {
 +    "u-boot", "u-boot_env", "kernel", "splash", "rootfs", NULL };
 +
++/* 4G Nand flash chip select function */
++void board_nand_select_device(struct nand_chip *this, int chip)
++{
++	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
 +
++	if (chip == 0)
++		gpio->GPGDAT &=  ~(1 << 1);
++	else
++		gpio->GPGDAT |=  (1 << 1);
++
++	if (chip == 1)
++		gpio->GPADAT &=  ~(1 << 15);
++	else
++		gpio->GPADAT |= (1 << 15);
++
++	if (chip == 2)
++		gpio->GPADAT &=  ~(1 << 16);
++	else
++		gpio->GPADAT |=  (1 << 16);
++
++	if (chip == 3)
++		gpio->GPADAT &=  ~(1 << 14);
++	else
++		gpio->GPADAT |= (1 << 14);
++
++	/* UGLY: ew don't have mtd_info pointer, but know that
++	 * s3c24xx hwcontrol function does not use it for CLRNCE */
++	if (chip == -1)
++		this->hwcontrol(NULL, NAND_CTL_CLRNCE);
++}
++
 Index: u-boot/board/hxd8/lowlevel_init.S
 ===================================================================
 --- /dev/null
@@ -441,7 +473,7 @@
 ===================================================================
 --- /dev/null
 +++ u-boot/include/configs/hxd8.h
-@@ -0,0 +1,275 @@
+@@ -0,0 +1,278 @@
 +/*
 + * (C) Copyright 2007 OpenMoko, Inc.
 + * Author: Harald Welte <laforge at openmoko.org>
@@ -484,6 +516,7 @@
 +#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
 +#define	CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC     */
 +#define CONFIG_SMDK2440		1	/* on a SAMSUNG SMDK2440 Board  */
++#define CONFIG_HXD8		1	/* on a FIC HXD8 Board  */
 +
 +/* input clock of PLL */
 +#define CONFIG_SYS_CLK_FREQ	16934400/* the HXD8 has this input clock */
@@ -649,9 +682,11 @@
 +#define CFG_ENV_OFFSET_OOB   	1               /* Location of ENV stored in block 0 OOB */
 +#define	CFG_PREBOOT_OVERRIDE	1	/* allow preboot from memory */
 +
-+#define NAND_MAX_CHIPS		1
++#define NAND_MAX_CHIPS		3
 +#define CFG_NAND_BASE		0x4e000000
-+#define CFG_MAX_NAND_DEVICE	1
++#define CFG_MAX_NAND_DEVICE	NAND_MAX_CHIPS
++#define CFG_NAND_BASE_LIST	{ CFG_NAND_BASE, CFG_NAND_BASE, CFG_NAND_BASE }
++#define CFG_NAND_SELECT_DEVICE
 +
 +#define CONFIG_MMC		1
 +#define CFG_MMC_BASE		0xff000000
@@ -1072,3 +1107,47 @@
 +	.bss : { *(.bss) }
 +	_end = .;
 +}
+Index: u-boot/cpu/arm920t/s3c24x0/nand.c
+===================================================================
+--- u-boot.orig/cpu/arm920t/s3c24x0/nand.c
++++ u-boot/cpu/arm920t/s3c24x0/nand.c
+@@ -83,6 +83,26 @@
+ #define	NFDATA		__REGb(NF_BASE + oNFDATA)
+ #define	NFSTAT		__REGb(NF_BASE + oNFSTAT)
+ 
++#if defined(CONFIG_HXD8)
++static int hxd8_dev_ready(struct mtd_info *mtd)
++{
++	S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
++	u_int32_t val = gpio->GPCDAT;
++
++	switch (nand_curr_device) {
++		case 0:
++			return (NFSTAT & 0x01);
++		case 1:	/* RnB 3 */
++			return ((val>>6) & 0x01);
++		case 2:	/* RnB 4 */
++			return ((val>>7) & 0x01);
++		case 3:	/* RnB 2 */
++			return  ((val>>5) & 0x01);
++		default:
++			return 0;
++	}
++}
++#endif
+ 
+ static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd)
+ {
+@@ -251,6 +271,12 @@
+ 	nand->eccmode = NAND_ECC_SOFT;
+ #endif
+ 
++#if defined(CONFIG_HXD8)
++	//printk("Initial new cs\n");
++	//nand->select_chip = hxd8_nand_select_chip;
++	nand->dev_ready = hxd8_dev_ready;
++#endif
++
+ #ifdef CONFIG_S3C2410_NAND_BBT
+ 	nand->options = NAND_USE_FLASH_BBT | NAND_DONT_CREATE_BBT;
+ #else