r3511 - in developers: . sameo sameo/patches sameo/patches/ar6k-atheros

sameo at sita.openmoko.org sameo at sita.openmoko.org
Mon Nov 26 15:17:10 CET 2007


Author: sameo
Date: 2007-11-26 15:17:02 +0100 (Mon, 26 Nov 2007)
New Revision: 3511

Added:
   developers/sameo/
   developers/sameo/patches/
   developers/sameo/patches/ar6k-atheros/
   developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack.patch
   developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack_ar6000_wlan.patch
   developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack_functions.patch
   developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack_shcd.patch
   developers/sameo/patches/ar6k-atheros/pnp_fixes_2.6.22.5.patch
   developers/sameo/patches/ar6k-atheros/s3c2440_wlan_gpio_cfg.patch
   developers/sameo/patches/ar6k-atheros/s3c24xx_hcd_atheros.patch
   developers/sameo/patches/ar6k-atheros/series
Log:
ar6k-atheros: Initial commit, against 1.1 target FW.

With this patch series, we should be able to send our first probe 
request, although a bogus one. Wireless-tools command work as well.



Added: developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack.patch
===================================================================
--- developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack.patch	2007-11-26 09:11:57 UTC (rev 3510)
+++ developers/sameo/patches/ar6k-atheros/common_atheros_sdiostack.patch	2007-11-26 14:17:02 UTC (rev 3511)
@@ -0,0 +1,28469 @@
+---
+ arch/arm/Kconfig                               |    2 
+ drivers/Kconfig                                |    2 
+ drivers/Makefile                               |    1 
+ drivers/sdio/Kconfig                           |   18 
+ drivers/sdio/Makefile                          |    6 
+ drivers/sdio/busdriver/Makefile                |    7 
+ drivers/sdio/busdriver/_busdriver.h            |  462 +++
+ drivers/sdio/busdriver/sdio_bus.c              | 2119 ++++++++++++++++
+ drivers/sdio/busdriver/sdio_bus_events.c       | 1073 ++++++++
+ drivers/sdio/busdriver/sdio_bus_misc.c         | 3184 +++++++++++++++++++++++++
+ drivers/sdio/busdriver/sdio_bus_os.c           |  807 ++++++
+ drivers/sdio/busdriver/sdio_function.c         |  713 +++++
+ drivers/sdio/hcd/Kconfig                       |   56 
+ drivers/sdio/hcd/Makefile                      |    8 
+ drivers/sdio/hcd/mx21/Makefile                 |    7 
+ drivers/sdio/hcd/mx21/sdio_mx21.c              | 1286 ++++++++++
+ drivers/sdio/hcd/mx21/sdio_mx21.h              |  210 +
+ drivers/sdio/hcd/mx21/sdio_mx21_linux.h        |  105 
+ drivers/sdio/hcd/mx21/sdio_mx21_os.c           |  435 +++
+ drivers/sdio/hcd/omap/Makefile                 |    3 
+ drivers/sdio/hcd/omap/sdio_hcd.c               | 1337 ++++++++++
+ drivers/sdio/hcd/omap/sdio_hcd_linux.h         |  165 +
+ drivers/sdio/hcd/omap/sdio_hcd_os_2_6.c        |  574 ++++
+ drivers/sdio/hcd/omap/sdio_omap_hcd.h          |  372 ++
+ drivers/sdio/hcd/omap_2420/Makefile            |    3 
+ drivers/sdio/hcd/omap_2420/sdio_hcd.c          | 1363 ++++++++++
+ drivers/sdio/hcd/omap_2420/sdio_hcd_linux.h    |  147 +
+ drivers/sdio/hcd/omap_2420/sdio_hcd_os.c       |  608 ++++
+ drivers/sdio/hcd/omap_2420/sdio_hcd_os_2_6.c   |  731 +++++
+ drivers/sdio/hcd/omap_2420/sdio_omap_hcd.h     |  370 ++
+ drivers/sdio/hcd/pci_ellen/Makefile            |    7 
+ drivers/sdio/hcd/pci_ellen/sdio_hcd.c          | 1238 +++++++++
+ drivers/sdio/hcd/pci_ellen/sdio_hcd_linux.h    |  185 +
+ drivers/sdio/hcd/pci_ellen/sdio_hcd_os.c       |  781 ++++++
+ drivers/sdio/hcd/pci_ellen/sdio_pciellen_hcd.h |  253 +
+ drivers/sdio/hcd/pxa255/Makefile               |    5 
+ drivers/sdio/hcd/pxa255/sdio_hcd.c             |  914 +++++++
+ drivers/sdio/hcd/pxa255/sdio_hcd_linux.h       |  136 +
+ drivers/sdio/hcd/pxa255/sdio_hcd_os.c          |  589 ++++
+ drivers/sdio/hcd/pxa255/sdio_pxa255hcd.h       |  227 +
+ drivers/sdio/hcd/pxa270/Makefile               |    5 
+ drivers/sdio/hcd/pxa270/sdio_hcd.c             | 1087 ++++++++
+ drivers/sdio/hcd/pxa270/sdio_hcd_linux.h       |  150 +
+ drivers/sdio/hcd/pxa270/sdio_hcd_os.c          | 1084 ++++++++
+ drivers/sdio/hcd/pxa270/sdio_pxa270hcd.h       |  273 ++
+ drivers/sdio/lib/Makefile                      |    6 
+ drivers/sdio/lib/sdio_lib_c.c                  |  903 +++++++
+ drivers/sdio/lib/sdio_lib_os.c                 |  254 +
+ include/linux/sdio/_sdio_defs.h                |  632 ++++
+ include/linux/sdio/ctsystem.h                  |  110 
+ include/linux/sdio/ctsystem_linux.h            |  955 +++++++
+ include/linux/sdio/mmc_defs.h                  |   99 
+ include/linux/sdio/sdio_busdriver.h            | 1431 +++++++++++
+ include/linux/sdio/sdio_hcd_defs.h             |  215 +
+ include/linux/sdio/sdio_lib.h                  |  262 ++
+ include/linux/sdio/sdlist.h                    |  137 +
+ 56 files changed, 28112 insertions(+)
+
+Index: linux-2.6.22/include/linux/sdio/_sdio_defs.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/include/linux/sdio/_sdio_defs.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,632 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: _sdio_defs.h
++
++ at abstract: SD/SDIO definitions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___SDIO_DEFS_H___
++#define ___SDIO_DEFS_H___
++
++#define SD_INIT_BUS_CLOCK   100000    /* initialization clock in hz */
++#define SPI_INIT_BUS_CLOCK  100000    /* initialization clock in hz */
++#define SD_MAX_BUS_CLOCK    25000000  /* max clock speed in hz */
++#define SD_HS_MAX_BUS_CLOCK 50000000  /* SD high speed max clock speed in hz */
++#define SDIO_LOW_SPEED_MAX_BUS_CLOCK 400000 /* max low speed clock in hz */
++#define SDMMC_MIN_INIT_CLOCKS   80    /* minimun number of initialization clocks */
++#define SDIO_EMPC_CURRENT_THRESHOLD  300  /* SDIO 1.10 , EMPC (mA) threshold, we add some overhead */
++
++/* commands */
++#define CMD0    0
++#define CMD1    1
++#define CMD2    2
++#define CMD3    3
++#define CMD4    4
++#define CMD5    5
++#define CMD6    6
++#define CMD7    7
++#define CMD9    9
++#define CMD10   10
++#define CMD12   12
++#define CMD13   13
++#define CMD15   15
++#define CMD16   16
++#define CMD17   17
++#define CMD18   18
++#define CMD24   24
++#define CMD25   25
++#define CMD27   27
++#define CMD28   28
++#define CMD29   29
++#define CMD30   30
++#define CMD32   32
++#define CMD33   33
++#define CMD38   38
++#define CMD42   42
++#define CMD52   52
++#define CMD53   53
++#define CMD55   55
++#define CMD56   56
++#define CMD58   58
++#define CMD59   59
++#define ACMD6   6
++#define ACMD13  13
++#define ACMD22  22
++#define ACMD23  23
++#define ACMD41  41
++#define ACMD42  42
++#define ACMD51  51
++
++#define SD_ACMD6_BUS_WIDTH_1_BIT         0x00
++#define SD_ACMD6_BUS_WIDTH_4_BIT         0x02
++
++#define SD_CMD59_CRC_OFF            0x00000000
++#define SD_CMD59_CRC_ON             0x00000001
++
++/* SD/SPI max response size */
++#define SD_MAX_CMD_RESPONSE_BYTES SD_R2_RESPONSE_BYTES
++
++#define SD_R1_RESPONSE_BYTES  6
++#define SD_R1B_RESPONSE_BYTES SD_R1_RESPONSE_BYTES
++#define SD_R1_GET_CMD(pR) ((pR)[5] & 0xC0))
++#define SD_R1_SET_CMD(pR,cmd)  (pR)[5] = (cmd) & 0xC0
++#define SD_R1_GET_CARD_STATUS(pR) (((UINT32)((pR)[1]))        |  \
++                                  (((UINT32)((pR)[2])) << 8)  |  \
++                                  (((UINT32)((pR)[3])) << 16) |  \
++                                  (((UINT32)((pR)[4])) << 24) )
++#define SD_R1_SET_CMD_STATUS(pR,status) \
++{                                      \
++    (pR)[1] = (UINT8)(status);         \
++    (pR)[2] = (UINT8)((status) >> 8);  \
++    (pR)[3] = (UINT8)((status) >> 16); \
++    (pR)[4] = (UINT8)((status) >> 24); \
++}
++
++/* SD R1 card status bit masks */
++#define SD_CS_CMD_OUT_OF_RANGE  ((UINT32)(1 << 31))
++#define SD_CS_ADDRESS_ERR       (1 << 30)
++#define SD_CS_BLK_LEN_ERR       (1 << 29)
++#define SD_CS_ERASE_SEQ_ERR     (1 << 28)
++#define SD_CS_ERASE_PARAM_ERR   (1 << 27)
++#define SD_CS_WP_ERR            (1 << 26)
++#define SD_CS_CARD_LOCKED       (1 << 25)
++#define SD_CS_LK_UNLK_FAILED    (1 << 24)
++#define SD_CS_PREV_CMD_CRC_ERR  (1 << 23)
++#define SD_CS_ILLEGAL_CMD_ERR   (1 << 22)
++#define SD_CS_ECC_FAILED        (1 << 21)
++#define SD_CS_CARD_INTERNAL_ERR (1 << 20)
++#define SD_CS_GENERAL_ERR       (1 << 19)
++#define SD_CS_CSD_OVERWR_ERR    (1 << 16)
++#define SD_CS_WP_ERASE_SKIP     (1 << 15)
++#define SD_CS_ECC_DISABLED      (1 << 14)
++#define SD_CS_ERASE_RESET       (1 << 13)
++#define SD_CS_GET_STATE(status) (((status) >> 9) & 0x0f)
++#define SD_CS_SET_STATE(status, state) \
++{                               \
++    (status) &= ~(0x0F << 9);   \
++    (status) |= (state) << 9    \
++}
++
++#define SD_CS_TRANSFER_ERRORS \
++                ( SD_CS_ADDRESS_ERR       | \
++                  SD_CS_BLK_LEN_ERR       | \
++                  SD_CS_ERASE_SEQ_ERR     | \
++                  SD_CS_ERASE_PARAM_ERR   | \
++                  SD_CS_WP_ERR            | \
++                  SD_CS_ECC_FAILED        | \
++                  SD_CS_CARD_INTERNAL_ERR | \
++                  SD_CS_GENERAL_ERR )
++
++#define SD_CS_STATE_IDLE   0
++#define SD_CS_STATE_READY  1
++#define SD_CS_STATE_IDENT  2
++#define SD_CS_STATE_STBY   3
++#define SD_CS_STATE_TRANS  4
++#define SD_CS_STATE_DATA   5
++#define SD_CS_STATE_RCV    6
++#define SD_CS_STATE_PRG    7
++#define SD_CS_STATE_DIS    8
++#define SD_CS_READY_FOR_DATA    (1 << 8)
++#define SD_CS_APP_CMD           (1 << 5)
++#define SD_CS_AKE_SEQ_ERR       (1 << 3)
++
++/* SD R2 response */
++#define SD_R2_RESPONSE_BYTES  17
++#define MAX_CSD_CID_BYTES     16
++#define SD_R2_SET_STUFF_BITS(pR)   (pR)[16] = 0x3F
++#define GET_SD_CSD_TRANS_SPEED(pR) (pR)[12]
++#define GET_SD_CID_MANFID(pR)      (pR)[15]
++#define GET_SD_CID_PN_1(pR)        (pR)[12]
++#define GET_SD_CID_PN_2(pR)        (pR)[11]
++#define GET_SD_CID_PN_3(pR)        (pR)[10]
++#define GET_SD_CID_PN_4(pR)        (pR)[9]
++#define GET_SD_CID_PN_5(pR)        (pR)[8]
++#define GET_SD_CID_PN_6(pR)        (pR)[7]
++
++#define GET_SD_CID_OEMID(pR)      ((((UINT16)(pR)[14]) << 8 )| (UINT16)((pR)[13]))
++#define SDMMC_OCR_VOLTAGE_MASK 0x7FFFFFFF
++/* SD R3 response */
++#define SD_R3_RESPONSE_BYTES 6
++#define SD_R3_GET_OCR(pR) ((((UINT32)((pR)[1])) |  \
++                           (((UINT32)((pR)[2])) << 8)  |  \
++                           (((UINT32)((pR)[3])) << 16) | \
++                           (((UINT32)((pR)[4])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
++#define SD_R3_IS_CARD_READY(pR)  (((pR)[4] & 0x80) == 0x80)
++
++/* OCR bit definitions */
++#define SD_OCR_CARD_PWR_UP_STATUS  ((UINT32)(1 << 31))
++#define SD_OCR_3_5_TO_3_6_VDD      (1 << 23)
++#define SD_OCR_3_4_TO_3_5_VDD      (1 << 22)
++#define SD_OCR_3_3_TO_3_4_VDD      (1 << 21)
++#define SD_OCR_3_2_TO_3_3_VDD      (1 << 20)
++#define SD_OCR_3_1_TO_3_2_VDD      (1 << 19)
++#define SD_OCR_3_0_TO_3_1_VDD      (1 << 18)
++#define SD_OCR_2_9_TO_3_0_VDD      (1 << 17)
++#define SD_OCR_2_8_TO_2_9_VDD      (1 << 16)
++#define SD_OCR_2_7_TO_2_8_VDD      (1 << 15)
++#define SD_OCR_2_6_TO_2_7_VDD      (1 << 14)
++#define SD_OCR_2_5_TO_2_6_VDD      (1 << 13)
++#define SD_OCR_2_4_TO_2_5_VDD      (1 << 12)
++#define SD_OCR_2_3_TO_2_4_VDD      (1 << 11)
++#define SD_OCR_2_2_TO_2_3_VDD      (1 << 10)
++#define SD_OCR_2_1_TO_2_2_VDD      (1 << 9)
++#define SD_OCR_2_0_TO_2_1_VDD      (1 << 8)
++#define SD_OCR_1_9_TO_2_0_VDD      (1 << 7)
++#define SD_OCR_1_8_TO_1_9_VDD      (1 << 6)
++#define SD_OCR_1_7_TO_1_8_VDD      (1 << 5)
++#define SD_OCR_1_6_TO_1_7_VDD      (1 << 4)
++
++/* SD Status data block */
++#define SD_STATUS_DATA_BYTES        64
++#define SDS_GET_DATA_WIDTH(buffer)  ((buffer)[0] & 0xC0)
++#define SDS_BUS_1_BIT               0x00
++#define SDS_BUS_4_BIT               0x80
++#define SDS_GET_SECURE_MODE(buffer) ((buffer)[0] & 0x20)
++#define SDS_CARD_SECURE_MODE        0x20
++#define SDS_GET_CARD_TYPE(buffer)   ((buffer)[60] & 0x0F)
++#define SDS_SD_CARD_RW              0x00
++#define SDS_SD_CARD_ROM             0x01
++
++/* SD R6 response */
++#define SD_R6_RESPONSE_BYTES 6
++#define SD_R6_GET_RCA(pR) ((UINT16)((pR)[3]) | (((UINT16)((pR)[4])) << 8))
++#define SD_R6_GET_CS(pR)  ((UINT16)((pR)[1]) | (((UINT16)((pR)[2])) << 8))
++
++/* SD Configuration Register (SCR) */
++#define SD_SCR_BYTES            8
++#define SCR_REV_1_0             0x00
++#define SCR_SD_SPEC_1_00        0x00
++#define SCR_SD_SPEC_1_10        0x01
++#define SCR_BUS_SUPPORTS_1_BIT  0x01
++#define SCR_BUS_SUPPORTS_4_BIT  0x04
++#define SCR_SD_SECURITY_MASK    0x70
++#define SCR_SD_NO_SECURITY      0x00
++#define SCR_SD_SECURITY_1_0     0x10
++#define SCR_SD_SECURITY_2_0     0x20
++#define SCR_DATA_STATUS_1_AFTER_ERASE  0x80
++
++#define GET_SD_SCR_STRUCT_VER(pB) ((pB)[7] >> 4)
++#define GET_SD_SCR_SDSPEC_VER(pB) ((pB)[7] & 0x0F)
++#define GET_SD_SCR_BUSWIDTHS(pB)  ((pB)[6] & 0x0F)
++#define GET_SD_SCR_BUSWIDTHS_FLAGS(pB)  (pB)[6]
++#define GET_SD_SCR_SECURITY(pB)   (((pB)[6] >> 4) & 0x07)
++#define GET_SD_SCR_DATA_STAT_AFTER_ERASE(pB) (((pB)[6] >> 7) & 0x01)
++
++/* SDIO R4 Response */
++#define SD_SDIO_R4_RESPONSE_BYTES 6
++#define SD_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[1])        |  \
++                          (((UINT32)(pR)[2]) << 8)  |  \
++                          (((UINT32)(pR)[3]) << 16))
++#define SD_SDIO_R4_IS_MEMORY_PRESENT(pR)   (((pR)[4] & 0x08) == 0x08)
++#define SD_SDIO_R4_GET_IO_FUNC_COUNT(pR)   (((pR)[4] >> 4) & 0x07)
++#define SD_SDIO_R4_IS_CARD_READY(pR)       (((pR)[4] & 0x80) == 0x80)
++
++/* SDIO R5 response */
++#define SD_SDIO_R5_RESPONSE_BYTES      6
++#define SD_SDIO_R5_READ_DATA_OFFSET    1
++#define SD_R5_GET_READ_DATA(pR)  (pR)[SD_SDIO_R5_READ_DATA_OFFSET]
++#define SD_R5_RESP_FLAGS_OFFSET   2
++#define SD_R5_GET_RESP_FLAGS(pR) (pR)[SD_R5_RESP_FLAGS_OFFSET]
++#define SD_R5_SET_CMD(pR,cmd)  (pR)[5] = (cmd) & 0xC0
++#define SD_R5_RESP_CMD_ERR  (1 << 7) /* for previous cmd */
++#define SD_R5_ILLEGAL_CMD   (1 << 6)
++#define SD_R5_GENERAL_ERR   (1 << 3)
++#define SD_R5_INVALID_FUNC  (1 << 1)
++#define SD_R5_ARG_RANGE_ERR (1 << 0)
++#define SD_R5_CURRENT_CMD_ERRORS (SD_R5_ILLEGAL_CMD | SD_R5_GENERAL_ERR \
++                                 | SD_R5_INVALID_FUNC | SD_R5_ARG_RANGE_ERR)
++#define SD_R5_ERRORS (SD_R5_CURRENT_CMD_ERRORS)
++
++#define SD_R5_GET_IO_STATE(pR) (((pR)[2] >> 4) & 0x03)
++#define SD_R5_STATE_DIS 0x00
++#define SD_R5_STATE_CMD 0x01
++#define SD_R5_STATE_TRN 0x02
++
++/* SDIO Modified R6 Response */
++#define SD_SDIO_R6_RESPONSE_BYTES 6
++#define SD_SDIO_R6_GET_RCA(pR)  ((UINT16)((pR)[3]) | ((UINT16)((pR)[4]) << 8))
++#define SD_SDIO_R6_GET_CSTAT(pR)((UINT16)((pR)[1]) | ((UINT16)((pR)[2]) << 8))
++
++/* SPI mode R1 response */
++#define SPI_R1_RESPONSE_BYTES   1
++#define GET_SPI_R1_RESP_TOKEN(pR) (pR)[0]
++#define SPI_CS_STATE_IDLE       0x01
++#define SPI_CS_ERASE_RESET      (1 << 1)
++#define SPI_CS_ILLEGAL_CMD      (1 << 2)
++#define SPI_CS_CMD_CRC_ERR      (1 << 3)
++#define SPI_CS_ERASE_SEQ_ERR    (1 << 4)
++#define SPI_CS_ADDRESS_ERR      (1 << 5)
++#define SPI_CS_PARAM_ERR        (1 << 6)
++#define SPI_CS_ERR_MASK         0x7c
++
++/* SPI mode R2 response */
++#define SPI_R2_RESPONSE_BYTES  2
++#define GET_SPI_R2_RESP_TOKEN(pR)   (pR)[1]
++#define GET_SPI_R2_STATUS_TOKEN(pR) (pR)[0]
++/* the first response byte is defined above */
++/* the second response byte is defined below */
++#define SPI_CS_CARD_IS_LOCKED      (1 << 0)
++#define SPI_CS_LOCK_UNLOCK_FAILED  (1 << 1)
++#define SPI_CS_ERROR               (1 << 2)
++#define SPI_CS_INTERNAL_ERROR      (1 << 3)
++#define SPI_CS_ECC_FAILED          (1 << 4)
++#define SPI_CS_WP_VIOLATION        (1 << 5)
++#define SPI_CS_ERASE_PARAM_ERR     (1 << 6)
++#define SPI_CS_OUT_OF_RANGE        (1 << 7)
++
++/* SPI mode R3 response */
++#define SPI_R3_RESPONSE_BYTES 5
++#define SPI_R3_GET_OCR(pR) ((((UINT32)((pR)[0])) |         \
++                            (((UINT32)((pR)[1])) << 8)  |  \
++                            (((UINT32)((pR)[2])) << 16) |  \
++                            (((UINT32)((pR)[3])) << 24)) & SDMMC_OCR_VOLTAGE_MASK)
++#define SPI_R3_IS_CARD_READY(pR)  (((pR)[3] & 0x80) == 0x80)
++#define GET_SPI_R3_RESP_TOKEN(pR) (pR)[4]
++
++/* SPI mode SDIO R4 response */
++#define SPI_SDIO_R4_RESPONSE_BYTES 5
++#define SPI_SDIO_R4_GET_OCR(pR) ((UINT32)((pR)[0])        |  \
++                          (((UINT32)(pR)[1]) << 8)   |  \
++                          (((UINT32)(pR)[2]) << 16))
++#define SPI_SDIO_R4_IS_MEMORY_PRESENT(pR)   (((pR)[3] & 0x08) == 0x08)
++#define SPI_SDIO_R4_GET_IO_FUNC_COUNT(pR)   (((pR)[3] >> 4) & 0x07)
++#define SPI_SDIO_R4_IS_CARD_READY(pR)       (((pR)[3] & 0x80) == 0x80)
++#define GET_SPI_SDIO_R4_RESP_TOKEN(pR)  (pR)[4]
++
++/* SPI Mode SDIO R5 response */
++#define SPI_SDIO_R5_RESPONSE_BYTES 2
++#define GET_SPI_SDIO_R5_RESP_TOKEN(pR)     (pR)[1]
++#define GET_SPI_SDIO_R5_RESPONSE_RDATA(pR) (pR)[0]
++#define SPI_R5_IDLE_STATE   0x01
++#define SPI_R5_ILLEGAL_CMD  (1 << 2)
++#define SPI_R5_CMD_CRC      (1 << 3)
++#define SPI_R5_FUNC_ERR     (1 << 4)
++#define SPI_R5_PARAM_ERR    (1 << 6)
++
++/* SDIO COMMAND 52 Definitions */
++#define CMD52_READ  0
++#define CMD52_WRITE 1
++#define CMD52_READ_AFTER_WRITE 1
++#define CMD52_NORMAL_WRITE     0
++#define SDIO_SET_CMD52_ARG(arg,rw,func,raw,address,writedata) \
++    (arg) = (((rw) & 1) << 31)           | \
++            (((func) & 0x7) << 28)       | \
++            (((raw) & 1) << 27)          | \
++            (1 << 26)                    | \
++            (((address) & 0x1FFFF) << 9) | \
++            (1 << 8)                     | \
++            ((writedata) & 0xFF)
++#define SDIO_SET_CMD52_READ_ARG(arg,func,address) \
++    SDIO_SET_CMD52_ARG(arg,CMD52_READ,(func),0,address,0x00)
++#define SDIO_SET_CMD52_WRITE_ARG(arg,func,address,value) \
++    SDIO_SET_CMD52_ARG(arg,CMD52_WRITE,(func),CMD52_NORMAL_WRITE,address,value)
++
++/* SDIO COMMAND 53 Definitions */
++#define CMD53_READ          0
++#define CMD53_WRITE         1
++#define CMD53_BLOCK_BASIS   1
++#define CMD53_BYTE_BASIS    0
++#define CMD53_FIXED_ADDRESS 0
++#define CMD53_INCR_ADDRESS  1
++#define SDIO_SET_CMD53_ARG(arg,rw,func,mode,opcode,address,bytes_blocks) \
++    (arg) = (((rw) & 1) << 31)                  | \
++            (((func) & 0x7) << 28)              | \
++            (((mode) & 1) << 27)                | \
++            (((opcode) & 1) << 26)              | \
++            (((address) & 0x1FFFF) << 9)        | \
++            ((bytes_blocks) & 0x1FF)
++
++#define SDIO_MAX_LENGTH_BYTE_BASIS  512
++#define SDIO_MAX_BLOCKS_BLOCK_BASIS 511
++#define SDIO_MAX_BYTES_PER_BLOCK    2048
++#define SDIO_COMMON_AREA_FUNCTION_NUMBER 0
++#define SDIO_FIRST_FUNCTION_NUMBER       1
++#define SDIO_LAST_FUNCTION_NUMBER        7
++
++#define CMD53_CONVERT_BYTE_BASIS_BLK_LENGTH_PARAM(b) (((b) < SDIO_MAX_LENGTH_BYTE_BASIS) ? (b) : 0)
++#define CMD53_CONVERT_BLOCK_BASIS_BLK_COUNT_PARAM(b) (((b) <= SDIO_MAX_BLOCKS_BLOCK_BASIS) ? (b) : 0)
++
++
++/* SDIO COMMON Registers */
++
++/* revision register */
++#define CCCR_SDIO_REVISION_REG  0x00
++#define CCCR_REV_MASK           0x0F
++#define CCCR_REV_1_0            0x00
++#define CCCR_REV_1_1            0x01
++#define SDIO_REV_MASK           0xF0
++#define SDIO_REV_1_00           0x00
++#define SDIO_REV_1_10           0x10
++#define SDIO_REV_1_20           0x20
++/* SD physical spec revision */
++#define SD_SPEC_REVISION_REG    0x01
++#define SD_REV_MASK             0x0F
++#define SD_REV_1_01             0x00
++#define SD_REV_1_10             0x01
++/* I/O Enable  */
++#define SDIO_ENABLE_REG         0x02
++/* I/O Ready */
++#define SDIO_READY_REG          0x03
++/* Interrupt Enable */
++#define SDIO_INT_ENABLE_REG     0x04
++#define SDIO_INT_MASTER_ENABLE  0x01
++#define SDIO_INT_ALL_ENABLE     0xFE
++/* Interrupt Pending */
++#define SDIO_INT_PENDING_REG    0x05
++#define SDIO_INT_PEND_MASK      0xFE
++/* I/O Abort */
++#define SDIO_IO_ABORT_REG       0x06
++#define SDIO_IO_RESET           (1 << 3)
++/* Bus Interface */
++#define SDIO_BUS_IF_REG         0x07
++#define CARD_DETECT_DISABLE     0x80
++#define SDIO_BUS_WIDTH_1_BIT    0x00
++#define SDIO_BUS_WIDTH_4_BIT    0x02
++/* Card Capabilities */
++#define SDIO_CARD_CAPS_REG          0x08
++#define SDIO_CAPS_CMD52_WHILE_DATA  0x01   /* card can issue CMD52 while data transfer */
++#define SDIO_CAPS_MULTI_BLOCK       0x02   /* card supports multi-block data transfers */
++#define SDIO_CAPS_READ_WAIT         0x04   /* card supports read-wait protocol */
++#define SDIO_CAPS_SUSPEND_RESUME    0x08   /* card supports I/O function suspend/resume */
++#define SDIO_CAPS_INT_MULTI_BLK     0x10   /* interrupts between multi-block data capable */
++#define SDIO_CAPS_ENB_INT_MULTI_BLK 0x20   /* enable ints between muli-block data */
++#define SDIO_CAPS_LOW_SPEED         0x40   /* low speed card */
++#define SDIO_CAPS_4BIT_LS           0x80   /* 4 bit low speed card */
++/* Common CIS pointer */
++#define SDIO_CMN_CIS_PTR_LOW_REG    0x09
++#define SDIO_CMN_CIS_PTR_MID_REG    0x0a
++#define SDIO_CMN_CIS_PTR_HI_REG     0x0b
++/* Bus suspend */
++#define SDIO_BUS_SUSPEND_REG            0x0c
++#define SDIO_FUNC_SUSPEND_STATUS_MASK   0x01 /* selected function is suspended */
++#define SDIO_SUSPEND_FUNCTION           0x02 /* suspend the current selected function */
++/* Function select (for bus suspension) */
++#define SDIO_FUNCTION_SELECT_REG        0x0d
++#define SDIO_SUSPEND_FUNCTION_0         0x00
++#define SDIO_SUSPEND_MEMORY_FUNC_MASK    0x08
++/* Function Execution */
++#define SDIO_FUNCTION_EXEC_REG          0x0e
++#define SDIO_MEMORY_FUNC_EXEC_MASK      0x01
++/* Function Ready */
++#define SDIO_FUNCTION_READY_REG          0x0f
++#define SDIO_MEMORY_FUNC_BUSY_MASK       0x01
++
++/* power control 1.10 only  */
++#define SDIO_POWER_CONTROL_REG            0x12
++#define SDIO_POWER_CONTROL_SMPC           0x01
++#define SDIO_POWER_CONTROL_EMPC           0x02
++
++/* high speed control , 1.20 only */
++#define SDIO_HS_CONTROL_REG               0x13
++#define SDIO_HS_CONTROL_SHS               0x01
++#define SDIO_HS_CONTROL_EHS               0x02
++
++/* Function Base Registers */
++#define xFUNCTION_FBR_OFFSET(funcNo) (0x100*(funcNo))
++/* offset calculation that does not use multiplication */
++static INLINE UINT32 CalculateFBROffset(UCHAR FuncNo) {
++    UCHAR i = FuncNo;
++    UINT32 offset = 0;
++    while (i) {
++        offset += 0x100;
++        i--;
++    }
++    return offset;
++}
++/* Function info */
++#define FBR_FUNC_INFO_REG_OFFSET(fbr)   ((fbr) + 0x00)
++#define FUNC_INFO_SUPPORTS_CSA_MASK     0x40
++#define FUNC_INFO_ENABLE_CSA            0x80
++#define FUNC_INFO_DEVICE_CODE_MASK      0x0F
++#define FUNC_INFO_DEVICE_CODE_LAST      0x0F
++#define FBR_FUNC_EXT_DEVICE_CODE_OFFSET(fbr) ((fbr) + 0x01)
++/* Function Power selection */
++#define FBR_FUNC_POWER_SELECT_OFFSET(fbr)    ((fbr) + 0x02)
++#define FUNC_POWER_SELECT_SPS           0x01
++#define FUNC_POWER_SELECT_EPS           0x02
++/* Function CIS ptr */
++#define FBR_FUNC_CIS_LOW_OFFSET(fbr)   ((fbr) + 0x09)
++#define FBR_FUNC_CIS_MID_OFFSET(fbr)   ((fbr) + 0x0a)
++#define FBR_FUNC_CIS_HI_OFFSET(fbr)    ((fbr) + 0x0b)
++/* Function CSA ptr */
++#define FBR_FUNC_CSA_LOW_OFFSET(fbr)   ((fbr) + 0x0c)
++#define FBR_FUNC_CSA_MID_OFFSET(fbr)   ((fbr) + 0x0d)
++#define FBR_FUNC_CSA_HI_OFFSET(fbr)    ((fbr) + 0x0e)
++/* Function CSA data window */
++#define FBR_FUNC_CSA_DATA_OFFSET(fbr)  ((fbr) + 0x0f)
++/* Function Block Size Control */
++#define FBR_FUNC_BLK_SIZE_LOW_OFFSET(fbr)  ((fbr) + 0x10)
++#define FBR_FUNC_BLK_SIZE_HI_OFFSET(fbr)   ((fbr) + 0x11)
++#define SDIO_CIS_AREA_BEGIN   0x00001000
++#define SDIO_CIS_AREA_END     0x00017fff
++/* Tuple definitions */
++#define CISTPL_NULL         0x00
++#define CISTPL_CHECKSUM     0x10
++#define CISTPL_VERS_1       0x15
++#define CISTPL_ALTSTR       0x16
++#define CISTPL_MANFID       0x20
++#define CISTPL_FUNCID       0x21
++#define CISTPL_FUNCE        0x22
++#define CISTPL_VENDOR       0x91
++#define CISTPL_END          0xff
++#define CISTPL_LINK_END     0xff
++
++
++/* Manufacturer ID tuple */
++struct SDIO_MANFID_TPL {
++    UINT16  ManufacturerCode;   /* jedec code */
++    UINT16  ManufacturerInfo;   /* manufacturer specific code */
++}CT_PACK_STRUCT;
++
++/* Function ID Tuple */
++struct SDIO_FUNC_ID_TPL {
++    UINT8  DeviceCode;  /* device code */
++    UINT8  InitMask;    /* system initialization mask (not used) */
++}CT_PACK_STRUCT;
++
++    /* Extended Function Tuple (Common) */
++struct SDIO_FUNC_EXT_COMMON_TPL {
++    UINT8   Type;                               /* type */
++    UINT16  Func0_MaxBlockSize;                 /* max function 0 block transfer size */
++    UINT8   MaxTransSpeed;                      /* max transfer speed (encoded) */
++#define TRANSFER_UNIT_MULTIPIER_MASK  0x07
++#define TIME_VALUE_MASK               0x78
++#define TIME_VALUE_SHIFT              3
++}CT_PACK_STRUCT;
++
++/* Extended Function Tuple (Per Function) */
++struct SDIO_FUNC_EXT_FUNCTION_TPL {
++    UINT8   Type;                               /* type */
++#define SDIO_FUNC_INFO_WAKEUP_SUPPORT 0x01
++    UINT8   FunctionInfo;                       /* function info */
++    UINT8   SDIORev;                            /* revision */
++    UINT32  CardPSN;                            /* product serial number */
++    UINT32  CSASize;                            /* CSA size */
++    UINT8   CSAProperties;                      /* CSA properties */
++    UINT16  MaxBlockSize;                       /* max block size for block transfers */
++    UINT32  FunctionOCR;                        /* optimal function OCR */
++    UINT8   OpMinPwr;                           /* operational min power */
++    UINT8   OpAvgPwr;                           /* operational average power */
++    UINT8   OpMaxPwr;                           /* operation maximum power */
++    UINT8   SbMinPwr;                           /* standby minimum power */
++    UINT8   SbAvgPwr;                           /* standby average power */
++    UINT8   SbMaxPwr;                           /* standby maximum power */
++    UINT16  MinBandWidth;                       /* minimum bus bandwidth */
++    UINT16  OptBandWidth;                       /* optimalbus bandwitdh */
++}CT_PACK_STRUCT;
++
++struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 {
++    struct SDIO_FUNC_EXT_FUNCTION_TPL CommonInfo;  /* from 1.0*/
++    UINT16  EnableTimeOut;                  /* timeout for enable */
++    UINT16  OperPwrMaxPwr;
++    UINT16  OperPwrAvgPwr;
++    UINT16  HiPwrMaxPwr;
++    UINT16  HiPwrAvgPwr;
++    UINT16  LowPwrMaxPwr;
++    UINT16  LowPwrAvgPwr;
++}CT_PACK_STRUCT;
++
++static INLINE SDIO_STATUS ConvertCMD52ResponseToSDIOStatus(UINT8 CMD52ResponseFlags) {
++    if (!(CMD52ResponseFlags & SD_R5_ERRORS)) {
++        return SDIO_STATUS_SUCCESS;
++    }
++    if (CMD52ResponseFlags & SD_R5_ILLEGAL_CMD) {
++        return SDIO_STATUS_DATA_STATE_INVALID;
++    } else if (CMD52ResponseFlags & SD_R5_INVALID_FUNC) {
++        return SDIO_STATUS_INVALID_FUNC;
++    } else if (CMD52ResponseFlags & SD_R5_ARG_RANGE_ERR) {
++        return SDIO_STATUS_FUNC_ARG_ERROR;
++    } else {
++        return SDIO_STATUS_DATA_ERROR_UNKNOWN;
++    }
++}
++
++/* CMD6 mode switch definitions */
++
++#define SD_SWITCH_FUNC_CHECK    0
++#define SD_SWITCH_FUNC_SET      ((UINT32)(1 << 31))
++#define SD_FUNC_NO_SELECT_MASK  0x00FFFFFF
++#define SD_SWITCH_GRP_1         0
++#define SD_SWITCH_GRP_2         1
++#define SD_SWITCH_GRP_3         2
++#define SD_SWITCH_GRP_4         3
++#define SD_SWITCH_GRP_5         4
++#define SD_SWITCH_GRP_6         5
++
++#define SD_SWITCH_HIGH_SPEED_GROUP     SD_SWITCH_GRP_1
++#define SD_SWITCH_HIGH_SPEED_FUNC_NO   1
++
++#define SD_SWITCH_MAKE_SHIFT(grp) ((grp) * 4)
++
++#define SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo) \
++     ((SD_FUNC_NO_SELECT_MASK & (~(0xF << SD_SWITCH_MAKE_SHIFT(FuncGrp)))) |  \
++        (((FuncNo) & 0xF) << SD_SWITCH_MAKE_SHIFT(FuncGrp)))                 \
++
++#define SD_SWITCH_FUNC_ARG_GROUP_CHECK(FuncGrp,FuncNo) \
++    (SD_SWITCH_FUNC_CHECK | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
++
++#define SD_SWITCH_FUNC_ARG_GROUP_SET(FuncGrp,FuncNo)   \
++    (SD_SWITCH_FUNC_SET | SD_SWITCH_MAKE_GRP_PATTERN(FuncGrp,FuncNo))
++
++#define SD_SWITCH_FUNC_STATUS_BLOCK_BYTES 64
++
++#define SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pBuffer,FuncGrp) \
++    (USHORT)((pBuffer)[50 + ((FuncGrp)*2)] | ((pBuffer)[51 + ((FuncGrp)*2)] << 8))
++
++#define SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pBuffer) \
++     (USHORT)((pBuffer)[62] | ((pBuffer)[63] << 8))
++
++static INLINE UINT8 SDSwitchGetSwitchResult(PUINT8 pBuffer, UINT8 FuncGrp)
++{
++    switch (FuncGrp) {
++        case 0:
++            return (pBuffer[47] & 0xF);
++        case 1:
++            return (pBuffer[47] >> 4);
++        case 2:
++            return (pBuffer[48] & 0xF);
++        case 3:
++            return (pBuffer[48] >> 4);
++        case 4:
++            return (pBuffer[49] & 0xF);
++        case 5:
++            return (pBuffer[49] >> 4);
++        default:
++            return 0xF;
++    }
++}
++
++#endif
+Index: linux-2.6.22/include/linux/sdio/ctsystem.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/include/linux/sdio/ctsystem.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,110 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: cpsystem.h
++
++ at abstract: common system include file.
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __CPSYSTEM_H___
++#define __CPSYSTEM_H___
++
++/* SDIO stack status defines */
++/* < 0 error, >0 warning, 0 success */
++#define SDIO_IS_WARNING(status) ((status) > 0)
++#define SDIO_IS_ERROR(status) ((status) < 0)
++#define SDIO_SUCCESS(status) ((SDIO_STATUS)(status) >= 0)
++#define SDIO_STATUS_SUCCESS             0
++#define SDIO_STATUS_ERROR              -1
++#define SDIO_STATUS_INVALID_PARAMETER  -2
++#define SDIO_STATUS_PENDING             3
++#define SDIO_STATUS_DEVICE_NOT_FOUND   -4
++#define SDIO_STATUS_DEVICE_ERROR       -5
++#define SDIO_STATUS_INTERRUPTED        -6
++#define SDIO_STATUS_NO_RESOURCES       -7
++#define SDIO_STATUS_CANCELED           -8
++#define SDIO_STATUS_BUFFER_TOO_SMALL   -9
++#define SDIO_STATUS_NO_MORE_MESSAGES   -10
++#define SDIO_STATUS_BUS_RESP_TIMEOUT   -20    /* response timed-out */
++#define SDIO_STATUS_BUS_READ_TIMEOUT   -21    /* read data timed-out */
++#define SDIO_STATUS_BUS_READ_CRC_ERR   -22   /* data CRC failed */
++#define SDIO_STATUS_BUS_WRITE_ERROR    -23   /* write failed */
++#define SDIO_STATUS_BUS_RESP_CRC_ERR   -24   /* response received with a CRC error */
++#define SDIO_STATUS_INVALID_TUPLE_LENGTH -25 /* tuple length was invalid */
++#define SDIO_STATUS_TUPLE_NOT_FOUND      -26 /* tuple could not be found */
++#define SDIO_STATUS_CIS_OUT_OF_RANGE     -27 /* CIS is out of range in the tuple scan */
++#define SDIO_STATUS_FUNC_ENABLE_TIMEOUT  -28 /* card timed out enabling or disabling */
++#define SDIO_STATUS_DATA_STATE_INVALID   -29 /* card is in an invalid state for data */
++#define SDIO_STATUS_DATA_ERROR_UNKNOWN   -30 /* card cannot process data transfer */
++#define SDIO_STATUS_INVALID_FUNC         -31 /* sdio request is not valid for the function */
++#define SDIO_STATUS_FUNC_ARG_ERROR       -32 /* sdio request argument is invalid or out of range */
++#define SDIO_STATUS_INVALID_COMMAND      -33 /* SD COMMAND is invalid for the card state */
++#define SDIO_STATUS_SDREQ_QUEUE_FAILED   -34 /* request failed to insert into queue */
++#define SDIO_STATUS_BUS_RESP_TIMEOUT_SHIFTABLE -35  /* response timed-out, possibily shiftable to correct  */
++#define SDIO_STATUS_UNSUPPORTED          -36  /* not supported  */
++#define SDIO_STATUS_PROGRAM_TIMEOUT      -37  /* memory card programming timeout  */
++#define SDIO_STATUS_PROGRAM_STATUS_ERROR -38  /* memory card programming errors  */
++
++#include <linux/sdio/ctsystem_linux.h>
++
++/* get structure from contained field */
++#define CONTAINING_STRUCT(address, struct_type, field_name)\
++            ((struct_type *)((ULONG_PTR)(address) - (ULONG_PTR)(&((struct_type *)0)->field_name)))
++
++#define ZERO_OBJECT(obj) memset(&(obj),0,sizeof(obj))
++#define ZERO_POBJECT(pObj) memset((pObj),0,sizeof(*(pObj)))
++
++/* bit field support functions */
++static INLINE void SetBit(PULONG pField, UINT position) {
++    *pField |= 1 << (ULONG)position;
++}
++static INLINE void ClearBit(PULONG pField, UINT position) {
++    *pField &= ~(1 << (ULONG)position);
++}
++static INLINE BOOL IsBitSet(PULONG pField, UINT position) {
++    return (*pField & (1 << (ULONG)position)) ? TRUE : FALSE;
++}
++static INLINE INT FirstClearBit(PULONG pField) {
++    UINT ii;
++    for(ii = 0; ii < sizeof(ULONG)*8; ii++) {
++        if (!IsBitSet(pField, ii)) {
++            return (INT)ii;
++        }
++    }
++    /* no clear bits found */
++    return -1;
++}
++
++#endif /* __CPSYSTEM_H___ */
+Index: linux-2.6.22/include/linux/sdio/ctsystem_linux.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/include/linux/sdio/ctsystem_linux.h	2007-11-08 16:56:34.000000000 +0100
+@@ -0,0 +1,955 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: ctsystem_linux.h
++
++ at abstract: common system include file for Linux.
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __CPSYSTEM_LINUX_H___
++#define __CPSYSTEM_LINUX_H___
++
++/* #define DBG_TIMESTAMP 1 */
++#define SD_TRACK_REQ 1
++
++/* LINUX support */
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/types.h>
++#include <linux/spinlock.h>
++#include <linux/version.h>
++#include <linux/interrupt.h>
++#include <linux/pnp.h>
++#include <asm/hardirq.h>
++#include <asm/semaphore.h>
++#include <asm/io.h>
++#include <asm/scatterlist.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++
++
++/* generic types */
++typedef    unsigned char    UCHAR;
++typedef    unsigned char *  PUCHAR;
++typedef    char             TEXT;
++typedef    char *           PTEXT;
++typedef    unsigned short   USHORT;
++typedef    unsigned short*  PUSHORT;
++typedef    unsigned int     UINT;
++typedef    unsigned int*    PUINT;
++typedef    int              INT;
++typedef    int*             PINT;
++typedef    unsigned long    ULONG;
++typedef    unsigned long*   PULONG;
++typedef    u8               UINT8;
++typedef    u16              UINT16;
++typedef    u32              UINT32;
++typedef    u8*              PUINT8;
++typedef    u16*             PUINT16;
++typedef    u32*             PUINT32;
++typedef    unsigned char *  ULONG_PTR;
++typedef    void*            PVOID;
++typedef    unsigned char    BOOL;
++typedef    BOOL*            PBOOL;
++typedef    int              SDIO_STATUS;
++typedef    int              SYSTEM_STATUS;
++typedef    unsigned int     EVENT_TYPE;
++typedef    unsigned int     EVENT_ARG;
++typedef    unsigned int*    PEVENT_TYPE;
++typedef    struct semaphore OS_SEMAPHORE;
++typedef    struct semaphore* POS_SEMAPHORE;
++typedef    struct semaphore  OS_SIGNAL;    /* OS signals are just semaphores */
++typedef    struct semaphore* POS_SIGNAL;
++typedef    spinlock_t OS_CRITICALSECTION;
++typedef    spinlock_t *POS_CRITICALSECTION;
++typedef    int              SDPOWER_STATE;
++typedef    unsigned long    ATOMIC_FLAGS;
++typedef    INT              THREAD_RETURN;
++typedef    dma_addr_t       DMA_ADDRESS;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
++typedef    struct task_struct* PKERNEL_TASK;
++typedef    struct device_driver OS_DRIVER;
++typedef    struct device_driver* POS_DRIVER;
++typedef    struct device    OS_DEVICE;
++typedef    struct device*   POS_DEVICE;
++typedef    struct pnp_driver OS_PNPDRIVER;
++typedef    struct pnp_driver* POS_PNPDRIVER;
++typedef    struct pnp_dev   OS_PNPDEVICE;
++typedef    struct pnp_dev*  POS_PNPDEVICE;
++typedef    struct module*   POS_MODULE;
++#else
++/* 2.4 */
++typedef    int              PKERNEL_TASK;
++typedef    PVOID            OS_DRIVER;
++typedef    PVOID*           POS_DRIVER;
++typedef    PVOID            OS_DEVICE;
++typedef    PVOID*           POS_DEVICE;
++typedef    PVOID            OS_PNPDRIVER;
++typedef    PVOID*           POS_PNPDRIVER;
++typedef    PVOID            OS_PNPDEVICE;
++typedef    PVOID*           POS_PNPDEVICE;
++typedef    struct module*   POS_MODULE;
++#define    module_param(a,b,c) MODULE_PARM(a, "i")
++#endif
++
++typedef    int              CT_DEBUG_LEVEL;
++
++
++#ifndef TRUE
++#define TRUE 1
++#endif
++#ifndef FALSE
++#define FALSE 0
++#endif
++#ifndef NULL
++#define NULL ((PVOID)0)
++#endif
++#define SDDMA_DESCRIPTION_FLAG_DMA   0x1  /* DMA enabled */
++#define SDDMA_DESCRIPTION_FLAG_SGDMA 0x2  /* Scatter-Gather DMA enabled */
++typedef struct _SDDMA_DESCRIPTION {
++    UINT16      Flags;      /* SDDMA_DESCRIPTION_FLAG_xxx */
++    UINT16      MaxDescriptors; /* number of supported scatter gather entries */
++    UINT32      MaxBytesPerDescriptor;  /* maximum bytes in a DMA descriptor entry */
++    u64         Mask;              /* dma address mask */
++    UINT32      AddressAlignment;  /* dma address alignment mask, least significant bits indicate illegal address bits */
++    UINT32      LengthAlignment;   /* dma buffer length alignment mask, least significant bits indicate illegal length bits  */
++}SDDMA_DESCRIPTION, *PSDDMA_DESCRIPTION;
++typedef struct scatterlist SDDMA_DESCRIPTOR, *PSDDMA_DESCRIPTOR;
++
++#define INLINE  inline
++#define CT_PACK_STRUCT __attribute__ ((packed))
++
++#define CT_DECLARE_MODULE_PARAM_INTEGER(p)  module_param(p, int, 0644);
++
++/* debug print macros */
++//#define SDDBG_KERNEL_PRINT_LEVEL KERN_DEBUG
++#define SDDBG_KERNEL_PRINT_LEVEL KERN_ALERT
++
++#define DBG_MASK_NONE 0x0
++#define DBG_MASK_HCD  0x100
++#define DBG_MASK_LIB  0x200
++#define DBG_MASK_BUS  0x400
++
++/* debug output levels, this must be order low number to higher */
++#define SDDBG_ERROR 3
++#define SDDBG_WARN  4
++#define SDDBG_DEBUG 6
++#define SDDBG_TRACE 7
++
++#define DBG_LEVEL_NONE  0
++#define DBG_LEVEL_ERROR SDDBG_ERROR
++#define DBG_LEVEL_WARN  SDDBG_WARN
++#define DBG_LEVEL_DEBUG SDDBG_DEBUG
++#define DBG_LEVEL_TRACE SDDBG_TRACE
++
++#define DBG_GET_LEVEL(lvl) ((lvl) & 0xff)
++#define DBG_GET_MASK(lvl) (((lvl) & 0xff00))
++
++#define DBG_SDIO_MASK (DBG_MASK_NONE | DBG_LEVEL_TRACE)
++
++#define DEBUG 1
++
++#ifdef DEBUG
++#define DBG_ASSERT(test) \
++{                         \
++    if (!(test)) {          \
++        DBG_PRINT(SDDBG_ERROR, ("Debug Assert Caught, File %s, Line: %d, Test:%s \n",__FILE__, __LINE__,#test)); \
++    }                     \
++}
++#define DBG_ASSERT_WITH_MSG(test,s) \
++{                                   \
++    if (!(test)) {                  \
++        DBG_PRINT(SDDBG_ERROR, ("Assert:%s File %s, Line: %d \n",(s),__FILE__, __LINE__)); \
++    }                     \
++}
++
++#define DBG_PRINT(lvl, args)\
++    do {\
++            if (DBG_GET_LEVEL(lvl) <= (DBG_SDIO_MASK & 0xff)) \
++                printk(_DBG_PRINTX_ARG args); \
++    } while(0);
++
++#else /* DEBUG */
++
++#define DBG_PRINT(lvl, str)
++#define DBG_ASSERT(test)
++#define DBG_ASSERT_WITH_MSG(test,s)
++#endif /* DEBUG */
++
++#define _DBG_PRINTX_ARG(arg...) arg /* unroll the parens around the var args*/
++#define DBG_GET_DEBUG_LEVEL() DBG_GET_LEVEL(DBG_SDIO_MASK)
++#define DBG_SET_DEBUG_LEVEL(v)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Print a string to the debugger or console
++
++  @function name: REL_PRINT
++  @prototype: void REL_PRINT(INT Level, string)
++  @category: Support_Reference
++  @input:  Level - debug level for the print
++
++  @output: none
++
++  @return:
++
++  @notes: If Level is less than the current debug level, the print will be
++          issued. This print cannot be conditionally compiled.
++  @see also: DBG_PRINT
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define REL_PRINT(lvl, args)\
++    {if (lvl <= DBG_GET_DEBUG_LEVEL())\
++        printk(_DBG_PRINTX_ARG args);\
++    }
++
++#ifdef DBG_CRIT_SECTION_RECURSE
++   /* this macro thows an exception if the lock is recursively taken
++    * the kernel must be configured with: CONFIG_DEBUG_SPINLOCK=y */
++#define call_spin_lock(pCrit) \
++{                                     \
++  UINT32 unlocked = 1;                \
++  if ((pCrit)->lock) {unlocked = 0;}  \
++  spin_lock_bh(pCrit);                \
++  if (!unlocked) {                     \
++     unlocked = 0x01;                   \
++     unlocked = *((volatile UINT32 *)unlocked); \
++  }                                   \
++}
++
++#define call_spin_lock_irqsave(pCrit,isc) \
++{                                     \
++  UINT32 unlocked = 1;                \
++  if ((pCrit)->lock) {unlocked = 0;}  \
++  spin_lock_irqsave(pCrit,isc);                \
++  if (!unlocked) {                     \
++     unlocked = 0x01;                   \
++     unlocked = *((volatile UINT32 *)unlocked); \
++  }                                   \
++}
++
++#else
++#define call_spin_lock(s) spin_lock_bh(s)
++#define call_spin_lock_irqsave(s,isc) spin_lock_irqsave(s,isc)
++#endif
++
++#define call_spin_unlock(s) spin_unlock_bh((s))
++#define call_spin_unlock_irqrestore(s,isc) spin_unlock_irqrestore(s,isc)
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,9)
++#define NonSchedulable() (in_atomic() || irqs_disabled())
++#else
++#define NonSchedulable() (irqs_disabled())
++#endif
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Initialize a critical section object.
++
++  @function name: CriticalSectionInit
++  @prototype: SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit)
++  @category: Support_Reference
++  @output: pCrit - pointer to critical section to initialize
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes:  CriticalSectionDelete() must be called to cleanup any resources
++           associated with the critical section.
++
++  @see also: CriticalSectionDelete, CriticalSectionAcquire, CriticalSectionRelease
++  @example: To initialize a critical section:
++        status = CriticalSectionInit(&pDevice->ListLock);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed
++            return status;
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionInit(POS_CRITICALSECTION pCrit) {
++    spin_lock_init(pCrit);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Acquire a critical section lock.
++
++  @function name: CriticalSectionAcquire
++  @prototype: SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit)
++  @category: Support_Reference
++
++  @input: pCrit - pointer to critical section that was initialized
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes:  The critical section lock is acquired when this function returns
++           SDIO_STATUS_SUCCESS.  Use CriticalSectionRelease() to release
++           the critical section lock.
++
++  @see also: CriticalSectionRelease
++
++  @example: To acquire a critical section lock:
++        status = CriticalSectionAcquire(&pDevice->ListLock);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed
++            return status;
++        }
++        ... access protected data
++            // unlock
++        status = CriticalSectionRelease(&pDevice->ListLock);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed
++            return status;
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionAcquire(POS_CRITICALSECTION pCrit) {
++    call_spin_lock(pCrit);
++    return SDIO_STATUS_SUCCESS;
++}
++
++// macro-tized versions
++#define CriticalSectionAcquire_M(pCrit) \
++    SDIO_STATUS_SUCCESS; call_spin_lock(pCrit)
++#define CriticalSectionRelease_M(pCrit) \
++    SDIO_STATUS_SUCCESS; call_spin_unlock(pCrit)
++
++#define CT_DECLARE_IRQ_SYNC_CONTEXT() unsigned long _ctSyncFlags
++
++#define CriticalSectionAcquireSyncIrq(pCrit) \
++    SDIO_STATUS_SUCCESS; call_spin_lock_irqsave(pCrit,_ctSyncFlags)
++
++#define CriticalSectionReleaseSyncIrq(pCrit) \
++    SDIO_STATUS_SUCCESS; call_spin_unlock_irqrestore(pCrit,_ctSyncFlags)
++
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Release a critical section lock.
++
++  @function name: CriticalSectionRelease
++  @prototype: SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit)
++  @category: Support_Reference
++
++  @input: pCrit - pointer to critical section that was initialized
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes:  The critical section lock is released when this function returns
++           SDIO_STATUS_SUCCESS.
++
++  @see also: CriticalSectionAcquire
++
++  @example: see CriticalSectionAcquire
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS CriticalSectionRelease(POS_CRITICALSECTION pCrit) {
++    call_spin_unlock(pCrit);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Cleanup a critical section object
++
++  @function name: CriticalSectionDelete
++  @prototype: void CriticalSectionDelete(POS_CRITICALSECTION pCrit)
++  @category: Support_Reference
++
++  @input: pCrit - an initialized critical section object
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes:
++
++  @see also: CriticalSectionInit, CriticalSectionAcquire, CriticalSectionRelease
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void CriticalSectionDelete(POS_CRITICALSECTION pCrit) {
++    return;
++}
++
++/* internal use */
++static inline SDIO_STATUS SignalInitialize(POS_SIGNAL pSignal) {
++    sema_init(pSignal, 0);
++    return SDIO_STATUS_SUCCESS;
++}
++/* internal use */
++static inline void SignalDelete(POS_SIGNAL pSignal) {
++    return;
++}
++/* internal use */
++static inline SDIO_STATUS SignalWaitInterruptible(POS_SIGNAL pSignal) {
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWaitInterruptible not allowed\n");
++    if (down_interruptible(pSignal) == 0) {
++        return SDIO_STATUS_SUCCESS;
++    } else {
++        return SDIO_STATUS_INTERRUPTED;
++    }
++}
++/* internal use */
++static inline SDIO_STATUS SignalWait(POS_SIGNAL pSignal) {
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SignalWait not allowed\n");
++    down(pSignal);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/* internal use */
++static inline SDIO_STATUS SignalSet(POS_SIGNAL pSignal) {
++    up(pSignal);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Initialize a semaphore object.
++
++  @function name: SemaphoreInitialize
++  @prototype: SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value)
++  @category: Support_Reference
++
++  @input:  value - initial value of the semaphore
++
++  @output: pSem - pointer to a semaphore object to initialize
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes:  SemaphoreDelete() must be called to cleanup any resources
++           associated with the semaphore
++
++  @see also: SemaphoreDelete, SemaphorePend, SemaphorePendInterruptable
++
++  @example: To initialize a semaphore:
++        status = SemaphoreInitialize(&pDevice->ResourceSem,1);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed
++            return status;
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphoreInitialize(POS_SEMAPHORE pSem, UINT value) {
++    sema_init(pSem, value);
++    return SDIO_STATUS_SUCCESS;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Cleanup a semaphore object.
++
++  @function name: SemaphoreDelete
++  @prototype: void SemaphoreDelete(POS_SEMAPHORE pSem)
++  @category: Support_Reference
++
++  @input: pSem - pointer to a semaphore object to cleanup
++
++  @return:
++
++  @notes:
++
++  @see also: SemaphoreInitialize
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void SemaphoreDelete(POS_SEMAPHORE pSem) {
++    return;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Acquire the semaphore or pend if the resource is not available
++
++  @function name: SemaphorePend
++  @prototype: SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem)
++  @category: Support_Reference
++
++  @input: pSem - pointer to an initialized semaphore object
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes: If the semaphore count is zero this function blocks until the count
++          becomes non-zero, otherwise the count is decremented and execution
++          continues. While waiting, the task/thread cannot be interrupted.
++          If the task or thread should be interruptible, use SemaphorePendInterruptible.
++          On some OSes SemaphorePend and SemaphorePendInterruptible behave the same.
++
++  @see also: SemaphorePendInterruptable, SemaphorePost
++  @example: To wait for a resource using a semaphore:
++        status = SemaphorePend(&pDevice->ResourceSem);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed
++            return status;
++        }
++        ... resource acquired
++        SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePend(POS_SEMAPHORE pSem) {
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePend not allowed\n");
++    down(pSem);
++    return SDIO_STATUS_SUCCESS;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Acquire the semaphore or pend if the resource is not available
++
++  @function name: SemaphorePendInterruptable
++  @prototype: SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem)
++  @category: Support_Reference
++
++  @input: pSem - pointer to an initialized semaphore object
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes: If the semaphore count is zero this function blocks until the count
++          becomes non-zero, otherwise the count is decremented and execution
++          continues. While waiting, the task/thread can be interrupted.
++          If the task or thread should not be interruptible, use SemaphorePend.
++
++  @see also: SemaphorePend, SemaphorePost
++  @example: To wait for a resource using a semaphore:
++        status = SemaphorePendInterruptable(&pDevice->ResourceSem);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed, could have been interrupted
++            return status;
++        }
++        ... resource acquired
++        SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePendInterruptable(POS_SEMAPHORE pSem) {
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePendInterruptable not allowed\n");
++    if (down_interruptible(pSem) == 0) {
++        return SDIO_STATUS_SUCCESS;
++    } else {
++        return SDIO_STATUS_INTERRUPTED;
++    }
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Post a semaphore.
++
++  @function name: SemaphorePost
++  @prototype: SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem)
++  @category: Support_Reference
++
++  @input: pSem - pointer to an initialized semaphore object
++
++  @return: SDIO_STATUS_SUCCESS on success.
++
++  @notes: This function increments the semaphore count.
++
++  @see also: SemaphorePend, SemaphorePendInterruptable.
++  @example: Posting a semaphore:
++        status = SemaphorePendInterruptable(&pDevice->ResourceSem);
++        if (!SDIO_SUCCESS(status)) {
++                .. failed, could have been interrupted
++            return status;
++        }
++        ... resource acquired
++            // post the semaphore
++        SemaphorePost(&pDevice->ResourceSem);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS SemaphorePost(POS_SEMAPHORE pSem) {
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"SemaphorePost not allowed\n");
++    up(pSem);
++    return SDIO_STATUS_SUCCESS;
++}
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Allocate a block of kernel accessible memory
++
++  @function name: KernelAlloc
++  @prototype: PVOID KernelAlloc(UINT size)
++  @category: Support_Reference
++
++  @input: size - size of memory block to allocate
++
++  @return: pointer to the allocated memory, NULL if allocation failed
++
++  @notes: For operating systems that use paging, the allocated memory is always
++          non-paged memory.  Caller should only use KernelFree() to release the
++          block of memory.  This call can potentially block and should only be called
++          from a schedulable context.  Use KernelAllocIrqSafe() if the allocation
++          must be made from a non-schedulable context.
++
++  @see also: KernelFree, KernelAllocIrqSafe
++  @example: allocating memory:
++        pBlock = KernelAlloc(1024);
++        if (pBlock == NULL) {
++                .. failed, no memory
++            return SDIO_STATUS_INSUFFICIENT_RESOURCES;
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline PVOID KernelAlloc(UINT size) {
++    PVOID pMem = kmalloc(size, GFP_KERNEL);
++    if (pMem != NULL) { memset(pMem,0,size); }
++    return pMem;
++}
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Free a block of kernel accessible memory.
++
++  @function name: KernelFree
++  @prototype: void KernelFree(PVOID ptr)
++  @category: Support_Reference
++
++  @input: ptr - pointer to memory allocated with KernelAlloc()
++
++  @return:
++
++  @notes: Caller should only use KernelFree() to release memory that was allocated
++          with KernelAlloc().
++
++  @see also: KernelAlloc
++  @example: KernelFree(pBlock);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void KernelFree(PVOID ptr) {
++    kfree(ptr);
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Allocate a block of kernel accessible memory in an IRQ-safe manner
++
++  @function name: KernelAllocIrqSafe
++  @prototype: PVOID KernelAllocIrqSafe(UINT size)
++  @category: Support_Reference
++
++  @input: size - size of memory block to allocate
++
++  @return: pointer to the allocated memory, NULL if allocation failed
++
++  @notes: This variant of KernelAlloc allows the allocation of small blocks of
++          memory from an ISR or from a context where scheduling has been disabled.
++          The allocations should be small as the memory is typically allocated
++          from a critical heap. The caller should only use KernelFreeIrqSafe()
++          to release the block of memory.
++
++  @see also: KernelAlloc, KernelFreeIrqSafe
++  @example: allocating memory:
++        pBlock = KernelAllocIrqSafe(16);
++        if (pBlock == NULL) {
++                .. failed, no memory
++            return SDIO_STATUS_INSUFFICIENT_RESOURCES;
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline PVOID KernelAllocIrqSafe(UINT size) {
++    return kmalloc(size, GFP_ATOMIC);
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Free a block of kernel accessible memory.
++
++  @function name: KernelFreeIrqSafe
++  @prototype: void KernelFreeIrqSafe(PVOID ptr)
++  @category: Support_Reference
++
++  @input: ptr - pointer to memory allocated with KernelAllocIrqSafe()
++
++  @return:
++
++  @notes: Caller should only use KernelFreeIrqSafe() to release memory that was allocated
++          with KernelAllocIrqSafe().
++
++  @see also: KernelAllocIrqSafe
++  @example: KernelFreeIrqSafe(pBlock);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void KernelFreeIrqSafe(PVOID ptr) {
++    kfree(ptr);
++}
++
++/* error status conversions */
++static inline SYSTEM_STATUS SDIOErrorToOSError(SDIO_STATUS status) {
++    switch (status) {
++        case SDIO_STATUS_SUCCESS:
++            return 0;
++        case SDIO_STATUS_INVALID_PARAMETER:
++            return -EINVAL;
++        case SDIO_STATUS_PENDING:
++            return -EAGAIN; /* try again */
++        case SDIO_STATUS_DEVICE_NOT_FOUND:
++            return -ENXIO;
++        case SDIO_STATUS_DEVICE_ERROR:
++            return -EIO;
++        case SDIO_STATUS_INTERRUPTED:
++            return -EINTR;
++        case SDIO_STATUS_NO_RESOURCES:
++            return -ENOMEM;
++        case SDIO_STATUS_ERROR:
++        default:
++            return -EFAULT;
++    }
++}
++static inline SDIO_STATUS OSErrorToSDIOError(SYSTEM_STATUS status) {
++    if (status >=0) {
++        return SDIO_STATUS_SUCCESS;
++    }
++    switch (status) {
++        case -EINVAL:
++            return SDIO_STATUS_INVALID_PARAMETER;
++        case -ENXIO:
++            return SDIO_STATUS_DEVICE_NOT_FOUND;
++        case -EIO:
++            return SDIO_STATUS_DEVICE_ERROR;
++        case -EINTR:
++            return SDIO_STATUS_INTERRUPTED;
++        case -ENOMEM:
++            return SDIO_STATUS_NO_RESOURCES;
++        case -EFAULT:
++            return SDIO_STATUS_ERROR;
++        default:
++            return SDIO_STATUS_ERROR;
++    }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Sleep or delay the execution context for a number of milliseconds.
++
++  @function name: OSSleep
++  @prototype: SDIO_STATUS OSSleep(INT SleepInterval)
++  @category: Support_Reference
++
++  @input: SleepInterval - time in milliseconds to put the execution context to sleep
++
++  @return: SDIO_STATUS_SUCCESS if sleep succeeded.
++
++  @notes: Caller should be in a context that allows it to sleep or block.  The
++  minimum duration of sleep may be greater than 1 MS on some platforms and OSes.
++
++  @see also: OSSleep
++  @example: Using sleep to delay
++        EnableSlotPower(pSlot);
++            // wait for power to settle
++        status = OSSleep(100);
++        if (!SDIO_SUCCESS(status)){
++            // failed..
++        }
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline SDIO_STATUS OSSleep(INT SleepInterval) {
++    UINT32 delta;
++
++    DBG_ASSERT_WITH_MSG(!NonSchedulable(),"OSSleep not allowed\n");
++        /* convert timeout to ticks */
++    delta = (SleepInterval * HZ)/1000;
++    if (delta == 0) {
++        delta = 1;
++    }
++    set_current_state(TASK_INTERRUPTIBLE);
++    if (schedule_timeout(delta) != 0) {
++        return SDIO_STATUS_INTERRUPTED;
++    }
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: get the OSs device object
++
++  @function name: SD_GET_OS_DEVICE
++  @prototype: POS_DEVICE SD_GET_OS_DEVICE(PSDDEVICE pDevice)
++  @category: Support_Reference
++
++  @input: pDevice - the device on the HCD
++
++  @return: pointer to the OSs device
++
++  @see also:
++  @example: obtain low level device
++        pFunctionContext->GpsDevice.Port.dev = SD_GET_OS_DEVICE(pDevice);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_GET_OS_DEVICE(pDevice) &((pDevice)->Device.dev)
++
++
++#ifdef __iomem
++    /* new type checking in 2.6.9 */
++    /* I/O Access macros */
++#define _READ_DWORD_REG(reg)  \
++        readl((const volatile void __iomem *)(reg))
++#define _READ_WORD_REG(reg)  \
++        readw((const volatile void __iomem *)(reg))
++#define _READ_BYTE_REG(reg)  \
++        readb((const volatile void __iomem *)(reg))
++#define _WRITE_DWORD_REG(reg,value)  \
++        writel((value),(volatile void __iomem *)(reg))
++#define _WRITE_WORD_REG(reg,value)  \
++        writew((value),(volatile void __iomem *)(reg))
++#define _WRITE_BYTE_REG(reg,value)  \
++        writeb((value),(volatile void __iomem *)(reg))
++#else
++    /* I/O Access macros */
++#define _READ_DWORD_REG(reg)  \
++        readl((reg))
++#define _READ_WORD_REG(reg)  \
++        readw((reg))
++#define _READ_BYTE_REG(reg)  \
++        readb((reg))
++#define _WRITE_DWORD_REG(reg,value)  \
++        writel((value),(reg))
++#define _WRITE_WORD_REG(reg,value)  \
++        writew((value),(reg))
++#define _WRITE_BYTE_REG(reg,value)  \
++        writeb((value),(reg))
++#endif
++    /* atomic operators */
++static inline ATOMIC_FLAGS AtomicTest_Set(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
++    return test_and_set_bit(BitNo,(ATOMIC_FLAGS *)pValue);
++}
++static inline ATOMIC_FLAGS AtomicTest_Clear(volatile ATOMIC_FLAGS *pValue, INT BitNo) {
++    return test_and_clear_bit(BitNo,(ATOMIC_FLAGS *)pValue);
++}
++
++struct _OSKERNEL_HELPER;
++
++typedef THREAD_RETURN (*PHELPER_FUNCTION)(struct _OSKERNEL_HELPER *);
++
++typedef struct _OSKERNEL_HELPER {
++    PKERNEL_TASK            pTask;
++    BOOL                    ShutDown;
++    OS_SIGNAL               WakeSignal;
++    struct completion       Completion;
++    PVOID                   pContext;
++    PHELPER_FUNCTION        pHelperFunc;
++}OSKERNEL_HELPER, *POSKERNEL_HELPER;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Wake the helper thread
++
++  @function name: SD_WAKE_OS_HELPER
++  @prototype: SD_WAKE_OS_HELPER(POSKERNEL_HELPER pOSHelper)
++  @category: Support_Reference
++
++  @input: pOSHelper - the OS helper object
++
++  @return: SDIO_STATUS
++
++  @see also: SDLIB_OSCreateHelper
++
++  @example: Waking up a helper thread
++        status = SD_WAKE_OS_HELPER(&pInstance->OSHelper);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_WAKE_OS_HELPER(p)        SignalSet(&(p)->WakeSignal)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Obtains the context for the helper function
++
++  @function name: SD_GET_OS_HELPER_CONTEXT
++  @prototype: SD_GET_OS_HELPER_CONTEXT(POSKERNEL_HELPER pOSHelper)
++  @category: Support_Reference
++
++  @input: pOSHelper - the OS helper object
++
++  @return: helper specific context
++
++  @notes: This macro should only be called by the function associated with
++          the helper object.
++
++  @see also: SDLIB_OSCreateHelper
++
++  @example: Getting the helper specific context
++        PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
++
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_GET_OS_HELPER_CONTEXT(p)     (p)->pContext
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Check helper function shut down flag.
++
++  @function name: SD_IS_HELPER_SHUTTING_DOWN
++  @prototype: SD_IS_HELPER_SHUTTING_DOWN(POSKERNEL_HELPER pOSHelper)
++  @category: Support_Reference
++
++  @input: pOSHelper - the OS helper object
++
++  @return: TRUE if shutting down, else FALSE
++
++  @notes: This macro should only be called by the function associated with
++          the helper object.  The function should call this macro when it
++          unblocks from the call to SD_WAIT_FOR_WAKEUP().  If this function
++          returns TRUE, the function should clean up and exit.
++
++  @see also: SDLIB_OSCreateHelper , SD_WAIT_FOR_WAKEUP
++
++  @example: Checking for shutdown
++        while(1) {
++              status = SD_WAIT_FOR_WAKEUP(pHelper);
++              if (!SDIO_SUCCESS(status)) {
++                  break;
++              }
++              if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++                  ... shutting down
++                  break;
++              }
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_IS_HELPER_SHUTTING_DOWN(p)   (p)->ShutDown
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Suspend and wait for wakeup signal
++
++  @function name: SD_WAIT_FOR_WAKEUP
++  @prototype: SD_WAIT_FOR_WAKEUP(POSKERNEL_HELPER pOSHelper)
++  @category: Support_Reference
++
++  @input: pOSHelper - the OS helper object
++
++  @return: SDIO_STATUS
++
++  @notes: This macro should only be called by the function associated with
++          the helper object.  The function should call this function to suspend (block)
++          itself and wait for a wake up signal. The function should always check
++          whether the function should exit by calling SD_IS_HELPER_SHUTTING_DOWN.
++
++  @see also: SDLIB_OSCreateHelper , SD_IS_HELPER_SHUTTING_DOWN
++
++  @example: block on the wake signal
++        while(1) {
++              status = SD_WAIT_FOR_WAKEUP(pHelper);
++              if (!SDIO_SUCCESS(status)) {
++                  break;
++              }
++              if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++                  ... shutting down
++                  break;
++              }
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SD_WAIT_FOR_WAKEUP(p)   SignalWait(&(p)->WakeSignal);
++
++#define CT_LE16_TO_CPU_ENDIAN(x) __le16_to_cpu(x)
++#define CT_LE32_TO_CPU_ENDIAN(x) __le32_to_cpu(x)
++#define CT_CPU_ENDIAN_TO_LE16(x) __cpu_to_le16(x)
++#define CT_CPU_ENDIAN_TO_LE32(x) __cpu_to_le32(x)
++
++#define CT_CPU_ENDIAN_TO_BE16(x) __cpu_to_be16(x)
++#define CT_CPU_ENDIAN_TO_BE32(x) __cpu_to_be32(x)
++#define CT_BE16_TO_CPU_ENDIAN(x) __be16_to_cpu(x)
++#define CT_BE32_TO_CPU_ENDIAN(x) __be32_to_cpu(x)
++#endif /* __CPSYSTEM_LINUX_H___ */
++
+Index: linux-2.6.22/include/linux/sdio/mmc_defs.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/include/linux/sdio/mmc_defs.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,99 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: mmc_defs.h
++
++ at abstract: MMC definitions not already defined in _sdio_defs.h
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___MMC_DEFS_H___
++#define ___MMC_DEFS_H___
++
++#define MMC_MAX_BUS_CLOCK    20000000 /* max clock speed in hz */
++#define MMC_HS_MAX_BUS_CLOCK 52000000 /* MMC PLUS (high speed) max clock rate in hz */
++
++/* R2 (CSD) macros */
++#define GET_MMC_CSD_TRANS_SPEED(pR) (pR)[12]
++#define GET_MMC_SPEC_VERSION(pR)    (((pR)[15] >> 2) & 0x0F)
++#define MMC_SPEC_1_0_TO_1_2         0x00
++#define MMC_SPEC_1_4                0x01
++#define MMC_SPEC_2_0_TO_2_2         0x02
++#define MMC_SPEC_3_1                0x03
++#define MMC_SPEC_4_0_TO_4_1         0x04
++
++#define MMC_CMD_SWITCH    6
++#define MMC_CMD8    8
++
++#define MMC_SWITCH_CMD_SET    0
++#define MMC_SWITCH_SET_BITS   1
++#define MMC_SWITCH_CLEAR_BITS 2
++#define MMC_SWITCH_WRITE_BYTE 3
++#define MMC_SWITCH_CMD_SET0   0
++#define MMC_SWITCH_BUILD_ARG(cmdset,access,index,value) \
++     (((cmdset) & 0x07) | (((access) & 0x03) << 24) | (((index) & 0xFF) << 16) | (((value) & 0xFF) << 8))
++
++#define MMC_EXT_CSD_SIZE                     512
++
++#define MMC_EXT_S_CMD_SET_OFFSET             504
++#define MMC_EXT_MIN_PERF_W_8_52_OFFSET       210
++#define MMC_EXT_MIN_PERF_R_8_52_OFFSET       209
++#define MMC_EXT_MIN_PERF_W_8_26_4_52_OFFSET  208
++#define MMC_EXT_MIN_PERF_R_8_26_4_52_OFFSET  207
++#define MMC_EXT_MIN_PERF_W_4_26_OFFSET       206
++#define MMC_EXT_MIN_PERF_R_4_56_OFFSET       205
++#define MMC_EXT_PWR_CL_26_360_OFFSET         203
++#define MMC_EXT_PWR_CL_52_360_OFFSET         202
++#define MMC_EXT_PWR_CL_26_195_OFFSET         201
++#define MMC_EXT_PWR_CL_52_195_OFFSET         200
++#define MMC_EXT_GET_PWR_CLASS(reg)    ((reg) & 0xF)
++#define MMC_EXT_MAX_PWR_CLASSES       16
++#define MMC_EXT_CARD_TYPE_OFFSET             196
++#define MMC_EXT_CARD_TYPE_HS_52  (1 << 1)
++#define MMC_EXT_CARD_TYPE_HS_26  (1 << 0)
++#define MMC_EXT_CSD_VER_OFFSET               194
++#define MMC_EXT_VER_OFFSET                   192
++#define MMC_EXT_VER_1_0          0
++#define MMC_EXT_VER_1_1          1
++#define MMC_EXT_CMD_SET_OFFSET               191
++#define MMC_EXT_CMD_SET_REV_OFFSET           189
++#define MMC_EXT_PWR_CLASS_OFFSET             187
++#define MMC_EXT_HS_TIMING_OFFSET             185
++#define MMC_EXT_HS_TIMING_ENABLE   0x01
++#define MMC_EXT_BUS_WIDTH_OFFSET             183
++#define MMC_EXT_BUS_WIDTH_1_BIT    0x00
++#define MMC_EXT_BUS_WIDTH_4_BIT    0x01
++#define MMC_EXT_BUS_WIDTH_8_BIT    0x02
++
++#endif
+Index: linux-2.6.22/include/linux/sdio/sdio_busdriver.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/include/linux/sdio/sdio_busdriver.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1431 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_busdriver.h
++
++ at abstract: include file for registration of SDIO function drivers
++  and SDIO host controller bus drivers.
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_BUSDRIVER_H___
++#define __SDIO_BUSDRIVER_H___
++
++typedef UINT8      CT_VERSION_CODE;
++#define CT_SDIO_STACK_VERSION_CODE ((CT_VERSION_CODE)0x27)   /* version code that must be set in various structures */
++#define CT_SDIO_STACK_VERSION_MAJOR(v) (((v) & 0xF0) >> 4)
++#define CT_SDIO_STACK_VERSION_MINOR(v) (((v) & 0x0F))
++#define SET_SDIO_STACK_VERSION(p) (p)->Version = CT_SDIO_STACK_VERSION_CODE
++#define GET_SDIO_STACK_VERSION(p) (p)->Version
++#define GET_SDIO_STACK_VERSION_MAJOR(p) CT_SDIO_STACK_VERSION_MAJOR(GET_SDIO_STACK_VERSION(p))
++#define GET_SDIO_STACK_VERSION_MINOR(p) CT_SDIO_STACK_VERSION_MINOR(GET_SDIO_STACK_VERSION(p))
++#include "sdlist.h"
++
++/* card flags */
++typedef UINT16      CARD_INFO_FLAGS;
++#define CARD_MMC        0x0001    /* Multi-media card */
++#define CARD_SD         0x0002    /* SD-Memory present */
++#define CARD_SDIO       0x0004    /* SDIO present */
++#define CARD_RAW        0x0008    /* Raw card */
++#define CARD_COMBO      (CARD_SD | CARD_SDIO)  /* SDIO with SD */
++#define CARD_TYPE_MASK  0x000F    /* card type mask */
++#define CARD_SD_WP      0x0010    /* SD WP on */
++#define CARD_PSEUDO     0x0020    /* pseudo card (internal use) */
++#define CARD_HIPWR      0x0040    /* card can use more than 200mA (SDIO 1.1 or greater)*/
++#define GET_CARD_TYPE(flags) ((flags) & CARD_TYPE_MASK)
++
++/* bus mode and clock rate */
++typedef UINT32  SD_BUSCLOCK_RATE;       /* clock rate in hz */
++typedef UINT16  SD_BUSMODE_FLAGS;
++#define SDCONFIG_BUS_WIDTH_RESERVED           0x00
++#define SDCONFIG_BUS_WIDTH_SPI                0x01
++#define SDCONFIG_BUS_WIDTH_1_BIT              0x02
++#define SDCONFIG_BUS_WIDTH_4_BIT              0x03
++#define SDCONFIG_BUS_WIDTH_MMC8_BIT           0x04
++#define SDCONFIG_BUS_WIDTH_MASK               0x0F
++#define SDCONFIG_SET_BUS_WIDTH(flags,width) \
++{                       \
++    (flags) &= ~SDCONFIG_BUS_WIDTH_MASK; \
++    (flags) |= (width);                  \
++}
++#define SDCONFIG_GET_BUSWIDTH(flags) ((flags) & SDCONFIG_BUS_WIDTH_MASK)
++#define SDCONFIG_BUS_MODE_SPI_NO_CRC         0x40   /* SPI bus is operating with NO CRC */
++#define SDCONFIG_BUS_MODE_SD_HS              0x80   /* set interface to SD high speed mode  */
++#define SDCONFIG_BUS_MODE_MMC_HS             0x20   /* set interface to MMC high speed mode */
++
++typedef UINT16 SD_SLOT_CURRENT;      /* slot current in mA */
++
++typedef UINT8 SLOT_VOLTAGE_MASK;     /* slot voltage */
++#define SLOT_POWER_3_3V  0x01
++#define SLOT_POWER_3_0V  0x02
++#define SLOT_POWER_2_8V  0x04
++#define SLOT_POWER_2_0V  0x08
++#define SLOT_POWER_1_8V  0x10
++#define SLOT_POWER_1_6V  0x20
++
++#define MAX_CARD_RESPONSE_BYTES 17
++
++/* plug and play information for SD cards */
++typedef struct _SD_PNP_INFO {
++    UINT16 SDIO_ManufacturerCode;  /* JEDEC Code */
++    UINT16 SDIO_ManufacturerID;    /* manf-specific ID */
++    UINT8  SDIO_FunctionNo;        /* function number 1-7 */
++    UINT8  SDIO_FunctionClass;     /* function class */
++    UINT8  SDMMC_ManfacturerID;    /* card CID's MANF-ID */
++    UINT16 SDMMC_OEMApplicationID; /* card CID's OEMAPP-ID */
++    CARD_INFO_FLAGS CardFlags;     /* card flags */
++}SD_PNP_INFO, *PSD_PNP_INFO;
++
++#define IS_LAST_SDPNPINFO_ENTRY(id)\
++    (((id)->SDIO_ManufacturerCode == 0) &&\
++     ((id)->SDIO_ManufacturerID == 0) &&\
++     ((id)->SDIO_FunctionNo == 0) &&\
++     ((id)->SDIO_FunctionClass == 0) &&\
++     ((id)->SDMMC_OEMApplicationID == 0) && \
++     ((id)->CardFlags == 0))
++
++/* card properties */
++typedef struct _CARD_PROPERTIES {
++    UINT8              IOFnCount;      /* number of I/O functions */
++    UINT8              SDIORevision;   /* SDIO revision */
++#define SDIO_REVISION_1_00 0x00
++#define SDIO_REVISION_1_10 0x01
++#define SDIO_REVISION_1_20 0x02
++    UINT8              SD_MMC_Revision; /* SD or MMC revision */
++#define SD_REVISION_1_01  0x00
++#define SD_REVISION_1_10  0x01
++#define MMC_REVISION_1_0_2_2 0x00
++#define MMC_REVISION_3_1  0x01
++#define MMC_REVISION_4_0  0x02
++    UINT16 SDIO_ManufacturerCode;      /* JEDEC Code */
++    UINT16 SDIO_ManufacturerID;        /* manf-specific ID */
++    UINT32             CommonCISPtr;   /* common CIS ptr */
++    UINT16             RCA;            /* relative card address */
++    UINT8              SDIOCaps;       /* SDIO card capabilities (refer to SDIO spec for decoding) */
++    UINT8              CardCSD[MAX_CARD_RESPONSE_BYTES];    /* for SD/MMC cards */
++    CARD_INFO_FLAGS    Flags;          /* card flags */
++    SD_BUSCLOCK_RATE   OperBusClock;   /* operational bus clock (based on HCD limit)*/
++    SD_BUSMODE_FLAGS   BusMode;        /* current card bus mode */
++    UINT16             OperBlockLenLimit; /* operational bytes per block length limit*/
++    UINT16             OperBlockCountLimit; /* operational number of blocks per transfer limit */
++    UINT8              CardState;      /* card state flags */
++    SLOT_VOLTAGE_MASK  CardVoltage;    /* card operational voltage */
++#define CARD_STATE_REMOVED 0x01
++}CARD_PROPERTIES, *PCARD_PROPERTIES;
++
++/* SDREQUEST request flags */
++typedef UINT32 SDREQUEST_FLAGS;
++/* write operation */
++#define SDREQ_FLAGS_DATA_WRITE         0x8000
++/* has data (read or write) */
++#define SDREQ_FLAGS_DATA_TRANS         0x4000
++/* command is an atomic APP command, requiring CMD55 to be issued */
++#define SDREQ_FLAGS_APP_CMD            0x2000
++/* transfer should be handled asynchronously */
++#define SDREQ_FLAGS_TRANS_ASYNC        0x1000
++/* host should skip the SPI response filter for this command */
++#define SDREQ_FLAGS_RESP_SKIP_SPI_FILT 0x0800
++/* host should skip the response check for this data transfer */
++#define SDREQ_FLAGS_DATA_SKIP_RESP_CHK 0x0400
++/* flag requesting a CMD12 be automatically issued by host controller */
++#define SDREQ_FLAGS_AUTO_CMD12         0x0200
++/* flag indicating that the data buffer meets HCD's DMA restrictions   */
++#define SDREQ_FLAGS_DATA_DMA           0x0010
++/* indicate to host that this is a short and quick transfer, the HCD may optimize
++ * this request to reduce interrupt overhead */
++#define SDREQ_FLAGS_DATA_SHORT_TRANSFER   0x00010000
++/* indicate to the host that this is a raw request */
++#define SDREQ_FLAGS_RAW                   0x00020000
++/* auto data transfer status check for MMC and Memory cards */
++#define SDREQ_FLAGS_AUTO_TRANSFER_STATUS  0x00100000
++
++#define SDREQ_FLAGS_UNUSED1               0x00200000
++#define SDREQ_FLAGS_UNUSED2               0x00400000
++#define SDREQ_FLAGS_UNUSED3               0x00800000
++#define SDREQ_FLAGS_UNUSED4               0x01000000
++#define SDREQ_FLAGS_UNUSED5               0x02000000
++
++/* the following flags are internal use only */
++#define SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE 0x0100
++/* flag indicating that response has been converted (internal use) */
++#define SDREQ_FLAGS_RESP_SPI_CONVERTED      0x0040
++/* request was cancelled - internal use only */
++#define SDREQ_FLAGS_CANCELED                0x0020
++/* a barrier operation */
++#define SDREQ_FLAGS_BARRIER                 0x00040000
++/* a pseudo bus request */
++#define SDREQ_FLAGS_PSEUDO                  0x00080000
++/* queue to the head */
++#define SDREQ_FLAGS_QUEUE_HEAD              0x04000000
++
++#define SDREQ_FLAGS_I_UNUSED1               0x08000000
++#define SDREQ_FLAGS_I_UNUSED2               0x10000000
++#define SDREQ_FLAGS_I_UNUSED3               0x20000000
++#define SDREQ_FLAGS_I_UNUSED4               0x40000000
++#define SDREQ_FLAGS_I_UNUSED5               0x80000000
++
++/* response type mask */
++#define SDREQ_FLAGS_RESP_MASK       0x000F
++#define GET_SDREQ_RESP_TYPE(flags)     ((flags) & SDREQ_FLAGS_RESP_MASK)
++#define IS_SDREQ_WRITE_DATA(flags)     ((flags) & SDREQ_FLAGS_DATA_WRITE)
++#define IS_SDREQ_DATA_TRANS(flags)     ((flags) & SDREQ_FLAGS_DATA_TRANS)
++#define IS_SDREQ_RAW(flags)            ((flags) & SDREQ_FLAGS_RAW)
++#define IS_SDREQ_FORCE_DEFERRED_COMPLETE(flags) ((flags) & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE)
++#define SDREQ_FLAGS_NO_RESP         0x0000
++#define SDREQ_FLAGS_RESP_R1         0x0001
++#define SDREQ_FLAGS_RESP_R1B        0x0002
++#define SDREQ_FLAGS_RESP_R2         0x0003
++#define SDREQ_FLAGS_RESP_R3         0x0004
++#define SDREQ_FLAGS_RESP_MMC_R4     0x0005 /* not supported, for future use */
++#define SDREQ_FLAGS_RESP_MMC_R5     0x0006 /* not supported, for future use */
++#define SDREQ_FLAGS_RESP_R6         0x0007
++#define SDREQ_FLAGS_RESP_SDIO_R4    0x0008
++#define SDREQ_FLAGS_RESP_SDIO_R5    0x0009
++
++struct _SDREQUEST;
++struct _SDFUNCTION;
++
++typedef void (*PSDEQUEST_COMPLETION)(struct _SDREQUEST *);
++
++/* defines SD/MMC and SDIO requests for the RAW-mode API */
++typedef struct _SDREQUEST {
++    SDLIST  SDList;             /* internal use list*/
++    UINT32  Argument;           /* SD/SDIO/MMC 32 bit argument */
++    SDREQUEST_FLAGS Flags;      /* request flags */
++    ATOMIC_FLAGS InternalFlags; /* internal use flags */
++    UINT8   Command;            /* SD/SDIO/MMC 8 bit command */
++    UINT8   Response[MAX_CARD_RESPONSE_BYTES];       /* buffer for CMD response */
++    UINT16  BlockCount;         /* number of blocks to send/rcv */
++    UINT16  BlockLen;           /* length of each block */
++    UINT16  DescriptorCount;    /* number of DMA descriptor entries in pDataBuffer if DMA */
++    PVOID   pDataBuffer;        /* starting address of buffer (or ptr to PSDDMA_DESCRIPTOR*/
++    UINT32  DataRemaining;      /* number of bytes remaining in the transfer (internal use) */
++    PVOID   pHcdContext;        /* internal use context */
++    PSDEQUEST_COMPLETION pCompletion; /* function driver completion routine */
++    PVOID   pCompleteContext;   /* function driver completion context */
++    SDIO_STATUS Status;         /* completion status */
++    struct _SDFUNCTION* pFunction; /* function driver that generated request (internal use)*/
++    INT     RetryCount;          /* number of times to retry on error, non-data cmds only */
++    PVOID   pBdRsv1;        /* reserved */
++    PVOID   pBdRsv2;
++    PVOID   pBdRsv3;
++}SDREQUEST, *PSDREQUEST;
++
++    /* a request queue */
++typedef struct _SDREQUESTQUEUE {
++    SDLIST        Queue;           /* the queue of requests */
++    BOOL          Busy;            /* busy flag */
++}SDREQUESTQUEUE, *PSDREQUESTQUEUE;
++
++
++typedef UINT16 SDCONFIG_COMMAND;
++/* SDCONFIG request flags */
++/* get operation */
++#define SDCONFIG_FLAGS_DATA_GET       0x8000
++/* put operation */
++#define SDCONFIG_FLAGS_DATA_PUT       0x4000
++/* host controller */
++#define SDCONFIG_FLAGS_HC_CONFIG      0x2000
++/* both */
++#define SDCONFIG_FLAGS_DATA_BOTH      (SDCONFIG_FLAGS_DATA_GET | SDCONFIG_FLAGS_DATA_PUT)
++/* no data */
++#define SDCONFIG_FLAGS_DATA_NONE      0x0000
++
++/* SDCONFIG commands */
++#define SDCONFIG_GET_HCD_DEBUG   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET  | 275)
++#define SDCONFIG_SET_HCD_DEBUG   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 276)
++
++/* custom hcd commands */
++#define SDCONFIG_GET_HOST_CUSTOM   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_GET  | 300)
++#define SDCONFIG_PUT_HOST_CUSTOM   (SDCONFIG_FLAGS_HC_CONFIG | SDCONFIG_FLAGS_DATA_PUT  | 301)
++
++/* function commands */
++#define SDCONFIG_FUNC_ENABLE_DISABLE         (SDCONFIG_FLAGS_DATA_PUT  | 18)
++#define SDCONFIG_FUNC_UNMASK_IRQ             (SDCONFIG_FLAGS_DATA_NONE | 21)
++#define SDCONFIG_FUNC_MASK_IRQ               (SDCONFIG_FLAGS_DATA_NONE | 22)
++#define SDCONFIG_FUNC_ACK_IRQ                (SDCONFIG_FLAGS_DATA_NONE | 23)
++#define SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC   (SDCONFIG_FLAGS_DATA_NONE | 24)
++#define SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC    (SDCONFIG_FLAGS_DATA_NONE | 25)
++#define SDCONFIG_FUNC_ALLOC_SLOT_CURRENT     (SDCONFIG_FLAGS_DATA_PUT  | 26)
++#define SDCONFIG_FUNC_FREE_SLOT_CURRENT      (SDCONFIG_FLAGS_DATA_NONE | 27)
++#define SDCONFIG_FUNC_CHANGE_BUS_MODE        (SDCONFIG_FLAGS_DATA_BOTH | 28)
++#define SDCONFIG_FUNC_CHANGE_BUS_MODE_ASYNC  (SDCONFIG_FLAGS_DATA_BOTH | 29)
++#define SDCONFIG_FUNC_NO_IRQ_PEND_CHECK      (SDCONFIG_FLAGS_DATA_NONE | 30)
++
++typedef UINT8  FUNC_ENABLE_DISABLE_FLAGS;
++typedef UINT32 FUNC_ENABLE_TIMEOUT;
++
++    /* function enable */
++typedef struct _SDCONFIG_FUNC_ENABLE_DISABLE_DATA {
++#define SDCONFIG_DISABLE_FUNC   0x0000
++#define SDCONFIG_ENABLE_FUNC    0x0001
++    FUNC_ENABLE_DISABLE_FLAGS    EnableFlags;     /* enable flags*/
++    FUNC_ENABLE_TIMEOUT          TimeOut;         /* timeout in milliseconds */
++    void (*pOpComplete)(PVOID Context, SDIO_STATUS status); /* reserved */
++    PVOID                        pOpCompleteContext;        /* reserved */
++}SDCONFIG_FUNC_ENABLE_DISABLE_DATA, *PSDCONFIG_FUNC_ENABLE_DISABLE_DATA;
++
++    /* slot current allocation data */
++typedef struct _SDCONFIG_FUNC_SLOT_CURRENT_DATA {
++    SD_SLOT_CURRENT     SlotCurrent;    /* slot current to request in mA*/
++}SDCONFIG_FUNC_SLOT_CURRENT_DATA, *PSDCONFIG_FUNC_SLOT_CURRENT_DATA;
++
++/* slot bus mode configuration */
++typedef struct _SDCONFIG_BUS_MODE_DATA {
++    SD_BUSCLOCK_RATE   ClockRate;       /* clock rate in Hz */
++    SD_BUSMODE_FLAGS   BusModeFlags;    /* bus mode flags */
++    SD_BUSCLOCK_RATE   ActualClockRate; /* actual rate in KHz */
++}SDCONFIG_BUS_MODE_DATA, *PSDCONFIG_BUS_MODE_DATA;
++
++/* defines configuration requests for the HCD */
++typedef struct _SDCONFIG {
++    SDCONFIG_COMMAND  Cmd;          /* configuration command */
++    PVOID   pData;        /* configuration data */
++    INT     DataLength;   /* config data length */
++}SDCONFIG, *PSDCONFIG;
++
++#define SET_SDCONFIG_CMD_INFO(pHdr,cmd,pC,len) \
++{           \
++  (pHdr)->Cmd = (cmd);                     \
++  (pHdr)->pData = (PVOID)(pC);             \
++  (pHdr)->DataLength = (len);              \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get a pointer to the configuration command data.
++
++  @function name: GET_SDCONFIG_CMD
++  @prototype: UNIT16 GET_SDCONFIG_CMD (PSDCONFIG pCommand)
++  @category: HD_Reference
++
++  @input:  pCommand - config command structure.
++
++  @return: command code
++
++  @notes: Implemented as a macro. This macro returns the command code for this
++          configuration request.
++
++  @example: getting the command code:
++    cmd = GET_SDCONFIG_CMD(pConfig);
++    switch (cmd) {
++        case SDCONFIG_GET_WP:
++             .. get write protect switch position
++           break;
++        ...
++    }
++
++  @see also: GET_SDCONFIG_CMD_LEN, GET_SDCONFIG_CMD_DATA
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD(pBuffer)     ((pBuffer)->Cmd)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get a pointer to the configuration command data.
++
++  @function name: GET_SDCONFIG_CMD_LEN
++  @prototype: INT GET_SDCONFIG_CMD_LEN (PSDCONFIG pCommand)
++  @category: HD_Reference
++
++  @input:  pCommand - config command structure.
++
++  @return: length of config command data
++
++  @notes: Implemented as a macro. Host controller drivers can use this macro to extract
++          the number of bytes of command specific data. This can be used to validate the
++          config data buffer size.
++
++  @example: getting the data length:
++    length = GET_SDCONFIG_CMD_LEN(pConfig);
++    if (length < CUSTOM_COMMAND_XXX_SIZE) {
++       ... invalid length
++    }
++
++  @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_DATA
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD_LEN(pBuffer) ((pBuffer)->DataLength)
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get a pointer to the configuration command data.
++
++  @function name: GET_SDCONFIG_CMD_DATA
++  @prototype: (casted ptr) GET_SDCONFIG_CMD_DATA (type, PSDCONFIG pCommand)
++  @category: HD_Reference
++
++  @input:  type - pointer type to cast the returned pointer to.
++           pCommand - config command structure.
++
++  @return: type-casted pointer to the command's data
++
++  @notes: Implemented as a macro.  Host controller drivers can use this macro to extract
++          a pointer to the command specific data in an HCD configuration request.
++
++  @example: getting the pointer:
++        // get interrupt control data
++    pIntControl = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
++    if (pIntControl->SlotIRQEnable) {
++       ... enable slot IRQ detection
++    }
++
++  @see also: GET_SDCONFIG_CMD, GET_SDCONFIG_CMD_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define GET_SDCONFIG_CMD_DATA(type,pBuffer) ((type)((pBuffer)->pData))
++#define IS_SDCONFIG_CMD_GET(pBuffer)  ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_GET)
++#define IS_SDCONFIG_CMD_PUT(pBuffer)  ((pBuffer)->Cmd & SDCONFIG_FLAGS_DATA_PUT)
++
++struct _SDDEVICE;
++struct _SDHCD;
++
++typedef UINT8   SD_FUNCTION_FLAGS;
++#define SDFUNCTION_FLAG_REMOVING       0x01
++
++/* function driver registration structure */
++typedef struct _SDFUNCTION {
++    CT_VERSION_CODE Version;    /* version code of the SDIO stack */
++	SDLIST     SDList;          /* internal use list*/
++    PTEXT      pName;           /* name of registering driver */
++    UINT       MaxDevices;      /* maximum number of devices supported by this function */
++    UINT       NumDevices;      /* number of devices supported by this function */
++    PSD_PNP_INFO pIds;          /* null terminated table of supported devices*/
++    BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);/* New device inserted */
++                                /* Device removed (NULL if not a hot-plug capable driver) */
++    void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice);
++    SDIO_STATUS (*pSuspend)(struct _SDFUNCTION *pFunction, SDPOWER_STATE state); /* Device suspended */
++    SDIO_STATUS (*pResume)(struct _SDFUNCTION *pFunction); /* Device woken up */
++                                /* Enable wake event */
++    SDIO_STATUS (*pWake) (struct _SDFUNCTION *pFunction, SDPOWER_STATE state, BOOL enable);
++	PVOID      pContext;        /* function driver use data */
++	OS_PNPDRIVER Driver;	    /* driver registration with base system */
++	SDLIST     DeviceList;	    /* the list of devices this driver is using*/
++    OS_SIGNAL   CleanupReqSig;  /* wait for requests completion on cleanup (internal use) */
++    SD_FUNCTION_FLAGS Flags;    /* internal flags (internal use) */
++}SDFUNCTION, *PSDFUNCTION;
++
++typedef UINT8  HCD_EVENT;
++
++    /* device info for SDIO functions */
++typedef struct _SDIO_DEVICE_INFO {
++    UINT32  FunctionCISPtr;         /* function's CIS ptr */
++    UINT32  FunctionCSAPtr;         /* function's CSA ptr */
++    UINT16  FunctionMaxBlockSize;   /* function's reported max block size */
++}SDIO_DEVICE_INFO, *PSDIO_DEVICE_INFO;
++
++    /* device info for SD/MMC card functions */
++typedef struct _SDMMC_INFO{
++    UINT8  Unused;    /* reserved */
++}SDMMC_INFO, *PSDMMC_INFO;
++
++    /* union of SDIO function and device info */
++typedef union _SDDEVICE_INFO {
++    SDIO_DEVICE_INFO AsSDIOInfo;
++    SDMMC_INFO       AsSDMMCInfo;
++}SDDEVICE_INFO, *PSDDEVICE_INFO;
++
++
++typedef UINT8   SD_DEVICE_FLAGS;
++#define SDDEVICE_FLAG_REMOVING       0x01
++
++/* inserted device description, describes an inserted card */
++typedef struct _SDDEVICE {
++    SDLIST      SDList;             /* internal use list*/
++    SDLIST      FuncListLink;       /* internal use list */
++                                    /* read/write request function */
++    SDIO_STATUS (*pRequest)(struct _SDDEVICE *pDev, PSDREQUEST req);
++                                    /* get/set configuration */
++    SDIO_STATUS (*pConfigure)(struct _SDDEVICE *pDev, PSDCONFIG config);
++    PSDREQUEST  (*AllocRequest)(struct _SDDEVICE *pDev);      /* allocate a request */
++    void        (*FreeRequest)(struct _SDDEVICE *pDev, PSDREQUEST pReq); /* free the request */
++    void        (*pIrqFunction)(PVOID pContext);       /* interrupt routine, synchronous calls allowed */
++    void        (*pIrqAsyncFunction)(PVOID pContext); /* async IRQ function , asynch only calls */
++    PVOID       IrqContext;         /* irq context */
++    PVOID       IrqAsyncContext;    /* irq async context */
++    PSDFUNCTION pFunction;          /* function driver supporting this device */
++    struct _SDHCD  *pHcd;           /* host controller this device is on (internal use) */
++    SDDEVICE_INFO   DeviceInfo;     /* device info */
++    SD_PNP_INFO pId[1];             /* id of this device  */
++    OS_PNPDEVICE Device;            /* device registration with base system */
++    SD_SLOT_CURRENT  SlotCurrentAlloc; /* allocated slot current for this device/function (internal use) */
++    SD_DEVICE_FLAGS Flags;          /* internal use flags */
++    CT_VERSION_CODE Version;        /* version code of the bus driver */
++}SDDEVICE, *PSDDEVICE;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get SDIO Bus Driver Version Major number
++
++  @function name: SDDEVICE_GET_VERSION_MAJOR
++  @prototype: INT SDDEVICE_GET_VERSION_MAJOR(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: integer value for the major version
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_VERSION_MINOR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_VERSION_MAJOR(pDev) (GET_SDIO_STACK_VERSION_MAJOR(pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get SDIO Bus Driver Version Minor number
++
++  @function name: SDDEVICE_GET_VERSION_MINOR
++  @prototype: INT SDDEVICE_GET_VERSION_MINOR(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: integer value for the minor version
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_VERSION_MAJOR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_VERSION_MINOR(pDev) (GET_SDIO_STACK_VERSION_MINOR(pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Test the SDIO revision for greater than or equal to 1.10
++
++  @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++  @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_10(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: TRUE if the revision is greater than or equal to 1.10
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++  @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Test the SDIO revision for greater than or equal to 1.20
++
++  @function name: SDDEVICE_IS_SDIO_REV_GTEQ_1_20
++  @prototype: BOOL SDDEVICE_IS_SDIO_REV_GTEQ_1_20(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: TRUE if the revision is greater than or equal to 1.20
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pDev) ((pDev)->pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_20)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Test the SD revision for greater than or equal to 1.10
++
++  @function name: SDDEVICE_IS_SD_REV_GTEQ_1_10
++  @prototype: BOOL SDDEVICE_IS_SD_REV_GTEQ_1_10(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: TRUE if the revision is greater than or equal to 1.10
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++  @see also: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_SD_REV_GTEQ_1_10(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= SD_REVISION_1_10)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Test the MMC revision for greater than or equal to 4.0
++
++  @function name: SDDEVICE_IS_MMC_REV_GTEQ_4_0
++  @prototype: BOOL SDDEVICE_IS_MMC_REV_GTEQ_4_0(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: TRUE if the revision is greater than or equal to 4.0
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_IS_SDIO_REV_GTEQ_1_10
++  @see also: SDDEVICE_IS_SD_REV_GTEQ_1_10
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_MMC_REV_GTEQ_4_0(pDev) ((pDev)->pHcd->CardProperties.SD_MMC_Revision >= MMC_REVISION_4_0)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Test for write protect enabled
++
++  @function name: SDDEVICE_IS_CARD_WP_ON
++  @prototype: BOOL SDDEVICE_IS_CARD_WP_ON(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: TRUE if device is write protected.
++
++  @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_CARD_WP_ON(pDev)       ((pDev)->pHcd->CardProperties.Flags & CARD_SD_WP)
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the device's manufacturer specific ID
++
++  @function name: SDDEVICE_GET_SDIO_MANFID
++  @prototype: UINT16 SDDEVICE_GET_SDIO_MANFID(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: function number
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_MANFCODE
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_MANFID(pDev)     (pDev)->pId[0].SDIO_ManufacturerID
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the device's manufacturer code
++
++  @function name: SDDEVICE_GET_SDIO_MANFCODE
++  @prototype: UINT16 SDDEVICE_GET_SDIO_MANFCODE(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: function number
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_MANFID
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_MANFCODE(pDev)     (pDev)->pId[0].SDIO_ManufacturerCode
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the device's function number
++
++  @function name: SDDEVICE_GET_SDIO_FUNCNO
++  @prototype: UINT8 SDDEVICE_GET_SDIO_FUNCNO(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: function number
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_FUNC_CLASS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNCNO(pDev)     (pDev)->pId[0].SDIO_FunctionNo
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the functions's class
++
++  @function name: SDDEVICE_GET_SDIO_FUNC_CLASS
++  @prototype: UINT8 SDDEVICE_GET_SDIO_FUNC_CLASS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: class number
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_FUNCNO
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CLASS(pDev) (pDev)->pId[0].SDIO_FunctionClass
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the functions's Card Information Structure pointer
++
++  @function name: SDDEVICE_GET_SDIO_FUNC_CISPTR
++  @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CISPTR(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: CIS offset
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++  @see also: SDDEVICE_GET_SDIO_COMMON_CISPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CISPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCISPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the functions's Code Stoarge Area pointer
++
++  @function name: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++  @prototype: UINT32 SDDEVICE_GET_SDIO_FUNC_CSAPTR(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: CSA offset
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_FUNC_CISPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_CSAPTR(pDev)(pDev)->DeviceInfo.AsSDIOInfo.FunctionCSAPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the functions's maximum reported block size
++
++  @function name: SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE
++  @prototype: UINT16 SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: block size
++
++  @notes: Implemented as a macro.
++
++  @see also:
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_FUNC_MAXBLKSIZE(pDev) (pDev)->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the common Card Information Structure pointer
++
++  @function name: SDDEVICE_GET_SDIO_COMMON_CISPTR
++  @prototype: UINT32 SDDEVICE_GET_SDIO_COMMON_CISPTR(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: Common CIS Address (in SDIO address space)
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_SDIO_FUNC_CSAPTR
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_COMMON_CISPTR(pDev) (pDev)->pHcd->CardProperties.CommonCISPtr
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the card capabilities
++
++  @function name: SDDEVICE_GET_SDIO_CARD_CAPS
++  @prototype: UINT8 SDDEVICE_GET_SDIO_CARD_CAPS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: 8-bit card capabilities register
++
++  @notes: Implemented as a macro. Refer to SDIO spec for decoding.
++
++  @see also: SDDEVICE_GET_CARD_FLAGS
++  @see also: SDDEVICE_GET_SDIOCARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIO_CARD_CAPS(pDev)     (pDev)->pHcd->CardProperties.SDIOCaps
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the card flags
++
++  @function name: SDDEVICE_GET_CARD_FLAGS
++  @prototype: CARD_INFO_FLAGS SDDEVICE_GET_CARD_FLAGS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: flags
++
++  @notes: Implemented as a macro.
++
++  @example: Get card type:
++        CARD_INFO_FLAGS flags;
++        flags = SDDEVICE_GET_CARD_FLAGS(pDevice);
++        switch(GET_CARD_TYPE(flags)) {
++            case CARD_MMC: // Multi-media card
++                ...
++            case CARD_SD:  // SD-Memory present
++                ...
++            case CARD_SDIO: // SDIO card present
++                ...
++            case CARD_COMBO: //SDIO card with SD
++                ...
++        }
++        if (flags & CARD_SD_WP) {
++            ...SD write protect on
++        }
++
++  @see also: SDDEVICE_GET_SDIO_CARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARD_FLAGS(pDev)      (pDev)->pHcd->CardProperties.Flags
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the Relative Card Address register
++
++  @function name: SDDEVICE_GET_CARD_RCA
++  @prototype: UINT16 SDDEVICE_GET_CARD_RCA(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: register address
++
++  @notes: Implemented as a macro. Refer to SDIO spec for decoding.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARD_RCA(pDev)        (pDev)->pHcd->CardProperties.RCA
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get operational bus clock
++
++  @function name: SDDEVICE_GET_OPER_CLOCK
++  @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_OPER_CLOCK(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: clock rate
++
++  @notes: Implemented as a macro. Returns the current bus clock rate.
++          This may be lower than reported by the card due to Host Controller,
++          Bus driver, or power management limitations.
++
++  @see also: SDDEVICE_GET_MAX_CLOCK
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_CLOCK(pDev)      (pDev)->pHcd->CardProperties.OperBusClock
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get maximum bus clock
++
++  @function name: SDDEVICE_GET_MAX_CLOCK
++  @prototype: SD_BUSCLOCK_RATE SDDEVICE_GET_MAX_CLOCK(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: clock rate
++
++  @notes: To obtain the current maximum clock rate use SDDEVICE_GET_OPER_CLOCK().
++          This rate my be lower than the host controllers maximum obtained using
++          SDDEVICE_GET_MAX_CLOCK().
++
++  @see also: SDDEVICE_GET_OPER_CLOCK
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_CLOCK(pDev)       (pDev)->pHcd->MaxClockRate
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get operational maximum block length.
++
++  @function name: SDDEVICE_GET_OPER_BLOCK_LEN
++  @prototype: UINT16 SDDEVICE_GET_OPER_BLOCK_LEN(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: block size in bytes
++
++  @notes: Implemented as a macro. Returns the maximum current block length.
++          This may be lower than reported by the card due to Host Controller,
++          Bus driver, or power management limitations.
++
++  @see also: SDDEVICE_GET_MAX_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_BLOCK_LEN(pDev)  (pDev)->pHcd->CardProperties.OperBlockLenLimit
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get maximum block length.
++
++  @function name: SDDEVICE_GET_MAX_BLOCK_LEN
++  @prototype: UINT16 SDDEVICE_GET_MAX_BLOCK_LEN(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: block size in bytes
++
++  @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCK_LEN to obtain
++          the current block length.
++
++  @see also: SDDEVICE_GET_OPER_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_BLOCK_LEN(pDev)   (pDev)->pHcd->MaxBytesPerBlock
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get operational maximum block count.
++
++  @function name: SDDEVICE_GET_OPER_BLOCKS
++  @prototype: UINT16 SDDEVICE_GET_OPER_BLOCKS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: maximum number of blocks per transaction.
++
++  @notes: Implemented as a macro. Returns the maximum current block count.
++          This may be lower than reported by the card due to Host Controller,
++          Bus driver, or power management limitations.
++
++  @see also: SDDEVICE_GET_MAX_BLOCK_LEN
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_OPER_BLOCKS(pDev)     (pDev)->pHcd->CardProperties.OperBlockCountLimit
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get maximum block count.
++
++  @function name: SDDEVICE_GET_MAX_BLOCKS
++  @prototype: UINT16 SDDEVICE_GET_MAX_BLOCKS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: maximum number of blocks per transaction.
++
++  @notes: Implemented as a macro. Use SDDEVICE_GET_OPER_BLOCKS to obtain
++          the current block count.
++
++  @see also: SDDEVICE_GET_OPER_BLOCKS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_MAX_BLOCKS(pDev)      (pDev)->pHcd->MaxBlocksPerTrans
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get applied slot voltage
++
++  @function name: SDDEVICE_GET_SLOT_VOLTAGE_MASK
++  @prototype: SLOT_VOLTAGE_MASK SDDEVICE_GET_SLOT_VOLTAGE_MASK(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: slot voltage mask
++
++  @notes: This function returns the applied voltage on the slot. The voltage value is a
++          mask having the following values:
++          SLOT_POWER_3_3V
++          SLOT_POWER_3_0V
++          SLOT_POWER_2_8V
++          SLOT_POWER_2_0V
++          SLOT_POWER_1_8V
++          SLOT_POWER_1_6V
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SLOT_VOLTAGE_MASK(pDev)   (pDev)->pHcd->CardProperties.CardVoltage
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the Card Specific Data Register.
++
++  @function name: SDDEVICE_GET_CARDCSD
++  @prototype: PUINT8 SDDEVICE_GET_CARDCSD(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return:  UINT8 CardCSD[MAX_CARD_RESPONSE_BYTES] array of CSD data.
++
++  @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_CARDCSD(pDev)         (pDev)->pHcd->CardProperties.CardCSD
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the bus mode flags
++
++  @function name: SDDEVICE_GET_BUSMODE_FLAGS
++  @prototype: SD_BUSMODE_FLAGS SDDEVICE_GET_BUSMODE_FLAGS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return:
++
++  @notes: Implemented as a macro.  This function returns the raw bus mode flags.  This
++          is useful for function drivers that wish to override the bus clock without
++          modifying the current bus mode.
++
++  @see also: SDDEVICE_GET_BUSWIDTH
++  @see also: SDCONFIG_BUS_MODE_CTRL
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_BUSMODE_FLAGS(pDev)  (pDev)->pHcd->CardProperties.BusMode
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the bus width.
++
++  @function name: SDDEVICE_GET_BUSWIDTH
++  @prototype: UINT8 SDDEVICE_GET_BUSWIDTH(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return:  bus width: SDCONFIG_BUS_WIDTH_SPI, SDCONFIG_BUS_WIDTH_1_BIT, SDCONFIG_BUS_WIDTH_4_BIT
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_IS_BUSMODE_SPI
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_BUSWIDTH(pDev)        SDCONFIG_GET_BUSWIDTH((pDev)->pHcd->CardProperties.BusMode)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Is bus in SPI mode.
++
++  @function name: SDDEVICE_IS_BUSMODE_SPI
++  @prototype: BOOL SDDEVICE_IS_BUSMODE_SPI(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return:  TRUE, SPI mode.
++
++  @notes: Implemented as a macro.
++
++  @see also: SDDEVICE_GET_BUSWIDTH
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_IS_BUSMODE_SPI(pDev) (SDDEVICE_GET_BUSWIDTH(pDev) == SDCONFIG_BUS_WIDTH_SPI)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Send a request to a device.
++
++  @function name: SDDEVICE_CALL_REQUEST_FUNC
++  @prototype: SDIO_STATUS SDDEVICE_CALL_REQUEST_FUNC(PSDDEVICE pDevice, PSDREQUEST pRequest)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++  @input:  pRequest  - the request to be sent
++
++  @output: none
++
++  @return: SDIO_STATUS
++
++  @notes: Sends a request to the specified device. If the request is successfully sent, then
++          the response flags can be checked to detemine the result of the request.
++
++  @example: Example of sending a request to a device:
++    PSDREQUEST  pReq = NULL;
++    //allocate a request
++    pReq = SDDeviceAllocRequest(pDevice);
++    if (NULL == pReq) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++    //initialize the request
++    SDLIB_SetupCMD52Request(FuncNo, Address, Write, *pData, pReq);
++    //send the request to the target
++    status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
++    if (!SDIO_SUCCESS(status)) {
++        break;
++    }
++    //check the request response (based on the request type)
++    if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++        ...
++    }
++    if (!Write) {
++            // store the byte
++        *pData =  SD_R5_GET_READ_DATA(pReq->Response);
++    }
++    //free the request
++    SDDeviceFreeRequest(pDevice,pReq);
++    ...
++
++  @see also: SDDeviceAllocRequest
++  @see also: SDDEVICE_CALL_CONFIG_FUNC
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_CALL_REQUEST_FUNC(pDev,pReq)  (pDev)->pRequest((pDev),(pReq))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Send configuration to a device.
++
++  @function name: SDDEVICE_CALL_CONFIG_FUNC
++  @prototype: SDIO_STATUS SDDEVICE_CALL_CONFIG_FUNC(PSDDEVICE pDevice, PSDCONFIG pConfigure)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++  @input:  pConfigure - configuration request
++
++  @output: none
++
++  @return: SDIO_STATUS
++
++  @notes: Sends a configuration request to the specified device.
++
++  @example: Example of sending a request to a device:
++        SDCONFIG  configHdr;
++        SDCONFIG_FUNC_ENABLE_DISABLE_DATA fData;
++        fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
++        fData.TimeOut = 500;
++        SET_SDCONFIG_CMD_INFO(&configHdr, SDCONFIG_FUNC_ENABLE_DISABLE, fData, sizeof(fData));
++        return SDDEVICE_CALL_CONFIG_FUNC(pDevice, &configHdr);
++
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_CALL_CONFIG_FUNC(pDev,pCfg)   (pDev)->pConfigure((pDev),(pCfg))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Allocate a request structure.
++
++  @function name: SDDeviceAllocRequest
++  @prototype: PSDREQUEST SDDeviceAllocRequest(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: request pointer or NULL if not available.
++
++  @notes:  This function must not be called in a non-schedulable (interrupts off) context.
++           Allocating memory on some OSes may block.
++
++  @see also: SDDEVICE_CALL_REQUEST_FUNC
++  @see also: SDDeviceFreeRequest
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDeviceAllocRequest(pDev)        (pDev)->AllocRequest((pDev))
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Free a request structure.
++
++  @function name: SDDeviceFreeRequest
++  @prototype: void SDDeviceFreeRequest(PSDDEVICE pDevice, PSDREQUEST pRequest)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++  @input:  pRequest  - request allocated by SDDeviceAllocRequest().
++
++  @output: none
++
++  @return: none
++
++  @notes: This function must not be called in a non-schedulable (interrupts off) context.
++          Freeing memory on some OSes may block.
++
++  @see also: SDDEVICE_CALL_REQUEST_FUNC
++  @see also: SDDeviceAllocRequest
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDeviceFreeRequest(pDev,pReq)    (pDev)->FreeRequest((pDev),pReq)
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Register an interrupt handler for a device.
++
++  @function name: SDDEVICE_SET_IRQ_HANDLER
++  @prototype: void SDDEVICE_SET_IRQ_HANDLER(PSDDEVICE pDevice,
++                                            void (*pIrqFunction)(PVOID pContext),
++                                            PVOID pContext)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++  @input:  pIrqFunction  - the interrupt function to execute.
++  @input:  pContext  - context value passed into interrupt routine.
++
++  @output: none
++
++  @return: none
++
++  @notes: The registered routine will be called upon each card interrupt.
++          The interrupt function should acknowledge the interrupt when it is
++          ready to handle more interrupts using:
++          SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
++          The interrupt handler can perform synchronous request calls.
++
++  @see also: SDDEVICE_SET_ASYNC_IRQ_HANDLER
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_SET_IRQ_HANDLER(pDev,pFn,pContext)  \
++{                                                    \
++    (pDev)->pIrqFunction = (pFn);                    \
++    (pDev)->IrqContext = (PVOID)(pContext);          \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Register an asynchronous interrupt handler for a device.
++
++  @function name: SDDEVICE_SET_ASYNC_IRQ_HANDLER
++  @prototype: void SDDEVICE_SET_ASYNC_IRQ_HANDLER(PSDDEVICE pDevice,
++                                            void (*pIrqAsyncFunction)(PVOID pContext),
++                                            PVOID pContext)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++  @input:  pIrqAsyncFunction  - the interrupt function to execute.
++  @input:  pContext  - context value passed into interrupt routine.
++
++  @output: none
++
++  @return: none
++
++  @notes: The registered routine will be called upon each card interrupt.
++          The interrupt function should acknowledge the interrupt when it is
++          ready to handle more interrupts using:
++          SDLIB_IssueConfig(pDevice, SDCONFIG_FUNC_ACK_IRQ, NULL, 0);
++          The interrupt handler can not perform any synchronous request calls.
++          Using this call provides a faster interrupt dispatch, but limits all
++          requests to asynchronous mode.
++
++  @see also: SDDEVICE_SET_IRQ_HANDLER
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_SET_ASYNC_IRQ_HANDLER(pDev,pFn,pContext)  \
++{                                                          \
++    (pDev)->pIrqAsyncFunction = (pFn);                     \
++    (pDev)->IrqAsyncContext = (PVOID)(pContext);           \
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the SDIO capabilities rgeister.
++
++  @function name: SDDEVICE_GET_SDIOCARD_CAPS
++  @prototype: UINT8 SDDEVICE_GET_SDIOCARD_CAPS(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return: SD capabilities
++
++  @notes: See SD specification for decoding of these capabilities.
++
++  @see also: SDDEVICE_GET_SDIO_CARD_CAPS
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SDIOCARD_CAPS(pDev) (pDev)->pHcd->CardProperties.SDIOCaps
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get HCD driver name
++
++  @function name: SDDEVICE_GET_HCDNAME
++  @prototype: PTEXT SDDEVICE_GET_HCDNAME(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice   - the target device for this request
++
++  @output: none
++
++  @return:  pointer to a string containing the name of the underlying HCD
++
++  @notes: Implemented as a macro.
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_HCDNAME(pDev)  (pDev)->pHcd->pName
++
++
++#define SDDEVICE_CALL_IRQ_HANDLER(pDev)       (pDev)->pIrqFunction((pDev)->IrqContext)
++#define SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDev) (pDev)->pIrqAsyncFunction((pDev)->IrqAsyncContext)
++
++
++#define SDDEVICE_SET_SDIO_FUNCNO(pDev,Num) (pDev)->pId[0].SDIO_FunctionNo = (Num)
++#define SDDEVICE_IS_CARD_REMOVED(pDev)     ((pDev)->pHcd->CardProperties.CardState & \
++                                             CARD_STATE_REMOVED)
++
++
++typedef enum _SDHCD_IRQ_PROC_STATE {
++    SDHCD_IDLE = 0,
++    SDHCD_IRQ_PENDING = 1,
++    SDHCD_IRQ_HELPER  = 2
++}SDHCD_IRQ_PROC_STATE, *PSDHCD_IRQ_PROC_STATE;
++
++/* host controller bus driver registration structure */
++typedef struct _SDHCD {
++    CT_VERSION_CODE Version;    /* version code of the SDIO stack */
++    SDLIST  SDList;             /* internal use list*/
++    PTEXT   pName;              /* name of registering host/slot driver */
++    UINT32  Attributes;         /* attributes of host controller */
++    UINT16  MaxBytesPerBlock;   /* max bytes per block */
++    UINT16  MaxBlocksPerTrans;  /* max blocks per transaction */
++    SD_SLOT_CURRENT  MaxSlotCurrent;  /* max current per slot in milli-amps */
++    UINT8   SlotNumber;         /* sequential slot number for this HCD, set by bus driver */
++    SD_BUSCLOCK_RATE    MaxClockRate;         /* max clock rate in hz */
++    SLOT_VOLTAGE_MASK   SlotVoltageCaps;      /* slot voltage capabilities */
++    SLOT_VOLTAGE_MASK   SlotVoltagePreferred; /* preferred slot voltage */
++    PVOID   pContext;                         /* host controller driver use data   */
++    SDIO_STATUS (*pRequest)(struct _SDHCD *pHcd);
++                                /* get/set configuration */
++    SDIO_STATUS (*pConfigure)(struct _SDHCD *pHcd, PSDCONFIG pConfig);
++        /* everything below this line is for bus driver use */
++    OS_SEMAPHORE    ConfigureOpsSem;    /* semaphore to make specific configure ops atomic, internal use */
++    OS_CRITICALSECTION HcdCritSection;  /* critical section to protect hcd data structures (internal use) */
++    SDREQUESTQUEUE  RequestQueue;       /* request queue, internal use */
++    PSDREQUEST      pCurrentRequest;    /* current request we are working on */
++    CARD_PROPERTIES CardProperties;     /* properties for the currently inserted card*/
++    OSKERNEL_HELPER SDIOIrqHelper;      /* synch IRQ helper, internal use */
++    SDDEVICE        *pPseudoDev;        /* pseudo device used for initialization (internal use) */
++    UINT8           PendingHelperIrqs;  /* IRQ helper pending IRQs */
++    UINT8           PendingIrqAcks;     /* pending IRQ acks from function drivers */
++    UINT8           IrqsEnabled;        /* current irq enabled mask */
++    SDHCD_IRQ_PROC_STATE IrqProcState;  /* irq processing state */
++    POS_DEVICE      pDevice;            /* device registration with base system */
++    SD_SLOT_CURRENT SlotCurrentAllocated; /* slot current allocated (internal use ) */
++    ATOMIC_FLAGS    HcdFlags;             /* HCD Flags */
++#define HCD_REQUEST_CALL_BIT  0
++#define HCD_IRQ_NO_PEND_CHECK 1           /* HCD flag to bypass interrupt pending register
++                                             check, typically done on single function cards */
++    SDREQUESTQUEUE  CompletedRequestQueue; /* completed request queue, internal use */
++    PSDDMA_DESCRIPTION pDmaDescription; /* description of HCD's DMA capabilities */
++    POS_MODULE         pModule;         /* OS-specific module information */
++    INT                Recursion;       /* recursion level */
++    PVOID              Reserved1;
++    PVOID              Reserved2;
++}SDHCD, *PSDHCD;
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get a pointer to the HCD's DMA description
++
++  @function name: SDGET_DMA_DESCRIPTION
++  @prototype: PSDDMA_DESCRIPTION SDGET_DMA_DESCRIPTION(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice - device structure
++
++  @return: PSDDMA_DESCRIPTION or NULL if no DMA support
++
++  @notes: Implemented as a macro.
++
++  @example: getting the current request:
++          PSDDMA_DESCRIPTION pDmaDescrp = SDGET_DMA_DESCRIPTION(pDevice);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDGET_DMA_DESCRIPTION(pDevice)     (pDevice)->pHcd->pDmaDescription
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the logical slot number the device is assigned to.
++
++  @function name: SDDEVICE_GET_SLOT_NUMBER
++  @prototype: UINT8 SDDEVICE_GET_SLOT_NUMBER(PSDDEVICE pDevice)
++  @category: PD_Reference
++
++  @input:  pDevice - device structure
++
++  @return: unsigned number representing the slot number
++
++  @notes: Implemented as a macro. This value is unique for each physical slot in the system
++          and assigned by the bus driver. Devices on a multi-function card will share the same
++          slot number.
++
++  @example: getting the slot number:
++          UINT8 thisSlot = SDDEVICE_GET_SLOT_NUMBER(pDevice);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define SDDEVICE_GET_SLOT_NUMBER(pDevice) (pDevice)->pHcd->SlotNumber
++
++/* for function use */
++SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction);
++
++#include "sdio_hcd_defs.h"
++#endif /* __SDIO_BUSDRIVER_H___ */
+Index: linux-2.6.22/drivers/Kconfig
+===================================================================
+--- linux-2.6.22.orig/drivers/Kconfig	2007-11-08 15:42:31.000000000 +0100
++++ linux-2.6.22/drivers/Kconfig	2007-11-08 15:47:58.000000000 +0100
+@@ -68,6 +68,8 @@
+ 
+ source "drivers/usb/Kconfig"
+ 
++source "drivers/sdio/Kconfig"
++
+ source "drivers/mmc/Kconfig"
+ 
+ source "drivers/leds/Kconfig"
+Index: linux-2.6.22/drivers/sdio/Kconfig
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/Kconfig	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,18 @@
++#
++# SDIO driver and host controller support
++#
++
++menu "SDIO support"
++
++config SDIO
++	tristate "SDIO support"
++	default m
++	---help---
++	  good luck.
++
++source "drivers/sdio/hcd/Kconfig"
++
++source "drivers/sdio/function/Kconfig"
++
++endmenu
++
+Index: linux-2.6.22/drivers/sdio/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/Makefile	2007-11-08 17:28:12.000000000 +0100
+@@ -0,0 +1,6 @@
++#Makefile for SDIO stack
++obj-$(CONFIG_SDIO)	+= lib/
++obj-$(CONFIG_SDIO)	+= busdriver/
++obj-$(CONFIG_SDIO)	+= hcd/
++obj-$(CONFIG_SDIO)	+= function/
++
+Index: linux-2.6.22/drivers/sdio/lib/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/lib/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,6 @@
++#
++# SDIO stack library Makefile
++#
++obj-$(CONFIG_SDIO) += sdio_lib.o
++sdio_lib-objs := sdio_lib_c.o sdio_lib_os.o
++
+Index: linux-2.6.22/drivers/sdio/lib/sdio_lib_c.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/lib/sdio_lib_c.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,903 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_lib_c.c
++
++ at abstract: OS independent SDIO library functions
++ at category abstract: Support_Reference Support Functions.
++
++ at notes: Support functions for device I/O
++
++ at notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDLIB_
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++
++#define _Cmd52WriteByteCommon(pDev, Address, pValue) \
++                _SDLIB_IssueCMD52((pDev),0,(Address),(pValue),1,TRUE)
++#define _Cmd52ReadByteCommon(pDev, Address, pValue) \
++                _SDLIB_IssueCMD52((pDev),0,(Address),pValue,1,FALSE)
++#define _Cmd52ReadMultipleCommon(pDev, Address, pBuf,length) \
++                _SDLIB_IssueCMD52((pDev),0,(Address),(pBuf),(length),FALSE)
++
++/* inline version */
++static INLINE void _iSDLIB_SetupCMD52Request(UINT8         FuncNo,
++                                             UINT32        Address,
++                                             BOOL          Write,
++                                             UINT8         WriteData,
++                                             PSDREQUEST    pRequest) {
++    if (Write) {
++        SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_WRITE,
++                           FuncNo,
++                           CMD52_NORMAL_WRITE,Address,WriteData);
++    } else {
++        SDIO_SET_CMD52_ARG(pRequest->Argument,CMD52_READ,FuncNo,0,Address,0x00);
++    }
++
++    pRequest->Flags = SDREQ_FLAGS_RESP_SDIO_R5;
++    pRequest->Command = CMD52;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Setup cmd52 requests
++
++  @function name: SDLIB_SetupCMD52Request
++  @prototype: void SDLIB_SetupCMD52Request(UINT8         FuncNo,
++                                           UINT32        Address,
++                                           BOOL          Write,
++                                           UINT8         WriteData,
++                                           PSDREQUEST    pRequest)
++  @category: PD_Reference
++
++  @input:  FunctionNo - function number.
++  @input:  Address - I/O address, 17-bit register address.
++  @input:  Write  - TRUE if a write operation, FALSE for reads.
++  @input:  WriteData - write data, byte to write if write operation.
++
++  @output: pRequest - request is updated with cmd52 parameters
++
++  @return: none
++
++  @notes: This function does not perform any I/O. For register reads, the completion
++          routine can use the SD_R5_GET_READ_DATA() macro to extract the register value.
++          The routine should also extract the response flags using the SD_R5_GET_RESP_FLAGS()
++          macro and check the flags with the SD_R5_ERRORS mask.
++
++  @example: Getting the register value from the completion routine:
++          flags = SD_R5_GET_RESP_FLAGS(pRequest->Response);
++          if (flags & SD_R5_ERRORS) {
++             ... errors
++          } else {
++             registerValue = SD_R5_GET_READ_DATA(pRequest->Response);
++          }
++
++  @see also: SDLIB_IssueCMD52
++  @see also: SDDEVICE_CALL_REQUEST_FUNC
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _SDLIB_SetupCMD52Request(UINT8         FuncNo,
++                              UINT32        Address,
++                              BOOL          Write,
++                              UINT8         WriteData,
++                              PSDREQUEST    pRequest)
++{
++    _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Issue a CMD52 to read or write a register
++
++  @function name: SDLIB_IssueCMD52
++  @prototype: SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE     pDevice,
++                                           UINT8         FuncNo,
++                                           UINT32        Address,
++                                           PUINT8        pData,
++                                           INT           ByteCount,
++                                           BOOL          Write)
++  @category: PD_Reference
++  @input: pDevice - the device that is the target of the command.
++  @input: FunctionNo - function number of the target.
++  @input: Address - 17-bit register address.
++  @input: ByteCount - number of bytes to read or write,
++  @input: Write - TRUE if a write operation, FALSE for reads.
++  @input: pData - data buffer for writes.
++
++  @output: pData - data buffer for writes.
++
++  @return: SDIO Status
++
++  @notes:  This function will allocate a request and issue multiple byte reads or writes
++           to satisfy the ByteCount requested.  This function is fully synchronous and will block
++           the caller.
++
++  @see also: SDLIB_SetupCMD52Request
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_IssueCMD52(PSDDEVICE     pDevice,
++                              UINT8         FuncNo,
++                              UINT32        Address,
++                              PUINT8        pData,
++                              INT           ByteCount,
++                              BOOL          Write)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    PSDREQUEST  pReq = NULL;
++
++    pReq = SDDeviceAllocRequest(pDevice);
++
++    if (NULL == pReq) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    while (ByteCount) {
++        _iSDLIB_SetupCMD52Request(FuncNo,Address,Write,*pData,pReq);
++        status = SDDEVICE_CALL_REQUEST_FUNC(pDevice,pReq);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        status = ConvertCMD52ResponseToSDIOStatus(SD_R5_GET_RESP_FLAGS(pReq->Response));
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Library: CMD52 resp error: 0x%X \n",
++                                    SD_R5_GET_RESP_FLAGS(pReq->Response)));
++            break;
++        }
++        if (!Write) {
++                /* store the byte */
++            *pData =  SD_R5_GET_READ_DATA(pReq->Response);
++        }
++        pData++;
++        Address++;
++        ByteCount--;
++    }
++
++    SDDeviceFreeRequest(pDevice,pReq);
++    return status;
++}
++
++
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Find a device's tuple.
++
++  @function name: SDLIB_FindTuple
++  @prototype: SDIO_STATUS SDLIB_FindTuple(PSDDEVICE  pDevice,
++                                          UINT8      Tuple,
++                                          UINT32     *pTupleScanAddress,
++                                          PUINT8     pBuffer,
++                                          UINT8      *pLength)
++
++  @category: PD_Reference
++  @input: pDevice - the device that is the target of the command.
++  @input: Tuple - 8-bit ID of tuple to find
++  @input: pTupleScanAddress - On entry pTupleScanAddress is the adddress to start scanning
++  @input: pLength - length of pBuffer
++
++  @output: pBuffer - storage for tuple
++  @output: pTupleScanAddress - address of the next tuple
++  @output: pLength - length of tuple read
++
++  @return: status
++
++  @notes: It is possible to have the same tuple ID multiple times with different lengths. This function
++          blocks and is fully synchronous.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_FindTuple(PSDDEVICE  pDevice,
++                             UINT8      Tuple,
++                             UINT32     *pTupleScanAddress,
++                             PUINT8     pBuffer,
++                             UINT8      *pLength)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT32      scanStart = *pTupleScanAddress;
++    UINT8       tupleCode;
++    UINT8       tupleLink;
++
++        /* sanity check */
++    if (scanStart < SDIO_CIS_AREA_BEGIN) {
++        return SDIO_STATUS_CIS_OUT_OF_RANGE;
++    }
++
++    while (TRUE) {
++            /* check for end */
++        if (scanStart > SDIO_CIS_AREA_END) {
++            status = SDIO_STATUS_TUPLE_NOT_FOUND;
++            break;
++        }
++            /* get the code */
++        status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleCode);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++        if (CISTPL_END == tupleCode) {
++                /* found the end */
++            status = SDIO_STATUS_TUPLE_NOT_FOUND;
++            break;
++        }
++            /* bump past tuple code */
++        scanStart++;
++            /* get the tuple link value */
++        status = _Cmd52ReadByteCommon(pDevice, scanStart, &tupleLink);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* bump past tuple link*/
++        scanStart++;
++            /* check tuple we just found */
++        if (tupleCode == Tuple) {
++             DBG_PRINT(SDDBG_TRACE, ("SDIO Library: Tuple:0x%2.2X Found at Address:0x%X, TupleLink:0x%X \n",
++                                     Tuple, (scanStart - 2), tupleLink));
++            if (tupleLink != CISTPL_LINK_END) {
++                    /* return the next scan address to the caller */
++                *pTupleScanAddress = scanStart + tupleLink;
++            } else {
++                    /* the tuple link is an end marker */
++                *pTupleScanAddress = 0xFFFFFFFF;
++            }
++                /* go get the tuple */
++            status = _Cmd52ReadMultipleCommon(pDevice, scanStart,pBuffer,min(*pLength,tupleLink));
++            if (SDIO_SUCCESS(status)) {
++                    /* set the actual return length */
++                *pLength = min(*pLength,tupleLink);
++            }
++                /* break out of loop */
++            break;
++        }
++            /*increment past this entire tuple */
++        scanStart += tupleLink;
++    }
++
++    return status;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Issue an SDIO configuration command.
++
++  @function name: SDLIB_IssueConfig
++  @prototype: SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE        pDevice,
++                                             SDCONFIG_COMMAND Command,
++                                             PVOID            pData,
++                                             INT              Length)
++
++  @category: PD_Reference
++  @input:  pDevice - the device that is the target of the command.
++  @input:  Command - command to send, see example.
++  @input:  pData - command's data
++  @input:  Length length of pData
++
++  @output: pData - updated on commands that return data.
++
++  @return: SDIO Status
++
++  @example: Command and data pairs:
++            Type                               Data
++            SDCONFIG_GET_WP             SDCONFIG_WP_VALUE
++            SDCONFIG_SEND_INIT_CLOCKS   none
++            SDCONFIG_SDIO_INT_CTRL      SDCONFIG_SDIO_INT_CTRL_DATA
++            SDCONFIG_SDIO_REARM_INT     none
++            SDCONFIG_BUS_MODE_CTRL      SDCONFIG_BUS_MODE_DATA
++            SDCONFIG_POWER_CTRL         SDCONFIG_POWER_CTRL_DATA
++
++  @notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_IssueConfig(PSDDEVICE        pDevice,
++                               SDCONFIG_COMMAND Command,
++                               PVOID            pData,
++                               INT              Length)
++{
++    SDCONFIG  configHdr;
++    SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
++    return SDDEVICE_CALL_CONFIG_FUNC(pDevice,&configHdr);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Set function block size
++
++  @function name: SDLIB_SetFunctionBlockSize
++  @prototype: SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
++                                                     UINT16           BlockSize)
++
++  @category: PD_Reference
++  @input:  pDevice - the device that is the target of the command.
++  @input:  BlockSize - block size to set in function
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes:  Issues CMD52 to set the block size.  This function is fully synchronous and may
++           block.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
++                                        UINT16           BlockSize)
++{
++    UINT8   data[2];
++
++      /* endian safe */
++    data[0] = (UINT8)BlockSize;
++    data[1] = (UINT8)(BlockSize >> 8);
++        /* write the function blk size control register */
++    return _SDLIB_IssueCMD52(pDevice,
++                             0,    /* function 0 register space */
++                             FBR_FUNC_BLK_SIZE_LOW_OFFSET(CalculateFBROffset(
++                             SDDEVICE_GET_SDIO_FUNCNO(pDevice))),
++                             data,
++                             2,
++                             TRUE);
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Print a buffer to the debug output
++
++  @function name: SDLIB_PrintBuffer
++  @prototype: void SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
++  @category: Support_Reference
++
++  @input:  pBuffer - Hex buffer to be printed.
++  @input:  Length - length of pBuffer.
++  @input:  pDescription - String title to be printed above the dump.
++
++  @output: none
++
++  @return: none
++
++  @notes:  Prints the buffer by converting to ASCII and using REL_PRINT() with 16
++           bytes per line.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _SDLIB_PrintBuffer(PUCHAR pBuffer, INT Length, PTEXT pDescription)
++{
++    TEXT  line[49];
++    TEXT  address[5];
++    TEXT  ascii[17];
++    TEXT  temp[5];
++    INT   i;
++    UCHAR num;
++    USHORT offset = 0;
++
++    REL_PRINT(0,
++              ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
++    if (pDescription != NULL) {
++        REL_PRINT(0, ("Description: %s \n\n",pDescription));
++    } else {
++        REL_PRINT(0, ("Description: NONE \n\n"));
++    }
++    REL_PRINT(0,
++              ("Offset                   Data                               ASCII        \n"));
++    REL_PRINT(0,
++              ("--------------------------------------------------------------------------\n"));
++
++    while (Length) {
++        line[0] = (TEXT)0;
++        ascii[0] = (TEXT)0;
++        address[0] = (TEXT)0;
++        sprintf(address,"%4.4X",offset);
++        for (i = 0; i < 16; i++) {
++            if (Length != 0) {
++                num = *pBuffer;
++                sprintf(temp,"%2.2X ",num);
++                strcat(line,temp);
++                if ((num >= 0x20) && (num <= 0x7E)) {
++                    sprintf(temp,"%c",*pBuffer);
++                } else {
++                    sprintf(temp,"%c",0x2e);
++                }
++                strcat(ascii,temp);
++                pBuffer++;
++                Length--;
++            } else {
++                    /* pad partial line with spaces */
++                strcat(line,"   ");
++                strcat(ascii," ");
++            }
++        }
++        REL_PRINT(0,("%s    %s   %s\n", address, line, ascii));
++        offset += 16;
++    }
++    REL_PRINT(0,
++              ("+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n"));
++
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get default operational current
++
++  @function name: SDLIB_GetDefaultOpCurrent
++  @prototype: SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
++  @category: PD_Reference
++
++  @input: pDevice - the device that is the target of the command.
++
++  @output: pOpCurrent - operational current in mA.
++
++  @return: SDIO_STATUS
++
++  @notes:  This routine reads the function's CISTPL_FUNCE tuple for the default operational
++           current. For SDIO 1.0 devices this value is read from the 8-bit TPLFE_OP_MAX_PWR
++           field.  For SDIO 1.1 devices, the HP MAX power field is used only if the device is
++           operating in HIPWR mode. Otherwise the 8-bit TPLFE_OP_MAX_PWR field is used.
++           Some systems may restrict high power/current mode and force cards to operate in a
++           legacy (< 200mA) mode.  This function is fully synchronous and will block the caller.
++
++   @example: Getting the default operational current for this function:
++            // get default operational current
++       status = SDLIB_GetDefaultOpCurrent(pDevice, &slotCurrent);
++       if (!SDIO_SUCCESS(status)) {
++           .. failed
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
++{
++    UINT32              nextTpl;
++    UINT8               tplLength;
++    struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
++    SDIO_STATUS         status;
++
++      /* get the FUNCE tuple */
++    nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++    tplLength = sizeof(funcTuple);
++        /* go get the function Extension tuple */
++    status = _SDLIB_FindTuple(pDevice,
++                              CISTPL_FUNCE,
++                              &nextTpl,
++                              (PUINT8)&funcTuple,
++                              &tplLength);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDLIB_GetDefaultOpCurrent: Failed to get FuncE Tuple: %d \n", status));
++        return status;
++    }
++       /* use the operational power (8-bit) value of current in mA as default*/
++    *pOpCurrent = funcTuple.CommonInfo.OpMaxPwr;
++    if ((tplLength >= sizeof(funcTuple)) && (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice))) {
++            /* we have a 1.1 tuple */
++             /* check for HIPWR mode */
++        if (SDDEVICE_GET_CARD_FLAGS(pDevice) & CARD_HIPWR) {
++                /* use the maximum operational power (16 bit ) from the tuple */
++            *pOpCurrent = CT_LE16_TO_CPU_ENDIAN(funcTuple.HiPwrMaxPwr);
++        }
++    }
++    return SDIO_STATUS_SUCCESS;
++}
++
++
++static INLINE void FreeMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++    SDListInsertHead(&pQueue->FreeMessageList, &pMsg->SDList);
++}
++static INLINE void QueueMessageBlock(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++    SDListInsertTail(&pQueue->MessageList, &pMsg->SDList);
++}
++static INLINE void QueueMessageToHead(PSDMESSAGE_QUEUE pQueue, PSDMESSAGE_BLOCK pMsg) {
++    SDListInsertHead(&pQueue->MessageList, &pMsg->SDList);
++}
++
++static INLINE PSDMESSAGE_BLOCK GetFreeMessageBlock(PSDMESSAGE_QUEUE pQueue) {
++    PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->FreeMessageList);
++    if (pItem != NULL) {
++        return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
++    }
++    return NULL;
++}
++static INLINE PSDMESSAGE_BLOCK GetQueuedMessage(PSDMESSAGE_QUEUE pQueue) {
++    PSDLIST pItem = SDListRemoveItemFromHead(&pQueue->MessageList);
++    if (pItem != NULL) {
++        return CONTAINING_STRUCT(pItem, SDMESSAGE_BLOCK , SDList);
++    }
++    return NULL;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Create a message queue
++
++  @function name: SDLIB_CreateMessageQueue
++  @prototype: PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++  @category: Support_Reference
++
++  @input: MaxMessages - Maximum number of messages this queue supports
++  @input: MaxMessageLength - Maximum size of each message
++
++  @return: Message queue object, NULL on failure
++
++  @notes:  This function creates a simple first-in-first-out message queue.  The caller must determine
++           the maximum number of messages the queue supports and the size of each message.  This
++           function will pre-allocate memory for each message. A producer of data posts a message
++           using SDLIB_PostMessage with a user defined data structure. A consumer of this data
++           can retrieve the message (in FIFO order) using SDLIB_GetMessage. A message queue does not
++           provide a signaling mechanism for notifying a consumer of data. Notifying a consumer is
++           user defined.
++
++  @see also: SDLIB_DeleteMessageQueue, SDLIB_GetMessage, SDLIB_PostMessage.
++
++  @example: Creating a message queue:
++       typedef struct _MyMessage {
++           UINT8 Code;
++           PVOID pDataBuffer;
++       } MyMessage;
++            // create message queue, 16 messages max.
++       pMsgQueue = SDLIB_CreateMessageQueue(16,sizeof(MyMessage));
++       if (NULL == pMsgQueue) {
++           .. failed
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++PSDMESSAGE_QUEUE _CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++{
++    PSDMESSAGE_QUEUE pQueue = NULL;
++    SDIO_STATUS      status = SDIO_STATUS_SUCCESS;
++    INT              ii;
++    PSDMESSAGE_BLOCK pMsg;
++
++    do {
++        pQueue = (PSDMESSAGE_QUEUE)KernelAlloc(sizeof(SDMESSAGE_QUEUE));
++
++        if (NULL == pQueue) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++        SDLIST_INIT(&pQueue->MessageList);
++        SDLIST_INIT(&pQueue->FreeMessageList);
++        pQueue->MaxMessageLength = MaxMessageLength;
++        status = CriticalSectionInit(&pQueue->MessageCritSection);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* allocate message blocks */
++        for (ii = 0; ii < MaxMessages; ii++) {
++            pMsg = (PSDMESSAGE_BLOCK)KernelAlloc(sizeof(SDMESSAGE_BLOCK) + MaxMessageLength -1);
++            if (NULL == pMsg) {
++                break;
++            }
++            FreeMessageBlock(pQueue, pMsg);
++        }
++
++        if (0 == ii) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        if (pQueue != NULL) {
++            _DeleteMessageQueue(pQueue);
++            pQueue = NULL;
++        }
++    }
++    return pQueue;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Delete a message queue
++
++  @function name: SDLIB_DeleteMessageQueue
++  @prototype: void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++  @category: Support_Reference
++
++  @input: pQueue - message queue to delete
++
++  @notes: This function flushes the message queue and frees all memory allocated for
++          messages.
++
++  @see also: SDLIB_CreateMessageQueue
++
++  @example: Deleting a message queue:
++       if (pMsgQueue != NULL) {
++            SDLIB_DeleteMessageQueue(pMsgQueue);
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void _DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++{
++    PSDMESSAGE_BLOCK pMsg;
++    SDIO_STATUS     status;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++
++        /* cleanup free list */
++    while (1) {
++        pMsg = GetFreeMessageBlock(pQueue);
++        if (pMsg != NULL) {
++            KernelFree(pMsg);
++        } else {
++            break;
++        }
++    }
++        /* cleanup any in the queue */
++    while (1) {
++        pMsg = GetQueuedMessage(pQueue);
++        if (pMsg != NULL) {
++            KernelFree(pMsg);
++        } else {
++            break;
++        }
++    }
++
++    status = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++    CriticalSectionDelete(&pQueue->MessageCritSection);
++    KernelFree(pQueue);
++
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Post a message queue
++
++  @function name: SDLIB_PostMessage
++  @prototype: SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++  @category: Support_Reference
++
++  @input: pQueue - message queue to post to
++  @input: pMessage - message to post
++  @input: MessageLength - length of message (for validation)
++
++  @return: SDIO_STATUS
++
++  @notes: The message queue uses an internal list of user defined message structures.  When
++          posting a message the message is copied into an allocated structure and queued.  The memory
++          pointed to by pMessage does not need to be allocated and can reside on the stack.
++          The length of the message to post can be smaller that the maximum message size. This allows
++          for variable length messages up to the maximum message size. This
++          function returns SDIO_STATUS_NO_RESOURCES, if the message queue is full.  This
++          function returns SDIO_STATUS_BUFFER_TOO_SMALL, if the message size exceeds the maximum
++          size of a message.  Posting and getting messsages from a message queue is safe in any
++          driver context.
++
++  @see also: SDLIB_CreateMessageQueue , SDLIB_GetMessage
++
++  @example: Posting a message
++       MyMessage message;
++           // set up message
++       message.code = MESSAGE_DATA_READY;
++       message.pData = pInstance->pDataBuffers[currentIndex];
++           // post message
++       status = SDLIB_PostMessage(pInstance->pReadQueue,&message,sizeof(message));
++       if (!SDIO_SUCCESS(status)) {
++           // failed
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++{
++    SDIO_STATUS status2;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDMESSAGE_BLOCK pMsg;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    if (MessageLength > pQueue->MaxMessageLength) {
++        return SDIO_STATUS_BUFFER_TOO_SMALL;
++    }
++
++    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    do {
++            /* get a message block */
++        pMsg = GetFreeMessageBlock(pQueue);
++        if (NULL == pMsg) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++            /* copy the message */
++        memcpy(pMsg->MessageStart,pMessage,MessageLength);
++            /* set the length of the message */
++        pMsg->MessageLength = MessageLength;
++            /* queue the message to the list  */
++        QueueMessageBlock(pQueue,pMsg);
++    } while (FALSE);
++
++    status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++    return status;
++}
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get a message from a message queue
++
++  @function name: SDLIB_GetMessage
++  @prototype: SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++  @category: Support_Reference
++
++  @input: pQueue - message queue to retreive a message from
++  @input: pBufferLength - on entry, the length of the data buffer
++  @output: pData - buffer to hold the message
++  @output: pBufferLength - on return, contains the number of bytes copied
++
++  @return: SDIO_STATUS
++
++  @notes: The message queue uses an internal list of user defined message structures.  The message is
++          dequeued (FIFO order) and copied to the callers buffer.  The internal allocation for the message
++          is returned back to the message queue. This function returns SDIO_STATUS_NO_MORE_MESSAGES
++          if the message queue is empty. If the length of the buffer is smaller than the length of
++          the message at the head of the queue,this function returns SDIO_STATUS_BUFFER_TOO_SMALL and
++          returns the required length in pBufferLength.
++
++  @see also: SDLIB_CreateMessageQueue , SDLIB_PostMessage
++
++  @example: Getting a message
++       MyMessage message;
++       INT       length;
++           // set length
++       length = sizeof(message);
++           // post message
++       status = SDLIB_GetMessage(pInstance->pReadQueue,&message,&length);
++       if (!SDIO_SUCCESS(status)) {
++           // failed
++       }
++
++  @example: Checking queue for a message and getting the size of the message
++       INT       length;
++           // use zero length to get the size of the message
++       length = 0;
++       status = SDLIB_GetMessage(pInstance->pReadQueue,NULL,&length);
++       if (status == SDIO_STATUS_NO_MORE_MESSAGES) {
++            // no messages in queue
++       } else if (status == SDIO_STATUS_BUFFER_TOO_SMALL) {
++            // message exists in queue and length of message is returned
++            messageSizeInQueue = length;
++       } else {
++            // some other failure
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++{
++    SDIO_STATUS status2;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDMESSAGE_BLOCK pMsg;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    status = CriticalSectionAcquireSyncIrq(&pQueue->MessageCritSection);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    do {
++        pMsg = GetQueuedMessage(pQueue);
++        if (NULL == pMsg) {
++            status = SDIO_STATUS_NO_MORE_MESSAGES;
++            break;
++        }
++        if (*pBufferLength < pMsg->MessageLength) {
++                /* caller buffer is too small */
++            *pBufferLength = pMsg->MessageLength;
++                /* stick it back to the front */
++            QueueMessageToHead(pQueue, pMsg);
++            status = SDIO_STATUS_BUFFER_TOO_SMALL;
++            break;
++        }
++            /* copy the message to the callers buffer */
++        memcpy(pData,pMsg->MessageStart,pMsg->MessageLength);
++            /* return actual length */
++        *pBufferLength = pMsg->MessageLength;
++            /* return this message block back to the free list  */
++        FreeMessageBlock(pQueue, pMsg);
++
++    } while (FALSE);
++
++    status2 = CriticalSectionReleaseSyncIrq(&pQueue->MessageCritSection);
++
++    return status;
++}
++
++/* the following documents the OS helper APIs */
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Create an OS-specific helper task/thread
++
++  @function name: SDLIB_OSCreateHelper
++  @prototype: SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
++                                               PHELPER_FUNCTION pFunction,
++                                               PVOID            pContext)
++  @category: Support_Reference
++
++  @input: pHelper - caller allocated helper object
++  @input: pFunction - helper function
++  @input: pContext - helper context
++
++  @return: SDIO_STATUS
++
++  @notes: This function creates a helper task/thread that runs in a new execution context. The newly
++          created task/thread invokes the helper function. The thread/task exits when the helper
++          function returns.  The helper function has the prototype of:
++          THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
++          The helper function usually implements a while loop and suspends execution using
++          SD_WAIT_FOR_WAKEUP().  On exit the helper function can return an OS-specific THREAD_RETURN
++          code (usually zero). The helper function executes in a fully schedule-able context and
++          can block on semaphores and sleep.
++
++  @see also: SDLIB_OSDeleteHelper , SD_WAIT_FOR_WAKEUP
++
++  @example: A thread helper function:
++       THREAD_RETURN HelperFunction(POSKERNEL_HELPER pHelper)
++       {
++           SDIO_STATUS status;
++           PMYCONTEXT pContext = (PMYCONTEXT)SD_GET_OS_HELPER_CONTEXT(pHelper);
++                // wait for wake up
++           while(1) {
++                  status = SD_WAIT_FOR_WAKEUP(pHelper);
++                  if (!SDIO_SUCCESS(status)) {
++                      break;
++                  }
++                  if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++                      //... shutting down
++                      break;
++                  }
++                  // handle wakeup...
++            }
++            return 0;
++       }
++
++  @example: Creating a helper:
++       status = SDLIB_OSCreateHelper(&pInstance->OSHelper,HelperFunction,pInstance);
++       if (!SDIO_SUCCESS(status)) {
++           // failed
++       }
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/**++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Delete an OS helper task/thread
++
++  @function name: SDLIB_OSDeleteHelper
++  @prototype: void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
++  @category: Support_Reference
++
++  @input: pHelper - caller allocated helper object
++
++  @notes: This function wakes the helper and waits(blocks) until the helper exits. The caller can
++          only pass an OS helper structure that was initialized sucessfully by
++          SDLIB_OSCreateHelper.  The caller must be in a schedulable context.
++
++  @see also: SDLIB_OSCreateHelper
++
++  @example: Deleting a helper:
++       if (pInstance->HelperCreated) {
++               // clean up the helper if we successfully created it
++           SDLIB_OSDeleteHelper(&pInstance->OSHelper);
++       }
++
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
+Index: linux-2.6.22/drivers/sdio/lib/sdio_lib_os.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/lib/sdio_lib_os.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,254 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_function_os.c
++
++ at abstract: Linux implementation module for SDIO library
++
++#notes: includes module load and unload functions
++
++ at notice: Copyright (c), 2004 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++#define DBG_DECLARE 17;
++#include <linux/sdio/ctsystem.h>
++
++#include <linux/module.h>
++#include <linux/init.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/kthread.h>
++#endif
++
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++
++#define DESCRIPTION "SDIO Kernel Library"
++#define AUTHOR "Atheros Communications, Inc."
++
++/* debug print parameter */
++
++//CT_DECLARE_MODULE_PARAM_INTEGER(sdio_lib_debug_level);
++//MODULE_PARM_DESC(sdio_lib_debug_level, "debuglevel 0-7, controls debug prints");
++
++
++/* proxies */
++SDIO_STATUS SDLIB_IssueCMD52(PSDDEVICE     pDevice,
++                            UINT8         FuncNo,
++                            UINT32        Address,
++                            PUINT8        pData,
++                            INT           ByteCount,
++                            BOOL          Write)
++{
++    return _SDLIB_IssueCMD52(pDevice,FuncNo,Address,pData,ByteCount,Write);
++}
++
++SDIO_STATUS SDLIB_FindTuple(PSDDEVICE  pDevice,
++                         UINT8      Tuple,
++                         UINT32     *pTupleScanAddress,
++                         PUINT8     pBuffer,
++                         UINT8      *pLength)
++{
++    return _SDLIB_FindTuple(pDevice,Tuple,pTupleScanAddress,pBuffer,pLength);
++}
++
++SDIO_STATUS SDLIB_IssueConfig(PSDDEVICE        pDevice,
++                              SDCONFIG_COMMAND Command,
++                              PVOID            pData,
++                              INT              Length)
++{
++    return _SDLIB_IssueConfig(pDevice,Command,pData,Length);
++}
++
++void SDLIB_PrintBuffer(PUCHAR pBuffer,INT Length,PTEXT pDescription)
++{
++    _SDLIB_PrintBuffer(pBuffer,Length,pDescription);
++}
++
++SDIO_STATUS SDLIB_SetFunctionBlockSize(PSDDEVICE        pDevice,
++                                       UINT16           BlockSize)
++{
++    return _SDLIB_SetFunctionBlockSize(pDevice,BlockSize);
++}
++
++void SDLIB_SetupCMD52Request(UINT8         FuncNo,
++                             UINT32        Address,
++                             BOOL          Write,
++                             UINT8         WriteData,
++                             PSDREQUEST    pRequest)
++{
++    _SDLIB_SetupCMD52Request(FuncNo,Address,Write,WriteData,pRequest);
++}
++
++SDIO_STATUS SDLIB_GetDefaultOpCurrent(PSDDEVICE  pDevice, SD_SLOT_CURRENT *pOpCurrent)
++{
++    return _SDLIB_GetDefaultOpCurrent(pDevice,pOpCurrent);
++}
++
++/* helper function launcher */
++INT HelperLaunch(PVOID pContext)
++{
++    INT exit;
++        /* call function */
++    exit = ((POSKERNEL_HELPER)pContext)->pHelperFunc((POSKERNEL_HELPER)pContext);
++    complete_and_exit(&((POSKERNEL_HELPER)pContext)->Completion, exit);
++    return exit;
++}
++
++/*
++ * OSCreateHelper - create a worker kernel thread
++*/
++SDIO_STATUS SDLIB_OSCreateHelper(POSKERNEL_HELPER pHelper,
++                           PHELPER_FUNCTION pFunction,
++                           PVOID            pContext)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    memset(pHelper,0,sizeof(OSKERNEL_HELPER));
++
++    do {
++        pHelper->pContext = pContext;
++        pHelper->pHelperFunc = pFunction;
++        status = SignalInitialize(&pHelper->WakeSignal);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++        init_completion(&pHelper->Completion);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        pHelper->pTask = kthread_create(HelperLaunch,
++                                       (PVOID)pHelper,
++                                       "SDIO Helper");
++        if (NULL == pHelper->pTask) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++        wake_up_process(pHelper->pTask);
++#else
++    /* 2.4 */
++        pHelper->pTask = kernel_thread(HelperLaunch,
++                                       (PVOID)pHelper,
++                                       (CLONE_FS | CLONE_FILES | SIGCHLD));
++        if (pHelper->pTask < 0) {
++            DBG_PRINT(SDDBG_TRACE,
++                ("SDIO BusDriver - OSCreateHelper, failed to create thread\n"));
++        }
++#endif
++
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        SDLIB_OSDeleteHelper(pHelper);
++    }
++    return status;
++}
++
++/*
++ * OSDeleteHelper - delete thread created with OSCreateHelper
++*/
++void SDLIB_OSDeleteHelper(POSKERNEL_HELPER pHelper)
++{
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    if (pHelper->pTask != NULL) {
++#else
++    /* 2.4 */
++    if (pHelper->pTask >= 0) {
++#endif
++        pHelper->ShutDown = TRUE;
++        SignalSet(&pHelper->WakeSignal);
++            /* wait for thread to exit */
++        wait_for_completion(&pHelper->Completion);
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        pHelper->pTask = NULL;
++#else
++    /* 2.4 */
++        pHelper->pTask = 0;
++#endif
++    }
++
++    SignalDelete(&pHelper->WakeSignal);
++}
++
++/*
++ * module init
++*/
++static int __init sdio_lib_init(void) {
++    REL_PRINT(SDDBG_TRACE, ("SDIO Library load\n"));
++    return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_lib_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("SDIO Library unload\n"));
++}
++
++PSDMESSAGE_QUEUE SDLIB_CreateMessageQueue(INT MaxMessages, INT MaxMessageLength)
++{
++    return _CreateMessageQueue(MaxMessages,MaxMessageLength);
++
++}
++void SDLIB_DeleteMessageQueue(PSDMESSAGE_QUEUE pQueue)
++{
++    _DeleteMessageQueue(pQueue);
++}
++
++SDIO_STATUS SDLIB_PostMessage(PSDMESSAGE_QUEUE pQueue, PVOID pMessage, INT MessageLength)
++{
++    return _PostMessage(pQueue,pMessage,MessageLength);
++}
++
++SDIO_STATUS SDLIB_GetMessage(PSDMESSAGE_QUEUE pQueue, PVOID pData, INT *pBufferLength)
++{
++    return _GetMessage(pQueue,pData,pBufferLength);
++}
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++module_init(sdio_lib_init);
++module_exit(sdio_lib_cleanup);
++EXPORT_SYMBOL(SDLIB_IssueCMD52);
++EXPORT_SYMBOL(SDLIB_FindTuple);
++EXPORT_SYMBOL(SDLIB_IssueConfig);
++EXPORT_SYMBOL(SDLIB_PrintBuffer);
++EXPORT_SYMBOL(SDLIB_SetFunctionBlockSize);
++EXPORT_SYMBOL(SDLIB_SetupCMD52Request);
++EXPORT_SYMBOL(SDLIB_GetDefaultOpCurrent);
++EXPORT_SYMBOL(SDLIB_OSCreateHelper);
++EXPORT_SYMBOL(SDLIB_OSDeleteHelper);
++EXPORT_SYMBOL(SDLIB_CreateMessageQueue);
++EXPORT_SYMBOL(SDLIB_DeleteMessageQueue);
++EXPORT_SYMBOL(SDLIB_PostMessage);
++EXPORT_SYMBOL(SDLIB_GetMessage);
+Index: linux-2.6.22/drivers/sdio/busdriver/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,7 @@
++#
++# SDIO stack bus drivers
++#
++obj-$(CONFIG_SDIO) += sdio_busdriver.o
++sdio_busdriver-objs := sdio_bus.o sdio_function.o sdio_bus_misc.o sdio_bus_events.o sdio_bus_os.o
++
++
+Index: linux-2.6.22/drivers/sdio/busdriver/_busdriver.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/_busdriver.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,462 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: _busdriver.h
++
++ at abstract: internal include file for busdriver
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef ___BUSDRIVER_H___
++#define ___BUSDRIVER_H___
++#include <linux/sdio/sdio_lib.h>
++
++#define SDIODBG_FUNC_IRQ  (SDDBG_TRACE + 1)
++#define SDIODBG_REQUESTS  (SDDBG_TRACE + 2)
++#define SDIODBG_CD_TIMER  (SDDBG_TRACE + 3)
++#define SDIODBG_HCD_EVENTS  (SDDBG_TRACE + 4)
++
++#define SDIOBUS_CD_TIMER_ID 0
++
++#define SDBUS_MAX_RETRY   3
++
++/* Notes on list linkages:
++ *  list heads are held in BDCONTEXT
++ *  HcdList - SDHCD
++ *          one per registered host controller
++ *          Next - links of all HCDs
++ *  DeviceList SDDEVICE
++ *          one per inserted device
++ *          Next - links of all devices
++ *          DeviceListNext - links of all devices on a function
++ *          pFunction - ptr to Function supportting this device
++ *          pHcd - ptr to HCD with supporting this device
++ *  FunctionList SDFUNCTION
++ *          one per register function driver
++ *          Next - links of all functions
++ *          DeviceList - list of devices being support by this function
++ *                       uses DeviceListNext in SDDEVICE to link
++ *
++ *
++*/
++
++#define SDMMC_DEFAULT_CMD_RETRIES           1
++#define SDMMC_DEFAULT_CARD_READY_RETRIES    200
++#define OCR_READY_CHECK_DELAY_MS            10
++#define SDMMC_POWER_SETTLE_DELAY            400  /* in milliseconds */
++#define SDBUS_DEFAULT_REQ_LIST_SIZE         16
++#define SDBUS_DEFAULT_REQ_SIG_SIZE          8
++#define CARD_DETECT_PAUSE                   100
++#define SDBUS_DEFAULT_CD_POLLING_INTERVAL   1000  /* in milliseconds */
++#define MAX_CARD_DETECT_MSGS                16
++#define SDMMC_DEFAULT_BYTES_PER_BLOCK       2048
++#define SDMMC_DEFAULT_BLOCKS_PER_TRANS      512
++#define SDMMC_CMD13_POLLING_MULTIPLIER      1000 /* per block multiplier */
++#define MAX_HCD_REQ_RECURSION               5
++#define MAX_HCD_RECURSION_RUNAWAY           100
++
++    /* internal signalling item */
++typedef struct _SIGNAL_ITEM{
++    SDLIST       SDList;        /* list link*/
++    OS_SIGNAL    Signal;        /* signal */
++}SIGNAL_ITEM, *PSIGNAL_ITEM;
++
++typedef struct _HCD_EVENT_MESSAGE {
++    HCD_EVENT Event;    /* the event */
++    PSDHCD    pHcd;     /* hcd that generated the event */
++}HCD_EVENT_MESSAGE, *PHCD_EVENT_MESSAGE;
++
++/* internal data for bus driver */
++typedef struct _BDCONTEXT {
++
++    /* list of SD requests and signalling semaphores and a semaphore to protect it */
++    SDLIST  RequestList;
++    SDLIST  SignalList;
++    OS_CRITICALSECTION RequestListCritSection;
++    /* list of host controller bus drivers, sempahore to protect it */
++    SDLIST HcdList;
++    OS_SEMAPHORE HcdListSem;
++    /* list of inserted devices, semaphore to protect it */
++    SDLIST DeviceList;
++    OS_SEMAPHORE DeviceListSem;
++    /* list of function drivers, semaphore to protect it */
++    SDLIST FunctionList;
++    OS_SEMAPHORE FunctionListSem;
++    INT              RequestListSize;        /* default request list */
++    INT              SignalSemListSize;      /* default signalling semaphore size */
++    INT              CurrentRequestAllocations; /*current count of allocated requests */
++    INT              CurrentSignalAllocations;   /* current count of signal allocations */
++    INT              MaxRequestAllocations;  /* max number of allocated requests to keep around*/
++    INT              MaxSignalAllocations;   /* max number of signal allocations to keep around*/
++    INT              RequestRetries;         /* cmd retries */
++    INT              CardReadyPollingRetry;  /* card ready polling retry count */
++    INT              PowerSettleDelay;       /* power settle delay */
++    INT              CMD13PollingMultiplier; /* CMD13 (GET STATUS) multiplier */
++    SD_BUSCLOCK_RATE DefaultOperClock;       /* default operation clock */
++    SD_BUSMODE_FLAGS DefaultBusMode;         /* default bus mode */
++    UINT16           DefaultOperBlockLen;    /* default operational block length per block */
++    UINT16           DefaultOperBlockCount;  /* default operational block count per transaction */
++    UINT32           CDPollingInterval;      /* card insert/removal polling interval */
++    UINT8            InitMask;               /* bus driver init mask */
++#define BD_TIMER_INIT    0x01
++#define HELPER_INIT      0x02
++#define RESOURCE_INIT    0x04
++    BOOL             CDTimerQueued;          /* card detect timer queued */
++    OSKERNEL_HELPER  CardDetectHelper;       /* card detect helper */
++    PSDMESSAGE_QUEUE pCardDetectMsgQueue;    /* card detect message queue */
++    ULONG            HcdInUseField;          /* bit field of in use HCD numbers*/
++    UINT32           ConfigFlags;            /* bus driver configuration flags */
++#define BD_CONFIG_SDREQ_FORCE_ALL_ASYNC 0x00000001
++    INT              MaxHcdRecursion;        /* max HCD recurion level */
++}BDCONTEXT, *PBDCONTEXT;
++
++#define BD_DEFAULT_CONFIG_FLAGS 0x00000000
++#define IsQueueBusy(pRequestQueue)      (pRequestQueue)->Busy
++#define MarkQueueBusy(pRequestQueue)    (pRequestQueue)->Busy = TRUE
++#define MarkQueueNotBusy(pRequestQueue) (pRequestQueue)->Busy = FALSE
++
++#define CLEAR_INTERNAL_REQ_FLAGS(pReq) (pReq)->Flags &= ~(UINT)((SDREQ_FLAGS_RESP_SPI_CONVERTED | \
++                                                          SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE))
++
++/* macros to insert request into the queue */
++#define QueueRequest(pReqQ,pReq) SDListInsertTail(&(pReqQ)->Queue,&(pReq)->SDList)
++#define QueueRequestToFront(pReqQ,pReq) SDListInsertHead(&(pReqQ)->Queue,&(pReq)->SDList)
++
++/* macros to remove an item from the head of the queue */
++static INLINE PSDREQUEST DequeueRequest(PSDREQUESTQUEUE pRequestQueue) {
++    PSDLIST pItem;
++    pItem = SDListRemoveItemFromHead(&pRequestQueue->Queue);
++    if (pItem != NULL) {
++        return CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++    }
++    return NULL;
++}
++
++static INLINE SDIO_STATUS InitializeRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
++    SDLIST_INIT(&pRequestQueue->Queue);
++    MarkQueueNotBusy(pRequestQueue);
++    return SDIO_STATUS_SUCCESS;
++}
++
++static INLINE void CleanupRequestQueue(PSDREQUESTQUEUE pRequestQueue) {
++
++}
++
++/* for bus driver internal use only */
++SDIO_STATUS _SDIO_BusDriverInitialize(void);
++SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc);
++void _SDIO_BusDriverCleanup(void);
++SDIO_STATUS RemoveAllFunctions(void);
++SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd);
++PSDDEVICE AllocateDevice(PSDHCD pHcd);
++BOOL AddDeviceToList(PSDDEVICE pDevice);
++SDIO_STATUS DeleteDevices(PSDHCD pHcd);
++SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice);
++extern PBDCONTEXT pBusContext;
++extern const CT_VERSION_CODE g_Version;
++SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd);
++SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd);
++SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event);
++SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction);
++SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode);
++SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd);
++SDIO_STATUS SDInitializeCard(PSDHCD pHcd);
++SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice);
++SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice);
++SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData);
++SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData);
++SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL Mask);
++SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice);
++SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable);
++SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig);
++SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq);
++PSDREQUEST IssueAllocRequest(PSDDEVICE pDev);
++void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq);
++PSDREQUEST AllocateRequest(void);
++void FreeRequest(PSDREQUEST pReq);
++PSIGNAL_ITEM AllocateSignal(void);
++void FreeSignal(PSIGNAL_ITEM pSignal);
++SDIO_STATUS InitializeTimers(void);
++SDIO_STATUS CleanupTimers(void);
++SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut);
++SDIO_STATUS DeviceAttach(PSDHCD pHcd);
++SDIO_STATUS DeviceDetach(PSDHCD pHcd);
++SDIO_STATUS DeviceInterrupt(PSDHCD pHcd);
++SDIO_STATUS CardInitSetup(PSDHCD pHcd);
++void RunCardDetect(void);
++void SDIO_NotifyTimerTriggered(INT TimerID);
++SDIO_STATUS TestPresence(PSDHCD          pHcd,
++                         CARD_INFO_FLAGS TestType,
++                         PSDREQUEST      pReq);
++#define _IssueSimpleBusRequest(pHcd,Cmd,Arg,Flags,pReqToUse) \
++          _IssueBusRequestBd((pHcd),(Cmd),(Arg),(Flags),(pReqToUse),NULL,0)
++
++SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd);
++SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd);
++SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDev);
++
++    /* check API version compatibility of an HCD or function driver to a stack major/minor version
++     if the driver version is greater than the major number, we are compatible
++     if the driver version is equal, then we check if the minor is greater than or equal
++     we don't have to check for the less than major, because the bus driver never loads
++     drivers with different major numbers ...
++     if the busdriver compiled version major is greater than the major version being checked this
++     macro will resolved to ALWAYS true thus optimizing the code to not check the HCD since
++     as a rule we never load an HCD with a lower major number */
++#define CHECK_API_VERSION_COMPAT(p,major,minor)       \
++     ((CT_SDIO_STACK_VERSION_MAJOR(CT_SDIO_STACK_VERSION_CODE) > (major)) || \
++      (GET_SDIO_STACK_VERSION_MINOR((p)) >= (minor)))
++
++static INLINE SDIO_STATUS OS_IncHcdReference(PSDHCD pHcd) {
++        /* this API was added in version 2.3 which requires access to a field in the HCD structure */
++    if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
++            /* we can safely call the OS-dependent function */
++        return Do_OS_IncHcdReference(pHcd);
++    }
++    return SDIO_STATUS_SUCCESS;
++}
++
++static INLINE SDIO_STATUS OS_DecHcdReference(PSDHCD pHcd) {
++            /* this API was added in version 2.3 which requires access to a field in the HCD structure */
++    if (CHECK_API_VERSION_COMPAT(pHcd,2,3)) {
++            /* we can safely call the OS-dependent function */
++        return Do_OS_DecHcdReference(pHcd);
++    }
++    return SDIO_STATUS_SUCCESS;
++}
++
++SDIO_STATUS _IssueBusRequestBd(PSDHCD           pHcd,
++                               UINT8            Cmd,
++                               UINT32           Argument,
++                               SDREQUEST_FLAGS  Flags,
++                               PSDREQUEST       pReqToUse,
++                               PVOID            pData,
++                               INT              Length);
++
++SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd,PSDREQUEST pReq);
++
++#define CALL_HCD_CONFIG(pHcd,pCfg) (pHcd)->pConfigure((pHcd),(pCfg))
++    /* macro to force all requests to be asynchronous in the HCD */
++static INLINE BOOL ForceAllRequestsAsync(void) {
++    return (pBusContext->ConfigFlags & BD_CONFIG_SDREQ_FORCE_ALL_ASYNC);
++}
++
++static INLINE SDIO_STATUS CallHcdRequest(PSDHCD pHcd) {
++
++    if (pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_PSEUDO) {
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: PSEUDO Request 0x%X \n",
++                    (INT)pHcd->pCurrentRequest));
++            /* return successful completion so that processing can finish */
++        return SDIO_STATUS_SUCCESS;
++    }
++
++    if (ForceAllRequestsAsync()) {
++            /* all requests must be completed(indicated) in a separate context */
++        pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++    } else {
++            /* otherwise perform a test on flags in the HCD */
++        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6) &&
++            AtomicTest_Set(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT)) {
++
++            /* bit was already set, this is a recursive call,
++             * we need to tell the HCD to complete the
++             * request in a separate context */
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive CallHcdRequest \n"));
++            pHcd->pCurrentRequest->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++        }
++    }
++#ifdef DEBUG
++    {
++        SDIO_STATUS status;
++        BOOL forceDeferred;
++        forceDeferred = pHcd->pCurrentRequest->Flags & SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE;
++        status = pHcd->pRequest(pHcd);
++        if (forceDeferred) {
++                /* status better be pending... */
++            DBG_ASSERT(status == SDIO_STATUS_PENDING);
++        }
++        return status;
++    }
++#else
++    return pHcd->pRequest(pHcd);
++#endif
++
++}
++
++/* note the caller of this macro must take the HCD lock to protect the count */
++#define CHECK_HCD_RECURSE(pHcd,pReq)   \
++{                                      \
++    (pHcd)->Recursion++;               \
++    DBG_ASSERT((pHcd)->Recursion < MAX_HCD_RECURSION_RUNAWAY); \
++    if ((pHcd)->Recursion > pBusContext->MaxHcdRecursion) {    \
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Recursive Request Count Exceeded (%d) \n",(pHcd)->Recursion)); \
++        (pReq)->Flags |= SDREQ_FLAGS_FORCE_DEFERRED_COMPLETE; \
++    }                                                         \
++}
++
++/* InternalFlags bit number settings */
++#define SDBD_INIT        1
++#define SDBD_PENDING    15
++#define SDBD_ALLOC_IRQ_SAFE     2
++
++#define SDBD_ALLOC_IRQ_SAFE_MASK (1 << SDBD_ALLOC_IRQ_SAFE)
++
++static void INLINE DoRequestCompletion(PSDREQUEST pReq, PSDHCD pHcd) {
++    CLEAR_INTERNAL_REQ_FLAGS(pReq);
++    if (pReq->pCompletion != NULL) {
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Calling completion on request:0x%X, CMD:%d \n",
++           (INT)pReq, pReq->Command));
++            /* call completion routine, mark request reusable */
++        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++        pReq->pCompletion(pReq);
++    } else {
++            /* mark request reusable */
++        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++    }
++}
++
++THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper);
++THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper);
++
++void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer);
++
++static INLINE SDIO_STATUS PostCardDetectEvent(PBDCONTEXT pSDB, HCD_EVENT Event, PSDHCD pHcd) {
++    HCD_EVENT_MESSAGE message;
++    SDIO_STATUS       status;
++    message.Event = Event;
++    message.pHcd = pHcd;
++
++    if (pHcd != NULL) {
++            /* increment HCD reference count to process this HCD message */
++        status = OS_IncHcdReference(pHcd);
++        if (!SDIO_SUCCESS(status)) {
++            return status;
++        }
++    }
++        /* post card detect message */
++    status = SDLIB_PostMessage(pSDB->pCardDetectMsgQueue, &message, sizeof(message));
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: PostCardDetectEvent error status %d\n",status));
++        if (pHcd != NULL) {
++                /* decrement count */
++            OS_DecHcdReference(pHcd);
++        }
++        return status;
++    }
++        /* wake card detect helper */
++    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: PostCardDetectEvent waking\n"));
++    return SD_WAKE_OS_HELPER(&pSDB->CardDetectHelper);
++}
++
++/* initialize device fields */
++static INLINE void InitDeviceData(PSDHCD pHcd, PSDDEVICE pDevice) {
++    ZERO_POBJECT(pDevice);
++    SDLIST_INIT(&pDevice->SDList);
++    SDLIST_INIT(&pDevice->FuncListLink);
++    pDevice->pRequest = IssueBusRequest;
++    pDevice->pConfigure = IssueBusConfig;
++    pDevice->AllocRequest = IssueAllocRequest;
++    pDevice->FreeRequest = IssueFreeRequest;
++        /* set card flags in the ID */
++    pDevice->pId[0].CardFlags = pHcd->CardProperties.Flags;
++    pDevice->pFunction = NULL;
++    pDevice->pHcd = pHcd;
++    SET_SDIO_STACK_VERSION(pDevice);
++}
++
++/* de-initialize device fields */
++static INLINE void DeinitDeviceData(PSDDEVICE pDevice) {
++}
++
++/* reset hcd state */
++static INLINE void ResetHcdState(PSDHCD pHcd) {
++    ZERO_POBJECT(&pHcd->CardProperties);
++    pHcd->PendingHelperIrqs = 0;
++    pHcd->PendingIrqAcks = 0;
++    pHcd->IrqsEnabled = 0;
++    pHcd->pCurrentRequest = NULL;
++    pHcd->IrqProcState = SDHCD_IDLE;
++        /* mark this device as special */
++    pHcd->pPseudoDev->pId[0].CardFlags = CARD_PSEUDO;
++    pHcd->SlotCurrentAllocated = 0;
++}
++
++static INLINE SDIO_STATUS _IssueConfig(PSDHCD           pHcd,
++                                       SDCONFIG_COMMAND Command,
++                                       PVOID            pData,
++                                       INT              Length){
++    SDCONFIG  configHdr;
++    SET_SDCONFIG_CMD_INFO(&configHdr,Command,pData,Length);
++    return CALL_HCD_CONFIG(pHcd,&configHdr);
++}
++
++/* prototypes */
++#define _AcquireHcdLock(pHcd)CriticalSectionAcquireSyncIrq(&(pHcd)->HcdCritSection)
++#define _ReleaseHcdLock(pHcd)CriticalSectionReleaseSyncIrq(&(pHcd)->HcdCritSection)
++
++#define AcquireHcdLock(pDev) CriticalSectionAcquireSyncIrq(&(pDev)->pHcd->HcdCritSection)
++#define ReleaseHcdLock(pDev) CriticalSectionReleaseSyncIrq(&(pDev)->pHcd->HcdCritSection)
++
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
++void OS_RemoveDevice(PSDDEVICE pDevice);
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction);
++SDIO_STATUS SetOperationalBusMode(PSDDEVICE               pDevice,
++                                  PSDCONFIG_BUS_MODE_DATA pBusMode);
++void FreeDevice(PSDDEVICE pDevice);
++BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList);
++
++
++#define CHECK_FUNCTION_DRIVER_VERSION(pF) \
++    (GET_SDIO_STACK_VERSION_MAJOR((pF)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
++#define CHECK_HCD_DRIVER_VERSION(pH) \
++    (GET_SDIO_STACK_VERSION_MAJOR((pH)) == CT_SDIO_STACK_VERSION_MAJOR(g_Version))
++
++/* CLARIFICATION on SDREQ_FLAGS_PSEUDO and SDREQ_FLAGS_BARRIER flags :
++ *
++ * A request marked as PSEUDO is synchronized with bus requests and is not a true request
++ * that is issued to an HCD.
++ *
++ * A request marked with a BARRIER flag requires that the completion routine be called
++ * before the next bus request starts.  This is required for HCD requests that can change
++ * bus or clock modes.  Changing the clock or bus mode while a bus request is pending
++ * can cause problems.
++ *
++ *
++ *
++ * */
++#define SD_PSEUDO_REQ_FLAGS \
++      (SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC)
++
++#endif /*___BUSDRIVER_H___*/
+Index: linux-2.6.22/drivers/sdio/busdriver/sdio_bus.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/sdio_bus.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,2119 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_bus.c
++
++ at abstract: OS independent bus driver support
++ at category abstract: HD_Reference Host Controller Driver Interfaces.
++ at category abstract: PD_Reference
++    Peripheral Driver Interfaces.
++
++#notes: this file supports the HCD's and generic functions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include <linux/sdio/mmc_defs.h>
++#include "_busdriver.h"
++
++/* list of host controller bus drivers */
++PBDCONTEXT pBusContext = NULL;
++static void CleanUpBusResources(void);
++static SDIO_STATUS AllocateBusResources(void);
++static PSIGNAL_ITEM BuildSignal(void);
++static void DestroySignal(PSIGNAL_ITEM pSignal);
++
++const CT_VERSION_CODE g_Version = CT_SDIO_STACK_VERSION_CODE;
++/*
++ * _SDIO_BusDriverInitialize - call once on driver loading
++ *
++*/
++SDIO_STATUS _SDIO_BusDriverInitialize(void)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Version: %d.%d\n",
++       CT_SDIO_STACK_VERSION_MAJOR(g_Version),CT_SDIO_STACK_VERSION_MINOR(g_Version)));
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: enter _SDIO_BusDriverInitialize\n"));
++
++    do {
++        /* allocate our internal data initialize it */
++        pBusContext = KernelAlloc(sizeof(BDCONTEXT));
++        if (pBusContext == NULL) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't allocate memory.\n"));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++        memset(pBusContext,0,sizeof(BDCONTEXT));
++        SDLIST_INIT(&pBusContext->RequestList);
++        SDLIST_INIT(&pBusContext->HcdList);
++        SDLIST_INIT(&pBusContext->DeviceList);
++        SDLIST_INIT(&pBusContext->FunctionList);
++        SDLIST_INIT(&pBusContext->SignalList);
++
++            /* setup defaults */
++        pBusContext->RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
++        pBusContext->CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
++        pBusContext->PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
++        pBusContext->DefaultOperClock = MMC_HS_MAX_BUS_CLOCK;
++        pBusContext->DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
++        pBusContext->RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
++        pBusContext->SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
++        pBusContext->CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
++        pBusContext->DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
++        pBusContext->DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
++        pBusContext->ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
++        pBusContext->CMD13PollingMultiplier = SDMMC_CMD13_POLLING_MULTIPLIER;
++        pBusContext->MaxHcdRecursion = MAX_HCD_REQ_RECURSION;
++
++            /* get overrides for the defaults */
++        status = _SDIO_BusGetDefaultSettings(pBusContext);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        pBusContext->MaxRequestAllocations = pBusContext->RequestListSize << 1;
++        pBusContext->MaxSignalAllocations = pBusContext->SignalSemListSize << 1;
++
++        status = CriticalSectionInit(&pBusContext->RequestListCritSection);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CriticalSectionInit.\n"));
++            break;
++        }
++        status = SemaphoreInitialize(&pBusContext->HcdListSem, 1);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize HcdListSem.\n"));
++            break;
++        }
++        status = SemaphoreInitialize(&pBusContext->DeviceListSem, 1);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize DeviceListSem.\n"));
++            break;
++        }
++        status = SemaphoreInitialize(&pBusContext->FunctionListSem, 1);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't SemaphoreInitialize FunctionListSem.\n"));
++            break;
++        }
++        status = AllocateBusResources();
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't AllocateBusResources.\n"));
++            break;
++        }
++
++        pBusContext->InitMask |= RESOURCE_INIT;
++
++        pBusContext->pCardDetectMsgQueue = SDLIB_CreateMessageQueue(MAX_CARD_DETECT_MSGS,
++                                                                   sizeof(HCD_EVENT_MESSAGE));
++
++        if (NULL == pBusContext->pCardDetectMsgQueue) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't CreateMessageQueue.\n"));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        status = SDLIB_OSCreateHelper(&pBusContext->CardDetectHelper,
++                                      CardDetectHelperFunction,
++                                      NULL);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't OSCreateHelper.\n"));
++            break;
++        }
++
++        pBusContext->InitMask |= HELPER_INIT;
++
++        status = InitializeTimers();
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_BusDriverInitialize can't InitializeTimers.\n"));
++            break;
++        }
++        pBusContext->InitMask |= BD_TIMER_INIT;
++    } while(FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        _SDIO_BusDriverCleanup();
++    }
++
++    return status;
++}
++
++
++/*
++ * _SDIO_BusDriverBusDriverCleanup - call once on driver unloading
++ *
++*/
++void _SDIO_BusDriverCleanup(void) {
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
++
++    if (pBusContext->InitMask & BD_TIMER_INIT) {
++        CleanupTimers();
++    }
++
++    if (pBusContext->InitMask & HELPER_INIT) {
++        SDLIB_OSDeleteHelper(&pBusContext->CardDetectHelper);
++    }
++
++    if (pBusContext->pCardDetectMsgQueue != NULL) {
++        SDLIB_DeleteMessageQueue(pBusContext->pCardDetectMsgQueue);
++        pBusContext->pCardDetectMsgQueue = NULL;
++    }
++        /* remove functions */
++    RemoveAllFunctions();
++        /* cleanup all devices */
++    DeleteDevices(NULL);
++    CleanUpBusResources();
++    CriticalSectionDelete(&pBusContext->RequestListCritSection);
++    SemaphoreDelete(&pBusContext->HcdListSem);
++    SemaphoreDelete(&pBusContext->DeviceListSem);
++    SemaphoreDelete(&pBusContext->FunctionListSem);
++    KernelFree(pBusContext);
++    pBusContext = NULL;
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_BusDriverCleanup\n"));
++}
++
++
++/* cleanup hcd */
++static void CleanupHcd(PSDHCD pHcd)
++{
++    SDLIB_OSDeleteHelper(&pHcd->SDIOIrqHelper);
++    CleanupRequestQueue(&pHcd->CompletedRequestQueue);
++    CleanupRequestQueue(&pHcd->RequestQueue);
++    CriticalSectionDelete(&pHcd->HcdCritSection);
++    SemaphoreDelete(&pHcd->ConfigureOpsSem);
++    pHcd->pCurrentRequest = NULL;
++    if (pHcd->pPseudoDev != NULL) {
++        FreeDevice(pHcd->pPseudoDev);
++        pHcd->pPseudoDev = NULL;
++    }
++}
++
++/* set up the hcd */
++static SDIO_STATUS SetupHcd(PSDHCD pHcd)
++{
++    SDIO_STATUS status;
++
++    ZERO_POBJECT(&pHcd->SDIOIrqHelper);
++    ZERO_POBJECT(&pHcd->ConfigureOpsSem);
++    ZERO_POBJECT(&pHcd->HcdCritSection);
++    ZERO_POBJECT(&pHcd->RequestQueue);
++    ZERO_POBJECT(&pHcd->CompletedRequestQueue);
++    pHcd->pPseudoDev = NULL;
++    pHcd->Recursion = 0;
++
++    do {
++
++        pHcd->pPseudoDev = AllocateDevice(pHcd);
++
++        if (NULL == pHcd->pPseudoDev) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        ResetHcdState(pHcd);
++
++        status = SemaphoreInitialize(&pHcd->ConfigureOpsSem,1);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++        status = CriticalSectionInit(&pHcd->HcdCritSection);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++        status = InitializeRequestQueue(&pHcd->RequestQueue);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++        status = InitializeRequestQueue(&pHcd->CompletedRequestQueue);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* create SDIO Irq helper */
++        status = SDLIB_OSCreateHelper(&pHcd->SDIOIrqHelper,
++                                      SDIOIrqHelperFunction,
++                                     (PVOID)pHcd);
++    } while(FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++            /* undo what we did */
++        CleanupHcd(pHcd);
++    }
++    return status;
++}
++
++
++/*
++ * _SDIO_RegisterHostController - register a host controller bus driver
++ *
++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Register a host controller driver with the bus driver.
++
++  @function name: SDIO_RegisterHostController
++  @prototype: SDIO_STATUS SDIO_RegisterHostController (PSDHCD pHcd)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller definition structure.
++
++  @output: none
++
++  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++  @notes: Each host controller driver must register with the bus driver when loaded.
++          The driver registers an SDHCD structure initialized with hardware properties
++          and callback functions for bus requests and configuration.  On multi-slot
++          hardware ,each slot should be registered with a separate SDHCD structure.
++          The bus driver views each slot as a seperate host controller object.
++          The driver should be prepared to receive configuration requests before
++          this call returns. The host controller driver must unregister itself when
++          shutting down.
++
++  @example: Registering a host controller driver:
++    static SDHCD Hcd = {
++       .pName = "sdio_custom_hcd",
++       .Version = CT_SDIO_STACK_VERSION_CODE,  // set stack version code
++       .SlotNumber = 0,                        // bus driver internal use
++       .Attributes = SDHCD_ATTRIB_BUS_1BIT | SDHCD_ATTRIB_BUS_4BIT | SDHCD_ATTRIB_MULTI_BLK_IRQ
++                     SDHCD_ATTRIB_AUTO_CMD12 ,
++       .MaxBytesPerBlock = 2048     // each data block can be up to 2048 bytes
++       .MaxBlocksPerTrans = 1024,   // each data transaction can consist of 1024 blocks
++       .MaxSlotCurrent = 500,       // max FET switch current rating
++       .SlotVoltageCaps = SLOT_POWER_3_3V,      // only 3.3V operation
++       .SlotVoltagePreferred = SLOT_POWER_3_3V,
++       .MaxClockRate = 24000000,   // 24 Mhz max operation
++       .pContext = &HcdContext,    // set our driver context
++       .pRequest = HcdRequest,     // set SDIO bus request callback
++       .pConfigure = HcdConfig,    // set SDIO bus configuration callback
++    };
++    if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&Hcd)))) {
++         DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to register with host, status =%d\n",
++                                    status));
++    }
++
++  @see also: SDIO_UnregisterHostController
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_RegisterHostController(PSDHCD pHcd) {
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_RegisterHostController - %s\n",pHcd->pName));
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Host Controller Stack Version: %d.%d \n",
++        GET_SDIO_STACK_VERSION_MAJOR(pHcd),GET_SDIO_STACK_VERSION_MINOR(pHcd)));
++
++    if (!CHECK_HCD_DRIVER_VERSION(pHcd)) {
++        DBG_PRINT(SDDBG_ERROR,
++           ("SDIO Bus Driver: HCD Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++           GET_SDIO_STACK_VERSION_MAJOR(pHcd), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++        /* setup hcd */
++    status = SetupHcd(pHcd);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    do {
++        INT slotNumber;
++
++            /* protect the HCD list */
++        if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
++            break;  /* wait interrupted */
++        }
++            /* find a unique number for this HCD, must be done under semaphore protection */
++        slotNumber = FirstClearBit(&pBusContext->HcdInUseField);
++        if (slotNumber < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error, slotNumber exceeded\n"));
++            /* fake something */
++            slotNumber = 31;
++        }
++        SetBit(&pBusContext->HcdInUseField, slotNumber);
++        pHcd->SlotNumber = slotNumber;
++            /* add HCD to the end of the internal list */
++        SDListAdd(&pBusContext->HcdList , &pHcd->SDList);
++        if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++            break;   /* wait interrupted */
++        }
++        if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
++                /* post message to card detect helper to do polling */
++            PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
++        }
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++       CleanupHcd(pHcd);
++       DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterHostController, error 0x%X.\n", status));
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_RegisterHostController\n"));
++    return status;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Unregister a host controller driver with the bus driver.
++
++  @function name: SDIO_UnregisterHostController
++  @prototype: SDIO_STATUS SDIO_UnregisterHostController (PSDHCD pHcd)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller definition structure that was registered.
++
++  @output: none
++
++  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++  @notes: Each host controller driver must unregister with the bus driver when
++          unloading. The driver is responsible for halting any outstanding I/O
++          operations.  The bus driver will automatically unload function drivers
++          that may be attached assigned to cards inserted into slots.
++
++  @example: Unregistering a host controller driver:
++    if (!SDIO_SUCCESS((status = SDIO_UnregisterHostController(&Hcd)))) {
++         DBG_PRINT(SDDBG_ERROR, ("SDIO HCD - failed to unregister with host, status =%d\n",
++                                    status));
++    }
++
++  @see also: SDIO_RegisterHostController
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_UnregisterHostController(PSDHCD pHcd) {
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
++
++        /* remove functions associated with the HCD */
++    RemoveHcdFunctions(pHcd);
++        /* remove any devices associated with the HCD */
++    DeleteDevices(pHcd);
++    /* wait for the message queue to be empty, so we don't have any delayed requests going
++       to this device */
++    while(!SDLIB_IsQueueEmpty(pBusContext->pCardDetectMsgQueue)) {
++        /* wait for the messages to be handled */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_UnregisterHostController, waiting on messages\n"));
++        OSSleep(250);
++    }
++
++    /* protect the HCD list */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->HcdListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    ClearBit(&pBusContext->HcdInUseField, pHcd->SlotNumber);
++    /* delete HCD from list  */
++    SDListRemove(&pHcd->SDList);
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++        /* cleanup anything we allocated */
++    CleanupHcd(pHcd);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterHostController\n"));
++    return status;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_UnregisterHostController, error 0x%X.\n", status));
++    return status;
++}
++
++/* documentation headers only for Request and Configure */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: The bus driver calls the request callback to start an SDIO bus transaction.
++  @function name: Request
++  @prototype: SDIO_STATUS (*pRequest) (struct _SDHCD *pHcd)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller structure that was registered
++
++  @output: none
++
++  @return: SDIO_STATUS
++
++  @notes:
++          The bus driver maintains an internal queue of SDREQUEST structures submited by function
++          drivers. The driver should use request macros to obtain a pointer to the current SDREQUEST
++          at the head of the queue.  The driver can access the fields of the current request in order
++          to program hardware appropriately.   Once the request completes, the driver should update
++          the current request information (final status, response bytes and/or data) and call
++          SDIO_HandleHcdEvent() with the event type of EVENT_HCD_TRANSFER_DONE.
++          The bus driver will remove the current request from the head of the queue and start the next
++          request.
++
++  @example: Example of a typical Request callback:
++  SDIO_STATUS HcdRequest(PSDHCD pHcd)
++  {
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT32                temp = 0;
++    PSDREQUEST            pReq;
++       // get the current request
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++       // get controller settings based on response type
++    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++        case SDREQ_FLAGS_NO_RESP:
++            break;
++        case SDREQ_FLAGS_RESP_R1:
++        case SDREQ_FLAGS_RESP_MMC_R4:
++        case SDREQ_FLAGS_RESP_MMC_R5:
++        case SDREQ_FLAGS_RESP_R6:
++        case SDREQ_FLAGS_RESP_SDIO_R5:
++            temp |= CMDDAT_RES_R1_R4_R5;
++            break;
++        case SDREQ_FLAGS_RESP_R1B:
++            temp |= (CMDDAT_RES_R1_R4_R5 | CMDAT_RES_BUSY);
++            break;
++        case SDREQ_FLAGS_RESP_R2:
++            temp |= CMDDAT_RES_R2;
++            break;
++        case SDREQ_FLAGS_RESP_R3:
++        case SDREQ_FLAGS_RESP_SDIO_R4:
++            temp |= CMDDAT_RES_R3;
++            break;
++    }
++        // check for data
++    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS){
++        temp |= CMDDAT_DATA_EN;
++        // set data remaining count
++        pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++        DBG_PRINT(TRACE_DATA, ("SDIO %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                    IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                    pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                // write operation
++        }
++    }
++    // .... program hardware, interrupt handler will complete request
++    return SDIO_STATUS_PENDING;
++  }
++
++  @see also: SDIO_HandleHcdEvent
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: The bus driver calls the configure callback to set various options
++             and modes in the host controller hardware.
++
++  @function name: Configure
++  @prototype: SDIO_STATUS (*pConfigure) (struct _SDHCD *pHcd, PSDCONFIG pConfig)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller structure that was registered
++  @input:  pConfig - configuration request structure
++
++  @output: none
++
++  @return: SDIO_STATUS
++
++  @notes:
++          The host controller driver recieves configuration requests for options
++          such as slot voltage, bus width, clock rates and interrupt detection.
++          The bus driver guarantees that only one configuration option request
++          can be issued at a time.
++
++  @example: Example of a typical configure callback:
++  SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++  {
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT16      command;
++        // get command
++    command = GET_SDCONFIG_CMD(pConfig);
++        // decode command
++    switch (command){
++        case SDCONFIG_GET_WP:
++            if (GetGpioPinLevel(pHct,SDIO_CARD_WP_GPIO) == WP_POLARITY) {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++            } else {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++            }
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++            ClockStartStop(pHct,CLOCK_ON);
++                // sleep a little, should be at least 80 clocks at our lowest clock setting
++            status = OSSleep(100);
++            ClockStartStop(pHct,CLOCK_OFF);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                // request to enable IRQ detection
++            } else {
++                // request to disable IRQ detectioon
++            }
++            break;
++        case SDCONFIG_SDIO_REARM_INT:
++                // request to re-arm the card IRQ detection logic
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++                // request to set bus mode
++            {
++                // get bus mode data structure
++               PSDCONFIG_BUS_MODE_DATA pBusMode =
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig);
++                // set bus mode based on settings in bus mode structure
++                // bus mode   :  pBusMode->BusModeFlags
++                // clock rate :  pBusMode->ClockRate
++            }
++            break;
++        case SDCONFIG_POWER_CTRL:
++                // request to set power/voltage
++            {
++                PSDCONFIG_POWER_CTRL_DATA pPowerSetting =
++                       GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig);
++                if (pPowerSetting->SlotPowerEnable) {
++                    // turn on slot power
++                    //
++                } else {
++                    // turn off slot power
++                }
++                DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 PwrControl: En:%d, VCC:0x%X \n",
++                      pPowerSetting->SlotPowerEnable,
++                      pPowerSetting->SlotPowerVoltageMask));
++            }
++            break;
++        default:
++            // unsupported
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++    return status;
++ }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
++/*
++ * Allocate a Device instance
++ */
++PSDDEVICE AllocateDevice(PSDHCD pHcd)
++{
++    PSDDEVICE pDevice;
++
++    pDevice = KernelAlloc(sizeof(SDDEVICE));
++    if (pDevice != NULL) {
++        InitDeviceData(pHcd,pDevice);
++    }
++    return pDevice;
++}
++
++
++/*
++ * Free a Device instance
++ */
++void FreeDevice(PSDDEVICE pDevice)
++{
++    DeinitDeviceData(pDevice);
++    KernelFree(pDevice);
++}
++/*
++ * add this device to the list
++ */
++BOOL AddDeviceToList(PSDDEVICE pDevice)
++{
++    BOOL success = FALSE;
++
++    do {
++            /* protect the driver list */
++        if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->DeviceListSem))) {
++            break;   /* wait interrupted */
++        }
++
++            /* add new device to the internal list */
++        SDListAdd(&pBusContext->DeviceList , &pDevice->SDList);
++
++        if (!SDIO_SUCCESS(SemaphorePost(&pBusContext->DeviceListSem))) {
++            break;
++        }
++
++        success = TRUE;
++    } while (FALSE);
++
++    return success;
++}
++
++/*
++ *  Delete device associated with the HCD
++ *  if pHCD is NULL this function cleans up all devices, the caller
++ *  better have cleaned up functions first!
++ */
++SDIO_STATUS DeleteDevices(PSDHCD pHcd)
++{
++    SDIO_STATUS status;
++    PSDDEVICE   pDevice;
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeleteDevices hcd:0x%X \n", (INT)pHcd));
++      /* protect the device list */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pBusContext->DeviceList,pDevice,SDDEVICE,SDList) {
++            /* only remove devices for the hcd or if we are cleaning up all */
++        if ((NULL == pHcd) || (pDevice->pHcd == pHcd)) {
++            SDListRemove(&pDevice->SDList);
++            DeinitDeviceData(pDevice);
++            FreeDevice(pDevice);
++        }
++    }SDITERATE_END;
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeleteDevices \n"));
++    return status;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: DeleteDevice, error exit 0x%X\n", status));
++    return status;
++}
++
++
++static SDIO_STATUS AllocateBusResources(void)
++{
++    INT                 ii;
++    PSDREQUEST          pReq;
++    PSIGNAL_ITEM        pSignal;
++
++    DBG_PRINT(SDDBG_TRACE,
++    ("+SDIO Bus Driver: AllocateBusResources (R:%d,S:%d) (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
++       pBusContext->RequestListSize,
++       pBusContext->SignalSemListSize,
++       pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
++       pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++
++        /* allocate some initial requests */
++    for (ii = 0; ii < pBusContext->RequestListSize; ii++) {
++        pReq = AllocateRequest();
++        if (pReq == NULL) {
++            break;
++        }
++            /* free requests adds the request to the list */
++        FreeRequest(pReq);
++    }
++
++    for (ii = 0; ii < pBusContext->SignalSemListSize; ii++) {
++        pSignal = AllocateSignal();
++        if (pSignal == NULL) {
++            break;
++        }
++            /* freeing it adds it to the list */
++        FreeSignal(pSignal);
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: AllocateBusResources\n"));
++    return SDIO_STATUS_SUCCESS;
++}
++
++
++/* cleanup bus resources */
++static void CleanUpBusResources(void)
++{
++    PSDLIST      pItem;
++    PSDREQUEST   pReq;
++    PSIGNAL_ITEM pSignal;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: CleanUpBusResources (CR:%d,MR:%d)(CS:%d,MS:%d) \n",
++       pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations,
++       pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++
++    while(1) {
++        pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
++        if (NULL == pItem) {
++            break;
++        }
++            /* free the request */
++        pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++        if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
++            KernelFreeIrqSafe(pReq);
++        } else {
++            KernelFree(pReq);
++        }
++        pBusContext->CurrentRequestAllocations--;
++    }
++
++    if (pBusContext->CurrentRequestAllocations != 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request allocations are not ZERO! (CR:%d)\n",
++             pBusContext->CurrentRequestAllocations));
++    }
++
++    while(1) {
++        pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
++        if (NULL == pItem) {
++            break;
++        }
++        pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
++        DestroySignal(pSignal);
++        pBusContext->CurrentSignalAllocations--;
++    }
++
++    if (pBusContext->CurrentSignalAllocations != 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Signal allocations are not ZERO! (CR:%d)\n",
++             pBusContext->CurrentRequestAllocations));
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: CleanUpBusResources\n"));
++}
++
++
++/* free a request to the lookaside list */
++void FreeRequest(PSDREQUEST pReq)
++{
++    SDIO_STATUS status;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++        /* protect request list */
++    if (!SDIO_SUCCESS(status)) {
++        return;
++    }
++
++    if ((pBusContext->CurrentRequestAllocations <= pBusContext->MaxRequestAllocations) ||
++         !(pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK)) {
++            /* add it to the list */
++        SDListAdd(&pBusContext->RequestList, &pReq->SDList);
++            /* we will hold onto this one */
++        pReq = NULL;
++    } else {
++            /* decrement count */
++        pBusContext->CurrentRequestAllocations--;
++    }
++
++    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (pReq != NULL) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free Request allocation (CR:%d,MR:%d)\n",
++        pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
++        if (pReq->InternalFlags & SDBD_ALLOC_IRQ_SAFE_MASK) {
++            KernelFreeIrqSafe(pReq);
++        } else {
++                /* we should never free the ones that were normally allocated */
++            DBG_ASSERT(FALSE);
++        }
++    }
++}
++
++/* allocate a request from the lookaside list */
++PSDREQUEST AllocateRequest(void)
++{
++    PSDLIST  pItem;
++    SDIO_STATUS status;
++    PSDREQUEST pReq = NULL;
++    ATOMIC_FLAGS internalflags;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++
++    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (!SDIO_SUCCESS(status)) {
++        return NULL;
++    }
++
++    if (pBusContext->InitMask & RESOURCE_INIT) {
++            /* check the list, we are now running... */
++        pItem = SDListRemoveItemFromHead(&pBusContext->RequestList);
++    } else {
++            /* we are loading the list with requests at initialization */
++        pItem = NULL;
++    }
++    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (pItem != NULL) {
++        pReq = CONTAINING_STRUCT(pItem, SDREQUEST, SDList);
++    } else {
++        if (pBusContext->InitMask & RESOURCE_INIT) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Request List empty..allocating new one (irq-safe) (CR:%d,MR:%d)\n",
++            pBusContext->CurrentRequestAllocations,pBusContext->MaxRequestAllocations));
++                /* the resource list was already allocated, we must be running now.
++                 * at run-time, we allocate using the safe IRQ */
++            pReq = (PSDREQUEST)KernelAllocIrqSafe(sizeof(SDREQUEST));
++                /* mark that this one was created using IRQ safe allocation */
++            internalflags = SDBD_ALLOC_IRQ_SAFE_MASK;
++        } else {
++                /* use the normal allocation since we are called at initialization */
++            pReq = (PSDREQUEST)KernelAlloc(sizeof(SDREQUEST));
++            internalflags = 0;
++        }
++
++        if (pReq != NULL) {
++            pReq->InternalFlags = internalflags;
++                /* keep track of allocations */
++            status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++            pBusContext->CurrentRequestAllocations++;
++            status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++        }
++    }
++
++
++    if (pReq != NULL) {
++            /* preserve internal flags */
++        internalflags = pReq->InternalFlags;
++        ZERO_POBJECT(pReq);
++        pReq->InternalFlags = internalflags;
++    }
++
++    return pReq;
++}
++
++void DestroySignal(PSIGNAL_ITEM pSignal)
++{
++   SignalDelete(&pSignal->Signal);
++   KernelFree(pSignal);
++}
++
++PSIGNAL_ITEM BuildSignal(void)
++{
++    PSIGNAL_ITEM pSignal;
++
++    pSignal = (PSIGNAL_ITEM)KernelAlloc(sizeof(SIGNAL_ITEM));
++    if (pSignal != NULL) {
++            /* initialize signal */
++        if (!SDIO_SUCCESS(SignalInitialize(&pSignal->Signal))) {
++            KernelFree(pSignal);
++            pSignal = NULL;
++        }
++    }
++    return pSignal;
++}
++/* free a signal*/
++void FreeSignal(PSIGNAL_ITEM pSignal)
++{
++    SDIO_STATUS status;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (!SDIO_SUCCESS(status)) {
++        return;
++    }
++
++    if (pBusContext->CurrentSignalAllocations <= pBusContext->MaxSignalAllocations) {
++            /* add it to the list */
++        SDListAdd(&pBusContext->SignalList, &pSignal->SDList);
++            /* flag that we are holding onto it */
++        pSignal = NULL;
++    } else {
++            /* decrement count */
++        pBusContext->CurrentSignalAllocations--;
++    }
++
++    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (pSignal != NULL) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Free signal allocation (CS:%d,MS:%d)\n",
++        pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++        DestroySignal(pSignal);
++    }
++}
++
++/* allocate a signal from the list */
++PSIGNAL_ITEM AllocateSignal(void)
++{
++    PSDLIST         pItem;
++    PSIGNAL_ITEM    pSignal;
++    SDIO_STATUS status;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++
++    if (!SDIO_SUCCESS(status)) {
++        return NULL;
++    }
++
++    if (pBusContext->InitMask & RESOURCE_INIT) {
++            /* check the list */
++        pItem = SDListRemoveItemFromHead(&pBusContext->SignalList);
++    } else {
++            /* we are loading the list */
++        pItem = NULL;
++    }
++
++    status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++    if (pItem != NULL) {
++            /* return the one from the list */
++        pSignal = CONTAINING_STRUCT(pItem, SIGNAL_ITEM, SDList);
++    } else {
++        if (pBusContext->InitMask & RESOURCE_INIT) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Signal List empty..allocating new one (CS:%d,MS:%d)\n",
++            pBusContext->CurrentSignalAllocations,pBusContext->MaxSignalAllocations));
++        }
++            /* just allocate one */
++        pSignal = BuildSignal();
++        status = CriticalSectionAcquireSyncIrq(&pBusContext->RequestListCritSection);
++        if (pSignal != NULL) {
++            pBusContext->CurrentSignalAllocations++;
++        }
++        status = CriticalSectionReleaseSyncIrq(&pBusContext->RequestListCritSection);
++    }
++
++
++    return pSignal;
++}
++
++/*
++ * Issus Bus Request (exposed to function drivers)
++*/
++PSDREQUEST IssueAllocRequest(PSDDEVICE pDev)
++{
++    return AllocateRequest();
++}
++
++/*
++ * Free Request (exposed to function drivers)
++*/
++void IssueFreeRequest(PSDDEVICE pDev, PSDREQUEST pReq)
++{
++    FreeRequest(pReq);
++}
++
++/*
++ * Issus Bus Request (exposed to function drivers)
++*/
++SDIO_STATUS IssueBusRequest(PSDDEVICE pDev, PSDREQUEST pReq)
++{
++    pReq->pFunction = pDev->pFunction;
++    return IssueRequestToHCD(pDev->pHcd,pReq);
++}
++
++
++    /* completion routine for HCD configs, this is synchronized with normal bus requests */
++static void HcdConfigComplete(PSDREQUEST pReq)
++{
++
++    pReq->Status = CALL_HCD_CONFIG((PSDHCD)pReq->pDataBuffer, (PSDCONFIG)pReq->pCompleteContext);
++
++    SignalSet(&((PSIGNAL_ITEM)pReq->pHcdContext)->Signal);
++}
++
++SDIO_STATUS SendSyncedHcdBusConfig(PSDDEVICE pDevice, PSDCONFIG pConfig)
++{
++    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
++    PSDREQUEST      pReq = NULL;
++    PSIGNAL_ITEM    pSignal = NULL;
++
++    do {
++
++        pSignal = AllocateSignal();
++        if (NULL == pSignal) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        pReq = AllocateRequest();
++        if (NULL == pReq) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++            /* issue pseudo request to sync this with bus requests */
++        pReq->pCompletion = HcdConfigComplete;
++        pReq->pCompleteContext = pConfig;
++            /* re-use hcd context to store the signal since this request
++             * never actually goes to an HCD */
++        pReq->pHcdContext = pSignal;
++        pReq->pDataBuffer = pDevice->pHcd;
++            /* flag this as barrier in case it may change the bus mode of the HCD */
++        pReq->Flags = SDREQ_FLAGS_PSEUDO | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++        pReq->Status = SDIO_STATUS_SUCCESS;
++
++            /* issue request */
++        status = IssueRequestToHCD(pDevice->pHcd,pReq);
++
++    } while (FALSE);
++
++    if (SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Config Request Sync-Op waiting....\n"));
++        status = SignalWait(&pSignal->Signal);
++
++        if (SDIO_SUCCESS(status)) {
++                /* return the result of the configuration request */
++            status = pReq->Status;
++        }
++    }
++
++        /* cleanup */
++    if (pReq != NULL) {
++        FreeRequest(pReq);
++    }
++
++    if (pSignal != NULL) {
++        FreeSignal(pSignal);
++    }
++
++    return status;
++}
++
++/*
++ * Issus bus Configuration  (exposed to function drivers)
++*/
++SDIO_STATUS IssueBusConfig(PSDDEVICE pDev, PSDCONFIG pConfig)
++{
++    SDIO_STATUS status;
++    INT         cmdLength;
++
++    cmdLength = GET_SDCONFIG_CMD_LEN(pConfig);
++    status = SDIO_STATUS_INVALID_PARAMETER;
++
++    do {
++            /* check buffers and length */
++        if (IS_SDCONFIG_CMD_GET(pConfig) || IS_SDCONFIG_CMD_PUT(pConfig)) {
++            if ((GET_SDCONFIG_CMD_DATA(PVOID,pConfig) == NULL) || (0 == cmdLength)) {
++                break;
++            }
++        }
++
++        switch (GET_SDCONFIG_CMD(pConfig)) {
++            case SDCONFIG_FUNC_ACK_IRQ:
++                status = SDFunctionAckInterrupt(pDev);
++                break;
++            case SDCONFIG_FUNC_ENABLE_DISABLE:
++                if (cmdLength < sizeof(SDCONFIG_FUNC_ENABLE_DISABLE_DATA)) {
++                    break;
++                }
++                status = SDEnableFunction(pDev,
++                           GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_ENABLE_DISABLE_DATA,pConfig));
++                break;
++            case SDCONFIG_FUNC_UNMASK_IRQ:
++                status = SDMaskUnmaskFunctionIRQ(pDev,FALSE);
++                break;
++            case SDCONFIG_FUNC_MASK_IRQ:
++                status = SDMaskUnmaskFunctionIRQ(pDev,TRUE);
++                break;
++            case SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC:
++                status = SDSPIModeEnableDisableCRC(pDev,FALSE);
++                break;
++            case SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC:
++                status = SDSPIModeEnableDisableCRC(pDev,TRUE);
++                break;
++            case SDCONFIG_FUNC_ALLOC_SLOT_CURRENT:
++                status = SDAllocFreeSlotCurrent(pDev,
++                                                TRUE,
++                                   GET_SDCONFIG_CMD_DATA(PSDCONFIG_FUNC_SLOT_CURRENT_DATA,pConfig));
++                break;
++            case SDCONFIG_FUNC_FREE_SLOT_CURRENT:
++                status = SDAllocFreeSlotCurrent(pDev, FALSE, NULL);
++                break;
++            case SDCONFIG_FUNC_CHANGE_BUS_MODE:
++
++                status = SetOperationalBusMode(pDev,
++                                               GET_SDCONFIG_CMD_DATA(PSDCONFIG_BUS_MODE_DATA,
++                                               pConfig));
++                break;
++            case SDCONFIG_FUNC_NO_IRQ_PEND_CHECK:
++                status = TryNoIrqPendingCheck(pDev);
++                break;
++            default:
++
++                if (GET_SDCONFIG_CMD(pConfig) & SDCONFIG_FLAGS_HC_CONFIG) {
++                        /* synchronize config requests with busrequests */
++                    status = SendSyncedHcdBusConfig(pDev,pConfig);
++                } else {
++                    DBG_PRINT(SDDBG_ERROR,
++                        ("SDIO Bus Driver: IssueBusConfig - unknown command:0x%X \n",
++                        GET_SDCONFIG_CMD(pConfig)));
++                    status = SDIO_STATUS_INVALID_PARAMETER;
++                }
++                break;
++        }
++    } while(FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++         DBG_PRINT(SDDBG_ERROR,
++                ("SDIO Bus Driver: IssueBusConfig - Error in command:0x%X, Buffer:0x%X, Length:%d Err:%d\n",
++                GET_SDCONFIG_CMD(pConfig),
++                GET_SDCONFIG_CMD_DATA(INT,pConfig),
++                cmdLength, status));
++    }
++    return status;
++}
++
++/* start a request */
++static INLINE SDIO_STATUS StartHcdRequest(PSDHCD pHcd, PSDREQUEST pReq)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    if ((pReq->pFunction != NULL) && (pReq->pFunction->Flags & SDFUNCTION_FLAG_REMOVING)) {
++        /* this device or function is going away, fail any new requests */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: StartHcdRequest, fail request 0x%X, device is removing\n", (UINT)pReq));
++        pReq->Status = SDIO_STATUS_CANCELED;
++        return SDIO_STATUS_SDREQ_QUEUE_FAILED;
++    }
++
++    status = _AcquireHcdLock(pHcd);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to acquire HCD request lock: Err:%d\n", status));
++        pReq->Status = SDIO_STATUS_SDREQ_QUEUE_FAILED;
++        return SDIO_STATUS_SDREQ_QUEUE_FAILED;
++    }
++
++    if (pReq->Flags & SDREQ_FLAGS_QUEUE_HEAD) {
++            /* caller wants this request queued to the head */
++
++            /* a completion routine for a barrier request is called
++             * while the queue is busy.  A barrier request can
++             * insert a new request at the head of the queue */
++        DBG_ASSERT(IsQueueBusy(&pHcd->RequestQueue));
++        QueueRequestToFront(&pHcd->RequestQueue,pReq);
++    } else {
++            /* insert in queue at tail */
++        QueueRequest(&pHcd->RequestQueue,pReq);
++
++            /* is queue busy ? */
++        if (IsQueueBusy(&pHcd->RequestQueue)) {
++                /* release lock */
++            status = _ReleaseHcdLock(pHcd);
++                /* controller is busy already, no need to call the hcd */
++            return SDIO_STATUS_PENDING;
++        }
++            /* mark it as busy */
++        MarkQueueBusy(&pHcd->RequestQueue);
++    }
++
++        /* remove item from head and set current request */
++    SET_CURRENT_REQUEST(pHcd, DequeueRequest(&pHcd->RequestQueue));
++    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++        CHECK_HCD_RECURSE(pHcd, pHcd->pCurrentRequest);
++    }
++        /* release lock */
++    status = _ReleaseHcdLock(pHcd);
++        /* controller was not busy, call into HCD to process current request */
++    status = CallHcdRequest(pHcd);
++    return status;
++}
++
++
++/* used by CMD12,CMD13 to save the original completion routine */
++#define GET_BD_RSV_REQUEST_COMPLETION(pR)   (PSDEQUEST_COMPLETION)(pR)->pBdRsv1
++#define SET_BD_RSV_REQUEST_COMPLETION(pR,c) (pR)->pBdRsv1 = (PVOID)(c)
++
++/* used by CMD12 processing to save/restore the original data transfer status */
++#define GET_BD_RSV_ORIG_STATUS(pR)          (SDIO_STATUS)(pR)->pBdRsv2
++#define SET_BD_RSV_ORIG_STATUS(pR,s)        (pR)->pBdRsv2 = (PVOID)(s)
++
++/* used by CMD13 processing to get/set polling count */
++#define GET_BD_RSV_STATUS_POLL_COUNT(pR)     (INT)(pR)->pBdRsv2
++#define SET_BD_RSV_STATUS_POLL_COUNT(pR,s)   (pR)->pBdRsv2 = (PVOID)(s)
++
++/* used by CMD55 processing to save the second part of the request */
++#define GET_BD_RSV_ORIG_REQ(pR)             (PSDREQUEST)(pR)->pBdRsv1
++#define SET_BD_RSV_ORIG_REQ(pR,r)           (pR)->pBdRsv1 = (PVOID)(r)
++
++/* used by all to save HCD */
++#define GET_BD_RSV_HCD(pR)                  (PSDHCD)(pR)->pBdRsv3
++#define SET_BD_RSV_HCD(pR,h)                (pR)->pBdRsv3 = (PVOID)(h)
++#ifndef CT_CONFIG_NO_SDMMC
++static void CMD13CompletionBarrier(PSDREQUEST pReq);
++
++static INLINE void SetupCMD13(PSDHCD pHcd, PSDREQUEST pReq)
++{
++    pReq->Command = CMD13;
++        /* sequence must be atomic, queue it to the head and flag as a barrier */
++    pReq->Flags = SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++    if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++        pReq->Argument = 0;
++        pReq->Flags |= SDREQ_FLAGS_RESP_R2;
++    } else {
++        pReq->Flags |= SDREQ_FLAGS_RESP_R1;
++        pReq->Argument = (UINT32)pHcd->CardProperties.RCA << 16;
++    }
++        /* insert completion */
++    pReq->pCompletion = CMD13CompletionBarrier;
++}
++
++/* CMD13 (GET STATUS) completion */
++static void CMD13CompletionBarrier(PSDREQUEST pReq)
++{
++    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++    PSDHCD               pHcd = GET_BD_RSV_HCD(pReq);
++    INT                  pollingCount = GET_BD_RSV_STATUS_POLL_COUNT(pReq);
++    BOOL                 doCompletion = TRUE;
++    UINT32               cardStatus;
++
++    DBG_ASSERT(pOrigCompletion != NULL);
++    DBG_ASSERT(pHcd != NULL);
++    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD13CompletionBarrier (cnt:%d) \n",pollingCount));
++
++    do {
++        if (!SDIO_SUCCESS(pReq->Status)) {
++            break;
++        }
++
++        cardStatus = SD_R1_GET_CARD_STATUS(pReq->Response);
++
++        if (cardStatus & SD_CS_TRANSFER_ERRORS) {
++            DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card transfer errors : 0x%X \n",cardStatus));
++            pReq->Status = SDIO_STATUS_PROGRAM_STATUS_ERROR;
++            break;
++        }
++
++        if (SD_CS_GET_STATE(cardStatus) != SD_CS_STATE_PRG) {
++            DBG_PRINT(SDIODBG_REQUESTS,("SDIO Bus Driver: Card programming done \n"));
++            break;
++        }
++
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Card still programming.. \n"));
++        pollingCount--;
++
++        if (pollingCount < 0) {
++            pReq->Status = SDIO_STATUS_PROGRAM_TIMEOUT;
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: card programming timeout!\n"));
++            break;
++        }
++
++        doCompletion = FALSE;
++            /* keep trying */
++        SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
++        SetupCMD13(pHcd,pReq);
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: re-issuing CMD13 \n"));
++            /* re-issue */
++        IssueRequestToHCD(pHcd, pReq);
++
++    } while (FALSE);
++
++
++    if (doCompletion) {
++            /* restore original completion routine */
++        pReq->pCompletion = pOrigCompletion;
++            /* call original completion routine */
++        pOrigCompletion(pReq);
++    }
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD13CompletionBarrier \n"));
++}
++
++/* command 13 (GET STATUS) preparation */
++static void PrepCMD13Barrier(PSDREQUEST pReq)
++{
++    SDIO_STATUS status = pReq->Status;
++    PSDHCD      pHcd = GET_BD_RSV_HCD(pReq);
++    INT         pollingCount;
++    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++    DBG_ASSERT(pHcd != NULL);
++    DBG_ASSERT(pOrigCompletion != NULL);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD13Barrier \n"));
++
++    if (SDIO_SUCCESS(status)) {
++            /* re-use the request for CMD13 */
++        SetupCMD13(pHcd,pReq);
++            /* set polling count to a multiple of the Block count, if the BlockCount was
++             * zeroed by the HCD, then set it to 1X multiplier */
++        pollingCount = max(pBusContext->CMD13PollingMultiplier,
++                           pBusContext->CMD13PollingMultiplier * (INT)pReq->BlockCount);
++            /* initialize count */
++        SET_BD_RSV_STATUS_POLL_COUNT(pReq, pollingCount);
++            /* re-issue it, we can call IssueRequest here since we are re-using the request */
++        IssueRequestToHCD(pHcd, pReq);
++    } else {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD13 bypassed.\n",status));
++            /* call the original completion routine */
++        pOrigCompletion(pReq);
++    }
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD13Barrier (%d) \n",status));
++}
++
++/* CMD12 completion */
++static void CMD12Completion(PSDREQUEST pReq)
++{
++    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++    DBG_ASSERT(pOrigCompletion != NULL);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD12Completion \n"));
++
++        /* restore original completion routine */
++    pReq->pCompletion = pOrigCompletion;
++
++    if (SDIO_SUCCESS(pReq->Status)) {
++            /* if CMD12 succeeds, we want to return the result of the original
++             * request */
++        pReq->Status = GET_BD_RSV_ORIG_STATUS(pReq);
++        DBG_PRINT(SDIODBG_REQUESTS,
++                ("SDIO Bus Driver: PrepCMD12Completion original status %d \n",pReq->Status));
++    }
++        /* call original completion routine */
++    pOrigCompletion(pReq);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD12Completion \n"));
++}
++
++/* CMD12 preparation */
++static void PrepCMD12Barrier(PSDREQUEST pReq)
++{
++
++    SDIO_STATUS status = pReq->Status;
++    PSDHCD               pHcd = GET_BD_RSV_HCD(pReq);
++    PSDEQUEST_COMPLETION pOrigCompletion = GET_BD_RSV_REQUEST_COMPLETION(pReq);
++
++    DBG_ASSERT(pHcd != NULL);
++    DBG_ASSERT(pOrigCompletion != NULL);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: PrepCMD12Barrier \n"));
++
++    if (SDIO_SUCCESS(status) ||    /* only issue CMD12 on success or specific bus errors */
++        (SDIO_STATUS_BUS_READ_TIMEOUT == status) ||
++        (SDIO_STATUS_BUS_READ_CRC_ERR == status) ||
++        (SDIO_STATUS_BUS_WRITE_ERROR == status)) {
++        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++            if (!ForceAllRequestsAsync()) {
++                /* clear the call bit as an optimization, note clearing it wholesale here will
++                 * allow request processing to recurse one more level */
++                AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++            }
++        }
++            /* re-use the request for CMD12 */
++        pReq->Command = CMD12;
++        pReq->Argument = 0;
++
++            /* if the data transfer was successful, check for transfer check */
++        if (SDIO_SUCCESS(status) &&
++            (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS)) {
++                /* original data request requires a transfer status check, which is another
++                 * barrier request */
++            pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_BARRIER |
++                          SDREQ_FLAGS_TRANS_ASYNC;
++            DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier , chaining CMD13 \n"));
++                /* switch out completion to send the CMD13 next */
++            pReq->pCompletion = PrepCMD13Barrier;
++        } else {
++            pReq->Flags = SDREQ_FLAGS_RESP_R1B | SDREQ_FLAGS_QUEUE_HEAD | SDREQ_FLAGS_TRANS_ASYNC;
++            pReq->pCompletion = CMD12Completion;
++        }
++
++            /* save the original data transfer request status */
++        SET_BD_RSV_ORIG_STATUS(pReq,status);
++            /* re-issue it, we can call IssueRequest here since we are re-using the request */
++        IssueRequestToHCD(pHcd, pReq);
++    } else {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request Failure (%d) , CMD12 bypassed.\n",status));
++            /* call the original completion routine */
++        pOrigCompletion(pReq);
++    }
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: PrepCMD12Barrier (%d) \n",status));
++}
++
++
++/* CMD55 barrier - this is a special barrier completion routine, we have to submit the second
++ * part of the command command sequence atomically */
++static void CMD55CompletionBarrier(PSDREQUEST pReq)
++{
++    SDIO_STATUS status = pReq->Status;
++    PSDREQUEST  pOrigReq = GET_BD_RSV_ORIG_REQ(pReq);
++    PSDHCD      pHcd = GET_BD_RSV_HCD(pReq);
++    BOOL        doCompletion = FALSE;
++
++    DBG_ASSERT(pOrigReq != NULL);
++    DBG_ASSERT(pHcd != NULL);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("+SDIO Bus Driver: CMD55Completion \n"));
++
++    do {
++
++        if (!SDIO_SUCCESS(status)) {
++                /* command 55 failed */
++            pOrigReq->Status = status;
++            doCompletion = TRUE;
++            break;
++        }
++
++        if (!(SD_R1_GET_CARD_STATUS(pReq->Response) & SD_CS_APP_CMD)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card is not accepting CMD55, status:0x%X \n",
++                    SD_R1_GET_CARD_STATUS(pReq->Response)));
++            pOrigReq->Status = SDIO_STATUS_INVALID_COMMAND;
++            doCompletion = TRUE;
++            break;
++        }
++
++        if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++            if (!ForceAllRequestsAsync()) {
++                AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++            }
++        }
++
++            /* flag the original request to queue to the head */
++        pOrigReq->Flags |= SDREQ_FLAGS_QUEUE_HEAD;
++            /* submit original request, we cannot call IssueRequestHCD() here because the
++             * original request has already gone through IssueRequestHCD() already */
++        status = StartHcdRequest(pHcd, pOrigReq);
++
++        if (SDIO_STATUS_PENDING == status) {
++            break;
++        }
++
++        pOrigReq->Status = status;
++
++        if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
++                /* never made it to the queue */
++            doCompletion = TRUE;
++            break;
++        }
++
++            /* request completed in-line */
++        _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++
++    } while (FALSE);
++
++    if (doCompletion) {
++        DoRequestCompletion(pOrigReq, pHcd);
++    }
++
++        /* free the CMD55 request */
++    FreeRequest(pReq);
++
++    DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: CMD55Completion \n"));
++}
++
++#endif
++
++/* synch completion routine */
++static void SynchCompletion(PSDREQUEST pRequest)
++{
++    PSIGNAL_ITEM pSignal;
++
++    pSignal = (PSIGNAL_ITEM)pRequest->pCompleteContext;
++    DBG_ASSERT(pSignal != NULL);
++    if (!SDIO_SUCCESS(SignalSet(&pSignal->Signal))) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SynchCompletion - signal failed \n"));
++    }
++
++}
++
++/*
++ * Issue a request to the host controller
++ *
++ *
++ * The following flags are handled internally by the bus driver to guarantee atomicity.
++ *
++ *    SDREQ_FLAGS_APP_CMD - SD Extended commands requiring CMD55 to precede the actual command
++ *    SDREQ_FLAGS_AUTO_CMD12 - Memory Card Data transfer needs CMD12 to stop transfer
++ *                             (multi-block reads/writes)
++ *    SDREQ_FLAGS_AUTO_TRANSFER_STATUS - Memory card data transfer needs transfer status polling
++ *                                       using CMD13
++ *
++ *    These request flags require additional commands prepended or appended to the original command
++ *
++ *    The order of command execution :
++ *
++ *    Order  Condition                 Command Issued
++ *    -------------------------------------------------------------
++ *      1.   If APP_CMD                CMD55 issued.
++ *      2.   Always                    Caller command issued.
++ *      3.   If AUTO_CMD12             CMD12 issued.
++ *      4.   If AUTO_TRANSFER_STATUS   CMD13 issued until card programming is complete
++*/
++SDIO_STATUS IssueRequestToHCD(PSDHCD pHcd, PSDREQUEST pReq)
++{
++    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
++    PSIGNAL_ITEM    pSignal = NULL;
++    BOOL            handleFailedReqSubmit = FALSE;
++
++    CLEAR_INTERNAL_REQ_FLAGS(pReq);
++
++    do {
++            /* mark request in-use */
++        ATOMIC_FLAGS internal = AtomicTest_Set(&pReq->InternalFlags, SDBD_PENDING);
++        if (internal & (1<<SDBD_PENDING)) {
++            DBG_ASSERT_WITH_MSG(FALSE,
++                            "SDIO Bus Driver: IssueRequestToHCD - request already in use \n");
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Request already in use: 0x%X",(INT)pReq));
++        }
++
++        if (!(pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC)) {
++                /* caller wants synchronous operation, insert our completion routine */
++            pReq->pCompletion = SynchCompletion;
++            pSignal = AllocateSignal();
++            if (NULL == pSignal) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                pReq->Status = SDIO_STATUS_NO_RESOURCES;
++                handleFailedReqSubmit = TRUE;
++                    /* no need to continue */
++                break;
++            }
++            pReq->pCompleteContext = (PVOID)pSignal;
++        }
++
++
++ #ifndef CT_CONFIG_NO_SDMMC
++
++
++        if ((pReq->Flags & SDREQ_FLAGS_AUTO_CMD12) &&
++            !(pHcd->Attributes & SDHCD_ATTRIB_AUTO_CMD12) &&
++            !(IS_HCD_BUS_MODE_SPI(pHcd) && IS_SDREQ_WRITE_DATA(pReq->Flags))) {
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Auto CMD12 on Request:0x%08X \n",(INT)pReq));
++                /* caller wants CMD12 auto-issued and the HCD does not support it */
++                /* setup caller's request as a barrier and replace their completion routine */
++            pReq->Flags |= SDREQ_FLAGS_BARRIER;
++                /* take off the flag, since the BD will be issuing it */
++            pReq->Flags &= ~SDREQ_FLAGS_AUTO_CMD12;
++                /* save original completion */
++            SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
++                /* save the HCD we are on */
++            SET_BD_RSV_HCD(pReq,pHcd);
++                /* use completion for preping CMD12 */
++            pReq->pCompletion = PrepCMD12Barrier;
++        }
++
++        if (pReq->Flags & SDREQ_FLAGS_AUTO_TRANSFER_STATUS) {
++            /* caller wants transfer status checked. If a CMD12
++             * barrier request has been setup we let the CMD12 completion take care
++             * of setting up the transfer check */
++            if (pReq->pCompletion != PrepCMD12Barrier) {
++                    /* make CMD13 prep a barrier */
++                pReq->Flags |= SDREQ_FLAGS_BARRIER;
++                    /* save original completion */
++                SET_BD_RSV_REQUEST_COMPLETION(pReq,pReq->pCompletion);
++                    /* save the HCD we are on */
++                SET_BD_RSV_HCD(pReq,pHcd);
++                    /* use completion for preping CMD13 */
++                pReq->pCompletion = PrepCMD13Barrier;
++            }
++        }
++
++            /* check app command, the two command sequence must be handled atomically */
++        if (pReq->Flags & SDREQ_FLAGS_APP_CMD) {
++            PSDREQUEST      pCmd55;
++                /* allocate request to handle initial CMD55 command */
++            pCmd55 = AllocateRequest();
++            if (NULL == pCmd55) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                pReq->Status = SDIO_STATUS_NO_RESOURCES;
++                    /* complete the caller's request with error */
++                handleFailedReqSubmit = TRUE;
++                    /* no need to continue */
++                break;
++            }
++                /* first submit CMD55 */
++                /* set RCA */
++            pCmd55->Argument = pHcd->CardProperties.RCA << 16;
++                /* mark as a barrier request */
++            pCmd55->Flags = SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_BARRIER | SDREQ_FLAGS_TRANS_ASYNC;
++            pCmd55->Command = CMD55;
++                /* call our barrier completion routine when done */
++            pCmd55->pCompletion = CMD55CompletionBarrier;
++                /* save request and target HCD */
++            SET_BD_RSV_ORIG_REQ(pCmd55,pReq);
++            SET_BD_RSV_HCD(pCmd55,pHcd);
++                /* recursively start the CMD55 request, since the CMD55 is a barrier
++                 * request, it's completion routine will submit the actual request
++                 * atomically */
++            status = IssueRequestToHCD(pHcd, pCmd55);
++
++        } else
++
++#endif // CT_CONFIG_NO_SDMMC
++
++
++        {
++                /* start the normal request */
++            status = StartHcdRequest(pHcd,pReq);
++        }
++
++
++        if (SDIO_STATUS_SDREQ_QUEUE_FAILED == status) {
++            handleFailedReqSubmit = TRUE;
++                /* no need to continue, clean up at the end */
++            break;
++        }
++
++            /* at this point, the request was either queued or was processed by the
++             * HCD */
++
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: HCD returned status:%d on request: 0x%X, (CMD:%d) \n",
++                  status, (INT)pReq, pReq->Command));
++
++        if (status != SDIO_STATUS_PENDING) {
++            /* the HCD completed the request within the HCD request callback,
++             * check and see if this is a synchronous request */
++            if (pSignal != NULL) {
++                    /* it was synchronous */
++                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal wait bypassed \n"));
++                    /* NULL out completion info, there's no need to
++                     * signal the semaphore */
++                pReq->pCompletion = NULL;
++
++            } else {
++                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation completed in-line \n"));
++                    /* this was an async call, always return pending */
++                status = SDIO_STATUS_PENDING;
++            }
++                /* process this completed transfer on behalf of the HCD */
++            _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++
++                /* done processing */
++            break;
++        }
++                /* I/O is now pending, could be sync or async */
++                /* check for synch op */
++        if (pSignal != NULL) {
++                /* wait for completion */
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op signal waiting....\n"));
++                /* this is not interruptable, as the HCD must complete it. */
++            status = SignalWait(&pSignal->Signal);
++                /* don't need the signal anymore */
++            FreeSignal(pSignal);
++            pSignal = NULL;
++
++            /* note: it is safe to touch pReq since we own
++             * the completion routine for synch transfers */
++
++                /* check signal wait status */
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_TRACE,
++                ("SDIO Bus Driver - IssueRequestToHCD: Synch transfer - signal wait failed, cancelling req 0X%X\n",
++                (UINT)pReq));
++                pReq->Status = SDIO_STATUS_CANCELED;
++                status = SDIO_STATUS_CANCELED;
++                break;
++            }
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Sync-Op woke up\n"));
++                /* return the completion status of the request */
++            status = pReq->Status;
++        } else {
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Async operation Pending \n"));
++        }
++
++    } while (FALSE);
++
++        /* see if we need to clean up failed submissions */
++    if (handleFailedReqSubmit) {
++            /* make sure this is cleared */
++        AtomicTest_Clear(&pReq->InternalFlags, SDBD_PENDING);
++            /* the  request processing failed before it was submitted to the HCD */
++            /* note: since it never made it to the queue we can touch pReq */
++        if (pReq->Flags & SDREQ_FLAGS_TRANS_ASYNC) {
++            /* for ASYNC requests, we need to call the completion routine */
++            DoRequestCompletion(pReq, pHcd);
++                /* return pending for all ASYNC requests */
++            status = SDIO_STATUS_PENDING;
++        }
++    }
++
++        /* check if we need to clean up the signal */
++    if (pSignal != NULL) {
++            /* make sure this is freed */
++        FreeSignal(pSignal);
++    }
++        /* return status */
++    return status;
++}
++
++/* documentation for configuration requests */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Enable or Disable the SDIO Function
++
++  @function name: SDCONFIG_FUNC_ENABLE_DISABLE
++  @prototype: SDCONFIG_FUNC_ENABLE_DISABLE
++  @category: PD_Reference
++
++  @input:  SDCONFIG_FUNC_ENABLE_DISABLE_DATA - Enable Data structure
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          uses the SDCONFIG_FUNC_ENABLE_DISABLE_DATA structure.  The caller must set the
++          EnableFlags and specify the TimeOut value in milliseconds.   The TimeOut
++          value is used for polling the I/O ready bit.  This command returns a status
++          of SDIO_STATUS_FUNC_ENABLE_TIMEOUT if the ready bit was not set/cleared
++          by the card within the timeout period.
++
++  @example: Example of enabling an I/O function:
++        fData.EnableFlags = SDCONFIG_ENABLE_FUNC;
++        fData.TimeOut = 500;
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_ENABLE_DISABLE,
++                                   &fData,
++                                   sizeof(fData));
++
++  @see also: SDLIB_IssueConfig
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Unmask the function's IRQ
++
++  @function name: SDCONFIG_FUNC_UNMASK_IRQ
++  @prototype: SDCONFIG_FUNC_UNMASK_IRQ
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          unmasks the IRQ for the I/O function. This request sets the function's
++          interrupt enable bit in the INTENABLE register in the
++          common register space.
++
++  @example: Example of unmasking interrupt :
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_UNMASK_IRQ,
++                                   NULL,
++                                   0);
++
++  @see also: SDCONFIG_FUNC_MASK_IRQ
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Mask the function's IRQ
++
++  @function name: SDCONFIG_FUNC_MASK_IRQ
++  @prototype: SDCONFIG_FUNC_MASK_IRQ
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          masks the IRQ for the I/O function.
++
++  @example: Example of unmasking interrupt :
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_MASK_IRQ,
++                                   NULL,
++                                   0);
++
++  @see also: SDCONFIG_FUNC_UNMASK_IRQ
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Acknowledge that the function's IRQ has been handled
++
++  @function name: SDCONFIG_FUNC_ACK_IRQ
++  @prototype: SDCONFIG_FUNC_ACK_IRQ
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          indicates to the bus driver that the function driver has handled the
++          interrupt.  The bus driver will notify the host controller to unmask the
++          interrupt source.  SDIO interrupts are level triggered and are masked at the
++          host controller level until all function drivers have indicated that they
++          have handled their respective interrupt. This command can be issued in either
++          the IRQ handler or asynchronous IRQ handler.
++
++  @example: Example of acknowledging an interrupt :
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_ACK_IRQ,
++                                   NULL,
++                                   0);
++
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Disable SD/MMC/SDIO card CRC checking.
++
++  @function name: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++  @prototype: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          issues CMD59 to disable SPI-CRC checking and requests the host controller
++          driver to stop checking the CRC. This is typically used in systems where
++          CRC checking is not required and performance is improved if the CRC checking
++          is ommitted (i.e. SPI implementations without hardware CRC support).
++
++  @example: Example of disabling SPI CRC checking:
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC,
++                                   NULL,
++                                   0);
++
++  @see also: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Enable SD/MMC/SDIO card CRC checking.
++
++  @function name: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++  @prototype: SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          issues CMD59 to enable SPI-CRC checking and requests the host controller
++          driver to generate valid CRCs for commands and data as well as
++          check the CRC in responses and incomming data blocks.
++
++  @example: Example of enabling SPI CRC checking:
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_SPI_MODE_ENABLE_CRC,
++                                   NULL,
++                                   0);
++
++  @see also: SDCONFIG_FUNC_SPI_MODE_DISABLE_CRC
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Allocate slot current for a card function.
++
++  @function name: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++  @prototype: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++  @category: PD_Reference
++
++  @input:  SDCONFIG_FUNC_SLOT_CURRENT_DATA
++
++  @output: SDCONFIG_FUNC_SLOT_CURRENT_DATA
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          requests an allocation of slot current to satisfy the power requirements
++          of the function.  The command uses the SDCONFIG_FUNC_SLOT_CURRENT_DATA
++          data structure to pass the required current in mA. Slot current allocation
++          is not cummulative and this command should only be issued once by each function
++          driver with the worse case slot current usage.
++          The command returns SDIO_STATUS_NO_RESOURCES if the
++          requirement cannot be met by the host hardware.  The SlotCurrent field will
++          contain the remaining current available to the slot.  The slot current should
++          be allocated before the function is enabled using SDCONFIG_FUNC_ENABLE_DISABLE.
++          When a function driver is unloaded it should free the slot current allocation
++          by using the SDCONFIG_FUNC_FREE_SLOT_CURRENT command.
++
++  @example: Example of allocating slot current:
++        slotCurrent.SlotCurrent = 150;  // 150 mA
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_ALLOC_SLOT_CURRENT,
++                                   &slotCurrent,
++                                   sizeof(slotCurrent));
++
++
++  @see also: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Free slot current for a card function.
++
++  @function name: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++  @prototype: SDCONFIG_FUNC_FREE_SLOT_CURRENT
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          frees the allocated current for a card function.  This command should be
++          issued only once (per function) and only after an allocation was successfully made.
++
++  @example: Example of freeing slot current:
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_FREE_SLOT_CURRENT,
++                                   NULL,
++                                   0);
++
++  @see also: SDCONFIG_FUNC_ALLOC_SLOT_CURRENT
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Set the bus mode for the SD/SDIO card.
++
++  @function name: SDCONFIG_FUNC_CHANGE_BUS_MODE
++  @prototype: SDCONFIG_FUNC_CHANGE_BUS_MODE
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes:     This command code is used in the SDLIB_IssueConfig() API.  The command
++          alters the card's bus mode (width and clock rate) to a driver specified
++          value.  The driver must read the current bus mode flags, modify if necessary
++          and pass the value in the SDCONFIG_BUS_MODE_DATA structure.
++              If the bus width is changed (1 or 4 bit) the caller must adjust the mode flags
++          for the new width. Cards cannot be switched between 1/4 bit and SPI mode.
++          Switching to or from SPI mode requires a power cycle. Adjustments to the clock
++          rate is immediate on the next bus transaction.  The actual clock rate value is
++          limited by the host controller and is reported in the ClockRate field when the
++          command completes successfully.
++              The bus mode change is card wide and may affect other SDIO functions on
++          multi-function cards. Use this feature with caution. This feature should NOT be
++          used to dynamically control clock rates during runtime and should only be used
++          at card initialization. Changing the bus mode must be done with SDIO function
++          interrupts masked.
++              This request can block and must only be called from a schedulable context.
++
++  @example: Example of changing the clock rate:
++    SDCONFIG_BUS_MODE_DATA  busSettings;
++    ZERO_OBJECT(busSettings);
++       // get current bus flags and keep the same bus width
++    busSettings.BusModeFlags = SDDEVICE_GET_BUSMODE_FLAGS(pInstance->pDevice);
++    busSettings.ClockRate = 8000000;  // adjust clock to 8 Mhz
++       // issue config request to override clock rate
++    status = SDLIB_IssueConfig(pInstance->pDevice,
++                               SDCONFIG_FUNC_CHANGE_BUS_MODE,
++                               &busSettings,
++                               sizeof(SDCONFIG_BUS_MODE_DATA));
++
++  @see also: SDDEVICE_GET_BUSMODE_FLAGS
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Get the debug level of the underlying host controller driver.
++
++  @function name: SDCONFIG_GET_HCD_DEBUG
++  @prototype: SDCONFIG_GET_HCD_DEBUG
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: CT_DEBUG_LEVEL
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          requests the current debug level of the HCD driver.  This API is useful for
++          saving the current debug level of the HCD prior to issuing SDCONFIG_SET_HCD_DEBUG
++          in order to increase the verbosity of the HCD. This API should be used only for
++          debugging purposes.  If multiple functions attempt to save and set the HCD debug
++          level simultanously, the final debug level will be unknown. Not all HCDs support
++          this command.
++
++  @example: Example of saving the debug level:
++        CT_DEBUG_LEVEL savedDebug;
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_GET_HCD_DEBUG,
++                                   &savedDebug,
++                                   sizeof(savedDebug));
++
++  @see also: SDCONFIG_SET_HCD_DEBUG
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Set the debug level of the underlying host controller driver.
++
++  @function name: SDCONFIG_SET_HCD_DEBUG
++  @prototype: SDCONFIG_SET_HCD_DEBUG
++  @category: PD_Reference
++
++  @input:  CT_DEBUG_LEVEL
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command
++          sets the current debug level of the HCD driver.  This API is useful for
++          setting the debug level of the HCD programatically for debugging purposes.
++          If multiple functions attempt to save and set the HCD debug
++          level simultanously, the final debug level will be unknown. Not all HCDs support
++          this request.
++
++  @example: Example of setting the debug level:
++        CT_DEBUG_LEVEL setDebug = 15;
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_GET_HCD_DEBUG,
++                                   &setDebug,
++                                   sizeof(setDebug));
++
++  @see also: SDCONFIG_GET_HCD_DEBUG
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Instruct the bus driver to not check the SDIO card interrupt pending
++             register on card interrupts, if possible.
++
++  @function name: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
++  @prototype: SDCONFIG_FUNC_NO_IRQ_PEND_CHECK
++  @category: PD_Reference
++
++  @input:  none
++
++  @output: none
++
++  @return: SDIO Status
++
++  @notes: This command code is used in the SDLIB_IssueConfig() API.  The command instructs the
++          bus driver to skip checking the card interrupt pending register on each card
++          interrupt.  The bus driver will assume the function is interrupting and immediately start
++          the interrupt processing stage. This option is only valid for single function cards.
++          The bus driver will reject the command for a card with more than 1 function.
++          For single function cards, this can improve interrupt response time.
++
++  @example: Example of skipping IRQ pending checks:
++
++        status = SDLIB_IssueConfig(pInstance->pDevice,
++                                   SDCONFIG_FUNC_NO_IRQ_PEND_CHECK,
++                                   NULL,
++                                   0);
++
++  @see also: SDLIB_IssueConfig
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
+Index: linux-2.6.22/drivers/sdio/busdriver/sdio_bus_events.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/sdio_bus_events.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1073 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_bus_events.c
++
++ at abstract: OS independent bus driver support
++
++#notes: this file contains various event handlers and helpers
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/mmc_defs.h>
++
++static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,
++                                   PBOOL  pCardPresent);
++static void GetPendingIrqComplete(PSDREQUEST pReq);
++static void ProcessPendingIrqs(PSDHCD  pHcd, UINT8 IntPendingMsk);
++
++/*
++ * DeviceDetach - tell core a device was removed from a slot
++*/
++SDIO_STATUS DeviceDetach(PSDHCD pHcd)
++{
++    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++
++    ZERO_OBJECT(irqData);
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceDetach\n"));
++        /* tell any function drivers we are gone */
++    RemoveHcdFunctions(pHcd);
++        /* delete the devices associated with this HCD */
++    DeleteDevices(pHcd);
++        /* check and see if there are any IRQs that were left enabled */
++    if (pHcd->IrqsEnabled) {
++        irqData.SlotIRQEnable = FALSE;
++            /* turn off IRQ detection in HCD */
++        _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,(PVOID)&irqData, sizeof(irqData));
++    }
++
++        /* reset hcd state */
++    ResetHcdState(pHcd);
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceDetach\n"));
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * DeviceAttach - tell core a device was inserted into a slot
++*/
++SDIO_STATUS DeviceAttach(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDDEVICE pDevice = NULL;
++    UINT      ii;
++
++
++    if (IS_CARD_PRESENT(pHcd)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach called on occupied slot!\n"));
++        return SDIO_STATUS_ERROR;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: DeviceAttach bdctxt:0x%X \n", (UINT32)pBusContext));
++
++    if (IS_HCD_RAW(pHcd)) {
++         DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: RAW HCD (%s) device attach \n",pHcd->pName));
++            /* this is a raw HCD */
++        memset(&pHcd->CardProperties,0,sizeof(pHcd->CardProperties));
++        pHcd->CardProperties.Flags = CARD_RAW;
++        pHcd->CardProperties.IOFnCount = 0;
++          /* for raw HCD, set up minimum parameters
++           * since we cannot determine these values using any standard, use values
++           * reported by the HCD */
++            /* the operational rate is just the max clock rate reported */
++        pHcd->CardProperties.OperBusClock =  pHcd->MaxClockRate;
++            /* the max bytes per data transfer is just the max bytes per block */
++        pHcd->CardProperties.OperBlockLenLimit = pHcd->MaxBytesPerBlock;
++            /* if the raw HCD uses blocks to transfer, report the operational size
++             * from the HCD max value */
++        pHcd->CardProperties.OperBlockCountLimit = pHcd->MaxBlocksPerTrans;
++            /* set the slot preferred voltage */
++        pHcd->CardProperties.CardVoltage = pHcd->SlotVoltagePreferred;
++    } else {
++            /* initialize this card and get card properties  */
++        if (!SDIO_SUCCESS((status = SDInitializeCard(pHcd)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, failed to initialize card, %d\n",
++                                   status));
++            return status;
++        }
++    }
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++
++
++        /* check for SD or MMC, this must be done first as the query may involve
++         * de-selecting the card */
++    do {
++        if (!(pHcd->CardProperties.Flags & (CARD_MMC | CARD_SD | CARD_RAW))) {
++                /* none of these were discovered */
++            break;
++        }
++        pDevice = AllocateDevice(pHcd);
++        if (NULL == pDevice) {
++            break;
++        }
++        if (pHcd->CardProperties.Flags & CARD_RAW) {
++                /* set function number to 1 for IRQ processing */
++            SDDEVICE_SET_SDIO_FUNCNO(pDevice,1);
++        } else {
++                /* get the ID info for the SD/MMC Card */
++            if (!SDIO_SUCCESS((status = SDQuerySDMMCInfo(pDevice)))) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: DeviceAttach, query SDMMC Info failed \n"));
++                FreeDevice(pDevice);
++                break;
++            }
++        }
++        AddDeviceToList(pDevice);
++            /* look for a function driver to handle this card */
++        ProbeForFunction(pDevice, pHcd);
++    } while (FALSE);
++
++
++#endif
++
++
++        /* create a device for each I/O function */
++    for(ii= 1; ii <= pHcd->CardProperties.IOFnCount; ii++) {
++        pDevice = AllocateDevice(pHcd);
++        if (NULL == pDevice) {
++            break;
++        }
++            /* set the function number */
++        SDDEVICE_SET_SDIO_FUNCNO(pDevice,ii);
++            /* get the ID info for each I/O function */
++        if (!SDIO_SUCCESS((status = SDQuerySDIOInfo(pDevice)))) {
++            DBG_PRINT(SDDBG_ERROR,
++                    ("SDIO Bus Driver: DeviceAttach, could not query SDIO Info, funcNo:%d status:%d \n",
++                    ii, status));
++            FreeDevice(pDevice);
++                /* keep loading other functions */
++            continue;
++        }
++        AddDeviceToList(pDevice);
++            /* look for a function driver to handle this card */
++        ProbeForFunction(pDevice, pHcd);
++    }
++
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: DeviceAttach \n"));
++    return status;
++}
++
++static INLINE void CompleteRequestCheckCancel(PSDHCD pHcd, PSDREQUEST pReqToComplete)
++{
++    BOOL cancel = FALSE;
++    PSDFUNCTION pFunc = NULL;
++
++        /* handle cancel of current request */
++    if (pReqToComplete->Flags & SDREQ_FLAGS_CANCELED) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - _SDIO_HandleHcdEvent: cancelling req 0X%X\n", (UINT)pReqToComplete));
++        cancel = TRUE;
++        pReqToComplete->Status = SDIO_STATUS_CANCELED;
++        pFunc = pReqToComplete->pFunction;
++        DBG_ASSERT(pFunc != NULL);
++    }
++
++    DoRequestCompletion(pReqToComplete, pHcd);
++
++    if (cancel) {
++        SignalSet(&pFunc->CleanupReqSig);
++    }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Indicate to the SDIO bus driver (core) of an event in the host controller
++             driver.
++
++  @function name: SDIO_HandleHcdEvent
++  @prototype: SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller structure that was registered
++           HCD_EVENT - event code
++
++  @output: none
++
++  @return: SDIO_STATUS
++
++  @notes:
++          The host controller driver can indicate asynchronous events by calling this
++          function with an appropriate event code. Refer to the HDK help manual for
++          more information on the event types
++
++  @example: Example of indicating a card insertion event:
++            SDIO_HandleHcdEvent(&Hcd, EVENT_HCD_ATTACH);
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event)
++{
++    PSDREQUEST       pReq;
++    PSDREQUEST       pReqToComplete = NULL;
++    PSDREQUEST       pNextReq = NULL;
++    SDIO_STATUS      status;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: _SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
++                         Event, (UINT)pHcd));
++
++    if (Event == EVENT_HCD_TRANSFER_DONE) {
++        pReq = GET_CURRENT_REQUEST(pHcd);
++        if (NULL == pReq) {
++            DBG_ASSERT(FALSE);
++            return SDIO_STATUS_ERROR;
++        }
++
++        status = _AcquireHcdLock(pHcd);
++        if (SDIO_SUCCESS(status)) {
++                /* null out the current request */
++            SET_CURRENT_REQUEST(pHcd, NULL);
++            status = _ReleaseHcdLock(pHcd);
++        } else {
++            DBG_PRINT(SDDBG_ERROR,
++              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++            return SDIO_STATUS_ERROR;
++        }
++
++            /* note: the queue is still marked busy to prevent other threads/tasks from starting
++             * new requests while we are handling completion , some completed requests are
++             * marked as barrier requests which must be handled atomically */
++
++        status = pReq->Status;
++        DBG_PRINT(SDIODBG_REQUESTS,
++            ("+SDIO Bus Driver: Handling Transfer Done (CMD:%d, Status:%d) from HCD:0x%08X \n",
++                  pReq->Command, status, (INT)pHcd));
++            /* check SPI mode conversion */
++        if (IS_HCD_BUS_MODE_SPI(pHcd) && SDIO_SUCCESS(status)) {
++            if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT) && !(pReq->Flags & SDREQ_FLAGS_PSEUDO) &&
++                (GET_SDREQ_RESP_TYPE(pReq->Flags) != SDREQ_FLAGS_NO_RESP)) {
++                ConvertSPI_Response(pReq, NULL);
++            }
++        }
++
++        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Completing Request:0x%08X \n",(INT)pReq));
++
++        if (!SDIO_SUCCESS(status) &&
++            (status != SDIO_STATUS_CANCELED)  &&
++            !(pReq->Flags & SDREQ_FLAGS_CANCELED) &&
++            (pReq->RetryCount > 0)) {
++                /* retry the request if it failed, was NOT cancelled and the retry count
++                 * is greater than zero */
++            pReq->RetryCount--;
++            pReqToComplete = NULL;
++                /* clear SPI converted flag */
++            pReq->Flags &= ~SDREQ_FLAGS_RESP_SPI_CONVERTED;
++            pNextReq = pReq;
++        } else {
++                /* complete the request */
++            if (pReq->Flags & SDREQ_FLAGS_BARRIER) {
++                    /* a barrier request must be completed before the next bus request is
++                     * started */
++                CompleteRequestCheckCancel(pHcd, pReq);
++                if (!ForceAllRequestsAsync()) {
++                    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++                            /* the request was completed, decrement recursion count */
++                        status = _AcquireHcdLock(pHcd);
++                        if (!SDIO_SUCCESS(status)) {
++                            return status;
++                        }
++                        pHcd->Recursion--;
++                        DBG_ASSERT(pHcd->Recursion >= 0);
++                        status = _ReleaseHcdLock(pHcd);
++                    } else {
++                            /* reset bit */
++                        AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++                    }
++                }
++                pReqToComplete = NULL;
++            } else {
++                    /* complete this after the next request has
++                     * been started */
++                pReqToComplete = pReq;
++            }
++        }
++
++            /* acquire the hcd lock to look at the queues */
++        status = _AcquireHcdLock(pHcd);
++        if (SDIO_SUCCESS(status)) {
++            if (pReqToComplete != NULL) {
++                    /* queue the request that was completed */
++                QueueRequest(&pHcd->CompletedRequestQueue, pReqToComplete);
++            }
++            if (NULL == pNextReq) {
++                    /* check the queue for the next request */
++                DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Checking queue.. \n"));
++                    /* check to see if the HCD was already working on one.  This occurs if
++                     * the current request being completed was a barrier request and the
++                     * barrier completion routine submitted a new request to the head of the
++                     * queue */
++                if (GET_CURRENT_REQUEST(pHcd) == NULL) {
++                    pNextReq = DequeueRequest(&pHcd->RequestQueue);
++                    if (NULL == pNextReq) {
++                            /* nothing in the queue, mark it not busy */
++                        MarkQueueNotBusy(&pHcd->RequestQueue);
++                        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Queue idle \n"));
++                    } else {
++                        DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Next request in queue: 0x%X \n",
++                            (INT)pNextReq));
++                    }
++                } else {
++                    DBG_PRINT(SDIODBG_REQUESTS,
++                        ("SDIO Bus Driver: Busy Queue from barrier request \n"));
++                }
++            }
++
++            if (pNextReq != NULL) {
++                    /* a new request will be submitted to the HCD below,
++                     * check recursion while we have the lock */
++                if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++                    CHECK_HCD_RECURSE(pHcd,pNextReq);
++                }
++            }
++            status = _ReleaseHcdLock(pHcd);
++        } else {
++            DBG_PRINT(SDDBG_ERROR,
++              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++            return SDIO_STATUS_ERROR;
++        }
++            /* check for the next request to issue */
++        if (pNextReq != NULL) {
++            DBG_PRINT(SDIODBG_REQUESTS, ("SDIO Bus Driver: Starting Next Request: 0x%X \n",
++                        (INT)pNextReq));
++            SET_CURRENT_REQUEST(pHcd,pNextReq);
++            status = CallHcdRequest(pHcd);
++                /* check and see if the HCD completed the request in the callback */
++            if (status != SDIO_STATUS_PENDING) {
++                    /* recurse and process the request */
++                _SDIO_HandleHcdEvent(pHcd, EVENT_HCD_TRANSFER_DONE);
++            }
++        }
++
++        /* now empty the completed request queue
++         * - this guarantees in-order completion even during recursion */
++        status = _AcquireHcdLock(pHcd);
++        if (SDIO_SUCCESS(status)) {
++            while (1) {
++                pReqToComplete = DequeueRequest(&pHcd->CompletedRequestQueue);
++                status = _ReleaseHcdLock(pHcd);
++                if (pReqToComplete != NULL) {
++                    CompleteRequestCheckCancel(pHcd, pReqToComplete);
++                    if (!CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++                        if (!ForceAllRequestsAsync()) {
++                                /* reset bit */
++                            AtomicTest_Clear(&pHcd->HcdFlags, HCD_REQUEST_CALL_BIT);
++                        }
++                    }
++                        /* re-acquire lock */
++                    status = _AcquireHcdLock(pHcd);
++                    if (!SDIO_SUCCESS(status)) {
++                        return SDIO_STATUS_ERROR;
++                    }
++                    if (CHECK_API_VERSION_COMPAT(pHcd,2,6)) {
++                        if (!ForceAllRequestsAsync()) {
++                            /* while we have the lock, decrement recursion count each time
++                             * we complete a request */
++                            pHcd->Recursion--;
++                            DBG_ASSERT(pHcd->Recursion >= 0);
++                        }
++                    }
++                }  else {
++                        /* we're done */
++                    break;
++                }
++            }
++        } else {
++            DBG_PRINT(SDDBG_ERROR,
++              ("SDIO Bus Driver: SDIO_HandleHcdEvent Failed to acquire HCD lock \n"));
++            return SDIO_STATUS_ERROR;
++        }
++        DBG_PRINT(SDIODBG_REQUESTS, ("-SDIO Bus Driver: Transfer Done Handled \n"));
++        return SDIO_STATUS_SUCCESS;
++    }
++
++    switch(Event) {
++        case EVENT_HCD_ATTACH:
++        case EVENT_HCD_DETACH:
++                /* card detect helper does the actual attach detach */
++            return PostCardDetectEvent(pBusContext,Event,pHcd);
++        case EVENT_HCD_SDIO_IRQ_PENDING:
++            return DeviceInterrupt(pHcd);
++        default:
++            DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: SDIO_HandleHcdEvent, invalid event type 0x%X, HCD:0x%X\n",
++                                    Event, (UINT)pHcd));
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++}
++
++/* card detect helper function */
++THREAD_RETURN CardDetectHelperFunction(POSKERNEL_HELPER pHelper)
++{
++    SDIO_STATUS       status;
++    HCD_EVENT_MESSAGE message;
++    INT               length;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - CardDetectHelperFunction starting up: 0x%X \n", (INT)pHelper));
++
++    while (1) {
++
++            /* wait for wake up event */
++        status = SD_WAIT_FOR_WAKEUP(pHelper);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - Card Detect Helper Semaphore Pend Error:%d \n",
++                                    status));
++            break;
++        }
++
++        if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++                /* cleanup message queue on shutdown */
++            while (1) {
++                length = sizeof(message);
++                    /* get a message */
++                status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
++                                          &message, &length);
++                if (!SDIO_SUCCESS(status)) {
++                    break;
++                }
++                if (message.pHcd != NULL) {
++                        /* decrement HCD reference count */
++                    OS_DecHcdReference(message.pHcd);
++                }
++            }
++
++            break;
++        }
++
++        while (1) {
++            length = sizeof(message);
++                /* get a message */
++            status = SDLIB_GetMessage(pBusContext->pCardDetectMsgQueue,
++                                      &message, &length);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++
++            switch (message.Event) {
++                case EVENT_HCD_ATTACH:
++                    DeviceAttach(message.pHcd);
++                    break;
++                case EVENT_HCD_DETACH:
++                    DeviceDetach(message.pHcd);
++                    break;
++
++#ifndef CT_CONFIG_NO_CARD_POLLING
++                case EVENT_HCD_CD_POLLING:
++                        /* run detector */
++                    RunCardDetect();
++                    break;
++
++#endif
++                default:
++                    DBG_ASSERT(FALSE);
++                    break;
++            }
++
++            if (message.pHcd != NULL) {
++                    /* message was processed, decrement reference count */
++                OS_DecHcdReference(message.pHcd);
++            }
++        }
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - Card Detect Helper Exiting.. \n"));
++    return 0;
++}
++
++#ifndef CT_CONFIG_NO_CARD_POLLING
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  RunCardDetect - run card detect on host controller slots that require polling
++  Input:
++  Output:
++  Return:
++  Notes: This function is called from the card detect timer thread
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void RunCardDetect(void)
++{
++    BOOL       CDPollingRequired = FALSE;
++    PSDLIST    pListItem;
++    PSDHCD     pHcd;
++    BOOL       cardPresent;
++
++    DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: RunCardDetect\n"));
++
++       /* protect the HCD list */
++    if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pBusContext->HcdListSem))) {
++        DBG_ASSERT(FALSE);
++        return;  /* wait interrupted */
++    }
++        /* while we are running the detector we are blocking HCD removal*/
++    SDITERATE_OVER_LIST(&pBusContext->HcdList, pListItem) {
++        pHcd = CONTAINING_STRUCT(pListItem, SDHCD, SDList);
++            /* does the HCD require polling ? */
++        if (pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) {
++            DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Found HCD requiring polling \n"));
++                /* set flag to queue the timer */
++            CDPollingRequired = TRUE;
++            if (IS_CARD_PRESENT(pHcd)) {
++                    /* there is a device in the slot */
++                cardPresent = TRUE;
++                if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
++                    if (!cardPresent) {
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Removal Detected\n"));
++                        DeviceDetach(pHcd);
++                    }
++                }
++            } else {
++                cardPresent = FALSE;
++                if (SDIO_SUCCESS(ScanSlotForCard(pHcd,&cardPresent))) {
++                     if (cardPresent) {
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver CD Polling.. Card Detected\n"));
++                        DeviceAttach(pHcd);
++                    }
++                }
++            }
++        }
++
++        DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: moving to next hcd:0x%X \n",
++                                     (INT)pListItem->pNext));
++    }
++
++        /* check if we need to queue the timer */
++    if (CDPollingRequired && !pBusContext->CDTimerQueued) {
++        pBusContext->CDTimerQueued = TRUE;
++        DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO Bus Driver: Queuing Card detect timer \n"));
++        if (!SDIO_SUCCESS(
++            QueueTimer(SDIOBUS_CD_TIMER_ID, pBusContext->CDPollingInterval))) {
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: failed to queue CD timer \n"));
++            pBusContext->CDTimerQueued = FALSE;
++        }
++    }
++        /* release HCD list lock */
++    SemaphorePost(&pBusContext->HcdListSem);
++    DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: RunCardDetect\n"));
++}
++
++#endif
++
++
++#ifndef CT_CONFIG_NO_CARD_POLLING
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ScanSlotForCard - scan slot for a card
++  Input:  pHcd - the hcd
++  Output: pCardPresent - card present flag (set/cleared on return)
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS ScanSlotForCard(PSDHCD pHcd,PBOOL pCardPresent)
++{
++    SDIO_STATUS         status = SDIO_STATUS_SUCCESS;
++    UINT8               temp;
++
++    DBG_PRINT(SDIODBG_CD_TIMER, ("+SDIO Bus Driver: ScanSlotForCard\n"));
++
++    do {
++        if (!IS_CARD_PRESENT(pHcd)) {
++#ifdef DEBUG
++            INT   dbgLvl;
++            dbgLvl = DBG_GET_DEBUG_LEVEL();
++            DBG_SET_DEBUG_LEVEL(SDDBG_WARN);
++#endif
++            status = CardInitSetup(pHcd);
++
++#ifdef DEBUG
++            DBG_SET_DEBUG_LEVEL(dbgLvl);
++#endif
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++                /* issue go-idle */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++            } else {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++            }
++                /* try SDIO */
++            status = TestPresence(pHcd,CARD_SDIO,NULL);
++            if (SDIO_SUCCESS(status)) {
++                *pCardPresent = TRUE;
++                break;
++            }
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++                /* issue go-idle */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++            } else {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++            }
++                /* try SD */
++            status = TestPresence(pHcd,CARD_SD,NULL);
++            if (SDIO_SUCCESS(status)) {
++                *pCardPresent = TRUE;
++                break;
++            }
++                /* issue go-idle */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,NULL);
++            } else {
++                _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,NULL);
++            }
++                /* try MMC */
++            status = TestPresence(pHcd,CARD_MMC,NULL);
++            if (SDIO_SUCCESS(status)) {
++                *pCardPresent = TRUE;
++                break;
++            }
++
++#endif
++        } else {
++            if (pHcd->CardProperties.Flags & CARD_SDIO) {
++#ifdef DUMP_INT_PENDING
++                temp = 0;
++                    /* handy debug prints to check interrupt status and print pending register */
++                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_ENABLE_REG, &temp);
++                if (SDIO_SUCCESS(status) && (temp != 0)) {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Enable Reg: 0x%2.2X\n", temp));
++                    status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_INT_PENDING_REG, &temp);
++                    if (SDIO_SUCCESS(status)) {
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: INT Pend Reg: 0x%2.2X\n", temp));
++                    }
++                }
++#endif
++                    /* for SDIO cards, read the revision register */
++                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
++            } else if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++
++#ifndef CT_CONFIG_NO_SDMMC
++                    /* for SD/MMC cards, issue SEND_STATUS */
++                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                        /* SPI uses the SPI R2 response */
++                    status = _IssueSimpleBusRequest(pHcd,
++                                                    CMD13,
++                                                    0,
++                                                    SDREQ_FLAGS_RESP_R2,
++                                                    NULL);
++                } else {
++                    status = _IssueSimpleBusRequest(pHcd,
++                                                    CMD13,
++                                                    (pHcd->CardProperties.RCA << 16),
++                                                    SDREQ_FLAGS_RESP_R1,NULL);
++                }
++
++#endif
++            } else {
++                DBG_ASSERT(FALSE);
++            }
++            if (!SDIO_SUCCESS(status)) {
++                    /* card is gone */
++                *pCardPresent = FALSE;
++            }
++        }
++    } while (FALSE);
++
++    if (status == SDIO_STATUS_BUS_RESP_TIMEOUT) {
++        status = SDIO_STATUS_SUCCESS;
++    }
++
++    DBG_PRINT(SDIODBG_CD_TIMER, ("-SDIO Bus Driver: ScanSlotForCard status:%d\n",
++                                 status));
++
++    return status;
++}
++
++#endif
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  DeviceInterrupt - handle device interrupt
++  Input:  pHcd -  host controller
++  Output:
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS DeviceInterrupt(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    SDIO_STATUS status2;
++    PSDREQUEST pReq = NULL;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: DeviceInterrupt\n"));
++
++    if (!IS_CARD_PRESENT(pHcd)) {
++        DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: Device interrupt asserted on empty slot!\n"));
++        return SDIO_STATUS_ERROR;
++    }
++
++    do {
++            /* for RAW HCDs or HCDs flagged for single-function IRQ optimization */
++        if (IS_HCD_RAW(pHcd) || (pHcd->HcdFlags & (1 << HCD_IRQ_NO_PEND_CHECK))) {
++            status = _AcquireHcdLock(pHcd);
++            if (!SDIO_SUCCESS(status)) {
++                return status;
++            }
++            if (pHcd->IrqProcState != SDHCD_IDLE) {
++                DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: Already processing interrupts! (state = %d) \n",
++                                    pHcd->IrqProcState));
++                status = SDIO_STATUS_ERROR;
++                status2 = _ReleaseHcdLock(pHcd);
++            } else {
++                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver :  Device Interrupt \n"));
++                    /* mark that we are processing */
++                pHcd->IrqProcState = SDHCD_IRQ_PENDING;
++                status2 = _ReleaseHcdLock(pHcd);
++                    /* process Irqs for raw hcds or HCDs with the single function optimization */
++                    /* force processing of function 1 interrupt */
++                ProcessPendingIrqs(pHcd, (1 << 1));
++            }
++            DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
++                /* done with RAW irqs */
++            return status;
++        }
++
++            /* pre-allocate a request to get the pending bits, we have to do this outside the
++              * hcd lock acquisition */
++        pReq = AllocateRequest();
++
++        if (NULL == pReq) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        status = _AcquireHcdLock(pHcd);
++
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        if (pHcd->IrqProcState != SDHCD_IDLE) {
++            DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: Already processing interrupts! (state = %d) \n",
++                                    pHcd->IrqProcState));
++            status = SDIO_STATUS_ERROR;
++        } else {
++                /* mark that we are processing */
++            pHcd->IrqProcState = SDHCD_IRQ_PENDING;
++                /* build argument to read IRQ pending register */
++            SDIO_SET_CMD52_READ_ARG(pReq->Argument,0,SDIO_INT_PENDING_REG);
++            pReq->Command = CMD52;
++            pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
++            pReq->pCompleteContext = (PVOID)pHcd;
++            pReq->pCompletion = GetPendingIrqComplete;
++            pReq->RetryCount = SDBUS_MAX_RETRY;
++        }
++
++        status2 = _ReleaseHcdLock(pHcd);
++
++        if (!SDIO_SUCCESS(status2)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: lock release error: %d\n", status2));
++        }
++
++    } while (FALSE);
++
++    if (SDIO_SUCCESS(status)) {
++        DBG_ASSERT(pReq != NULL);
++        IssueRequestToHCD(pHcd,pReq);
++        status = SDIO_STATUS_PENDING;
++    } else {
++        if (pReq != NULL) {
++            FreeRequest(pReq);
++        }
++    }
++
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: DeviceInterrupt: %d\n", status));
++    return status;
++}
++
++
++/* SDIO IRQ helper */
++THREAD_RETURN SDIOIrqHelperFunction(POSKERNEL_HELPER pHelper)
++{
++    PSDHCD            pHcd;
++    SDIO_STATUS       status;
++    PSDLIST           pListItem;
++    PSDDEVICE         pDevice;
++    UINT8             funcMask;
++    PSDDEVICE         pDeviceIRQ[7];
++    UINT              deviceIrqCount = 0;
++    UINT              ii;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction starting up \n"));
++
++    pHcd = (PSDHCD)pHelper->pContext;
++    DBG_ASSERT(pHcd != NULL);
++
++    while (1) {
++
++            /* wait for wake up event */
++        status = SD_WAIT_FOR_WAKEUP(pHelper);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver - SDIOIrqHelperFunction Pend Error:%d \n",
++                                    status));
++            break;
++        }
++
++        if (SD_IS_HELPER_SHUTTING_DOWN(pHelper)) {
++            break;
++        }
++
++        DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver - Pending IRQs:0x%X \n",
++                                     pHcd->PendingHelperIrqs));
++
++         /* take the device list lock as we iterate through the list, this blocks
++             * device removals */
++        status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* walk through the device list matching HCD and interrupting function */
++        SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
++            pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
++                /* check if device belongs to the HCD */
++            if (pDevice->pHcd != pHcd){
++                    /* not on this hcd */
++                continue;
++            }
++            funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++                /* check device function against the pending mask */
++            if (!(funcMask & pHcd->PendingHelperIrqs)) {
++                    /* this one is not scheduled for the helper */
++                continue;
++            }
++                /* clear bit */
++            pHcd->PendingHelperIrqs &= ~funcMask;
++                /* check for sync IRQ and call handler */
++            if (pDevice->pIrqFunction != NULL) {
++                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling IRQ Handler. Fn:%d\n",
++                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++                /* save the device so we can process it without holding any locks */
++                pDeviceIRQ[deviceIrqCount++] = pDevice;
++            } else {
++                    /* this is actually okay if the device is removing, the callback
++                     * is NULLed out */
++                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No IRQ handler Fn:%d\n",
++                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++            }
++        }
++            /* should have handled all these */
++        DBG_ASSERT(pHcd->PendingHelperIrqs == 0);
++        pHcd->PendingHelperIrqs = 0;
++        SemaphorePost(&pBusContext->DeviceListSem);
++        for (ii = 0; ii < deviceIrqCount; ii++) {
++            /* now call the function */
++            SDDEVICE_CALL_IRQ_HANDLER(pDeviceIRQ[ii]);
++        }
++        deviceIrqCount = 0;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - SDIOIrqHelperFunction Exiting.. \n"));
++    return 0;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetPendingIrqComplete - completion routine for getting pending IRQs
++  Input:  pRequest -  completed request
++  Output:
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static void GetPendingIrqComplete(PSDREQUEST pReq)
++{
++    UINT8       intPendingMsk;
++    PSDHCD      pHcd;
++
++    do {
++        pHcd = (PSDHCD)pReq->pCompleteContext;
++        DBG_ASSERT(pHcd != NULL);
++
++        if (!SDIO_SUCCESS(pReq->Status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get Interrupt pending register Err:%d\n",
++                                    pReq->Status));
++            break;
++        }
++
++        if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: CMD52 resp error: 0x%X \n",
++                                    SD_R5_GET_RESP_FLAGS(pReq->Response)));
++            break;
++        }
++            /* extract the pending mask */
++        intPendingMsk =  SD_R5_GET_READ_DATA(pReq->Response) & SDIO_INT_PEND_MASK;
++            /* process them */
++        ProcessPendingIrqs(pHcd, intPendingMsk);
++
++    } while (FALSE);
++
++    FreeRequest(pReq);
++
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: GetPendingIrqComplete \n"));
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ProcessPendingIrqs - processing pending Irqs
++  Input:  pHcd - host controller
++  Input:  IntPendingMsk -  pending irq bit mask
++  Output:
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static void ProcessPendingIrqs(PSDHCD pHcd, UINT8 IntPendingMsk)
++{
++    PSDLIST     pListItem;
++    PSDDEVICE   pDevice;
++    UINT8       funcMask;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("+SDIO Bus Driver: ProcessPendingIrqs \n"));
++    do {
++            /* acquire lock to protect configuration and irq enables */
++        status = _AcquireHcdLock(pHcd);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++            /* sanity check */
++        if ((IntPendingMsk & pHcd->IrqsEnabled) != IntPendingMsk) {
++            DBG_PRINT(SDDBG_ERROR,
++                ("SDIO Bus Driver: IRQs asserting when not enabled : curr:0x%X , card reports: 0x%X\n",
++                     pHcd->IrqsEnabled, IntPendingMsk));
++                /* remove the pending IRQs that are not enabled */
++            IntPendingMsk &= pHcd->IrqsEnabled;
++                /* fall through */
++        }
++
++        if (!IntPendingMsk) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: No interrupts on HCD:0x%X \n", (INT)pHcd));
++            pHcd->IrqProcState = SDHCD_IDLE;
++            if (pHcd->IrqsEnabled) {
++                    /* only re-arm if there are IRQs enabled */
++                _IssueConfig(pHcd,SDCONFIG_SDIO_REARM_INT,NULL,0);
++            }
++            status = _ReleaseHcdLock(pHcd);
++            break;
++        }
++            /* reset helper IRQ bits */
++        pHcd->PendingHelperIrqs = 0;
++            /* save pending IRQ acks */
++        pHcd->PendingIrqAcks = IntPendingMsk;
++        status = _ReleaseHcdLock(pHcd);
++        DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: INTs Pending - 0x%2.2X \n", IntPendingMsk));
++            /* take the device list lock as we iterate through the list, this blocks
++             * device removals */
++        status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* walk through the device list matching HCD and interrupting function */
++        SDITERATE_OVER_LIST(&pBusContext->DeviceList, pListItem) {
++            pDevice = CONTAINING_STRUCT(pListItem, SDDEVICE, SDList);
++                /* check if device belongs to the HCD */
++            if (pDevice->pHcd != pHcd){
++                    /* not on this hcd */
++                continue;
++            }
++            funcMask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++                /* check device function against the pending mask */
++            if (!(funcMask & IntPendingMsk)) {
++                    /* this one is not interrupting */
++                continue;
++            }
++                /* check for async IRQ and call handler */
++            if (pDevice->pIrqAsyncFunction != NULL) {
++                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Calling Async IRQ Handler. Fn:%d\n",
++                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++                SDDEVICE_CALL_IRQ_ASYNC_HANDLER(pDevice);
++            } else {
++                    /* this one needs the helper */
++                pHcd->PendingHelperIrqs |= funcMask;
++                DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: No Async IRQ, Pending Helper Fn:%d\n",
++                                             SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++            }
++        }
++            /* release HCD list lock */
++        SemaphorePost(&pBusContext->DeviceListSem);
++            /* check for helper IRQs */
++        if (pHcd->PendingHelperIrqs) {
++            pHcd->IrqProcState = SDHCD_IRQ_HELPER;
++            DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Waking IRQ Helper \n"));
++            if (!SDIO_SUCCESS(SD_WAKE_OS_HELPER(&pHcd->SDIOIrqHelper))) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to wake helper! \n"));
++            }
++        }
++    } while (FALSE);
++
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("-SDIO Bus Driver: ProcessPendingIrqs \n"));
++}
++
++SDIO_STATUS TryNoIrqPendingCheck(PSDDEVICE pDevice)
++{
++    if (pDevice->pHcd->CardProperties.IOFnCount > 1) {
++            /* not supported on multi-function cards */
++        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: IRQ Pending Check cannot be bypassed, (Funcs:%d)\n",
++            pDevice->pHcd->CardProperties.IOFnCount));
++        return SDIO_STATUS_UNSUPPORTED;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: pending IRQ check bypassed \n"));
++        /* set flag to optimize this */
++    AtomicTest_Set(&pDevice->pHcd->HcdFlags, HCD_IRQ_NO_PEND_CHECK);
++    return SDIO_STATUS_SUCCESS;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDIO_NotifyTimerTriggered - notification handler that a timer expired
++  Input:  TimerID - ID of timer that expired
++  Output:
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SDIO_NotifyTimerTriggered(INT TimerID)
++{
++
++    switch (TimerID) {
++        case SDIOBUS_CD_TIMER_ID:
++            pBusContext->CDTimerQueued = FALSE;
++                /* post an HCD polling event to the helper thread */
++            PostCardDetectEvent(pBusContext, EVENT_HCD_CD_POLLING, NULL);
++            break;
++        default:
++            DBG_ASSERT(FALSE);
++    }
++
++}
+Index: linux-2.6.22/drivers/sdio/busdriver/sdio_bus_misc.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/sdio_bus_misc.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,3184 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_bus_misc.c
++
++ at abstract: OS independent bus driver support
++
++#notes: this file contains miscellaneous control functions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++$ATH_LICENSE_SDIOSTACK0$
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/mmc_defs.h>
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  IssueBusRequestBd - issue a bus request
++  Input:  pHcd - HCD object
++          Cmd - command to issue
++          Argument - command argument
++          Flags - request flags
++
++  Output: pReqToUse - request to use (if caller wants response data)
++  Return: SDIO Status
++  Notes:  This function only issues 1 block data transfers
++          This function issues the request synchronously
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _IssueBusRequestBd(PSDHCD           pHcd,
++                               UINT8            Cmd,
++                               UINT32           Argument,
++                               SDREQUEST_FLAGS  Flags,
++                               PSDREQUEST       pReqToUse,
++                               PVOID            pData,
++                               INT              Length)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDREQUEST  pReq;
++
++    if (NULL == pReqToUse) {
++            /* caller doesn't care about the response data, allocate locally */
++        pReq = AllocateRequest();
++        if (NULL == pReq) {
++            return SDIO_STATUS_NO_RESOURCES;
++        }
++    } else {
++            /* use the caller's request buffer */
++        pReq = pReqToUse;
++    }
++
++    pReq->Argument = Argument;
++    pReq->Flags = Flags;
++    pReq->Command = Cmd;
++    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++        pReq->pDataBuffer  = pData;
++        pReq->BlockCount = 1;
++        pReq->BlockLen = Length;
++    }
++
++    status = IssueRequestToHCD(pHcd,pReq);
++
++    if (NULL == pReqToUse) {
++        DBG_ASSERT(pReq != NULL);
++        FreeRequest(pReq);
++    }
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ConvertVoltageCapsToOCRMask - initialize card
++  Input:  VoltageCaps - voltage cap to look up
++  Return: 32 bit OCR mask
++  Notes:  this function sets voltage for +- 10%
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static UINT32 ConvertVoltageCapsToOCRMask(SLOT_VOLTAGE_MASK VoltageCaps)
++{
++    UINT32 ocrMask;
++
++    ocrMask = 0;
++
++    if (VoltageCaps & SLOT_POWER_3_3V) {
++        ocrMask |= SD_OCR_3_2_TO_3_3_VDD | SD_OCR_3_3_TO_3_4_VDD;
++    }
++    if (VoltageCaps & SLOT_POWER_3_0V) {
++        ocrMask |= SD_OCR_2_9_TO_3_0_VDD | SD_OCR_3_0_TO_3_1_VDD;
++    }
++    if (VoltageCaps & SLOT_POWER_2_8V) {
++        ocrMask |= SD_OCR_2_7_TO_2_8_VDD | SD_OCR_2_8_TO_2_9_VDD;
++    }
++    if (VoltageCaps & SLOT_POWER_2_0V) {
++        ocrMask |= SD_OCR_1_9_TO_2_0_VDD | SD_OCR_2_0_TO_2_1_VDD;
++    }
++    if (VoltageCaps & SLOT_POWER_1_8V) {
++        ocrMask |= SD_OCR_1_7_TO_1_8_VDD | SD_OCR_1_8_TO_1_9_VDD;
++    }
++    if (VoltageCaps & SLOT_POWER_1_6V) {
++        ocrMask |= SD_OCR_1_6_TO_1_7_VDD;
++    }
++
++    return ocrMask;
++}
++
++static UINT32 GetUsableOCRValue(UINT32 CardOCR, UINT32 SlotOCRMask)
++{
++    INT    i;
++    UINT32 mask = 0;
++
++    for (i = 0; i < 32; i++) {
++        mask = 1 << i;
++        if ((SlotOCRMask & mask) && (CardOCR & mask)) {
++            return mask;
++        }
++    }
++
++    return mask;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetPowerSetting - power up the SDIO card
++  Input:  pHcd - HCD object
++          pOCRvalue - OCR value of the card
++  Output: pOCRvalue - OCR to actually use
++  Return: power setting for HCD based on card's OCR, zero indicates unsupported
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SLOT_VOLTAGE_MASK GetPowerSetting(PSDHCD pHcd, UINT32 *pOCRvalue)
++{
++    UINT32                      ocrMask;
++    SLOT_VOLTAGE_MASK           hcdVoltage = 0;
++    SLOT_VOLTAGE_MASK           hcdVMask;
++    INT                         i;
++
++        /* check preferred value */
++    ocrMask = ConvertVoltageCapsToOCRMask(pHcd->SlotVoltagePreferred);
++    if (ocrMask & *pOCRvalue) {
++            /* using preferred voltage */
++        *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
++        hcdVoltage = pHcd->SlotVoltagePreferred;
++    } else {
++            /* walk through the slot voltage caps and find a match */
++        for (i = 0; i < 8; i++) {
++            hcdVMask = (1 << i);
++            if (hcdVMask & pHcd->SlotVoltageCaps) {
++                ocrMask = ConvertVoltageCapsToOCRMask((SLOT_VOLTAGE_MASK)(pHcd->SlotVoltageCaps & hcdVMask));
++                if (ocrMask & *pOCRvalue) {
++                        /* found a match */
++                    *pOCRvalue = GetUsableOCRValue(*pOCRvalue, ocrMask);
++                    hcdVoltage = pHcd->SlotVoltageCaps & hcdVMask;
++                    break;
++                }
++            }
++        }
++    }
++
++    return hcdVoltage;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TestPresence - test the presence of a card/function
++  Input:  pHcd - HCD object
++          TestType - type of test to perform
++  Output: pReq - Request to use (optional)
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TestPresence(PSDHCD          pHcd,
++                         CARD_INFO_FLAGS TestType,
++                         PSDREQUEST      pReq)
++{
++    SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++     switch (TestType) {
++        case CARD_SDIO:
++                /* issue CMD5 */
++            status = _IssueSimpleBusRequest(pHcd,CMD5,0,
++                        SDREQ_FLAGS_RESP_SDIO_R4 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,pReq);
++            break;
++
++#ifndef CT_CONFIG_NO_SDMMC
++        case CARD_SD:
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                 /* ACMD41 just starts initialization when in SPI mode, argument is ignored
++                 * Note: In SPI mode ACMD41 uses an R1 response */
++                status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
++                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,pReq);
++
++            } else {
++                /* issue ACMD41 with OCR value of zero */
++                /* ACMD41 on SD uses an R3 response */
++                status = _IssueSimpleBusRequest(pHcd,ACMD41,0,
++                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,pReq);
++            }
++            break;
++        case CARD_MMC:
++                 /* issue CMD1 */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* note: in SPI mode an R1 response is used */
++                status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R1,pReq);
++            } else {
++                status = _IssueSimpleBusRequest(pHcd,CMD1,0,SDREQ_FLAGS_RESP_R3,pReq);
++            }
++            break;
++
++#endif
++        default:
++            DBG_ASSERT(FALSE);
++            break;
++    }
++
++    return status;
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ReadOCR - read the OCR
++  Input:  pHcd - HCD object
++          ReadType - type of read to perform
++          OCRValue - OCR value to use as an argument
++  Output: pReq - Request to use
++          pOCRValueRd - OCR value read back (can be NULL)
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS ReadOCR(PSDHCD          pHcd,
++                           CARD_INFO_FLAGS ReadType,
++                           PSDREQUEST      pReq,
++                           UINT32          OCRValue,
++                           UINT32          *pOCRValueRd)
++{
++    SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++     switch (ReadType) {
++        case CARD_SDIO:
++                /* CMD5 for SDIO cards */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* skip the SPI filter, we will decode the response here  */
++                status = _IssueSimpleBusRequest(pHcd,CMD5,
++                                                OCRValue,
++                                                SDREQ_FLAGS_RESP_SDIO_R4 |
++                                                SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++                                                pReq);
++            } else {
++                    /* native SD */
++                status = _IssueSimpleBusRequest(pHcd,CMD5,
++                                                OCRValue,
++                                                SDREQ_FLAGS_RESP_SDIO_R4,
++                                                pReq);
++            }
++            break;
++
++#ifndef CT_CONFIG_NO_SDMMC
++        case CARD_SD:
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* CMD58 is used to read the OCR */
++                status = _IssueSimpleBusRequest(pHcd,CMD58,
++                                                0, /* argument ignored */
++                                                (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
++                                                pReq);
++            } else {
++                    /* SD Native uses ACMD41 */
++                status = _IssueSimpleBusRequest(pHcd,ACMD41,
++                                                OCRValue,
++                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R3,
++                                                pReq);
++            }
++            break;
++        case CARD_MMC:
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* CMD58 is used to read the OCR  */
++                status = _IssueSimpleBusRequest(pHcd,CMD58,
++                                                0, /* argument ignored */
++                                                (SDREQ_FLAGS_RESP_R3 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT),
++                                                pReq);
++            } else {
++                    /* MMC Native uses CMD1 */
++                status = _IssueSimpleBusRequest(pHcd,CMD1,
++                                                OCRValue, SDREQ_FLAGS_RESP_R3,
++                                                pReq);
++            }
++            break;
++
++#endif
++        default:
++            DBG_ASSERT(FALSE);
++            break;
++    }
++
++    if (SDIO_SUCCESS(status) && (pOCRValueRd != NULL)) {
++        *pOCRValueRd = 0;
++            /* someone wants the OCR read back */
++        switch (ReadType) {
++            case CARD_SDIO:
++                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    *pOCRValueRd = SPI_SDIO_R4_GET_OCR(pReq->Response);
++                } else {
++                    *pOCRValueRd = SD_SDIO_R4_GET_OCR(pReq->Response);
++                }
++                break;
++
++#ifndef CT_CONFIG_NO_SDMMC
++            case CARD_SD:
++            case CARD_MMC:
++                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    *pOCRValueRd = SPI_R3_GET_OCR(pReq->Response);
++                } else {
++                    *pOCRValueRd = SD_R3_GET_OCR(pReq->Response);
++                }
++                break;
++
++#endif
++            default:
++                DBG_ASSERT(FALSE);
++                break;
++        }
++    }
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  PollCardReady - poll card till it's ready
++  Input:  pHcd - HCD object
++          OCRValue - OCR value to poll with
++          PollType - polling type (based on card type)
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS PollCardReady(PSDHCD pHcd, UINT32 OCRValue, CARD_INFO_FLAGS PollType)
++{
++    INT             cardReadyRetry;
++    SDIO_STATUS     status;
++    PSDREQUEST      pReq;
++
++    if (!((PollType == CARD_SDIO) || (PollType == CARD_SD) || (PollType == CARD_MMC))) {
++        DBG_ASSERT(FALSE);
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    pReq = AllocateRequest();
++    if (NULL == pReq) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    status = SDIO_STATUS_SUCCESS;
++    cardReadyRetry = pBusContext->CardReadyPollingRetry;
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Polling card ready, Using OCR:0x%8.8X, Poll Type:0x%X\n",
++                            OCRValue,PollType));
++
++        /* now issue CMD with the actual OCR as an argument until the card is ready */
++    while (cardReadyRetry) {
++        if (IS_HCD_BUS_MODE_SPI(pHcd) && !(PollType == CARD_SDIO)) {
++
++#ifndef CT_CONFIG_NO_SDMMC
++            if (PollType == CARD_MMC) {
++                /* under SPI mode for MMC cards, we need to issue CMD1 and
++                 * check the response for the "in-idle" bit */
++                status = _IssueSimpleBusRequest(pHcd,
++                                                CMD1,
++                                                0,
++                                                SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++                                                pReq);
++            } else if (PollType == CARD_SD) {
++                 /* under SPI mode for SD cards, we need to issue ACMD41 and
++                 * check the response for the "in-idle" bit */
++                 status = _IssueSimpleBusRequest(pHcd,
++                                                 ACMD41,
++                                                 0,
++                                                 SDREQ_FLAGS_RESP_R1 |
++                                                 SDREQ_FLAGS_APP_CMD |
++                                                 SDREQ_FLAGS_RESP_SKIP_SPI_FILT,
++                                                 pReq);
++            } else {
++                DBG_ASSERT(FALSE);
++            }
++
++#endif
++        } else {
++                /* for SD/MMC in native mode and SDIO (all modes) we need to read the OCR register */
++                /* read the OCR using the supplied OCR value as an argument, we don't care about the
++                  * actual OCR read-back, but we are interested in the response */
++            status = ReadOCR(pHcd,PollType,pReq,OCRValue,NULL);
++        }
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to issue CMD to poll ready \n"));
++            break;
++        }
++        if (PollType == CARD_SDIO)  {
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                if (SPI_SDIO_R4_IS_CARD_READY(pReq->Response)) {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! (SPI) \n"));
++                    break;
++                }
++            } else {
++                if (SD_SDIO_R4_IS_CARD_READY(pReq->Response)) {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card Ready! \n"));
++                    break;
++                }
++            }
++        } else if ((PollType == CARD_SD) || (PollType == CARD_MMC)) {
++
++#ifndef CT_CONFIG_NO_SDMMC
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* check response when MMC or SD cards operate in SPI mode */
++                if (!(GET_SPI_R1_RESP_TOKEN(pReq->Response) & SPI_CS_STATE_IDLE)) {
++                        /* card is no longer in idle */
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC Card (SPI mode) is ready! \n"));
++                    break;
++                }
++            } else {
++                    /* check the OCR busy bit */
++                if (SD_R3_IS_CARD_READY(pReq->Response)) {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/MMC (Native Mode) Card Ready! \n"));
++                    break;
++                }
++            }
++
++#endif
++        } else {
++            DBG_ASSERT(FALSE);
++        }
++        cardReadyRetry--;
++            /* delay */
++        status = OSSleep(OCR_READY_CHECK_DELAY_MS);
++        if (!SDIO_SUCCESS(status)){
++            break;
++        }
++    }
++
++    if (0 == cardReadyRetry) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Card Ready timeout! \n"));
++        status = SDIO_STATUS_DEVICE_ERROR;
++    }
++
++    FreeRequest(pReq);
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  AdjustSlotPower - adjust slot power
++  Input:  pHcd - HCD object
++  Output: pOCRvalue - ocr value to use
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS AdjustSlotPower(PSDHCD pHcd, UINT32 *pOCRvalue)
++{
++    SDCONFIG_POWER_CTRL_DATA    pwrSetting;
++    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
++
++    ZERO_OBJECT(pwrSetting);
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO Bus Driver: Adjusting Slot Power, Requesting adjustment for OCR:0x%8.8X \n",
++         *pOCRvalue));
++
++    do {
++        pwrSetting.SlotPowerEnable = TRUE;
++            /* get optimal power setting */
++        pwrSetting.SlotPowerVoltageMask = GetPowerSetting(pHcd, pOCRvalue);
++        if (0 == pwrSetting.SlotPowerVoltageMask) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: No matching voltage for OCR \n"));
++            status = SDIO_STATUS_DEVICE_ERROR;
++            break;
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Pwr Mask 0x%X for OCR:0x%8.8X \n",
++                                pwrSetting.SlotPowerVoltageMask,*pOCRvalue));
++        status = _IssueConfig(pHcd,SDCONFIG_POWER_CTRL,&pwrSetting,sizeof(pwrSetting));
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
++            break;
++        }
++            /* delay for power to settle */
++        OSSleep(pBusContext->PowerSettleDelay);
++            /* save off for drivers */
++        pHcd->CardProperties.CardVoltage  = pwrSetting.SlotPowerVoltageMask;
++
++    } while (FALSE);
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ConvertEncodedTransSpeed - convert encoded TRANS_SPEED value to a clock rate
++  Input:  TransSpeedValue - encoded transfer speed value
++  Output:
++  Return: appropriate SD clock rate
++  Notes: This function returns a rate of 0, if it could not be determined.
++         This function can check tran speed values for SD,SDIO and MMC cards
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SD_BUSCLOCK_RATE ConvertEncodedTransSpeed(UINT8 TransSpeedValue)
++{
++    SD_BUSCLOCK_RATE transfMul = 0;
++    UINT8            timeVal = 0;
++
++    switch (TransSpeedValue & TRANSFER_UNIT_MULTIPIER_MASK) {
++        case 0:
++            transfMul = 10000;
++            break;
++        case 1:
++            transfMul = 100000;
++            break;
++        case 2:
++            transfMul = 1000000;
++            break;
++        case 3:
++            transfMul = 10000000;
++            break;
++        default:
++            transfMul = 0;
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card transfer multipler is wrong (val=0x%X)! \n",
++                                   TransSpeedValue));
++            break;
++    }
++
++    switch ((TransSpeedValue & TIME_VALUE_MASK) >> TIME_VALUE_SHIFT) {
++        case 1: timeVal = 10; break;
++        case 2: timeVal = 12; break;
++        case 3: timeVal = 13; break;
++        case 4: timeVal = 15; break;
++        case 5: timeVal = 20; break;
++        case 6: timeVal = 25; break;
++        case 7: timeVal = 30; break;
++        case 8: timeVal = 35; break;
++        case 9: timeVal = 40; break;
++        case 10: timeVal = 45; break;
++        case 11: timeVal = 50; break;
++        case 12: timeVal = 55; break;
++        case 13: timeVal = 60; break;
++        case 14: timeVal = 70; break;
++        case 15: timeVal = 80; break;
++        default: timeVal = 0;
++        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Card time value is wrong (val=0x%X)! \n",
++                               TransSpeedValue));
++        break;
++    }
++
++    if ((transfMul != 0) && (timeVal != 0)) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card Reported Max: %d Hz (0x%X) \n",
++                                (timeVal*transfMul), TransSpeedValue));
++        return timeVal*transfMul;
++    }
++
++    return 0;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SelectDeselectCard - Select or deselect a card
++  Input:  pHcd - HCD object
++          Select - select the card
++  Output:
++  Return: status
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS SelectDeselectCard(PSDHCD pHcd, BOOL Select)
++{
++    SDIO_STATUS status;
++
++    if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++            /* SPI mode cards do not support selection */
++        status = SDIO_STATUS_SUCCESS;
++    } else {
++        if (!Select) {
++                /* deselect, note that deselecting a card does not return a response */
++            status = _IssueSimpleBusRequest(pHcd,
++                                            CMD7,0,
++                                            SDREQ_FLAGS_NO_RESP,NULL);
++        } else {
++                /* select */
++            status = _IssueSimpleBusRequest(pHcd,
++                                            CMD7,(pHcd->CardProperties.RCA << 16),
++                                            SDREQ_FLAGS_RESP_R1B,NULL);
++        }
++    }
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to %s card, RCA:0x%X Err:%d \n",
++            (Select ? "Select":"Deselect"), pHcd->CardProperties.RCA, status));
++    }
++    return status;
++}
++
++/* reorder a buffer by swapping MSB with LSB */
++static void ReorderBuffer(UINT8 *pBuffer, INT Bytes)
++{
++    UINT8 *pEnd;
++    UINT8 temp;
++
++    DBG_ASSERT(!(Bytes & 1));
++        /* point to the end */
++    pEnd = &pBuffer[Bytes - 1];
++        /* divide in half */
++    Bytes = Bytes >> 1;
++
++    while (Bytes) {
++        temp = *pBuffer;
++            /* swap bytes */
++        *pBuffer = *pEnd;
++        *pEnd = temp;
++        pBuffer++;
++        pEnd--;
++        Bytes--;
++    }
++}
++
++#define ADJUST_OPER_CLOCK(pBusMode,Clock) \
++    (pBusMode)->ClockRate = min((SD_BUSCLOCK_RATE)(Clock),(pBusMode)->ClockRate)
++#define ADJUST_OPER_BLOCK_LEN(pCaps,Length) \
++    (pCaps)->OperBlockLenLimit = min((UINT16)(Length),(pCaps)->OperBlockLenLimit)
++#define ADJUST_OPER_BLOCK_COUNT(pCaps,Count) \
++    (pCaps)->OperBlockCountLimit = min((UINT16)(Count),(pCaps)->OperBlockCountLimit)
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetBusParameters - Get bus parameters for a card
++  Input:  pHcd - HCD object
++          pBusMode - current bus mode on entry
++  Output: pBusMode - new adjusted bus mode
++  Return: status
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static SDIO_STATUS GetBusParameters(PSDHCD pHcd, PSDCONFIG_BUS_MODE_DATA pBusMode)
++{
++    SDIO_STATUS                        status = SDIO_STATUS_SUCCESS;
++    UINT8                              temp;
++    UINT32                             tplAddr;
++    struct SDIO_FUNC_EXT_COMMON_TPL    func0ext;
++    UINT8                              scrRegister[SD_SCR_BYTES];
++    SD_BUSCLOCK_RATE                   cardReportedRate = 0;
++    PSDREQUEST                         pReq = NULL;
++    BOOL                               spiMode = FALSE;
++
++
++    if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
++        spiMode = TRUE;
++    }
++
++    if (!spiMode) {
++            /* set highest bus mode bus driver is allowing (non-SPI), the code below will
++               * adjust to lower or equal settings */
++        pBusMode->BusModeFlags = pBusContext->DefaultBusMode;
++    }
++        /* set operational parameters */
++    pBusMode->ClockRate = pBusContext->DefaultOperClock;
++    pHcd->CardProperties.OperBlockLenLimit = pBusContext->DefaultOperBlockLen;
++    pHcd->CardProperties.OperBlockCountLimit = pBusContext->DefaultOperBlockCount;
++
++        /* adjust operational block counts and length to match HCD */
++    ADJUST_OPER_BLOCK_LEN(&pHcd->CardProperties,pHcd->MaxBytesPerBlock);
++    ADJUST_OPER_BLOCK_COUNT(&pHcd->CardProperties,pHcd->MaxBlocksPerTrans);
++        /* limit operational clock to the max clock rate */
++    ADJUST_OPER_CLOCK(pBusMode,pHcd->MaxClockRate);
++
++    if (!spiMode) {
++            /* check HCD bus mode */
++        if (!(pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) ||
++            ((pHcd->CardProperties.Flags & CARD_SDIO) &&
++             (pHcd->Attributes & SDHCD_ATTRIB_NO_4BIT_IRQ)) ) {
++
++            if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
++                DBG_PRINT(SDDBG_WARN,
++                ("SDIO Card Detected, but host does not support IRQs in 4 bit mode - dropping to 1 bit. \n"));
++            }
++                /* force to 1 bit mode */
++            SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++        }
++    }
++
++        /* now do various card inquiries to drop the bus mode or clock
++         * none of these checks can raise the bus mode or clock higher that what
++         * was initialized above */
++    do {
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++                /* allocate a request for response data we'll need */
++            pReq = AllocateRequest();
++            if (NULL == pReq) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++        }
++
++        if (!spiMode && (pHcd->CardProperties.Flags & CARD_MMC)) {
++                /* MMC cards all run in 1 bit mode */
++            SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++        }
++
++        if (pHcd->CardProperties.Flags & CARD_SD) {
++            DBG_ASSERT(pReq != NULL);
++            DBG_PRINT(SDDBG_TRACE, ("Getting SCR from SD Card..\n"));
++                /* read SCR (requires data transfer) to get supported modes */
++            status = _IssueBusRequestBd(pHcd,ACMD51,0,
++                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_APP_CMD |
++                                        SDREQ_FLAGS_DATA_TRANS,
++                                        pReq,&scrRegister,SD_SCR_BYTES);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_WARN, ("SD card does not have SCR. \n"));
++                if (!spiMode) {
++                        /* switch it to 1 bit mode */
++                    SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++                }
++                status = SDIO_STATUS_SUCCESS;
++            } else {
++                    /* we have to reorder this buffer since the SCR is sent MSB first on the data
++                     * data bus */
++                ReorderBuffer(scrRegister,SD_SCR_BYTES);
++                    /* got the SCR */
++                DBG_PRINT(SDDBG_TRACE, ("SD SCR StructRev:0x%X, Flags:0x%X \n",
++                        GET_SD_SCR_STRUCT_VER(scrRegister),
++                        GET_SD_SCR_BUSWIDTHS_FLAGS(scrRegister)));
++                    /* set the revision */
++                switch (GET_SD_SCR_SDSPEC_VER(scrRegister)) {
++                    case SCR_SD_SPEC_1_00:
++                        DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.01 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_01;
++                        break;
++                    case SCR_SD_SPEC_1_10:
++                        DBG_PRINT(SDDBG_TRACE, ("SD Spec Revision 1.10 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
++                        break;
++                    default:
++                        DBG_PRINT(SDDBG_WARN, ("SD Spec Revision is greater than 1.10 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = SD_REVISION_1_10;
++                        break;
++                }
++
++                if (!(GET_SD_SCR_BUSWIDTHS(scrRegister) & SCR_BUS_SUPPORTS_4_BIT)) {
++                    if (!spiMode) {
++                        DBG_PRINT(SDDBG_WARN, ("SD SCR reports 1bit only Mode \n"));
++                            /* switch it to 1 bit mode */
++                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_1_BIT);
++                    }
++                }
++            }
++        }
++
++        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++            DBG_ASSERT(pReq != NULL);
++                /* de-select the card in order to get the CSD */
++            status = SelectDeselectCard(pHcd,FALSE);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CSD \n"));
++                break;
++            }
++                /* Get CSD for SD or MMC cards */
++            if (spiMode) {
++                    /* in SPI mode, getting the CSD requires a read data transfer */
++                status = _IssueBusRequestBd(pHcd,CMD9,0,
++                                            SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++                                            pReq,
++                                            pHcd->CardProperties.CardCSD,
++                                            MAX_CSD_CID_BYTES);
++                if (SDIO_SUCCESS(status)) {
++                        /* when the CSD is sent over in SPI data mode, it comes to us in MSB first
++                         * and thus is not ordered correctly as defined in the SD spec */
++                    ReorderBuffer(pHcd->CardProperties.CardCSD,MAX_CSD_CID_BYTES);
++                }
++            } else {
++                status = _IssueSimpleBusRequest(pHcd,
++                                                CMD9,
++                                                (pHcd->CardProperties.RCA << 16),
++                                                SDREQ_FLAGS_RESP_R2,
++                                                pReq);
++                if (SDIO_SUCCESS(status)) {
++                        /* save the CSD */
++                    memcpy(pHcd->CardProperties.CardCSD,pReq->Response,MAX_CARD_RESPONSE_BYTES);
++                }
++            }
++
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CSD, Err:%d \n",
++                                        status));
++                break;
++            }
++                /* for MMC cards, the spec version is in the CSD */
++            if (pHcd->CardProperties.Flags & CARD_MMC) {
++                DBG_PRINT(SDDBG_TRACE, ("MMC Spec version : (0x%2.2X) \n",
++                            GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)));
++                switch (GET_MMC_SPEC_VERSION(pHcd->CardProperties.CardCSD)) {
++                    case MMC_SPEC_1_0_TO_1_2:
++                    case MMC_SPEC_1_4:
++                    case MMC_SPEC_2_0_TO_2_2:
++                        DBG_PRINT(SDDBG_WARN, ("MMC Spec version less than 3.1 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_1_0_2_2;
++                        break;
++                    case MMC_SPEC_3_1:
++                        DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 3.1 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
++                        break;
++                    case MMC_SPEC_4_0_TO_4_1:
++                        DBG_PRINT(SDDBG_TRACE, ("MMC Spec version 4.0-4.1 \n"));
++                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_4_0;
++                        break;
++                    default:
++                        pHcd->CardProperties.SD_MMC_Revision = MMC_REVISION_3_1;
++                        DBG_PRINT(SDDBG_WARN, ("MMC Spec version greater than 4.1\n"));
++                        break;
++                }
++            }
++                /* re-select the card  */
++            status = SelectDeselectCard(pHcd,TRUE);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CSD \n"));
++                break;
++            }
++        }
++#endif // CT_CONFIG_NO_SDMMC
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++        if ((pHcd->CardProperties.Flags & CARD_SD) &&
++            !(pHcd->CardProperties.Flags & CARD_SDIO) &&
++             SDDEVICE_IS_SD_REV_GTEQ_1_10(pHcd->pPseudoDev) &&
++             (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
++             !spiMode)  {
++            UINT32 arg;
++            PUINT8 pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++            if (NULL == pSwitchStatusBlock) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++
++            arg = SD_SWITCH_FUNC_ARG_GROUP_CHECK(SD_SWITCH_HIGH_SPEED_GROUP,
++                                                 SD_SWITCH_HIGH_SPEED_FUNC_NO);
++
++                /* for 1.10 SD cards, check if high speed mode is supported */
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Checking SD Card for switchable functions (CMD6 arg:0x%X)\n",arg));
++
++                /* issue simple data transfer request to read the switch status */
++            status = _IssueBusRequestBd(pHcd,
++                                        CMD6,
++                                        arg,
++                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++                                        pReq,
++                                        pSwitchStatusBlock,
++                                        SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++            if (SDIO_SUCCESS(status)) {
++                UINT16 switchGroupMask;
++                    /* need to reorder this since cards send this MSB first */
++                ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++                switchGroupMask = SD_SWITCH_FUNC_STATUS_GET_GRP_BIT_MASK(pSwitchStatusBlock,SD_SWITCH_HIGH_SPEED_GROUP);
++                DBG_PRINT(SDDBG_TRACE, ("SD Card Switch Status Group1 Mask:0x%X Max Current:%d\n",
++                        switchGroupMask, SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) ));
++                if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SD Switch Status block has zero max current \n"));
++                    SDLIB_PrintBuffer(pSwitchStatusBlock,
++                                      SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
++                                      "SDIO Bus Driver: SD Switch Status Block Error");
++                } else {
++                        /* check HS support */
++                    if (switchGroupMask & (1 << SD_SWITCH_HIGH_SPEED_FUNC_NO)) {
++                        DBG_PRINT(SDDBG_TRACE, ("SD Card Supports High Speed Mode\n"));
++                            /* set the rate, this will override the CSD value */
++                        cardReportedRate = SD_HS_MAX_BUS_CLOCK;
++                        pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
++                    }
++                }
++            } else {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get SD Switch Status block (%d)\n", status));
++                    /* just fall through, we'll handle this like a normal SD card */
++                status = SDIO_STATUS_SUCCESS;
++            }
++
++            KernelFree(pSwitchStatusBlock);
++        }
++
++
++#endif // CT_CONFIG_NO_SDMMC
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++
++
++        if ((pHcd->CardProperties.Flags & CARD_MMC) &&
++             SDDEVICE_IS_MMC_REV_GTEQ_4_0(pHcd->pPseudoDev) &&
++             (pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED) &&
++             !spiMode)  {
++                /* for MMC cards, get the Extended CSD to get the High speed and
++                 * wide bus paramaters */
++
++            PUINT8 pExtData = KernelAlloc(MMC_EXT_CSD_SIZE);
++
++            if (NULL == pExtData) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++                /* issue simple data transfer request to read the extended CSD */
++            status = _IssueBusRequestBd(pHcd,MMC_CMD8,0,
++                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++                                        pReq,
++                                        pExtData,
++                                        MMC_EXT_CSD_SIZE);
++            if (SDIO_SUCCESS(status)) {
++                 DBG_PRINT(SDDBG_TRACE, ("MMC Ext CSD Version: 0x%X Card Type: 0x%X\n",
++                        pExtData[MMC_EXT_VER_OFFSET],pExtData[MMC_EXT_CARD_TYPE_OFFSET]));
++                    /* check HS support */
++                if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_52) {
++                        /* try 52 Mhz */
++                    cardReportedRate = 52000000;
++                    pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
++                } else if (pExtData[MMC_EXT_CARD_TYPE_OFFSET] & MMC_EXT_CARD_TYPE_HS_26) {
++                        /* try 26MHZ */
++                    cardReportedRate = 26000000;
++                    pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_MMC_HS;
++                } else {
++                        /* doesn't report high speed capable */
++                    cardReportedRate = 0;
++                }
++
++                if (cardReportedRate && !spiMode) {
++                        /* figure out the bus mode */
++                    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_MMC8BIT) {
++                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_MMC8_BIT);
++                    } else if (pHcd->Attributes & SDHCD_ATTRIB_BUS_4BIT) {
++                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags, SDCONFIG_BUS_WIDTH_4_BIT);
++                    } else {
++                        /* we leave it to default to 1 bit mode */
++                    }
++                }
++            } else {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get MMC Extended CSD \n"));
++                    /* just fall through, we'll do without the extended information
++                     * and run it like a legacy MMC card */
++                status = SDIO_STATUS_SUCCESS;
++            }
++
++            KernelFree(pExtData);
++        }
++
++#endif // CT_CONFIG_NO_SDMMC
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++
++
++        if (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC)) {
++
++            if (0 == cardReportedRate) {
++                    /* extract rate from CSD only if it was not set by earlier tests */
++                cardReportedRate = ConvertEncodedTransSpeed(
++                                GET_SD_CSD_TRANS_SPEED(pHcd->CardProperties.CardCSD));
++                    /* fall through and test for zero again */
++            }
++
++            if (cardReportedRate != 0) {
++                     /* adjust clock based on what the card can handle */
++                ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
++            } else {
++#ifdef DEBUG
++                    /* something is wrong with the CSD */
++                if (DBG_GET_DEBUG_LEVEL() >= SDDBG_TRACE) {
++                    SDLIB_PrintBuffer(pHcd->CardProperties.CardCSD,
++                                      MAX_CARD_RESPONSE_BYTES,
++                                      "SDIO Bus Driver: CSD Dump");
++                }
++#endif
++                    /* can't figure out the card rate, so set reasonable defaults */
++                if (pHcd->CardProperties.Flags & CARD_SD) {
++                    ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
++                } else {
++                    ADJUST_OPER_CLOCK(pBusMode,MMC_MAX_BUS_CLOCK);
++                }
++            }
++        }
++
++
++#endif // CT_CONFIG_NO_SDMMC
++
++
++            /* note, we do SDIO card "after" SD in case this is a combo card */
++        if (pHcd->CardProperties.Flags & CARD_SDIO) {
++                /* read card capabilities */
++            status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
++                                         SDIO_CARD_CAPS_REG,
++                                         &pHcd->CardProperties.SDIOCaps);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Card Caps: 0x%X \n",pHcd->CardProperties.SDIOCaps));
++            if (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_LOW_SPEED) {
++                    /* adjust max clock for LS device */
++                ADJUST_OPER_CLOCK(pBusMode,SDIO_LOW_SPEED_MAX_BUS_CLOCK);
++                    /* adjust bus if LS device does not support 4 bit mode */
++                if (!(pHcd->CardProperties.SDIOCaps & SDIO_CAPS_4BIT_LS)) {
++                    if (!spiMode) {
++                            /* low speed device does not support 4 bit mode, force us to 1 bit */
++                        SDCONFIG_SET_BUS_WIDTH(pBusMode->BusModeFlags,
++                                               SDCONFIG_BUS_WIDTH_1_BIT);
++                    }
++                }
++            }
++
++                /* check if 1.2 card supports high speed mode, checking HCD as well*/
++            if (SDDEVICE_IS_SDIO_REV_GTEQ_1_20(pHcd->pPseudoDev) &&
++                (pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED) &&
++                !spiMode) {
++                UCHAR hsControl = 0;
++
++                status = Cmd52ReadByteCommon(pHcd->pPseudoDev,
++                                             SDIO_HS_CONTROL_REG,
++                                             &hsControl);
++
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_TRACE,
++                        ("SDIO Failed to read high speed control (%d) \n",status));
++                        /* reset status and continue */
++                    status = SDIO_STATUS_SUCCESS;
++                } else {
++                    if (hsControl & SDIO_HS_CONTROL_SHS) {
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO Card Supports High Speed Mode\n"));
++                        pBusMode->BusModeFlags |= SDCONFIG_BUS_MODE_SD_HS;
++                    }
++                }
++
++            }
++
++            cardReportedRate = 0;
++            temp = sizeof(func0ext);
++            tplAddr = pHcd->CardProperties.CommonCISPtr;
++                /* get the FUNCE tuple */
++            status = SDLIB_FindTuple(pHcd->pPseudoDev,
++                                     CISTPL_FUNCE,
++                                     &tplAddr,
++                                     (PUINT8)&func0ext,
++                                     &temp);
++            if (!SDIO_SUCCESS(status) || (temp < sizeof(func0ext))) {
++                DBG_PRINT(SDDBG_WARN, ("SDIO Function 0 Ext. Tuple Missing (Got size:%d) \n", temp));
++                    /* reset status */
++                status = SDIO_STATUS_SUCCESS;
++            } else {
++                    /* convert encoded value to rate */
++                cardReportedRate = ConvertEncodedTransSpeed(func0ext.MaxTransSpeed);
++            }
++
++            if (cardReportedRate != 0) {
++                if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
++                    if (cardReportedRate <= SD_MAX_BUS_CLOCK) {
++                        DBG_PRINT(SDDBG_WARN,
++                            ("SDIO Function tuple reports clock:%d Hz, with advertised High Speed support \n", cardReportedRate));
++                            /* back off high speed support */
++                        pBusMode->BusModeFlags &= ~SDCONFIG_BUS_MODE_SD_HS;
++                    }
++                } else {
++                    if (cardReportedRate > SD_MAX_BUS_CLOCK) {
++                        DBG_PRINT(SDDBG_WARN,
++                            ("SDIO Function tuple reports clock:%d Hz, without advertising High Speed support..using 25Mhz \n", cardReportedRate));
++                        cardReportedRate = SD_MAX_BUS_CLOCK;
++                    }
++                }
++                    /* adjust clock based on what the card can handle */
++                ADJUST_OPER_CLOCK(pBusMode,cardReportedRate);
++
++            } else {
++                    /* set a reasonable default */
++                ADJUST_OPER_CLOCK(pBusMode,SD_MAX_BUS_CLOCK);
++            }
++        }
++    } while (FALSE);
++
++    if (pReq != NULL) {
++        FreeRequest(pReq);
++    }
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetOperationalBusMode - set operational bus mode
++  Input:  pDevice - pDevice that is requesting the change
++          pBusMode - operational bus mode
++  Output: pBusMode - on return will have the actual clock rate set
++  Return: status
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SetOperationalBusMode(PSDDEVICE                pDevice,
++                                  PSDCONFIG_BUS_MODE_DATA  pBusMode)
++{
++    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
++    UCHAR           regData;
++    UINT32          arg;
++    UINT32          switcharg;
++    PSDHCD          pHcd = pDevice->pHcd;
++
++        /* synchronize access for updating bus mode settings */
++    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    do {
++
++        if (!IS_CARD_PRESENT(pHcd)) {
++                /* for an empty slot (a Pseudo dev was passed in) we still allow the
++                 * bus mode to be set for the card detect
++                 * polling */
++            status = _IssueConfig(pHcd,SDCONFIG_BUS_MODE_CTRL,pBusMode,sizeof(SDCONFIG_BUS_MODE_DATA));
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
++                                        status));
++            }
++                /* nothing more to do */
++            break;
++        }
++
++
++        if ((pBusMode->BusModeFlags == SDDEVICE_GET_BUSMODE_FLAGS(pDevice)) &&
++            (pBusMode->ClockRate == SDDEVICE_GET_OPER_CLOCK(pDevice))) {
++            DBG_PRINT(SDDBG_TRACE,
++               ("SDIO Bus Driver: Bus mode already set, nothing to do\n"));
++            pBusMode->ActualClockRate = SDDEVICE_GET_OPER_CLOCK(pDevice);
++            break;
++        }
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++        if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) {
++            if (!(pHcd->Attributes & SDHCD_ATTRIB_MMC_HIGH_SPEED)) {
++                status = SDIO_STATUS_INVALID_PARAMETER;
++                DBG_PRINT(SDDBG_ERROR,
++                        ("SDIO Bus Driver: HCD does not support MMC High Speed\n"));
++                break;
++            }
++        }
++#endif
++
++
++        if (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) {
++            if (!(pHcd->Attributes & SDHCD_ATTRIB_SD_HIGH_SPEED)) {
++                status = SDIO_STATUS_INVALID_PARAMETER;
++                DBG_PRINT(SDDBG_ERROR,
++                        ("SDIO Bus Driver: HCD does not support SD High Speed\n"));
++                break;
++            }
++        }
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++            /* before we set the operational clock and mode, configure the clock for high
++             * speed mode on the card , if necessary */
++        if ((pHcd->CardProperties.Flags & CARD_MMC) &&
++            (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_MMC_HS) &&
++            !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_MMC_HS)) {
++
++            switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
++                                             MMC_SWITCH_WRITE_BYTE,
++                                             MMC_EXT_HS_TIMING_OFFSET,
++                                             MMC_EXT_HS_TIMING_ENABLE);
++            status = _IssueSimpleBusRequest(pHcd,
++                                            MMC_CMD_SWITCH,
++                                            switcharg,
++                                            SDREQ_FLAGS_RESP_R1B,
++                                            NULL);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR,
++                 ("SDIO Bus Driver: Failed to switch MMC High Speed Mode (arg:0x%X): %d \n",
++                                        switcharg, status));
++                break;
++            }
++
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: High Speed MMC enabled (arg:0x%X)\n",
++                switcharg));
++        }
++#endif
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++
++
++            /* before setting bus mode and clock in the HCD, switch card to high speed mode
++             * if necessary */
++        if ((pHcd->CardProperties.Flags & CARD_SD) &&
++            (pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++            !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++            UINT32     arg;
++            PUINT8     pSwitchStatusBlock;
++
++            pSwitchStatusBlock = KernelAlloc(SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++            if (NULL == pSwitchStatusBlock) {
++                status = SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++
++                /* set high speed group */
++            arg = SD_SWITCH_FUNC_ARG_GROUP_SET(SD_SWITCH_HIGH_SPEED_GROUP,
++                                               SD_SWITCH_HIGH_SPEED_FUNC_NO);
++
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Setting SD Card for High Speed mode (CMD6 arg:0x%X)\n",arg));
++
++                /* issue simple data transfer request to switch modes */
++            status = _IssueBusRequestBd(pHcd,
++                                        CMD6,
++                                        arg,
++                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++                                        NULL,
++                                        pSwitchStatusBlock,
++                                        SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++
++            if (SDIO_SUCCESS(status)) {
++                ReorderBuffer(pSwitchStatusBlock,SD_SWITCH_FUNC_STATUS_BLOCK_BYTES);
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Result, Got Max Current:%d mA, SwitchResult:0x%X \n",
++                      SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock),
++                      SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP)));
++                if (SD_SWITCH_FUNC_STATUS_GET_MAX_CURRENT(pSwitchStatusBlock) == 0) {
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Error in Status Block after High Speed Switch (current==0) \n"));
++                    status = SDIO_STATUS_DEVICE_ERROR;
++                }
++                if (SDSwitchGetSwitchResult(pSwitchStatusBlock, SD_SWITCH_HIGH_SPEED_GROUP) !=
++                    SD_SWITCH_HIGH_SPEED_FUNC_NO) {
++                    DBG_PRINT(SDDBG_ERROR,
++                        ("SDIO Bus Driver: Error in Status Block after High Speed Switch (Group1 did not switch) \n"));
++                    status = SDIO_STATUS_DEVICE_ERROR;
++                }
++                if (SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD High Speed Mode Enabled \n"));
++                } else {
++                    SDLIB_PrintBuffer(pSwitchStatusBlock,
++                                      SD_SWITCH_FUNC_STATUS_BLOCK_BYTES,
++                                       "SDIO Bus Driver: SD Switch Status Block Error");
++                }
++            } else {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to Set SD High Speed Mode (%d) \n",status));
++            }
++            KernelFree(pSwitchStatusBlock);
++
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++
++#endif
++
++
++            /* enable/disable high speed mode for SDIO card */
++        if (pHcd->CardProperties.Flags & CARD_SDIO) {
++            BOOL doSet = TRUE;
++
++            if ((pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++                !(SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++                    /* enable */
++                regData = SDIO_HS_CONTROL_EHS;
++            } else if (!(pBusMode->BusModeFlags & SDCONFIG_BUS_MODE_SD_HS) &&
++                       (SDDEVICE_GET_BUSMODE_FLAGS(pDevice) & SDCONFIG_BUS_MODE_SD_HS)) {
++                    /* disable */
++                regData = 0;
++            } else {
++                    /* do nothing */
++                doSet = FALSE;
++            }
++
++            if (doSet) {
++                status = Cmd52WriteByteCommon(pDevice,
++                                              SDIO_HS_CONTROL_REG,
++                                              &regData);
++
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to %s HS mode in SDIO card : Err:%d\n",
++                                            (SDIO_HS_CONTROL_EHS == regData) ? "enable":"disable" , status));
++                    break;
++                } else {
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver:SDIO Card %s for High Speed mode \n",
++                                    (SDIO_HS_CONTROL_EHS == regData) ? "enabled":"disabled" ));
++                }
++            }
++        }
++
++            /* use synchronize-with-bus request version, this may have been requested by a
++             * function driver */
++        status = SDLIB_IssueConfig(pDevice,
++                                   SDCONFIG_BUS_MODE_CTRL,
++                                   pBusMode,
++                                   sizeof(SDCONFIG_BUS_MODE_DATA));
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in hcd : Err:%d \n",
++                                    status));
++            break;
++        }
++
++             /* check requested bus width against the current mode */
++        if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) ==
++                SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Bus mode set, no width change\n"));
++            break;
++        }
++
++        if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_SPI) {
++                /* nothing more to do for SPI */
++            break;
++        }
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++            /* set the bus width for SD and combo cards */
++        if (pHcd->CardProperties.Flags & CARD_SD) {
++            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++                    /* turn off card detect resistor */
++                status = _IssueSimpleBusRequest(pHcd,
++                                                ACMD42,
++                                                0, /* disable CD */
++                                                SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
++                                                NULL);
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to disable CD Res: %d \n",
++                                           status)); /* this should be okay */
++                }
++                arg = SD_ACMD6_BUS_WIDTH_4_BIT;
++            } else {
++                    /* don't need to turn off CD in 1 bit mode, just set mode */
++                arg = SD_ACMD6_BUS_WIDTH_1_BIT;
++
++            }
++                /* set the bus width */
++            status = _IssueSimpleBusRequest(pHcd,
++                                            ACMD6,
++                                            arg, /* set bus mode */
++                                            SDREQ_FLAGS_APP_CMD | SDREQ_FLAGS_RESP_R1,
++                                            NULL);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus width: %d \n",
++                                        status));
++                break;
++            }
++        }
++
++#endif
++
++
++            /* set bus width for SDIO cards */
++        if (pHcd->CardProperties.Flags & CARD_SDIO) {
++                /* default */
++            regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_1_BIT;
++
++            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++                    /* turn off card detect resistor and set buswidth */
++                regData = CARD_DETECT_DISABLE | SDIO_BUS_WIDTH_4_BIT;
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 4 bit mode on card \n"));
++            } else {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Enabling 1 bit mode on card \n"));
++            }
++            status = Cmd52WriteByteCommon(pDevice,
++                                          SDIO_BUS_IF_REG,
++                                          &regData);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode in Card : Err:%d\n",
++                                        status));
++                break;
++            }
++
++                /* check for 4-bit interrupt detect mode */
++            if ((SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) &&
++                (pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
++                (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
++                    /* enable interrupts between blocks, this doesn't actually turn on interrupts
++                     * it merely allows interrupts to be asserted in the inter-block gap */
++                pHcd->CardProperties.SDIOCaps |= SDIO_CAPS_ENB_INT_MULTI_BLK;
++
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4-Bit Multi-blk Interrupt support enabled\n"));
++            } else {
++                    /* make sure this is disabled */
++                pHcd->CardProperties.SDIOCaps &= ~SDIO_CAPS_ENB_INT_MULTI_BLK;
++            }
++
++            status = Cmd52WriteByteCommon(pDevice,
++                                          SDIO_CARD_CAPS_REG,
++                                          &pHcd->CardProperties.SDIOCaps);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to update Card Caps register Err:%d\n",
++                                        status));
++                break;
++            }
++        }
++
++            /* set data bus width for MMC */
++        if (pHcd->CardProperties.Flags & CARD_MMC) {
++            UINT8  buswidth = 0;
++
++            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++                buswidth = MMC_EXT_BUS_WIDTH_4_BIT;
++            } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
++                buswidth = MMC_EXT_BUS_WIDTH_8_BIT;
++            } else {
++                /* normal 1 bit mode .. nothing to do */
++                break;
++            }
++                /* now set the bus mode on the card */
++            switcharg = MMC_SWITCH_BUILD_ARG(MMC_SWITCH_CMD_SET0,
++                                             MMC_SWITCH_WRITE_BYTE,
++                                             MMC_EXT_BUS_WIDTH_OFFSET,
++                                             buswidth);
++
++            status = _IssueSimpleBusRequest(pHcd,
++                                            MMC_CMD_SWITCH,
++                                            switcharg,
++                                            SDREQ_FLAGS_RESP_R1B,
++                                            NULL);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set MMC bus width (arg:0x%X): %d \n",
++                                        switcharg, status));
++                break;
++            }
++
++            if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_4_BIT) {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 4 bit MMC mode enabled (arg:0x%X) \n",
++                      switcharg));
++            } else if (SDCONFIG_GET_BUSWIDTH(pBusMode->BusModeFlags) == SDCONFIG_BUS_WIDTH_MMC8_BIT) {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: 8-Bit MMC mode enabled (arg:0x%X) \n",
++                      switcharg));
++            }
++        }
++
++    } while (FALSE);
++
++    if (SDIO_SUCCESS(status)) {
++            /* set the operating mode */
++        pHcd->CardProperties.BusMode = pBusMode->BusModeFlags;
++            /* set the actual clock rate */
++        pHcd->CardProperties.OperBusClock = pBusMode->ActualClockRate;
++    }
++
++    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  CardInitSetup - setup host for card initialization
++  Input:  pHcd - HCD object
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS CardInitSetup(PSDHCD pHcd)
++{
++    SDCONFIG_INIT_CLOCKS_DATA   initClocks;
++    SDCONFIG_BUS_MODE_DATA      busMode;
++    UINT32                      OCRvalue;
++    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
++
++    ZERO_OBJECT(initClocks);
++    ZERO_OBJECT(busMode);
++        /* setup defaults */
++    initClocks.NumberOfClocks = SDMMC_MIN_INIT_CLOCKS;
++    busMode.ClockRate = SD_INIT_BUS_CLOCK;
++
++        /* check for SPI only */
++    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_SPI) {
++            /* SPI cards startup in non-CRC mode with the exception of CMD0, the
++             * HCDs must issue CMD0 with the correct CRC , the spec shows that a
++             * CMD 0 sequence is 0x40,0x00,0x00,0x00,0x00,0x95 */
++        busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_SPI | SDCONFIG_BUS_MODE_SPI_NO_CRC;
++    }
++        /* check if host supports 1 bit mode */
++        /* TODO : if host supports power switching, we can
++         * could initialize cards in SPI mode first */
++    if (pHcd->Attributes & SDHCD_ATTRIB_BUS_1BIT) {
++        busMode.BusModeFlags = SDCONFIG_BUS_WIDTH_1_BIT;
++    }
++
++        /* set initial VDD, starting at the highest allowable voltage and working
++         * our way down */
++    if (pHcd->SlotVoltageCaps & SLOT_POWER_3_3V) {
++        OCRvalue = SD_OCR_3_2_TO_3_3_VDD;
++    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_3_0V) {
++        OCRvalue = SD_OCR_2_9_TO_3_0_VDD;
++    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_8V) {
++        OCRvalue = SD_OCR_2_7_TO_2_8_VDD;
++    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_2_0V) {
++        OCRvalue = SD_OCR_1_9_TO_2_0_VDD;
++    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_8V) {
++        OCRvalue = SD_OCR_1_7_TO_1_8_VDD;
++    } else if (pHcd->SlotVoltageCaps & SLOT_POWER_1_6V) {
++        OCRvalue = SD_OCR_1_6_TO_1_7_VDD;
++    } else {
++        DBG_ASSERT(FALSE);
++        OCRvalue = 0;
++    }
++
++    do {
++            /* power up the card */
++        status = AdjustSlotPower(pHcd, &OCRvalue);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust slot power \n"));
++            break;
++        }
++        status = SetOperationalBusMode(pHcd->pPseudoDev,&busMode);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set bus mode \n"));
++            break;
++        }
++        status = _IssueConfig(pHcd,SDCONFIG_SEND_INIT_CLOCKS,&initClocks,sizeof(initClocks));
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to send init clocks in hcd \n"));
++            break;
++        }
++
++    } while(FALSE);
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDInitializeCard - initialize card
++  Input:  pHcd - HCD object
++  Output: pProperties - card properties
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDInitializeCard(PSDHCD pHcd)
++{
++    SDCONFIG_BUS_MODE_DATA      busMode;
++    SDIO_STATUS                 status = SDIO_STATUS_SUCCESS;
++    PSDREQUEST                  pReq = NULL;
++    UINT32                      OCRvalue;
++    UINT32                      tplAddr;
++    UINT8                       temp;
++    struct SDIO_MANFID_TPL      manfid;
++    SDCONFIG_WP_VALUE           wpValue;
++    UINT8                       cisBuffer[3];
++
++    OCRvalue = 0;
++
++    do {
++        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in SPI mode \n"));
++        } else {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Initializing card in MMC/SD mode \n"));
++        }
++
++        pReq = AllocateRequest();
++        if (NULL == pReq) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to allocate bus request \n"));
++            break;
++        }
++        memset(pReq, 0, sizeof(SDREQUEST));
++
++        status = CardInitSetup(pHcd);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to setup card \n"));
++            break;
++        }
++
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++        status = _IssueConfig(pHcd,SDCONFIG_GET_WP,&wpValue,sizeof(wpValue));
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: host doesn't support Write Protect \n"));
++        } else {
++            if (wpValue) {
++                pHcd->CardProperties.Flags |= CARD_SD_WP;
++                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: SD WP switch is on \n"));
++            }
++        }
++
++#endif
++
++        if (!(pHcd->Attributes & SDHCD_ATTRIB_SLOT_POLLING) &&
++            IS_HCD_BUS_MODE_SPI(pHcd)) {
++                /* for non-slot polling HCDs operating in SPI mode
++                 * issue CMD0 to reset card state and to place the card
++                 * in SPI mode.  If slot polling is used, the polling thread
++                 * will have already issued a CMD0 to place the card in SPI mode*/
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                INT ii = 256;
++                status = SDIO_STATUS_ERROR;
++                /* if the CMD0 fails, retry it. Some cards have a hard time getting into SPI mode.*/
++                while ((!SDIO_SUCCESS(status)) && (ii-- >= 0)) {
++                    status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++                    OSSleep(20);
++                }
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: cmd0 go SPI retries:(256) %d\n", ii));
++
++            } else {
++                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++            }
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++                break;
++            }
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SDIO.. \n"));
++            /* check for SDIO card by trying to read it's OCR */
++        status = ReadOCR(pHcd,CARD_SDIO,pReq,0,&OCRvalue);
++        if (SDIO_SUCCESS(status)) {
++                /* we got a response, this is an SDIO card */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* handle SPI */
++                pHcd->CardProperties.IOFnCount = SPI_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
++                if (SPI_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
++                        /* flag an SD function exists */
++                    pHcd->CardProperties.Flags |= CARD_SD;
++                }
++            } else {
++                    /* handle native SD */
++                pHcd->CardProperties.IOFnCount = SD_SDIO_R4_GET_IO_FUNC_COUNT(pReq->Response);
++                if (SD_SDIO_R4_IS_MEMORY_PRESENT(pReq->Response)) {
++                        /* flag an SD function exists */
++                    pHcd->CardProperties.Flags |= CARD_SD;
++                }
++
++            }
++            if (0 == pHcd->CardProperties.IOFnCount) {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Card reports no functions \n"));
++                status = SDIO_STATUS_DEVICE_ERROR;
++                pHcd->CardProperties.Flags = 0;
++                break;
++            }
++            pHcd->CardProperties.Flags |= CARD_SDIO;
++
++            DBG_PRINT(SDDBG_TRACE,
++                ("SDIO Bus Driver: SDIO Card, Functions: %d Card Info Flags:0x%X OCR:0x%8.8X\n",
++                      pHcd->CardProperties.IOFnCount, pHcd->CardProperties.Flags, OCRvalue));
++                /* adjust slot power for this SDIO card */
++            status = AdjustSlotPower(pHcd, &OCRvalue);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set power in hcd \n"));
++                break;
++            }
++                /* poll for SDIO card ready */
++            status = PollCardReady(pHcd,OCRvalue,CARD_SDIO);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
++                /* major error in hcd, bail */
++            break;
++        }
++
++            /* check if this is an SDIO-only card before continuing  */
++        if (!(pHcd->CardProperties.Flags & CARD_SD) && (pHcd->CardProperties.Flags & CARD_SDIO)) {
++                /* this is an SDIO card with no memory function */
++            goto prepareCard;
++        }
++#ifdef CT_CONFIG_NO_SDMMC
++
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: SDIO card not detected and SD/MMC cards not supported \n"));
++        status = SDIO_STATUS_ERROR;
++        break;
++
++#else
++        if (!(pHcd->CardProperties.Flags & CARD_SDIO)) {
++                /* issue go idle only if we did not find an SDIO function in our earlier test */
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++            } else {
++                status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++            }
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++                break;
++            }
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for SD Memory.. \n"));
++            /* SD Memory Card checking */
++            /* test for present of SD card (stand-alone or combo card) */
++        status = TestPresence(pHcd, CARD_SD, pReq);
++        if (SDIO_SUCCESS(status)) {
++                /* there is an SD Card present, could be part of a combo system */
++            pHcd->CardProperties.Flags |= CARD_SD;
++            if (0 == OCRvalue) {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory card detected. \n"));
++                    /* no OCR value on entry this is a stand-alone card, go and get it*/
++                status = ReadOCR(pHcd,CARD_SD,pReq,0,&OCRvalue);
++                if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get OCR (status:%d) \n",
++                                            status));
++                    break;
++                }
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Card Reports OCR:0x%8.8X \n", OCRvalue));
++                status = AdjustSlotPower(pHcd, &OCRvalue);
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
++                    break;
++                }
++            } else {
++                 DBG_ASSERT((pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
++                 DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SDIO Combo Card detected \n"));
++            }
++                /* poll for SD card ready */
++            status = PollCardReady(pHcd,OCRvalue,CARD_SD);
++            if (!SDIO_SUCCESS(status)) {
++                    /* check if this card has an SDIO function */
++                if (pHcd->CardProperties.Flags & CARD_SDIO) {
++                    DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Combo Detected but SD memory function failed \n"));
++                        /* allow SDIO functions to load normally */
++                    status = SDIO_STATUS_SUCCESS;
++                        /* remove SD flag */
++                    pHcd->CardProperties.Flags &= ~CARD_SD;
++                } else {
++                    break;
++                }
++            } else {
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD Memory ready. \n"));
++            }
++                /* we're done, no need to check for MMC */
++            goto prepareCard;
++        } else if (status != SDIO_STATUS_BUS_RESP_TIMEOUT){
++                /* major error in hcd, bail */
++            break;
++        }
++
++        /* MMC card checking */
++        /* if we get here, these better not be set */
++        DBG_ASSERT(!(pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)));
++           /* issue go idle */
++        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++            status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_RESP_R1,pReq);
++        } else {
++            status = _IssueSimpleBusRequest(pHcd,CMD0,0,SDREQ_FLAGS_NO_RESP,pReq);
++        }
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: go-idle failed! \n"));
++            break;
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Looking for MMC.. \n"));
++        status = TestPresence(pHcd, CARD_MMC, pReq);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: unknown card detected \n"));
++            break;
++        }
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Detected \n"));
++        pHcd->CardProperties.Flags |= CARD_MMC;
++            /* read the OCR value */
++        status = ReadOCR(pHcd,CARD_MMC,pReq,0,&OCRvalue);
++        if (!SDIO_SUCCESS(status) || (OCRvalue == 0)) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Failed to get OCR (status:%d)",
++                                    status));
++            break;
++        }
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: MMC Card Reports OCR:0x%8.8X \n", OCRvalue));
++            /* adjust power */
++        status = AdjustSlotPower(pHcd, &OCRvalue);
++        if (!SDIO_SUCCESS(status)) {
++             DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to adjust power \n"));
++             break;
++        }
++            /* poll for MMC card ready */
++        status = PollCardReady(pHcd,OCRvalue,CARD_MMC);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++            /* fall through and prepare MMC card */
++
++#endif // CT_CONFIG_NO_SDMMC
++
++
++prepareCard:
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++            /* we're done figuring out what was inserted, and setting up
++             * optimal slot voltage, now we need to prepare the card */
++        if (!IS_HCD_BUS_MODE_SPI(pHcd) &&
++            (pHcd->CardProperties.Flags & (CARD_SD | CARD_MMC))) {
++                /* non-SPI SD or MMC cards need to be moved to the "ident" state before we can get the
++                 * RCA or select the card using the new RCA */
++            status = _IssueSimpleBusRequest(pHcd,CMD2,0,SDREQ_FLAGS_RESP_R2,pReq);
++            if (!SDIO_SUCCESS(status)){
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to move SD/MMC card into ident state \n"));
++                break;
++            }
++        }
++#endif
++
++        if (!IS_HCD_BUS_MODE_SPI(pHcd)) {
++                /* non-SPI mode cards need their RCA's setup */
++            if (pHcd->CardProperties.Flags & (CARD_SD | CARD_SDIO)) {
++                    /* issue CMD3 to get RCA on SD/SDIO cards */
++                status = _IssueSimpleBusRequest(pHcd,CMD3,0,SDREQ_FLAGS_RESP_R6,pReq);
++                if (!SDIO_SUCCESS(status)){
++                    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to get RCA for SD/SDIO card \n"));
++                    break;
++                }
++                pHcd->CardProperties.RCA = SD_R6_GET_RCA(pReq->Response);
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: SD/SDIO RCA:0x%X \n",
++                                        pHcd->CardProperties.RCA));
++            } else if (pHcd->CardProperties.Flags & CARD_MMC) {
++
++#ifndef CT_CONFIG_NO_SDMMC
++                    /* for MMC cards, we have to assign a relative card address */
++                    /* just a non-zero number */
++                pHcd->CardProperties.RCA = 1;
++                    /* issue CMD3 to set the RCA for MMC cards */
++                status = _IssueSimpleBusRequest(pHcd,
++                                                CMD3,(pHcd->CardProperties.RCA << 16),
++                                                SDREQ_FLAGS_RESP_R1,pReq);
++                if (!SDIO_SUCCESS(status)){
++                    DBG_PRINT(SDDBG_ERROR,
++                            ("SDIO Bus Driver: failed to set RCA for MMC card! (err=%d) \n",status));
++                    break;
++                }
++
++#endif
++            } else {
++                DBG_ASSERT(FALSE);
++            }
++        }
++            /* select the card in order to get the rest of the card info, applies
++             * to SDIO/SD/MMC cards*/
++        status = SelectDeselectCard(pHcd, TRUE);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: failed to select card! \n"));
++            break;
++        }
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver, Card now Selected.. \n"));
++
++        if (pHcd->CardProperties.Flags & CARD_SDIO) {
++                /* read SDIO revision register */
++            status = Cmd52ReadByteCommon(pHcd->pPseudoDev, CCCR_SDIO_REVISION_REG, &temp);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Revision Reg: 0x%X \n", temp));
++            switch (temp & SDIO_REV_MASK) {
++                case SDIO_REV_1_00:
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.00 \n"));
++                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
++                    break;
++                case SDIO_REV_1_10:
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.10 \n"));
++                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_10;
++                    break;
++                case SDIO_REV_1_20:
++                    DBG_PRINT(SDDBG_TRACE, ("SDIO Spec Revision 1.20 \n"));
++                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_20;
++                    break;
++                default:
++                    DBG_PRINT(SDDBG_WARN, ("SDIO Warning: unknown SDIO revision, treating like 1.0 device \n"));
++                    pHcd->CardProperties.SDIORevision = SDIO_REVISION_1_00;
++                    break;
++            }
++                /* get the common CIS ptr */
++            status = Cmd52ReadMultipleCommon(pHcd->pPseudoDev,
++                                             SDIO_CMN_CIS_PTR_LOW_REG,
++                                             cisBuffer,
++                                             3);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get CIS ptr, Err:%d", status));
++                break;
++            }
++                /* this is endian-safe*/
++            pHcd->CardProperties.CommonCISPtr = ((UINT32)cisBuffer[0]) |
++                                                (((UINT32)cisBuffer[1]) << 8) |
++                                                (((UINT32)cisBuffer[2]) << 16);
++
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Card CIS Ptr: 0x%X \n", pHcd->CardProperties.CommonCISPtr));
++            temp = sizeof(manfid);
++            tplAddr = pHcd->CardProperties.CommonCISPtr;
++                /* get the MANFID tuple */
++            status = SDLIB_FindTuple(pHcd->pPseudoDev,
++                                     CISTPL_MANFID,
++                                     &tplAddr,
++                                     (PUINT8)&manfid,
++                                     &temp);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get MANFID tuple err:%d \n", status));
++                status = SDIO_STATUS_SUCCESS;
++            } else {
++                    /* save this off so that it can be copied into each SDIO Func's SDDEVICE structure */
++                pHcd->CardProperties.SDIO_ManufacturerCode =
++                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
++                pHcd->CardProperties.SDIO_ManufacturerID =
++                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
++                DBG_PRINT(SDDBG_TRACE, ("SDIO MANFID:0x%X, MANFINFO:0x%X \n",
++                                        pHcd->CardProperties.SDIO_ManufacturerID,
++                                        pHcd->CardProperties.SDIO_ManufacturerCode));
++            }
++
++            if (pHcd->CardProperties.SDIORevision >= SDIO_REVISION_1_10) {
++                    /* read power control */
++                status = Cmd52ReadByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
++                if (SDIO_SUCCESS(status)) {
++                        /* check for power control support which indicates the card may use more
++                         * than 200 mA */
++                    if (temp & SDIO_POWER_CONTROL_SMPC) {
++                            /* check that the host can support this. */
++                        if (pHcd->MaxSlotCurrent >= SDIO_EMPC_CURRENT_THRESHOLD) {
++                            temp = SDIO_POWER_CONTROL_EMPC;
++                                /* enable power control on the card */
++                            status = Cmd52WriteByteCommon(pHcd->pPseudoDev, SDIO_POWER_CONTROL_REG, &temp);
++                            if (!SDIO_SUCCESS(status)) {
++                                DBG_PRINT(SDDBG_ERROR,
++                                        ("SDIO Busdriver: failed to enable power control (%d) \n",status));
++                                break;
++                            }
++                                /* mark that the card is high power */
++                            pHcd->CardProperties.Flags |= CARD_HIPWR;
++
++                            DBG_PRINT(SDDBG_TRACE,
++                               ("SDIO Busdriver: Power Control Enabled on SDIO (1.10 or greater) card \n"));
++                        } else {
++                            DBG_PRINT(SDDBG_WARN,
++                               ("SDIO Busdriver: Card can operate higher than 200mA, host cannot (max:%d) \n",
++                               pHcd->MaxSlotCurrent));
++                            /* this is not fatal, the card should operate at a reduced rate */
++                        }
++                    } else {
++                        DBG_PRINT(SDDBG_TRACE,
++                            ("SDIO Busdriver: SDIO 1.10 (or greater) card draws less than 200mA \n"));
++                    }
++                } else {
++                    DBG_PRINT(SDDBG_WARN,
++                            ("SDIO Busdriver: failed to get POWER CONTROL REG (%d) \n",status));
++                    /* fall through and continue on at reduced mode */
++                }
++            }
++        }
++            /* get the current bus parameters */
++        busMode.BusModeFlags = pHcd->CardProperties.BusMode;
++        busMode.ClockRate =  pHcd->CardProperties.OperBusClock;
++            /* get the rest of the bus parameters like clock and supported bus width */
++        status = GetBusParameters(pHcd,&busMode);
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                /* check HCD if it wants to run without SPI CRC */
++            if (pHcd->Attributes & SDHCD_ATTRIB_NO_SPI_CRC) {
++                    /* hcd would rather not run with CRC we don't need to tell the card since SPI mode
++                     * cards power up with CRC initially disabled */
++                busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
++            } else {
++                    /* first enable SPI CRC checking if the HCD can handle it */
++                status = SDSPIModeEnableDisableCRC(pHcd->pPseudoDev, TRUE);
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_ERROR,
++                                ("SDIO Bus Driver: Failed to set Enable SPI CRC on card \n"));
++                    break;
++                }
++            }
++        }
++
++        status = SetOperationalBusMode(pHcd->pPseudoDev, &busMode);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set operational bus mode\n"));
++            break;
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Oper. Mode: Clock:%d, Bus:0x%X \n",
++                                pHcd->CardProperties.OperBusClock,pHcd->CardProperties.BusMode));
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Card in TRANS state, Ready: CardInfo Flags 0x%X \n",
++                                pHcd->CardProperties.Flags));
++
++    } while (FALSE);
++
++    if (pReq != NULL) {
++        FreeRequest(pReq);
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDQuerySDMMCInfo - query MMC card info
++  Input:  pDevice - device
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDQuerySDMMCInfo(PSDDEVICE pDevice)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDREQUEST  pReq = NULL;
++    UINT8       CID[MAX_CSD_CID_BYTES];
++
++    do {
++        pReq = AllocateRequest();
++        if (NULL == pReq) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++            /* de-select the card */
++        status = SelectDeselectCard(pDevice->pHcd,FALSE);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to deselect card before getting CID \n"));
++            break;
++        }
++
++        if (SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
++                /* in SPI mode, getting the CSD requires a data transfer */
++            status = _IssueBusRequestBd(pDevice->pHcd,CMD10,0,
++                                        SDREQ_FLAGS_RESP_R1 | SDREQ_FLAGS_DATA_TRANS,
++                                        pReq,
++                                        CID,
++                                        MAX_CSD_CID_BYTES);
++            if (SDIO_SUCCESS(status)) {
++                    /* in SPI mode we need to reorder to the CID since SPI data comes in MSB first*/
++                ReorderBuffer(CID,MAX_CSD_CID_BYTES);
++            }
++        } else {
++                /* get the CID */
++            status = _IssueSimpleBusRequest(pDevice->pHcd,
++                                            CMD10,
++                                            (SDDEVICE_GET_CARD_RCA(pDevice) << 16),
++                                            SDREQ_FLAGS_RESP_R2,
++                                            pReq);
++            if (SDIO_SUCCESS(status)) {
++                    /* extract it from the reponse */
++                memcpy(CID,pReq->Response,MAX_CSD_CID_BYTES);
++            }
++        }
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_WARN, ("SDQuerySDMMCInfo: failed to get CID. \n"));
++            status = SDIO_STATUS_SUCCESS;
++        } else {
++            pDevice->pId[0].SDMMC_ManfacturerID = GET_SD_CID_MANFID(CID);
++            pDevice->pId[0].SDMMC_OEMApplicationID = GET_SD_CID_OEMID(CID);
++#ifdef DEBUG
++            {
++                char pBuf[7];
++
++                pBuf[0] = GET_SD_CID_PN_1(CID);
++                pBuf[1] = GET_SD_CID_PN_2(CID);
++                pBuf[2] = GET_SD_CID_PN_3(CID);
++                pBuf[3] = GET_SD_CID_PN_4(CID);
++                pBuf[4] = GET_SD_CID_PN_5(CID);
++                if (pDevice->pHcd->CardProperties.Flags & CARD_MMC) {
++                    pBuf[5] = GET_SD_CID_PN_6(CID);
++                    pBuf[6] = 0;
++                } else {
++                    pBuf[5] = 0;
++                }
++                DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: Product String: %s\n", pBuf));
++            }
++#endif
++            DBG_PRINT(SDDBG_TRACE, ("SDQuerySDMMCInfo: ManfID: 0x%X, OEMID:0x%X \n",
++                       pDevice->pId[0].SDMMC_ManfacturerID, pDevice->pId[0].SDMMC_OEMApplicationID));
++        }
++            /* re-select card */
++        status = SelectDeselectCard(pDevice->pHcd,TRUE);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to re-select card after getting CID \n"));
++            break;
++        }
++    } while (FALSE);
++
++    if (pReq != NULL) {
++        FreeRequest(pReq);
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDQuerySDIOInfo - query SDIO card info
++  Input:  pDevice - the device
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDQuerySDIOInfo(PSDDEVICE pDevice)
++{
++    SDIO_STATUS     status = SDIO_STATUS_SUCCESS;
++    UINT32          faddress;
++    UINT8           fInfo;
++    UINT32          nextTpl;
++    UINT8           tplLength;
++    UINT8           cisPtrBuffer[3];
++    struct SDIO_FUNC_EXT_FUNCTION_TPL_1_1 funcTuple;
++
++        /* use the card-wide SDIO manufacturer code and ID previously read.*/
++    pDevice->pId[0].SDIO_ManufacturerCode = pDevice->pHcd->CardProperties.SDIO_ManufacturerCode;
++    pDevice->pId[0].SDIO_ManufacturerID = pDevice->pHcd->CardProperties.SDIO_ManufacturerID;
++
++        /* calculate function base address */
++    faddress = CalculateFBROffset(SDDEVICE_GET_SDIO_FUNCNO(pDevice));
++    DBG_ASSERT(faddress != 0);
++
++    do {
++        status = Cmd52ReadByteCommon(pDevice,
++                                     FBR_FUNC_INFO_REG_OFFSET(faddress),
++                                     &fInfo);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get function info, Err:%d , using Class:UNKNOWN\n", status));
++            fInfo = 0;
++            pDevice->pId[0].SDIO_FunctionClass = 0;
++            status = SDIO_STATUS_SUCCESS;
++        } else {
++            pDevice->pId[0].SDIO_FunctionClass = fInfo & FUNC_INFO_DEVICE_CODE_MASK;
++        }
++
++        if ((FUNC_INFO_DEVICE_CODE_LAST == pDevice->pId[0].SDIO_FunctionClass) &&
++            SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
++                /* if the device code is the last one, check for 1.1 revision and get the
++                 * extended code */
++            status = Cmd52ReadByteCommon(pDevice,
++                                         FBR_FUNC_EXT_DEVICE_CODE_OFFSET(faddress),
++                                         &(pDevice->pId[0].SDIO_FunctionClass));
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get 1.1 extended DC, Err:%d\n",
++                                        status));
++                break;
++            }
++        }
++
++            /* get the function CIS ptr */
++        status = Cmd52ReadMultipleCommon(pDevice,
++                                         FBR_FUNC_CIS_LOW_OFFSET(faddress),
++                                         cisPtrBuffer,
++                                         3);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CIS ptr, Err:%d\n", status));
++            break;
++        }
++            /* endian safe */
++        pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr = ((UINT32)cisPtrBuffer[0]) |
++                                                        (((UINT32)cisPtrBuffer[1]) << 8) |
++                                                        (((UINT32)cisPtrBuffer[2]) << 16);
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, Class:%d FnCISPtr:0x%X \n",
++                  SDDEVICE_GET_SDIO_FUNCNO(pDevice),
++                  pDevice->pId[0].SDIO_FunctionClass,pDevice->DeviceInfo.AsSDIOInfo.FunctionCISPtr));
++
++        if (fInfo & FUNC_INFO_SUPPORTS_CSA_MASK) {
++               /* get the function CSA ptr */
++            status = Cmd52ReadMultipleCommon(pDevice,
++                                             FBR_FUNC_CSA_LOW_OFFSET(faddress),
++                                             cisPtrBuffer,
++                                             3);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get FN CSA ptr, Err:%d \n", status));
++                break;
++            }
++                /* endian safe */
++            pDevice->DeviceInfo.AsSDIOInfo.FunctionCSAPtr = ((UINT32)cisPtrBuffer[0]) |
++                                                            (((UINT32)cisPtrBuffer[1]) << 8) |
++                                                            (((UINT32)cisPtrBuffer[2]) << 16);
++
++        }
++
++        nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++            /* look for the funce TPL */
++        tplLength = sizeof(funcTuple);
++            /* go get the func CE tuple */
++        status = SDLIB_FindTuple(pDevice,
++                                 CISTPL_FUNCE,
++                                 &nextTpl,
++                                 (PUINT8)&funcTuple,
++                                 &tplLength);
++
++        if (!SDIO_SUCCESS(status)){
++            /* handles case of bad CIS or missing tupple, allow function driver to handle */
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: Failed to get FuncCE Tuple: %d \n", status));
++            status = SDIO_STATUS_SUCCESS;
++            break;
++        }
++            /* set the max block size */
++        pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize =
++                                CT_LE16_TO_CPU_ENDIAN(funcTuple.CommonInfo.MaxBlockSize);
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Function:%d, MaxBlocks:%d \n",
++                  SDDEVICE_GET_SDIO_FUNCNO(pDevice),
++                  pDevice->DeviceInfo.AsSDIOInfo.FunctionMaxBlockSize));
++
++            /* check for MANFID function tuple (SDIO 1.1 or greater) */
++        if (SDDEVICE_IS_SDIO_REV_GTEQ_1_10(pDevice)) {
++            struct SDIO_MANFID_TPL      manfid;
++            nextTpl = SDDEVICE_GET_SDIO_FUNC_CISPTR(pDevice);
++            tplLength = sizeof(manfid);
++                /* get the MANFID tuple */
++            status = SDLIB_FindTuple(pDevice,
++                                     CISTPL_MANFID,
++                                     &nextTpl,
++                                     (PUINT8)&manfid,
++                                     &tplLength);
++            if (SDIO_SUCCESS(status)) {
++                    /* this function has a MANFID tuple */
++                pDevice->pId[0].SDIO_ManufacturerCode =
++                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerCode);
++                pDevice->pId[0].SDIO_ManufacturerID =
++                                        CT_LE16_TO_CPU_ENDIAN(manfid.ManufacturerInfo);
++                DBG_PRINT(SDDBG_TRACE, ("SDIO 1.1 (Function Specific) MANFID:0x%X, MANFINFO:0x%X \n",
++                                        pDevice->pId[0].SDIO_ManufacturerID,
++                                        pDevice->pId[0].SDIO_ManufacturerCode));
++            } else {
++                DBG_PRINT(SDDBG_WARN, ("SDIO 1.1, No CISTPL_MANFID Tuple in FUNC CIS \n"));
++                status = SDIO_STATUS_SUCCESS;
++            }
++        }
++    } while (FALSE);
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDEnableFunction - enable function
++  Input:  pDevice - the device/function
++          pEnData - enable data;
++  Output:
++  Return: status
++  Notes: Note, this performs synchronous calls
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDEnableFunction(PSDDEVICE pDevice, PSDCONFIG_FUNC_ENABLE_DISABLE_DATA pEnData)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT8       registerValue;
++    UINT8       mask;
++    FUNC_ENABLE_TIMEOUT  retry;
++
++        /* take the configure op lock to make this atomic */
++    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    status = SDIO_STATUS_INVALID_PARAMETER;
++    do {
++        if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
++                /* nothing to do if it's not an SDIO card */
++            break;
++        }
++
++        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++            DBG_ASSERT(FALSE);
++            break;
++        }
++            /* make sure there is a timeout value */
++        if (0 == pEnData->TimeOut) {
++            break;
++        }
++
++        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++            /* read the enable register */
++        status = Cmd52ReadByteCommon(pDevice, SDIO_ENABLE_REG, &registerValue);
++        if (!SDIO_SUCCESS(status)){
++            break;
++        }
++        if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
++                /* set the enable register bit */
++            registerValue |= mask;
++        } else {
++               /* clear the bit */
++            registerValue &= ~mask;
++        }
++
++        DBG_PRINT(SDDBG_TRACE,
++                ("SDIO Bus Driver %s Function, Mask:0x%X Enable Reg Value:0x%2.2X\n",
++                 (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) ? "Enabling":"Disabling",
++                 mask,
++                 registerValue));
++
++            /* write it back out */
++        status = Cmd52WriteByteCommon(pDevice, SDIO_ENABLE_REG, &registerValue);
++        if (!SDIO_SUCCESS(status)){
++            break;
++        }
++            /* now poll the ready bit until it sets or clears */
++        retry = pEnData->TimeOut;
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Function Enable/Disable Polling: %d retries \n",
++                                retry));
++        while (retry) {
++            status = Cmd52ReadByteCommon(pDevice, SDIO_READY_REG, &registerValue);
++            if (!SDIO_SUCCESS(status)){
++                break;
++            }
++            if (pEnData->EnableFlags & SDCONFIG_ENABLE_FUNC) {
++                    /* if the bit is set, the device is ready */
++                if (registerValue & mask) {
++                        /* device ready */
++                    break;
++                }
++            } else {
++                if (!(registerValue & mask)) {
++                        /* device is no longer ready */
++                    break;
++                }
++            }
++                /* sleep before trying again */
++            status = OSSleep(1);
++            if (!SDIO_SUCCESS(status)) {
++                DBG_PRINT(SDDBG_ERROR, ("OSSleep Failed! \n"));
++                break;
++            }
++            retry--;
++        }
++
++        if (0 == retry) {
++            status = SDIO_STATUS_FUNC_ENABLE_TIMEOUT;
++            break;
++        }
++
++    } while (FALSE);
++
++    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDAllocFreeSlotCurrent - allocate or free slot current
++  Input:  pDevice - the device/function
++          Allocate - Allocate current, else free
++          pData - slotcurrent data (non-NULL if Allocate is TRUE)
++  Output:
++  Return: status
++  Notes:  if the function returns SDIO_STATUS_NO_RESOURCES, the pData->SlotCurrent field is
++          updated with the available current
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDAllocFreeSlotCurrent(PSDDEVICE pDevice, BOOL Allocate, PSDCONFIG_FUNC_SLOT_CURRENT_DATA pData)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: SDAllocFreeSlotCurrent\n"));
++
++        /* take the configure op lock to make this atomic */
++    status = SemaphorePendInterruptable(&pDevice->pHcd->ConfigureOpsSem);
++    if (!SDIO_SUCCESS(status)) {
++        return status;
++    }
++
++    status = SDIO_STATUS_INVALID_PARAMETER;
++    do {
++            /* check the current budget and allocate */
++        if (Allocate) {
++            if (0 == pData->SlotCurrent) {
++                /* caller must specify current requirement for the power mode */
++                break;
++            }
++            if (pDevice->SlotCurrentAlloc != 0) {
++               /* slot current has already been allocated, caller needs to free
++                * first */
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Already allocated! \n"));
++                break;
++            }
++            if (((UINT32)pDevice->pHcd->SlotCurrentAllocated + (UINT32)pData->SlotCurrent) >
++                (UINT32)pDevice->pHcd->MaxSlotCurrent) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Slot Current Budget exceeded, Requesting: %d, Allocated already: %d, Max: %d \n",
++                            pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
++                            pDevice->pHcd->MaxSlotCurrent));
++                status = SDIO_STATUS_NO_RESOURCES;
++                    /* return remaining */
++                pData->SlotCurrent = pDevice->pHcd->MaxSlotCurrent -
++                                     pDevice->pHcd->SlotCurrentAllocated;
++                break;
++            }
++                /* bump up allocation */
++            pDevice->pHcd->SlotCurrentAllocated += pData->SlotCurrent;
++                /* save this off for the call to free slot current */
++            pDevice->SlotCurrentAlloc = pData->SlotCurrent;
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Requested: %d, New Total: %d, Max: %d \n",
++                            pData->SlotCurrent, pDevice->pHcd->SlotCurrentAllocated,
++                            pDevice->pHcd->MaxSlotCurrent));
++
++        } else {
++            if (0 == pDevice->SlotCurrentAlloc) {
++                    /* no allocation */
++                break;
++            }
++                /* return the allocation back */
++            if (pDevice->SlotCurrentAlloc <= pDevice->pHcd->SlotCurrentAllocated) {
++                pDevice->pHcd->SlotCurrentAllocated -= pDevice->SlotCurrentAlloc;
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Slot Current Freed: %d, New Total: %d, Max: %d \n",
++                            pDevice->SlotCurrentAlloc, pDevice->pHcd->SlotCurrentAllocated,
++                            pDevice->pHcd->MaxSlotCurrent));
++            } else {
++                DBG_ASSERT(FALSE);
++            }
++
++                /* make sure this is zeroed */
++            pDevice->SlotCurrentAlloc = 0;
++        }
++
++        status = SDIO_STATUS_SUCCESS;
++
++    } while (FALSE);
++
++    SemaphorePost(&pDevice->pHcd->ConfigureOpsSem);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: SDAllocFreeSlotCurrent, %d\n", status));
++    return status;
++}
++
++static void RawHcdIrqControl(PSDHCD pHcd, BOOL Enable)
++{
++    SDIO_STATUS status;
++    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    ZERO_OBJECT(irqData);
++
++    status = _AcquireHcdLock(pHcd);
++    if (!SDIO_SUCCESS(status)) {
++        return;
++    }
++
++    do {
++            /* for raw devices, we simply enable/disable in the HCD only */
++        if (Enable) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Unmasking Int \n"));
++            irqData.IRQDetectMode = IRQ_DETECT_RAW;
++            irqData.SlotIRQEnable = TRUE;
++        } else {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver (RAW) Masking Int \n"));
++            irqData.SlotIRQEnable = FALSE;
++        }
++
++        status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
++                              (PVOID)&irqData, sizeof(irqData));
++
++        if (!SDIO_SUCCESS(status)){
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in (RAW) hcd :%d\n",
++                                    status));
++        }
++
++    } while (FALSE);
++
++    status = _ReleaseHcdLock(pHcd);
++}
++
++static void RawHcdEnableIrqPseudoComplete(PSDREQUEST pReq)
++{
++    if (SDIO_SUCCESS(pReq->Status)) {
++        RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
++    }
++    FreeRequest(pReq);
++}
++
++static void RawHcdDisableIrqPseudoComplete(PSDREQUEST pReq)
++{
++    RawHcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
++    FreeRequest(pReq);
++}
++
++static void HcdIrqControl(PSDHCD pHcd, BOOL Enable)
++{
++    SDIO_STATUS                 status;
++    SDCONFIG_SDIO_INT_CTRL_DATA irqData;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    ZERO_OBJECT(irqData);
++
++    status = _AcquireHcdLock(pHcd);
++    if (!SDIO_SUCCESS(status)) {
++        return;
++    }
++
++    do {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: HcdIrqControl (%s), IrqsEnabled:0x%X \n",
++                        Enable ? "Enable":"Disable",pHcd->IrqsEnabled ));
++
++        if (Enable) {
++            irqData.SlotIRQEnable = TRUE;
++        } else {
++            irqData.SlotIRQEnable = FALSE;
++        }
++                /* setup HCD to enable/disable it's detection hardware */
++        if (irqData.SlotIRQEnable) {
++                /* set the IRQ detection mode */
++            switch (SDCONFIG_GET_BUSWIDTH(pHcd->CardProperties.BusMode)) {
++                case SDCONFIG_BUS_WIDTH_SPI:
++                    irqData.IRQDetectMode = IRQ_DETECT_SPI;
++                    break;
++                case SDCONFIG_BUS_WIDTH_1_BIT:
++                    irqData.IRQDetectMode = IRQ_DETECT_1_BIT;
++                    break;
++                case SDCONFIG_BUS_WIDTH_4_BIT:
++                    irqData.IRQDetectMode = IRQ_DETECT_4_BIT;
++                        /* check card and HCD for 4bit multi-block interrupt support */
++                    if ((pHcd->CardProperties.SDIOCaps & SDIO_CAPS_INT_MULTI_BLK) &&
++                        (pHcd->Attributes & SDHCD_ATTRIB_MULTI_BLK_IRQ)) {
++                            /* note: during initialization of the card, the mult-blk IRQ support
++                             * is enabled in card caps register */
++                        irqData.IRQDetectMode |= IRQ_DETECT_MULTI_BLK;
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in multi-block mode:\n"));
++                    }
++                    break;
++                default:
++                    DBG_ASSERT(FALSE);
++                    break;
++            }
++
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver enabling IRQ in HCD Mode:0x%X\n",
++                                     irqData.IRQDetectMode));
++        }
++
++        status = _IssueConfig(pHcd,SDCONFIG_SDIO_INT_CTRL,
++                                (PVOID)&irqData, sizeof(irqData));
++        if (!SDIO_SUCCESS(status)){
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver failed to enable/disable IRQ in hcd %d\n",
++                                    status));
++        }
++
++    } while (FALSE);
++
++    status = _ReleaseHcdLock(pHcd);
++}
++
++static BOOL CheckWriteIntEnableSuccess(PSDREQUEST pReq)
++{
++    if (!SDIO_SUCCESS(pReq->Status)){
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to get write INT Enable register Err:%d\n",
++                                     pReq->Status));
++        return FALSE;
++    }
++
++    if (SD_R5_GET_RESP_FLAGS(pReq->Response) & SD_R5_ERRORS) {
++       DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: WriteIntEnableComplete CMD52 resp error: 0x%X \n",
++                  SD_R5_GET_RESP_FLAGS(pReq->Response)));
++        return FALSE;
++    }
++
++    return TRUE;
++}
++
++static void HcdIrqEnableComplete(PSDREQUEST pReq)
++{
++    if (CheckWriteIntEnableSuccess(pReq)) {
++            /* configure HCD */
++        HcdIrqControl((PSDHCD)pReq->pCompleteContext, TRUE);
++    }
++    FreeRequest(pReq);
++}
++
++static void HcdIrqDisableComplete(PSDREQUEST pReq)
++{
++    CheckWriteIntEnableSuccess(pReq);
++    HcdIrqControl((PSDHCD)pReq->pCompleteContext, FALSE);
++    FreeRequest(pReq);
++}
++
++static void WriteIntEnableComplete(PSDREQUEST pReq)
++{
++   if (CheckWriteIntEnableSuccess(pReq)) {
++       DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: Wrote INT Enable value:0x%X \n",
++                    (INT)pReq->pCompleteContext));
++   }
++   FreeRequest(pReq);
++}
++
++static void HcdAckComplete(PSDREQUEST pReq)
++{
++    SDIO_STATUS status;
++    DBG_PRINT(SDIODBG_FUNC_IRQ, ("SDIO Bus Driver: Hcd (0x%X) Irq Ack \n",
++                    (INT)pReq->pCompleteContext));
++        /* re-arm the HCD */
++    status = _IssueConfig((PSDHCD)pReq->pCompleteContext,SDCONFIG_SDIO_REARM_INT,NULL,0);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: HCD Re-Arm failed : %d\n",
++                    status));
++    }
++    FreeRequest(pReq);
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDFunctionAckInterrupt - handle device interrupt acknowledgement
++  Input:  pDevice - the device
++  Output:
++  Return:
++  Notes:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDFunctionAckInterrupt(PSDDEVICE pDevice)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UCHAR       mask;
++    PSDREQUEST  pReq = NULL;
++    BOOL        setHcd = FALSE;
++    SDIO_STATUS status2;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    pReq = AllocateRequest();
++    if (NULL == pReq) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    status = _AcquireHcdLock(pDevice->pHcd);
++
++    if (!SDIO_SUCCESS(status)) {
++        FreeRequest(pReq);
++        return status;
++    }
++
++    do {
++        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++            status = SDIO_STATUS_INVALID_PARAMETER;
++            DBG_ASSERT(FALSE);
++            break;
++        }
++        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++        if (pDevice->pHcd->PendingIrqAcks & mask) {
++                /* clear the ack bit in question */
++            pDevice->pHcd->PendingIrqAcks &= ~mask;
++            if (0 == pDevice->pHcd->PendingIrqAcks) {
++                pDevice->pHcd->IrqProcState = SDHCD_IDLE;
++                    /* no pending acks, so re-arm if irqs are stilled enabled */
++                if (pDevice->pHcd->IrqsEnabled) {
++                    setHcd = TRUE;
++                        /* issue pseudo request to sync this with bus requests */
++                    pReq->Status = SDIO_STATUS_SUCCESS;
++                    pReq->pCompletion = HcdAckComplete;
++                    pReq->pCompleteContext = pDevice->pHcd;
++                    pReq->Flags = SD_PSEUDO_REQ_FLAGS;
++                }
++            }
++        } else {
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: AckInterrupt: no IRQ pending on Function :%d, \n",
++                        SDDEVICE_GET_SDIO_FUNCNO(pDevice)));
++        }
++    } while (FALSE);
++
++    status2 = ReleaseHcdLock(pDevice);
++
++    if (pReq != NULL) {
++        if (SDIO_SUCCESS(status) && (setHcd)) {
++                /* issue request */
++            IssueRequestToHCD(pDevice->pHcd,pReq);
++        } else {
++            FreeRequest(pReq);
++        }
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDMaskUnmaskFunctionIRQ - mask/unmask function IRQ
++  Input:  pDevice - the device/function
++          MaskInt - mask interrupt
++  Output:
++  Return: status
++  Notes:  Note, this function can be called from an ISR or completion context
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDMaskUnmaskFunctionIRQ(PSDDEVICE pDevice, BOOL MaskInt)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT8       mask;
++    UINT8       controlVal;
++    BOOL        setHcd;
++    PSDREQUEST  pReq = NULL;
++    SDIO_STATUS status2;
++
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    setHcd = FALSE;
++
++    pReq = AllocateRequest();
++    if (NULL == pReq) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    status = _AcquireHcdLock(pDevice->pHcd);
++
++    if (!SDIO_SUCCESS(status)) {
++        FreeRequest(pReq);
++        return status;
++    }
++
++    do {
++
++        if (pDevice->pHcd->CardProperties.Flags & CARD_RAW) {
++            if (!MaskInt) {
++                if (!pDevice->pHcd->IrqsEnabled) {
++                    pReq->pCompletion = RawHcdEnableIrqPseudoComplete;
++                    setHcd = TRUE;
++                    pDevice->pHcd->IrqsEnabled = 1 << 1;
++                }
++            } else {
++                if (pDevice->pHcd->IrqsEnabled) {
++                    pReq->pCompletion = RawHcdDisableIrqPseudoComplete;
++                    setHcd = TRUE;
++                    pDevice->pHcd->IrqsEnabled = 0;
++                }
++            }
++
++            if (setHcd) {
++                    /* hcd IRQ control requests must be synched with outstanding
++                     * bus requests so we issue a pseudo bus request  */
++                pReq->pCompleteContext = pDevice->pHcd;
++                pReq->Flags = SD_PSEUDO_REQ_FLAGS;
++                pReq->Status = SDIO_STATUS_SUCCESS;
++            } else {
++                    /* no request to submit, just free it */
++                FreeRequest(pReq);
++                pReq = NULL;
++            }
++                /* we're done, submit the bus request if any */
++            break;
++        }
++
++        if (!(pDevice->pHcd->CardProperties.Flags & CARD_SDIO)){
++                /* nothing to do if it's not an SDIO card */
++            DBG_ASSERT(FALSE);
++            status = SDIO_STATUS_INVALID_PARAMETER;
++            break;
++        }
++
++        if (!((SDDEVICE_GET_SDIO_FUNCNO(pDevice) >= SDIO_FIRST_FUNCTION_NUMBER) &&
++              (SDDEVICE_GET_SDIO_FUNCNO(pDevice) <= SDIO_LAST_FUNCTION_NUMBER))){
++            status = SDIO_STATUS_INVALID_PARAMETER;
++            DBG_ASSERT(FALSE);
++            break;
++        }
++
++        mask = 1 << SDDEVICE_GET_SDIO_FUNCNO(pDevice);
++        if (!MaskInt) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Unmasking Int, Mask:0x%X\n", mask));
++                /* check interrupts that were enabled on entry */
++            if (0 == pDevice->pHcd->IrqsEnabled) {
++                    /* need to turn on interrupts in HCD */
++                setHcd = TRUE;
++                    /* use this completion routine */
++                pReq->pCompletion = HcdIrqEnableComplete;
++            }
++                /* set the enable bit, in the shadow register */
++            pDevice->pHcd->IrqsEnabled |= mask;
++                /* make sure control value includes the master enable */
++            controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
++        } else {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver Masking Int, Mask:0x%X\n", mask));
++                /* clear the bit */
++            pDevice->pHcd->IrqsEnabled &= ~mask;
++                /* check and see if this clears all the bits */
++            if (0 == pDevice->pHcd->IrqsEnabled){
++                    /* if none of the functions are enabled, clear this register */
++                controlVal = 0;
++                    /* disable in host */
++                setHcd = TRUE;
++                    /* use this completion routine */
++                pReq->pCompletion = HcdIrqDisableComplete;
++            } else {
++                    /* set control value making sure master enable is left on */
++                controlVal = pDevice->pHcd->IrqsEnabled | SDIO_INT_MASTER_ENABLE;
++            }
++        }
++
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver INT_ENABLE_REG value:0x%X\n", controlVal));
++            /* setup bus request to update the mask register */
++        SDIO_SET_CMD52_WRITE_ARG(pReq->Argument,0,SDIO_INT_ENABLE_REG,controlVal);
++        pReq->Command = CMD52;
++        pReq->Flags = SDREQ_FLAGS_TRANS_ASYNC | SDREQ_FLAGS_RESP_SDIO_R5;
++
++        if (setHcd) {
++                /* make this a barrier request and set context*/
++            pReq->Flags |= SDREQ_FLAGS_BARRIER;
++            pReq->pCompleteContext = pDevice->pHcd;
++        } else {
++                /* does not require an update to the HCD  */
++            pReq->pCompleteContext = (PVOID)(UINT32)controlVal;
++            pReq->pCompletion = WriteIntEnableComplete;
++        }
++
++    } while (FALSE);
++
++    status2 = _ReleaseHcdLock(pDevice->pHcd);
++
++    if (pReq != NULL) {
++        if (SDIO_SUCCESS(status)) {
++                /* issue request */
++            IssueRequestToHCD(pDevice->pHcd,pReq);
++        } else {
++            FreeRequest(pReq);
++        }
++    }
++
++    return status;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SDSPIModeEnableDisableCRC - Enable/Disable SPI Mode CRC checking
++  Input:  pDevice - the device/function
++          Enable - Enable CRC
++  Output:
++  Return: status
++  Notes:  Note, this function can be called from an ISR or completion context
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDSPIModeEnableDisableCRC(PSDDEVICE pDevice,BOOL Enable)
++{
++    SDCONFIG_BUS_MODE_DATA busMode;
++    SDIO_STATUS            status = SDIO_STATUS_SUCCESS;
++    UINT32                 cmdARG = 0;
++
++    if (!SDDEVICE_IS_BUSMODE_SPI(pDevice)) {
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++       //??we should make these atomic using a barrier
++
++        /* get the current mode and clock */
++    busMode.BusModeFlags = pDevice->pHcd->CardProperties.BusMode;
++    busMode.ClockRate = pDevice->pHcd->CardProperties.OperBusClock;
++
++    if (Enable) {
++            /* clear the no-CRC flag */
++        busMode.BusModeFlags &= ~SDCONFIG_BUS_MODE_SPI_NO_CRC;
++        cmdARG = SD_CMD59_CRC_ON;
++    } else {
++        busMode.BusModeFlags |= SDCONFIG_BUS_MODE_SPI_NO_CRC;
++        cmdARG = SD_CMD59_CRC_OFF;
++    }
++
++    do {
++            /* issue CMD59 to turn on/off CRC */
++        status = _IssueSimpleBusRequest(pDevice->pHcd,
++                                        CMD59,
++                                        cmdARG,
++                                        SDREQ_FLAGS_RESP_R1,
++                                        NULL);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed issue CMD59 (arg=0x%X) Err:%d \n",
++                                    cmdARG, status));
++            break;
++        }
++        if (Enable) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Enabled in SPI mode \n"));
++        } else {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: CRC Disabled in SPI mode \n"));
++        }
++        status = SetOperationalBusMode(pDevice,&busMode);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Failed to set SPI NO CRC mode in hcd : Err:%d \n",
++                                    status));
++            break;
++        }
++    } while (FALSE);
++
++    return status;
++}
++
++
++static UINT32 ConvertSPIStatusToSDCardStatus(UINT8 SpiR1, UINT8 SpiR2)
++{
++    UINT32 cardStatus = 0;
++
++    if (SpiR1 != 0) {
++            /* convert the error */
++        if (SpiR1 & SPI_CS_ERASE_RESET) {
++            cardStatus |= SD_CS_ERASE_RESET;
++        }
++        if (SpiR1 & SPI_CS_ILLEGAL_CMD) {
++            cardStatus |= SD_CS_ILLEGAL_CMD_ERR;
++        }
++        if (SpiR1 & SPI_CS_CMD_CRC_ERR) {
++            cardStatus |= SD_CS_PREV_CMD_CRC_ERR;
++        }
++        if (SpiR1 & SPI_CS_ERASE_SEQ_ERR) {
++            cardStatus |= SD_CS_ERASE_SEQ_ERR;
++        }
++        if (SpiR1 & SPI_CS_ADDRESS_ERR) {
++            cardStatus |= SD_CS_ADDRESS_ERR;
++        }
++        if (SpiR1 & SPI_CS_PARAM_ERR) {
++            cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
++        }
++    }
++
++    if (SpiR2 != 0) {
++            /* convert the error */
++        if (SpiR2 & SPI_CS_CARD_IS_LOCKED) {
++            cardStatus |= SD_CS_CARD_LOCKED;
++        }
++        if (SpiR2 & SPI_CS_LOCK_UNLOCK_FAILED) {
++                /* this bit is shared, just set both */
++            cardStatus |= (SD_CS_LK_UNLK_FAILED | SD_CS_WP_ERASE_SKIP);
++        }
++        if (SpiR2 & SPI_CS_ERROR) {
++            cardStatus |= SD_CS_GENERAL_ERR;
++        }
++        if (SpiR2 & SPI_CS_INTERNAL_ERROR) {
++            cardStatus |= SD_CS_CARD_INTERNAL_ERR;
++        }
++        if (SpiR2 & SPI_CS_ECC_FAILED) {
++            cardStatus |= SD_CS_ECC_FAILED;
++        }
++        if (SpiR2 & SPI_CS_WP_VIOLATION) {
++            cardStatus |= SD_CS_WP_ERR;
++        }
++        if (SpiR2 & SPI_CS_ERASE_PARAM_ERR) {
++            cardStatus |= SD_CS_ERASE_PARAM_ERR;
++        }
++        if (SpiR2 & SPI_CS_OUT_OF_RANGE) {
++            cardStatus |= SD_CS_CMD_OUT_OF_RANGE;
++        }
++    }
++
++    return cardStatus;
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ConvertSPI_Response - filter the SPI response and convert it to an SD Response
++  Input:  pReq - request
++  Output: pReq - modified response, if pRespBuffer is not NULL
++          pRespBuffer - converted response (optional)
++  Return:
++  Notes:  This function converts a SPI response into an SD response.  A caller
++          can supply a buffer instead.
++          For SPI bus operation the HCD must send the SPI response as
++          a stream of bytes, the highest byte contains the first received byte from the
++          card.  This function only filters simple responses (R1 primarily).
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ConvertSPI_Response(PSDREQUEST pReq, UINT8 *pRespBuffer)
++{
++
++    UINT32  cardStatus;
++
++    if (pReq->Flags & SDREQ_FLAGS_RESP_SPI_CONVERTED) {
++            /* already converted */
++        return;
++    }
++    if (NULL == pRespBuffer) {
++        pRespBuffer = pReq->Response;
++    }
++
++    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++        case SDREQ_FLAGS_RESP_R1:
++        case SDREQ_FLAGS_RESP_R1B:
++            cardStatus = ConvertSPIStatusToSDCardStatus(GET_SPI_R1_RESP_TOKEN(pReq->Response),
++                                                        0);
++            if (CMD55 == pReq->Command) {
++                    /* we emulate this since SPI does not have such a bit */
++                cardStatus |= SD_CS_APP_CMD;
++            }
++                /* stuff the SD card status */
++            SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
++                /* stuff the command */
++            SD_R1_SET_CMD(pRespBuffer,pReq->Command);
++            pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++            break;
++        case SDREQ_FLAGS_RESP_SDIO_R5:
++            {
++                UINT8 respFlags;
++                UINT8 readData;
++
++                readData = GET_SPI_SDIO_R5_RESPONSE_RDATA(pReq->Response);
++                respFlags = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
++
++                pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] = 0;
++                if (respFlags != 0) {
++                    if (respFlags & SPI_R5_ILLEGAL_CMD) {
++                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ILLEGAL_CMD;
++                    }
++                    if (respFlags & SPI_R5_CMD_CRC) {
++                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_RESP_CMD_ERR;
++                    }
++                    if (respFlags & SPI_R5_FUNC_ERR) {
++                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_INVALID_FUNC;
++                    }
++                    if (respFlags & SPI_R5_PARAM_ERR) {
++                        pRespBuffer[SD_R5_RESP_FLAGS_OFFSET] |= SD_R5_ARG_RANGE_ERR;
++                    }
++                }
++                    /* stuff read data */
++                pRespBuffer[SD_SDIO_R5_READ_DATA_OFFSET] = readData;
++                    /* stuff the command */
++                SD_R5_SET_CMD(pRespBuffer,pReq->Command);
++            }
++            pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++            break;
++
++
++#ifndef CT_CONFIG_NO_SDMMC
++        case SDREQ_FLAGS_RESP_R2:
++                /* for CMD13 and ACMD13 , SPI uses it's own R2 response format (2 bytes) */
++                /* the issue of CMD13 needs to change the response flag to R2 */
++            if (CMD13 == pReq->Command) {
++                cardStatus = ConvertSPIStatusToSDCardStatus(
++                                    GET_SPI_R2_RESP_TOKEN(pReq->Response),
++                                    GET_SPI_R2_STATUS_TOKEN(pReq->Response));
++                    /* stuff the SD card status */
++                SD_R1_SET_CMD_STATUS(pRespBuffer,cardStatus);
++                    /* stuff the command */
++                SD_R1_SET_CMD(pRespBuffer,pReq->Command);
++                pReq->Flags |= SDREQ_FLAGS_RESP_SPI_CONVERTED;
++                break;
++            }
++                /* no other commands should be using R2 when using SPI, if they are
++                 * they should be bypassing the filter  */
++            DBG_ASSERT(FALSE);
++            break;
++
++#endif
++        default:
++                /* for all others:
++                 *
++                 * SDREQ_FLAGS_RESP_R6 - SPI mode does not use RCA
++                 * SDREQ_FLAGS_RESP_R3 - bus driver handles this internally
++                 * SDREQ_FLAGS_RESP_SDIO_R4 - bus driver handles this internally
++                 *
++                 */
++            DBG_PRINT(SDDBG_ERROR, ("ConvertSPI_Response - invalid response type:0x%2.2X",
++                                    GET_SDREQ_RESP_TYPE(pReq->Flags)));
++            DBG_ASSERT(FALSE);
++            break;
++    }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Check an SD/MMC/SDIO response.
++
++  @function name: SDIO_CheckResponse
++  @prototype: SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++  @category: HD_Reference
++
++  @input:  pHcd - the host controller definition structure.
++  @input:  pReq - request containing the response
++  @input:  CheckMode - mode
++
++  @return: SDIO_STATUS
++
++  @notes: Host controller drivers must call into this function to validate various command
++          responses before continuing with data transfers or for decoding received SPI tokens.
++          The CheckMode option determines the type of validation to perform.
++          if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) :
++             The host controller must check the card response to determine whether it
++          is safe to perform a data transfer.  This API only checks commands that
++          involve data transfers and checks various status fields in the command response.
++          If the card cannot accept data, this function will return a non-successful status that
++          should be treated as a request failure.  The host driver should complete the request with the
++          returned status. Host controller should only call this function in preparation for a
++          data transfer.
++          if (CheckMode == SDHCD_CHECK_SPI_TOKEN) :
++             This API checks the SPI token and returns a timeout status if the illegal command bit is
++          set.  This simulates the behavior of SD 1/4 bit operation where illegal commands result in
++          a command timeout.  A driver that supports SPI mode should pass every response to this
++          function to determine the appropriate error status to complete the request with.  If the
++          API returns success, the response indicates that the card accepted the command.
++
++  @example: Checking the response before starting the data transfer :
++        if (SDIO_SUCCESS(status) && (pReq->Flags & SDREQ_FLAGS_DATA_TRANS)) {
++                // check the response to see if we should continue with data
++            status = SDIO_CheckResponse(pHcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++            if (SDIO_SUCCESS(status)) {
++                .... start data transfer phase
++            } else {
++               ... card response indicates that the card cannot handle data
++                  // set completion status
++               pRequest->Status = status;
++            }
++        }
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  _SDIO_CheckResponse - check response on behalf of the host controller
++  Input:  pHcd - host controller
++          pReq - request containing the response
++          CheckMode - mode
++  Output:
++  Return: status
++  Notes:
++
++    CheckMode == SDHCD_CHECK_DATA_TRANS_OK :
++    The host controller requests a check on the response to determine whether it
++    is okay to perform a data transfer.  This function only filters on commands that
++    involve data.  Host controller should only call this function in preparation for a
++    data transfer.
++
++    CheckMode == SDHCD_CHECK_SPI_TOKEN :
++    The bus driver checks the SPI token and returns a timeout status if the illegal command bit is
++    set.  This simulates the behavior of SD native operation.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    if (CheckMode == SDHCD_CHECK_DATA_TRANS_OK) {
++        UINT32      cardStatus;
++        UINT8       *pResponse;
++        UINT8       convertedResponse[MAX_CARD_RESPONSE_BYTES];
++
++        if (!(pReq->Flags & SDREQ_FLAGS_DATA_TRANS) ||
++             (pReq->Flags & SDREQ_FLAGS_DATA_SKIP_RESP_CHK) ||
++             (GET_SDREQ_RESP_TYPE(pReq->Flags) ==  SDREQ_FLAGS_NO_RESP)) {
++            return SDIO_STATUS_SUCCESS;
++        }
++        pResponse = pReq->Response;
++            /* check SPI mode */
++        if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++            if (!(pReq->Flags & SDREQ_FLAGS_RESP_SKIP_SPI_FILT)) {
++                    /* apply conversion */
++                ConvertSPI_Response(pReq, NULL);
++            } else {
++                    /* temporarily convert the response, without altering the original */
++                ConvertSPI_Response(pReq, convertedResponse);
++                    /* point to the converted one */
++                pResponse = convertedResponse;
++            }
++        }
++
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_RESP_R1:
++            case SDREQ_FLAGS_RESP_R1B:
++                cardStatus = SD_R1_GET_CARD_STATUS(pResponse);
++                if (!(cardStatus &
++                     (SD_CS_ILLEGAL_CMD_ERR | SD_CS_CARD_INTERNAL_ERR | SD_CS_GENERAL_ERR))) {
++                        /* okay for data */
++                    break;
++                }
++                    /* figure out what it was */
++                if (cardStatus & SD_CS_ILLEGAL_CMD_ERR) {
++                    status = SDIO_STATUS_DATA_STATE_INVALID;
++                } else {
++                    status = SDIO_STATUS_DATA_ERROR_UNKNOWN;
++                }
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R1 CardStatus:0x%X \n",
++                                        cardStatus));
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                cardStatus = SD_R5_GET_RESP_FLAGS(pResponse);
++                if (!(cardStatus & SD_R5_CURRENT_CMD_ERRORS)){
++                        /* all okay */
++                    break;
++                }
++
++                status = ConvertCMD52ResponseToSDIOStatus((UINT8)cardStatus);
++                DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: Check Response Error. R5 CardStatus:0x%X \n",
++                                        cardStatus));
++                break;
++            default:
++                break;
++        }
++
++        return status;
++    }
++
++    {
++        UINT8       spiToken;
++
++            /* handle SPI token validation */
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_RESP_R2:
++                spiToken = GET_SPI_R2_RESP_TOKEN(pReq->Response);
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                spiToken = GET_SPI_SDIO_R5_RESP_TOKEN(pReq->Response);
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++                spiToken = GET_SPI_R3_RESP_TOKEN(pReq->Response);
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                spiToken = GET_SPI_SDIO_R4_RESP_TOKEN(pReq->Response);
++                break;
++            default:
++                    /* all other tokesn are SPI R1 type */
++                spiToken = GET_SPI_R1_RESP_TOKEN(pReq->Response);
++                break;
++        }
++
++        if ((GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R5) ||
++            (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_SDIO_R4)) {
++                /* handle SDIO status tokens */
++            if ((spiToken & SPI_R5_ILLEGAL_CMD) ||
++                (spiToken & SPI_R5_CMD_CRC)) {
++                status = SDIO_STATUS_BUS_RESP_TIMEOUT;
++            }
++        } else {
++                /* handle all other status tokens */
++            if ((spiToken & SPI_CS_ILLEGAL_CMD) ||
++                (spiToken & SPI_CS_CMD_CRC_ERR)) {
++                status = SDIO_STATUS_BUS_RESP_TIMEOUT;
++            }
++       }
++    }
++
++    return status;
++}
++
+Index: linux-2.6.22/drivers/sdio/busdriver/sdio_bus_os.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/sdio_bus_os.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,807 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_bus_os.c
++
++ at abstract: Linux implementation module
++
++#notes: includes module load and unload functions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++#define DBG_DECLARE 3;
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/version.h>
++#include <linux/init.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include <linux/pnp.h>
++#include <linux/kthread.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++
++#define DESCRIPTION "SDIO Bus Driver"
++#define AUTHOR "Atheros Communications, Inc."
++
++/* configuration and default parameters */
++static int RequestRetries = SDMMC_DEFAULT_CMD_RETRIES;
++module_param(RequestRetries, int, 0644);
++MODULE_PARM_DESC(RequestRetries, "number of command retries");
++static int CardReadyPollingRetry = SDMMC_DEFAULT_CARD_READY_RETRIES;
++module_param(CardReadyPollingRetry, int, 0644);
++MODULE_PARM_DESC(CardReadyPollingRetry, "number of card ready retries");
++static int PowerSettleDelay = SDMMC_POWER_SETTLE_DELAY;
++module_param(PowerSettleDelay, int, 0644);
++MODULE_PARM_DESC(PowerSettleDelay, "delay in ms for power to settle after power changes");
++static int DefaultOperClock = 52000000;
++module_param(DefaultOperClock, int, 0644);
++MODULE_PARM_DESC(DefaultOperClock, "maximum operational clock limit");
++static int DefaultBusMode = SDCONFIG_BUS_WIDTH_4_BIT;
++module_param(DefaultBusMode, int, 0644);
++MODULE_PARM_DESC(DefaultBusMode, "default bus mode: see SDCONFIG_BUS_WIDTH_xxx");
++static int RequestListSize = SDBUS_DEFAULT_REQ_LIST_SIZE;
++module_param(RequestListSize, int, 0644);
++MODULE_PARM_DESC(RequestListSize, "");
++static int SignalSemListSize = SDBUS_DEFAULT_REQ_SIG_SIZE;
++module_param(SignalSemListSize, int, 0644);
++MODULE_PARM_DESC(SignalSemListSize, "");
++static int CDPollingInterval = SDBUS_DEFAULT_CD_POLLING_INTERVAL;
++module_param(CDPollingInterval, int, 0644);
++MODULE_PARM_DESC(CDPollingInterval, "");
++static int DefaultOperBlockLen = SDMMC_DEFAULT_BYTES_PER_BLOCK;
++module_param(DefaultOperBlockLen, int, 0644);
++MODULE_PARM_DESC(DefaultOperBlockLen, "operational block length");
++static int DefaultOperBlockCount = SDMMC_DEFAULT_BLOCKS_PER_TRANS;
++module_param(DefaultOperBlockCount, int, 0644);
++MODULE_PARM_DESC(DefaultOperBlockCount, "operational block count");
++static int ConfigFlags = BD_DEFAULT_CONFIG_FLAGS;
++module_param(ConfigFlags, int, 0644);
++MODULE_PARM_DESC(ConfigFlags, "config flags");
++
++static int HcdRCount = MAX_HCD_REQ_RECURSION;
++module_param(HcdRCount, int, 0644);
++MODULE_PARM_DESC(HcdRCount, "HCD request recursion count");
++
++static void CardDetect_WorkItem(struct work_struct * work);
++static void CardDetect_TimerFunc(unsigned long Context);
++static DECLARE_WORK(CardDetectPollWork, CardDetect_WorkItem);
++static int RegisterDriver(PSDFUNCTION pFunction);
++static int UnregisterDriver(PSDFUNCTION pFunction);
++
++static struct timer_list CardDetectTimer;
++
++#define SDDEVICE_FROM_OSDEVICE(pOSDevice)  container_of(pOSDevice, SDDEVICE, Device)
++#define SDFUNCTION_FROM_OSDRIVER(pOSDriver)  container_of(pOSDriver, SDFUNCTION, Driver)
++
++
++/*
++ * SDIO_RegisterHostController - register a host controller bus driver
++*/
++SDIO_STATUS SDIO_RegisterHostController(PSDHCD pHcd) {
++    /* we are the exported verison, call the internal verison */
++    return _SDIO_RegisterHostController(pHcd);
++}
++
++/*
++ * SDIO_UnregisterHostController - unregister a host controller bus driver
++*/
++SDIO_STATUS SDIO_UnregisterHostController(PSDHCD pHcd) {
++    /* we are the exported verison, call the internal verison */
++    return _SDIO_UnregisterHostController(pHcd);
++}
++
++/*
++ * SDIO_RegisterFunction - register a function driver
++*/
++SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction) {
++    int error;
++    SDIO_STATUS status;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - SDIO_RegisterFunction\n"));
++
++        /* since we do PnP registration first, we need to check the version */
++    if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
++        DBG_PRINT(SDDBG_ERROR,
++           ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++           GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    /* we are the exported verison, call the internal verison after registering with the bus
++       we handle probes internally to the bus driver */
++    if ((error = RegisterDriver(pFunction)) < 0) {
++        DBG_PRINT(SDDBG_ERROR,
++            ("SDIO BusDriver - SDIO_RegisterFunction, failed to register with system bus driver: %d\n",
++            error));
++        status = OSErrorToSDIOError(error);
++    } else {
++        status = _SDIO_RegisterFunction(pFunction);
++        if (!SDIO_SUCCESS(status)) {
++            UnregisterDriver(pFunction);
++        }
++    }
++
++    return status;
++}
++
++/*
++ * SDIO_UnregisterFunction - unregister a function driver
++*/
++SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction) {
++    SDIO_STATUS status;
++    /* we are the exported verison, call the internal verison */
++    status = _SDIO_UnregisterFunction(pFunction);
++    UnregisterDriver(pFunction);
++    return  status;
++}
++
++/*
++ * SDIO_HandleHcdEvent - tell core an event occurred
++*/
++SDIO_STATUS SDIO_HandleHcdEvent(PSDHCD pHcd, HCD_EVENT Event) {
++    /* we are the exported verison, call the internal verison */
++    DBG_PRINT(SDIODBG_HCD_EVENTS, ("SDIO Bus Driver: SDIO_HandleHcdEvent, event type 0x%X, HCD:0x%X\n",
++                         Event, (UINT)pHcd));
++    return _SDIO_HandleHcdEvent(pHcd, Event);
++}
++
++/* get default settings */
++SDIO_STATUS _SDIO_BusGetDefaultSettings(PBDCONTEXT pBdc)
++{
++    /* these defaults are module params */
++    pBdc->RequestRetries = RequestRetries;
++    pBdc->CardReadyPollingRetry = CardReadyPollingRetry;
++    pBdc->PowerSettleDelay = PowerSettleDelay;
++    pBdc->DefaultOperClock = DefaultOperClock;
++    pBdc->DefaultBusMode = DefaultBusMode;
++    pBdc->RequestListSize = RequestListSize;
++    pBdc->SignalSemListSize = SignalSemListSize;
++    pBdc->CDPollingInterval = CDPollingInterval;
++    pBdc->DefaultOperBlockLen = DefaultOperBlockLen;
++    pBdc->DefaultOperBlockCount = DefaultOperBlockCount;
++    pBdc->ConfigFlags = ConfigFlags;
++    pBdc->MaxHcdRecursion = HcdRCount;
++    return SDIO_STATUS_SUCCESS;
++}
++
++static void CardDetect_TimerFunc(unsigned long Context)
++{
++    DBG_PRINT(SDIODBG_CD_TIMER, ("+ SDIO BusDriver Card Detect Timer\n"));
++
++        /* timers run in an ISR context and cannot block or sleep, so we need
++         * to queue a work item to call the bus driver timer notification */
++
++    if (schedule_work(&CardDetectPollWork) <= 0) {
++        DBG_PRINT(SDDBG_ERROR, ("Failed to queue Card Detect timer!\n"));
++    }
++
++    DBG_PRINT(SDIODBG_CD_TIMER, ("- SDIO BusDriver  Card Detect Timer\n"));
++}
++
++/*
++ * Initialize any timers we are using
++*/
++SDIO_STATUS InitializeTimers(void)
++{
++    init_timer(&CardDetectTimer);
++    CardDetectTimer.function = CardDetect_TimerFunc;
++    CardDetectTimer.data = 0;
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * cleanup timers
++*/
++SDIO_STATUS CleanupTimers(void)
++{
++    del_timer(&CardDetectTimer);
++    return SDIO_STATUS_SUCCESS;
++}
++
++
++/*
++ * Queue a timer, Timeout is in milliseconds
++*/
++SDIO_STATUS QueueTimer(INT TimerID, UINT32 TimeOut)
++{
++    UINT32 delta;
++
++        /* convert timeout to ticks */
++    delta = (TimeOut * HZ)/1000;
++    if (delta == 0) {
++        delta = 1;
++    }
++    DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer System Ticks Per Sec:%d \n",HZ));
++    DBG_PRINT(SDIODBG_CD_TIMER, ("SDIO BusDriver - SDIO_QueueTimer TimerID: %d TimeOut:%d MS, requires %d Ticks\n",
++                TimerID,TimeOut,delta));
++    switch (TimerID) {
++        case SDIOBUS_CD_TIMER_ID:
++            CardDetectTimer.expires = jiffies + delta;
++            add_timer(&CardDetectTimer);
++            break;
++        default:
++            return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++/* check a response on behalf of the host controller, to allow it to proceed with a
++ * data transfer */
++SDIO_STATUS SDIO_CheckResponse(PSDHCD pHcd, PSDREQUEST pReq, SDHCD_RESPONSE_CHECK_MODE CheckMode)
++{
++    return _SDIO_CheckResponse(pHcd,pReq,CheckMode);
++}
++
++/*
++ * CardDetect_WorkItem - the work item for handling card detect polling interrupt
++*/
++static void CardDetect_WorkItem(struct work_struct * work)
++{
++        /* call bus driver function */
++    SDIO_NotifyTimerTriggered(SDIOBUS_CD_TIMER_ID);
++}
++
++/*
++ * OS_IncHcdReference - increment host controller driver reference count
++*/
++SDIO_STATUS Do_OS_IncHcdReference(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    do {
++        if (NULL == pHcd->pModule) {
++                /* hcds that are 2.3 or higher should set this */
++            DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s should set module ptr!\n",
++                (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
++            break;
++        }
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        if (!try_module_get(pHcd->pModule)) {
++            status = SDIO_STATUS_ERROR;
++        }
++#else
++        if (!try_inc_mod_count(pHcd->pModule)) {
++            status = SDIO_STATUS_ERROR;
++        }
++#endif
++
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: HCD:%s failed to get module\n",
++            (pHcd->pName != NULL) ? pHcd->pName : "Unknown"));
++    }
++
++    return status;
++}
++
++/*
++ * OS_DecHcdReference - decrement host controller driver reference count
++*/
++SDIO_STATUS Do_OS_DecHcdReference(PSDHCD pHcd)
++{
++    if (pHcd->pModule != NULL) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        module_put(pHcd->pModule);
++#else
++            /* 2.4 or lower */
++        __MOD_DEC_USE_COUNT(pHcd->pModule);
++#endif
++    }
++    return SDIO_STATUS_SUCCESS;
++}
++
++/****************************************************************************************/
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/pnp.h>
++
++#if !defined(CONFIG_PNP)
++#error "CONFIG_PNP not defined"
++#endif
++
++static ULONG InUseDevices = 0;
++static spinlock_t InUseDevicesLock = SPIN_LOCK_UNLOCKED;
++
++static const struct pnp_device_id pnp_idtable[] = {
++    {"SD_XXXX",  0}
++};
++static int sdio_get_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
++{
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO BusDriver - sdio_get_resources: %s\n",
++        pDev->dev.bus_id));
++    return 0;
++}
++static int sdio_set_resources(struct pnp_dev * pDev, struct pnp_resource_table * res)
++{
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO BusDriver - sdio_set_resources: %s\n",
++        pDev->dev.bus_id));
++    return 0;
++}
++
++static int sdio_disable_resources(struct pnp_dev *pDev)
++{
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO BusDriver - sdio_disable_resources: %s\n",
++        pDev->dev.bus_id));
++    if (pDev != NULL) {
++        pDev->active = 0;
++    }
++    return 0;
++}
++void    release(struct device * pDev) {
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO BusDriver - release: %s\n",
++        pDev->bus_id));
++    return;
++}
++struct pnp_protocol sdio_protocol = {
++    .name   = "SDIO",
++    .get    = sdio_get_resources,
++    .set    = sdio_set_resources,
++    .disable = sdio_disable_resources,
++    .dev.release = release,
++};
++
++/*
++ * driver_probe - probe for OS based driver
++*/
++static int driver_probe(struct pnp_dev* pOSDevice, const struct pnp_device_id *pId)
++{
++    PSDDEVICE pDevice = SDDEVICE_FROM_OSDEVICE(pOSDevice);
++    PSDFUNCTION pFunction = pDevice->Device.dev.driver_data;
++
++    if (pFunction == NULL) {
++        return -1;
++    }
++
++    if (strcmp(pFunction->pName, pOSDevice->dev.driver->name) == 0) {
++        DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - driver_probe, match: %s/%s driver: %s\n",
++            pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
++        return 1;
++    } else {
++        DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - driver_probe, no match: %s/%s driver: %s\n",
++            pOSDevice->dev.bus_id, pFunction->pName, pOSDevice->dev.driver->name));
++        return -1;
++    }
++/*    if (pOSDevice->id != NULL) {
++        if (strcmp(pOSDevice->id->id, pId->id) == 0) {
++            DBG_PRINT(SDDBG_TRACE,
++                ("SDIO BusDriver - driver_probe, match: %s/%s\n",
++                pOSDevice->dev.bus_id, pId->id));
++            return 1;
++        }
++        DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - driver_probe, did not match: %s/%s/%s\n",
++            pOSDevice->dev.bus_id, pId->id, pOSDevice->id->id));
++    } else {
++        DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - driver_probe, did not match: %s/%s\n",
++            pOSDevice->dev.bus_id, pId->id));
++    }
++    return -1;
++*/
++//??    if (pDevice->Device.dev.driver_data != NULL) {
++//??        if (pDevice->Device.dev.driver_data == pFunction) {
++//??    if (pDevice->Device.data != NULL) {
++//??        if (pDevice->Device.data == pFunction) {
++//??            DBG_PRINT(SDDBG_TRACE,
++//??                ("SDIO BusDriver - driver_probe, match: %s\n",
++//??                pOSDevice->dev.bus_id));
++//??            return 1;
++//??        }
++//??    }
++   DBG_PRINT(SDDBG_TRACE,
++        ("SDIO BusDriver - driver_probe,  match: %s\n",
++        pOSDevice->dev.bus_id));
++    return 1;
++}
++
++static int RegisterDriver(PSDFUNCTION pFunction)
++{
++    memset(&pFunction->Driver, 0, sizeof(pFunction->Driver));
++    pFunction->Driver.name = pFunction->pName;
++    pFunction->Driver.probe = driver_probe;
++    pFunction->Driver.id_table = pnp_idtable;
++    pFunction->Driver.flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
++
++    DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - SDIO_RegisterFunction, registering driver: %s\n",
++            pFunction->Driver.name));
++    return pnp_register_driver(&pFunction->Driver);
++}
++
++static int UnregisterDriver(PSDFUNCTION pFunction)
++{
++    DBG_PRINT(SDDBG_TRACE,
++            ("+SDIO BusDriver - UnregisterDriver, driver: %s\n",
++            pFunction->Driver.name));
++    pnp_unregister_driver(&pFunction->Driver);
++    DBG_PRINT(SDDBG_TRACE,
++            ("-SDIO BusDriver - UnregisterDriver\n"));
++   return 0;
++}
++
++/*
++ * OS_InitializeDevice - initialize device that will be registered
++*/
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++    struct pnp_id *pFdname;
++    memset(&pDevice->Device, 0, sizeof(pDevice->Device));
++    pDevice->Device.dev.driver_data = (PVOID)pFunction;
++//??    pDevice->Device.data = (PVOID)pFunction;
++//??    pDevice->Device.dev.driver = &pFunction->Driver.driver;
++//??    pDevice->Device.driver = &pFunction->Driver;
++//??    pDevice->Device.dev.release = release;
++    /* get a unique device number, must be done with locks held */
++    spin_lock(&InUseDevicesLock);
++    pDevice->Device.number = FirstClearBit(&InUseDevices);
++    SetBit(&InUseDevices, pDevice->Device.number);
++    spin_unlock(&InUseDevicesLock);
++    pDevice->Device.capabilities = PNP_REMOVABLE | PNP_DISABLE;
++    pDevice->Device.protocol = &sdio_protocol;
++    pDevice->Device.active = 1;
++
++    pnp_init_resource_table(&pDevice->Device.res);
++
++    pFdname = KernelAlloc(sizeof(struct pnp_id));
++
++    if (NULL == pFdname) {
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++    /* set the id as slot number/function number */
++    snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X%02X",
++             pDevice->pHcd->SlotNumber, (UINT)SDDEVICE_GET_SDIO_FUNCNO(pDevice));
++    pFdname->next = NULL;
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_InitializeDevice adding id: %s\n",
++                             pFdname->id));
++    pnp_add_id(pFdname, &pDevice->Device);
++
++        /* deal with DMA settings */
++    if (pDevice->pHcd->pDmaDescription != NULL) {
++        pDevice->Device.dev.dma_mask = &pDevice->pHcd->pDmaDescription->Mask;
++        pDevice->Device.dev.coherent_dma_mask = pDevice->pHcd->pDmaDescription->Mask;
++    }
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
++*/
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++    int error;
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
++                               pFunction->pName));
++    error = pnp_add_device(&pDevice->Device);
++    if (error < 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - OS_AddDevice failed pnp_add_device: %d\n",
++                               error));
++    }
++        /* replace the buggy pnp's release */
++    pDevice->Device.dev.release = release;
++
++    return OSErrorToSDIOError(error);
++}
++
++/*
++ * OS_RemoveDevice - unregister device with driver and bus
++*/
++void OS_RemoveDevice(PSDDEVICE pDevice)
++{
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
++//    pnp_remove_device(&pDevice->Device);
++    spin_lock(&InUseDevicesLock);
++    ClearBit(&InUseDevices, pDevice->Device.number);
++    spin_unlock(&InUseDevicesLock);
++
++    if (pDevice->Device.id != NULL) {
++        KernelFree(pDevice->Device.id);
++        pDevice->Device.id = NULL;
++    }
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Add OS device to bus driver.
++
++  @function name: SDIO_BusAddOSDevice
++  @category: HD_Reference
++
++  @output: pDma    - descrip[tion of support DMA or NULL
++  @output: pDriver - assigned driver object
++  @output: pDevice - assigned device object
++
++  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when successful.
++
++  @notes: If the HCD does not register with the driver sub-system directly (like in the PCI case),
++          then it should register with the bus driver to obtain OS dependent device objects.
++          All input structures should be maintained throughout the life of the driver.
++
++  @example: getting device objects:
++    typedef struct _SDHCD_DRIVER {
++        OS_PNPDEVICE   HcdDevice;     / * the OS device for this HCD * /
++        OS_PNPDRIVER   HcdDriver;     / * the OS driver for this HCD * /
++        SDDMA_DESCRIPTION Dma;        / * driver DMA description * /
++    }SDHCD_DRIVER, *PSDHCD_DRIVER;
++
++    typedef struct _SDHCD_DRIVER_CONTEXT {
++        PTEXT        pDescription;       / * human readable device decsription * /
++        SDLIST       DeviceList;         / * the list of current devices handled by this driver * /
++        OS_SEMAPHORE DeviceListSem;      / * protection for the DeviceList * /
++        UINT         DeviceCount;        / * number of devices currently installed * /
++        SDHCD_DRIVER Driver;             / * OS dependent driver specific info * /
++    }SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++    static SDHCD_DRIVER_CONTEXT HcdContext = {
++        .pDescription  = DESCRIPTION,
++        .DeviceCount   = 0,
++        .Driver.HcdDevice.name = "sdio_xxx_hcd",
++        .Driver.HcdDriver.name = "sdio_xxx_hcd",
++    }
++    .....
++    status = SDIO_BusAddOSDevice(NULL, &HcdContext.Driver, &HcdContext.Device);
++    if (SDIO_SUCCESS(status) {
++        return Probe(&HcdContext.Device);
++    }
++    return SDIOErrorToOSError(status);
++
++  @see also: SDIO_BusRemoveOSDevice
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SDIO_BusAddOSDevice(PSDDMA_DESCRIPTION pDma, POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
++{
++    int err;
++    struct pnp_id *pFdname;
++    struct pnp_device_id *pFdid;
++    static int slotNumber = 0; /* we just use an increasing count for the slots number */
++
++    if (pDma != NULL) {
++        pDevice->dev.dma_mask = &pDma->Mask;
++        pDevice->dev.coherent_dma_mask = pDma->Mask;
++    }
++    DBG_PRINT(SDDBG_ERROR,
++            ("SDIO BusDriver - SDIO_GetBusOSDevice, registering driver: %s DMAmask: 0x%x\n",
++            pDriver->name, (UINT)*pDevice->dev.dma_mask));
++    pFdid = KernelAlloc(sizeof(struct pnp_device_id)*2);
++    /* set the id as slot number/function number */
++    snprintf(pFdid[0].id, sizeof(pFdid[0].id), "SD_%02X08",
++             slotNumber++);
++    pFdid[0].driver_data = 0;
++    pFdid[1].id[0] = '\0';
++    pFdid[1].driver_data = 0;
++
++    pDriver->id_table = pFdid;
++    pDriver->flags = PNP_DRIVER_RES_DO_NOT_CHANGE;
++    err = pnp_register_driver(pDriver);
++    if (err < 0) {
++        DBG_PRINT(SDDBG_ERROR,
++            ("SDIO BusDriver - SDIO_GetBusOSDevice, failed registering driver: %s, err: %d\n",
++            pDriver->name, err));
++        return OSErrorToSDIOError(err);
++    }
++
++    pDevice->protocol = &sdio_protocol;
++    pDevice->capabilities = PNP_REMOVABLE | PNP_DISABLE;
++    pDevice->active = 1;
++
++    pFdname = KernelAlloc(sizeof(struct pnp_id));
++    /* set the id as slot number/function number */
++    snprintf(pFdname->id, sizeof(pFdname->id), "SD_%02X08",
++             0); //??pDevice->pHcd->SlotNumber);//?????fix this, slotnumber isn't vaialble yet
++    pFdname->next = NULL;
++    pnp_add_id(pFdname, pDevice);
++
++    /* get a unique device number */
++    spin_lock(&InUseDevicesLock);
++    pDevice->number = FirstClearBit(&InUseDevices);
++    SetBit(&InUseDevices, pDevice->number);
++    spin_unlock(&InUseDevicesLock);
++    pnp_init_resource_table(&pDevice->res);
++    err = pnp_add_device(pDevice);
++    if (err < 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO BusDriver - SDIO_GetBusOSDevice failed pnp_device_add: %d\n",
++                               err));
++        pnp_unregister_driver(pDriver);
++    }
++    /* replace the buggy pnp's release */
++    pDevice->dev.release = release;
++    return OSErrorToSDIOError(err);
++}
++
++/**+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Return OS device from bus driver.
++
++  @function name: SDIO_BusRemoveOSDevice
++  @category: HD_Reference
++
++  @input: pDriver - setup PNP driver object
++  @input: pDevice - setup PNP device object
++
++  @return: none
++
++
++  @example: returning device objects:
++        SDIO_BusRemoveOSDevice(&HcdContext.Driver, &HcdContext.Device);
++
++
++  @see also: SDIO_BusAddOSDevice
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SDIO_BusRemoveOSDevice(POS_PNPDRIVER pDriver, POS_PNPDEVICE pDevice)
++{
++    DBG_PRINT(SDDBG_ERROR,
++            ("SDIO BusDriver - SDIO_PutBusOSDevice, unregistering driver: %s\n",
++            pDriver->name));
++
++//    pnp_remove_device(pDevice);
++    if (pDevice->id != NULL) {
++        KernelFree(pDevice->id);
++        pDevice->id = NULL;
++    }
++
++    spin_lock(&InUseDevicesLock);
++    ClearBit(&InUseDevices, pDevice->number);
++    spin_unlock(&InUseDevicesLock);
++
++    pnp_unregister_driver(pDriver);
++    if (pDriver->id_table != NULL) {
++        KernelFree((void *)pDriver->id_table);
++        pDriver->id_table = NULL;
++    }
++
++}
++
++
++/*
++ * module init
++*/
++static int __init sdio_busdriver_init(void) {
++    SDIO_STATUS status;
++    int error;
++    REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
++    if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
++        return SDIOErrorToOSError(status);
++    }
++    /* register the sdio bus */
++    error = pnp_register_protocol(&sdio_protocol);
++    if (error < 0) {
++        REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: failed to register bus device, %d\n", error));
++        _SDIO_BusDriverCleanup();
++        return error;
++    }
++    return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_busdriver_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
++    _SDIO_BusDriverCleanup();
++    pnp_unregister_protocol(&sdio_protocol);
++DBG_PRINT(SDDBG_TRACE,
++            ("SDIO BusDriver - unloaded 1\n"));
++}
++EXPORT_SYMBOL(SDIO_BusAddOSDevice);
++EXPORT_SYMBOL(SDIO_BusRemoveOSDevice);
++
++#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
++    /* 2.4 */
++static int RegisterDriver(PSDFUNCTION pFunction)
++{
++    return 0;
++}
++
++static int UnregisterDriver(PSDFUNCTION pFunction)
++{
++    DBG_PRINT(SDDBG_TRACE,
++            ("+-SDIO BusDriver - UnregisterDriver, driver: \n"));
++   return 0;
++}
++
++/*
++ * OS_InitializeDevice - initialize device that will be registered
++*/
++SDIO_STATUS OS_InitializeDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * OS_AddDevice - must be pre-initialized with OS_InitializeDevice
++*/
++SDIO_STATUS OS_AddDevice(PSDDEVICE pDevice, PSDFUNCTION pFunction)
++{
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_AddDevice adding function: %s\n",
++                               pFunction->pName));
++    return SDIO_STATUS_SUCCESS;
++
++}
++
++/*
++ * OS_RemoveDevice - unregister device with driver and bus
++*/
++void OS_RemoveDevice(PSDDEVICE pDevice)
++{
++    DBG_PRINT(SDDBG_TRACE, ("SDIO BusDriver - OS_RemoveDevice \n"));
++}
++
++/*
++ * module init
++*/
++static int __init sdio_busdriver_init(void) {
++    SDIO_STATUS status;
++    REL_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: loaded\n"));
++    if (!SDIO_SUCCESS((status = _SDIO_BusDriverInitialize()))) {
++        return SDIOErrorToOSError(status);
++    }
++    return 0;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_busdriver_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("SDIO unloaded\n"));
++    _SDIO_BusDriverCleanup();
++}
++#else  ////KERNEL_VERSION
++#error "unsupported kernel version: "UTS_RELEASE
++#endif //KERNEL_VERSION
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_busdriver_init);
++module_exit(sdio_busdriver_cleanup);
++EXPORT_SYMBOL(SDIO_RegisterHostController);
++EXPORT_SYMBOL(SDIO_UnregisterHostController);
++EXPORT_SYMBOL(SDIO_HandleHcdEvent);
++EXPORT_SYMBOL(SDIO_CheckResponse);
++EXPORT_SYMBOL(SDIO_RegisterFunction);
++EXPORT_SYMBOL(SDIO_UnregisterFunction);
+Index: linux-2.6.22/drivers/sdio/busdriver/sdio_function.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/busdriver/sdio_function.c	2007-11-08 17:15:26.000000000 +0100
+@@ -0,0 +1,713 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_function.c
++
++ at abstract: OS independent bus driver support for function drivers
++
++ at notes: This file supports the interface between SDIO function drivers and the bus driver.
++
++ at notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDBUSDRIVER
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "_busdriver.h"
++
++static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction);
++
++#ifdef CT_MAN_CODE_CHECK
++static UINT16 ManCodeCheck = CT_MAN_CODE_CHECK;
++#endif
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Register a function driver with the bus driver.
++
++  @function name: SDIO_RegisterFunction
++  @prototype: SDIO_STATUS SDIO_RegisterFunction(PSDFUNCTION pFunction)
++  @category: PD_Reference
++  @input:  pFunction - the function definition structure.
++
++  @output: none
++
++  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
++
++  @notes: Each function driver must register with the bus driver once upon loading.
++          The calling function must be prepared to receive a Probe callback before
++          this function returns. This will occur when an perpheral device is already
++          pluugged in that is supported by this function.
++          The function driver should unregister itself when exiting.
++          The bus driver checks for possible function drivers to support a device
++          in reverse registration order.
++
++  @example: Registering a function driver:
++            //list of devices supported by this function driver
++       static SD_PNP_INFO Ids[] = {
++            {.SDIO_ManufacturerID = 0xaa55,
++             .SDIO_ManufacturerCode = 0x5555,
++             .SDIO_FunctionNo = 1},
++            {}                      //list is null termintaed
++        };
++        static GENERIC_FUNCTION_CONTEXT FunctionContext = {
++            .Function.pName    = "sdio_generic", //name of the device
++            .Function.Version  = CT_SDIO_STACK_VERSION_CODE, // set stack version
++            .Function.MaxDevices = 1,    //maximum number of devices supported by this driver
++            .Function.NumDevices = 0,    //current number of devices, always zero to start
++            .Function.pIds     = Ids,    //the list of devices supported by this device
++            .Function.pProbe   = Probe,  //pointer to the function drivers Probe function
++                                         //  that will be called when a possibly supported device
++                                         //  is inserted.
++            .Function.pRemove  = Remove, //pointer to the function drivers Remove function
++                                         /  that will be called when a device is removed.
++            .Function.pContext = &FunctionContext, //data value that will be passed into Probe and
++                                         //  Remove callbacks.
++        };
++        SDIO_STATUS status;
++        status = SDIO_RegisterFunction(&FunctionContext.Function)
++        if (!SDIO_SUCCESS(status)) {
++            ...failed to register
++        }
++
++  @see also: SDIO_UnregisterFunction
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_RegisterFunction(PSDFUNCTION pFunction)
++{
++	SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++#ifdef CT_MAN_CODE_CHECK
++    DBG_PRINT(SDDBG_TRACE,
++        ("SDIO Bus Driver: _SDIO_RegisterFunction: WARNING, this version is locked to Memory cards and SDIO cards with JEDEC IDs of: 0x%X\n",
++            ManCodeCheck));
++#else
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: _SDIO_RegisterFunction\n"));
++#endif
++
++	DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: Function Driver Stack Version: %d.%d \n",
++        GET_SDIO_STACK_VERSION_MAJOR(pFunction),GET_SDIO_STACK_VERSION_MINOR(pFunction)));
++
++    if (!CHECK_FUNCTION_DRIVER_VERSION(pFunction)) {
++        DBG_PRINT(SDDBG_ERROR,
++           ("SDIO Bus Driver: Function Major Version Mismatch (hcd = %d, bus driver = %d)\n",
++           GET_SDIO_STACK_VERSION_MAJOR(pFunction), CT_SDIO_STACK_VERSION_MAJOR(g_Version)));
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++
++	/* sanity check the driver */
++	if ((pFunction == NULL) ||
++		(pFunction->pProbe == NULL) ||
++		(pFunction->pIds == NULL)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, invalid registration data\n"));
++	    return SDIO_STATUS_INVALID_PARAMETER;
++	}
++    /* protect the function list and add the function */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++      goto cleanup;   /* wait interrupted */
++    }
++    SignalInitialize(&pFunction->CleanupReqSig);
++    SDLIST_INIT(&pFunction->DeviceList);
++    SDListAdd(&pBusContext->FunctionList, &pFunction->SDList);
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++      goto cleanup;   /* wait interrupted */
++    }
++
++	/* see if we have devices for this new function driver */
++	ProbeForDevice(pFunction);
++
++	return status;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: _SDIO_RegisterFunction, error exit 0x%X\n", status));
++    return status;
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: Unregister a function driver with the bus driver.
++
++  @function name: SDIO_UnregisterFunction
++  @prototype: SDIO_STATUS SDIO_UnregisterFunction(PSDFUNCTION pFunction)
++  @category: PD_Reference
++
++  @input:  pFunction - the function definition structure.
++
++  @output: none
++
++  @return: SDIO_STATUS - SDIO_STATUS_SUCCESS when succesful.
++
++  @notes: Each function driver must unregister from the bus driver when the function driver
++          exits.
++          A function driver must disconnect from any interrupts before calling this function.
++
++  @example: Unregistering a function driver:
++        SDIO_UnregisterFunction(&FunctionContext.Function);
++
++  @see also: SDIO_RegisterFunction
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS _SDIO_UnregisterFunction(PSDFUNCTION pFunction)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDDEVICE pDevice;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
++
++    /* protect the function list and synchronize with Probe() and Remove()*/
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++        /* remove this function from the function list */
++    SDListRemove(&pFunction->SDList);
++        /* now remove this function as the handler for any of its devices */
++    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink)  {
++        if (pDevice->pFunction == pFunction) {
++                /* notify removal */
++            NotifyDeviceRemove(pDevice);
++        }
++    }SDITERATE_END;
++
++    SignalDelete(&pFunction->CleanupReqSig);
++
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: _SDIO_UnregisterFunction\n"));
++	return status;
++
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: _SDIO_UnregisterFunction, error exit 0x%X\n", status));
++    return status;
++}
++
++/* documentation headers only for Probe and Remove */
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: This function is called by the Busdriver when a device is inserted that can be supported by this function driver.
++
++  @function name: Probe
++  @prototype: BOOL (*pProbe)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
++  @category: PD_Reference
++
++  @input:  pFunction - the function definition structure that was passed to Busdriver
++                       via the SDIO_RegisterFunction.
++  @input:  pDevice   - the description of the newly inserted device.
++
++  @output: none
++
++  @return: TRUE  - this function driver will suport this device
++           FALSE - this function driver will not support this device
++
++  @notes: The Busdriver calls the Probe function of a function driver to inform it that device is
++          available for the function driver to control. The function driver should initialize the
++          device and be pepared to acceopt any interrupts from the device before returning.
++
++  @example: Example of typical Probe function callback:
++  static BOOL Probe(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
++       ...get the our context info passed into the SDIO_RegisterFunction
++    PSDXXX_DRIVER_CONTEXT pFunctionContext =
++                                (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
++    SDIO_STATUS status;
++       //test the identification of this device and ensure we want to support it
++       // we can test based on class, or use more specific tests on SDIO_ManufacturerID, etc.
++    if (pDevice->pId[0].SDIO_FunctionClass == XXX) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO XXX Function: Probe - card matched (0x%X/0x%X/0x%X)\n",
++                                pDevice->pId[0].SDIO_ManufacturerID,
++                                pDevice->pId[0].SDIO_ManufacturerCode,
++                                pDevice->pId[0].SDIO_FunctionNo));
++        ...
++
++  @see also: SDIO_RegisterFunction
++  @see also: Remove
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++BOOL FilterPnpInfo(PSDDEVICE pDevice)
++{
++#ifdef CT_MAN_CODE_CHECK
++    if (pDevice->pId[0].CardFlags & CARD_SDIO) {
++        if (pDevice->pId[0].SDIO_ManufacturerCode != ManCodeCheck) {
++            DBG_PRINT(SDDBG_ERROR,
++             ("SDIO Card with JEDEC ID:0x%X , not Allowed! Driver check halted. "
++              "Please Contact sales at codetelligence.com.\n",
++                    pDevice->pId[0].SDIO_ManufacturerCode));
++            return FALSE;
++        }
++    }
++    return TRUE;
++#else
++    return TRUE;
++#endif
++}
++
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  @function: This function is called by the Busdriver when a device controlled by this function
++             function driver is removed.
++
++  @function name: Remove
++  @prototype: void (*pRemove)(struct _SDFUNCTION *pFunction, struct _SDDEVICE *pDevice)
++  @category: PD_Reference
++
++  @input:  pFunction - the function definition structure that was passed to Busdriver
++                       via the SDIO_RegisterFunction.
++  @input:  pDevice   - the description of the device being removed.
++
++  @output: none
++
++  @return: none
++
++  @notes: The Busdriver calls the Remove function of a function driver to inform it that device it
++          was supporting has been removed. The device has already been removed, so no further I/O
++          to the device can be performed.
++
++  @example: Example of typical Remove function callback:
++    void Remove(PSDFUNCTION pFunction, PSDDEVICE pDevice) {
++            // get the our context info passed into the SDIO_RegisterFunction
++        PSDXXX_DRIVER_CONTEXT pFunctionContext =
++                             (PSDXXX_DRIVER_CONTEXT)pFunction->pContext;
++           ...free any acquired resources.
++
++  @see also: SDIO_RegisterFunction
++  @see also: Probe
++
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++
++/*
++ * ProbeForFunction - look for a function driver to handle this card
++ *
++*/
++SDIO_STATUS ProbeForFunction(PSDDEVICE pDevice, PSDHCD pHcd) {
++    SDIO_STATUS status;
++    PSDLIST pList;
++    PSDFUNCTION pFunction;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: ProbeForFunction\n"));
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - Dump of Device PNP Data: \n"));
++    DBG_PRINT(SDDBG_TRACE, (" Card Flags 0x%X \n", pDevice->pId[0].CardFlags));
++    if (pDevice->pId[0].CardFlags & CARD_SDIO) {
++        DBG_PRINT(SDDBG_TRACE, (" SDIO MANF:      0x%X \n", pDevice->pId[0].SDIO_ManufacturerID));
++        DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE:  0x%X \n", pDevice->pId[0].SDIO_ManufacturerCode));
++        DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo:    %d \n", pDevice->pId[0].SDIO_FunctionNo));
++        DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pDevice->pId[0].SDIO_FunctionClass));
++    }
++    if (pDevice->pId[0].CardFlags & (CARD_MMC | CARD_SD)) {
++        DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID: 0x%X \n",pDevice->pId[0].SDMMC_ManfacturerID));
++        DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID:  0x%X \n",pDevice->pId[0].SDMMC_OEMApplicationID));
++    }
++
++    if (!FilterPnpInfo(pDevice)) {
++        status = SDIO_STATUS_SUCCESS;
++        goto cleanup;
++    }
++
++    /* protect the function list */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++
++    /* protect against ProbeForDevice */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++            /* release the function list semaphore we just took */
++        SemaphorePost(&pBusContext->FunctionListSem);
++        goto cleanup;
++    }
++
++    if (pDevice->pFunction != NULL) {
++            /* device already has a function driver handling it */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction, device already has function\n"));
++            /* release function list */
++        SemaphorePost(&pBusContext->DeviceListSem);
++            /* release function list */
++        SemaphorePost(&pBusContext->FunctionListSem);
++            /* just return success */
++        status = SDIO_STATUS_SUCCESS;
++        goto cleanup;
++    }
++
++        /* release device list */
++    SemaphorePost(&pBusContext->DeviceListSem);
++
++    /* walk functions looking for one that can handle this device */
++    SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
++        pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
++        if (pFunction->NumDevices >=  pFunction->MaxDevices) {
++            /* function can't support any more devices */
++            continue;
++        }
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction - checking: %s \n",
++                                pFunction->pName));
++
++        /* see if this function handles this device */
++        if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
++            if (!FilterPnpInfo(pDevice)) {
++                break;
++            }
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForFunction -Got Match, probing: %s \n",
++                                    pFunction->pName));
++            /* we need to setup with the OS bus driver before the probe, so probe can
++              do OS operations. */
++            OS_InitializeDevice(pDevice, pFunction);
++            if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
++                break;
++            }
++            /* close enough match, ask the function driver if it supports us */
++            if (pFunction->pProbe(pFunction, pDevice)) {
++                /* she accepted the device, add to list */
++                pDevice->pFunction = pFunction;
++                SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
++                pFunction->NumDevices++;
++                break;
++            } else {
++                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
++                  pFunction->pName));
++                /* didn't take this device */
++                OS_RemoveDevice(pDevice);
++            }
++
++        }
++    }
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: ProbeForFunction\n"));
++	return status;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForFunction, error exit 0x%X\n", status));
++    return status;
++}
++
++/*
++ * ProbeForDevice - look for a device that this function driver supports
++ *
++*/
++static SDIO_STATUS ProbeForDevice(PSDFUNCTION pFunction) {
++    SDIO_STATUS status;
++    PSDLIST pList;
++    PSDDEVICE pDevice;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice\n"));
++    if (pFunction->NumDevices >=  pFunction->MaxDevices) {
++        /* function can't support any more devices */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, too many devices in function\n"));
++        return SDIO_STATUS_SUCCESS;
++    }
++
++     /* protect the driver list */
++    if (!SDIO_SUCCESS((status = SemaphorePendInterruptable(&pBusContext->DeviceListSem)))) {
++      goto cleanup;   /* wait interrupted */
++    }
++    /* walk device list */
++    SDITERATE_OVER_LIST(&pBusContext->DeviceList, pList) {
++        pDevice = CONTAINING_STRUCT(pList, SDDEVICE, SDList);
++        if (pDevice->pFunction != NULL) {
++            /* device already has a function driver handling it */
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, device already has function\n"));
++            continue;
++        }
++        /* see if this function handles this device */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, matching ID:%d %d class:%d\n",
++                                pDevice->pId[0].SDIO_ManufacturerID,
++                                pDevice->pId[0].SDIO_FunctionNo,
++                                pDevice->pId[0].SDIO_FunctionClass));
++        if (IsPotentialIdMatch(pDevice->pId, pFunction->pIds)) {
++            if (!FilterPnpInfo(pDevice)) {
++                break;
++            }
++            /* we need to setup with the OS bus driver before the probe, so probe can
++              do OS operations. */
++            OS_InitializeDevice(pDevice, pFunction);
++            if (!SDIO_SUCCESS(OS_AddDevice(pDevice, pFunction))) {
++                break;
++            }
++            /* close enough match, ask the function driver if it supports us */
++            if (pFunction->pProbe(pFunction, pDevice)) {
++                /* she accepted the device, add to list */
++                pDevice->pFunction = pFunction;
++                SDListAdd(&pFunction->DeviceList, &pDevice->FuncListLink);
++                pFunction->NumDevices++;
++                break;
++            } else {
++                DBG_PRINT(SDDBG_WARN, ("SDIO Bus Driver: %s did not claim the device \n",
++                  pFunction->pName));
++                /* didn't take this device */
++                OS_RemoveDevice(pDevice);
++            }
++        }
++    }
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->DeviceListSem)))) {
++      goto cleanup;   /* wait interrupted */
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: ProbeForDevice, done: %d\n", status));
++
++	return status;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: ProbeForDevice, error exit 0x%X\n", status));
++    return status;
++}
++
++#if 0
++static void DumpPnpEntry(PSD_PNP_INFO pInfo)
++{
++    DBG_PRINT(SDDBG_TRACE, ("Function PnpInfo Dump: \n"));
++    DBG_PRINT(SDDBG_TRACE, (" Card Flags      0x%X \n", pInfo->CardFlags));
++    DBG_PRINT(SDDBG_TRACE, (" SDIO MANF:      0x%X \n", pInfo->SDIO_ManufacturerID));
++    DBG_PRINT(SDDBG_TRACE, (" SDIO MANFCODE:  0x%X \n", pInfo->SDIO_ManufacturerCode));
++    DBG_PRINT(SDDBG_TRACE, (" SDIO FuncNo:    %d \n", pInfo->SDIO_FunctionNo));
++    DBG_PRINT(SDDBG_TRACE, (" SDIO FuncClass: %d \n", pInfo->SDIO_FunctionClass));
++    DBG_PRINT(SDDBG_TRACE, (" SDMMC MANFID:   0x%X \n", pInfo->SDMMC_ManfacturerID));
++    DBG_PRINT(SDDBG_TRACE, (" SDMMC OEMID:    0x%X \n", pInfo->SDMMC_OEMApplicationID));
++}
++#endif
++/*
++ * IsPotentialIdMatch - test for potential device match
++ *
++*/
++BOOL IsPotentialIdMatch(PSD_PNP_INFO pIdsDev, PSD_PNP_INFO pIdsFuncList) {
++    PSD_PNP_INFO pTFn;
++	BOOL match = FALSE;
++
++	for (pTFn = pIdsFuncList;!IS_LAST_SDPNPINFO_ENTRY(pTFn);pTFn++) {
++        //DumpPnpEntry(pTFn);
++            /* check specific SDIO Card manufacturer ID, Code and Function number */
++		if ((pIdsDev->SDIO_ManufacturerID != 0) &&
++		    (pTFn->SDIO_ManufacturerID != 0) &&
++		    (pIdsDev->SDIO_ManufacturerID == pTFn->SDIO_ManufacturerID) &&
++		    (pIdsDev->SDIO_ManufacturerCode == pTFn->SDIO_ManufacturerCode) &&
++            ((pIdsDev->SDIO_FunctionNo == pTFn->SDIO_FunctionNo) ||
++             (pTFn->SDIO_FunctionNo == 0)) ) {
++		    match = TRUE;
++            break;
++		}
++            /* check generic function class */
++        if ((pIdsDev->SDIO_FunctionClass != 0) &&
++            (pTFn->SDIO_FunctionClass != 0) &&
++            (pIdsDev->SDIO_FunctionClass == pTFn->SDIO_FunctionClass)) {
++            match = TRUE;
++            break;
++        }
++            /* check specific SDMMC MANFID and APPLICATION ID, NOTE SANDISK
++             * uses a MANFID of zero! */
++        if ((pTFn->SDMMC_OEMApplicationID != 0) &&
++            (pIdsDev->SDMMC_ManfacturerID == pTFn->SDMMC_ManfacturerID) &&
++            (pIdsDev->SDMMC_OEMApplicationID == pTFn->SDMMC_OEMApplicationID)) {
++            match = TRUE;
++            break;
++        }
++
++            /* check generic SD Card */
++        if ((pIdsDev->CardFlags & CARD_SD) &&
++            (pTFn->CardFlags & CARD_SD)){
++            match = TRUE;
++            break;
++        }
++
++            /* check generic MMC Card */
++        if ((pIdsDev->CardFlags & CARD_MMC) &&
++            (pTFn->CardFlags & CARD_MMC)){
++            match = TRUE;
++            break;
++        }
++
++             /* check raw Card */
++        if ((pIdsDev->CardFlags & CARD_RAW) &&
++            (pTFn->CardFlags & CARD_RAW)){
++            match = TRUE;
++            break;
++        }
++	}
++
++    return match;
++}
++
++/*
++ * NotifyDeviceRemove - tell function driver on this device that the device is being removed
++ *
++*/
++SDIO_STATUS NotifyDeviceRemove(PSDDEVICE pDevice) {
++    SDIO_STATUS     status;
++    SDREQUESTQUEUE  cancelQueue;
++    PSDREQUEST      pReq;
++    CT_DECLARE_IRQ_SYNC_CONTEXT();
++
++    InitializeRequestQueue(&cancelQueue);
++
++	if ((pDevice->pFunction != NULL) &&
++        (pDevice->pFunction->pRemove != NULL)){
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: removing device 0x%X\n", (INT)pDevice));
++            /* fail any outstanding requests for this device */
++            /* acquire lock for request queue */
++        status = _AcquireHcdLock(pDevice->pHcd);
++        if (!SDIO_SUCCESS(status)) {
++            return status;
++        }
++            /* mark the function to block any more requests comming down */
++        pDevice->pFunction->Flags |= SDFUNCTION_FLAG_REMOVING;
++            /* walk through HCD queue and remove this function's requests */
++        SDITERATE_OVER_LIST_ALLOW_REMOVE(&pDevice->pHcd->RequestQueue.Queue, pReq, SDREQUEST, SDList) {
++            if (pReq->pFunction == pDevice->pFunction) {
++                /* cancel this request, as this device or function is being removed */
++                /* note that these request are getting completed out of order */
++                DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: canceling req 0x%X\n", (UINT)pReq));
++                pReq->Status = SDIO_STATUS_CANCELED;
++                    /* remove it from the HCD queue */
++                SDListRemove(&pReq->SDList);
++                    /* add it to the cancel queue */
++                QueueRequest(&cancelQueue, pReq);
++            }
++        }SDITERATE_END;
++
++        status = _ReleaseHcdLock(pDevice->pHcd);
++
++           /* now empty the cancel queue if anything is in there */
++        while (TRUE) {
++            pReq = DequeueRequest(&cancelQueue);
++            if (NULL == pReq) {
++                break;
++            }
++                /* complete the request */
++            DoRequestCompletion(pReq, pDevice->pHcd);
++        }
++            /* re-acquire the lock to deal with the current request */
++        status = _AcquireHcdLock(pDevice->pHcd);
++        if (!SDIO_SUCCESS(status)) {
++            return status;
++        }
++            /* now deal with the current request */
++        pReq = GET_CURRENT_REQUEST(pDevice->pHcd);
++        if ((pReq !=NULL) && (pReq->pFunction == pDevice->pFunction) && (pReq->pFunction != NULL)) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding Req 0x%X on HCD: 0x%X.. waiting...\n",
++                (UINT)pReq, (UINT)pDevice->pHcd));
++                /* the outstanding request on this device is for the function being removed */
++            pReq->Flags |= SDREQ_FLAGS_CANCELED;
++                /* wait for this request to get completed normally */
++            status = _ReleaseHcdLock(pDevice->pHcd);
++            SignalWait(&pDevice->pFunction->CleanupReqSig);
++            DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver - NotifyDeviceRemove: Outstanding HCD Req 0x%X completed \n", (UINT)pReq));
++        }  else {
++                /* release lock */
++            status = _ReleaseHcdLock(pDevice->pHcd);
++        }
++
++            /* synchronize with ISR SYNC Handlers */
++	 	status = SemaphorePendInterruptable(&pBusContext->DeviceListSem);
++        if (!SDIO_SUCCESS(status)) {
++            return status;
++        }
++            /* call this devices Remove function */
++        pDevice->pFunction->pRemove(pDevice->pFunction,pDevice);
++        pDevice->pFunction->NumDevices--;
++            /* make sure the sync handler is NULLed out */
++        pDevice->pIrqFunction = NULL;
++        SemaphorePost(&pBusContext->DeviceListSem);
++
++        OS_RemoveDevice(pDevice);
++            /* detach this device from the function list it belongs to */
++        SDListRemove(&pDevice->FuncListLink);
++        pDevice->pFunction->Flags &= ~SDFUNCTION_FLAG_REMOVING;
++		pDevice->pFunction = NULL;
++	}
++	return SDIO_STATUS_SUCCESS;
++}
++
++
++/*
++ * RemoveHcdFunctions - remove all functions attached to an HCD
++ *
++*/
++SDIO_STATUS RemoveHcdFunctions(PSDHCD pHcd) {
++    SDIO_STATUS status;
++    PSDLIST pList;
++    PSDFUNCTION pFunction;
++    PSDDEVICE pDevice;
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO Bus Driver: RemoveHcdFunctions\n"));
++
++    /* walk through the functions and remove the ones associated with this HCD */
++    /* protect the driver list */
++    if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++        /* mark that card is being removed */
++    pHcd->CardProperties.CardState |= CARD_STATE_REMOVED;
++    SDITERATE_OVER_LIST(&pBusContext->FunctionList, pList) {
++        pFunction = CONTAINING_STRUCT(pList, SDFUNCTION, SDList);
++        DBG_PRINT(SDDBG_TRACE, ("SDIO Bus Driver: scanning function 0x%X, %s\n", (INT)pFunction,
++                                (pFunction == NULL)?"NULL":pFunction->pName));
++
++        /* walk the devices on this function and look for a match */
++        SDITERATE_OVER_LIST_ALLOW_REMOVE(&pFunction->DeviceList, pDevice, SDDEVICE,FuncListLink) {
++            if (pDevice->pHcd == pHcd) {
++                /* match, remove it */
++                NotifyDeviceRemove(pDevice);
++            }
++        SDITERATE_END;
++    SDITERATE_END;
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->FunctionListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO Bus Driver: RemoveHcdFunctions\n"));
++    return SDIO_STATUS_SUCCESS;
++
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("-SDIO Bus Driver: RemoveHcdFunctions, error exit 0x%X\n", status));
++    return status;
++}
++
++/*
++ * RemoveAllFunctions - remove all functions attached
++ *
++*/
++SDIO_STATUS RemoveAllFunctions()
++{
++    SDIO_STATUS status;
++    PSDLIST pList;
++    PSDHCD pHcd;
++
++    /* walk through the HCDs  */
++    /* protect the driver list */
++    if (!SDIO_SUCCESS((status = SemaphorePend(&pBusContext->HcdListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    SDITERATE_OVER_LIST(&pBusContext->HcdList, pList) {
++        pHcd = CONTAINING_STRUCT(pList, SDHCD, SDList);
++            /* remove the functions */
++        RemoveHcdFunctions(pHcd);
++    }
++    if (!SDIO_SUCCESS((status = SemaphorePost(&pBusContext->HcdListSem)))) {
++        goto cleanup;   /* wait interrupted */
++    }
++    return SDIO_STATUS_SUCCESS;
++cleanup:
++    DBG_PRINT(SDDBG_ERROR, ("SDIO Bus Driver: RemoveAllFunctions, error exit 0x%X\n", status));
++    return status;
++}
++
+Index: linux-2.6.22/drivers/sdio/hcd/Kconfig
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/Kconfig	2007-11-08 17:25:17.000000000 +0100
+@@ -0,0 +1,56 @@
++#
++#
++#
++
++menu "Host Controllers"
++
++config SDIO_ELLEN
++	tristate "PCI ELLEN (Tokyo Electron) host controller"
++	depends on PCI
++	default m
++	help
++	  good luck.
++
++config SDIO_MX21
++	tristate "ARM MX21 host controller"
++	depends on ARCH_MX21
++	default m
++	help
++	  good luck.
++
++config SDIO_OMAP
++	tristate "ARM OMAP host controller"
++	depends on ARCH_OMAP
++	default m
++	help
++	  good luck.
++
++config SDIO_OMAP_2420
++	tristate "ARM OMAP 2420 host controller"
++	depends on ARCH_OMAP24XX
++	default m
++	help
++	  good luck.
++
++config SDIO_PXA270
++	tristate "ARM PXA270 host controller"
++	depends on PXA27x
++	default m
++	help
++	  good luck.
++
++config SDIO_PXA255
++	tristate "ARM PXA255 host controller"
++	depends on PXA255
++	default m
++	help
++	  good luck.
++
++config SDIO_SPI
++	tristate "SPI host controller"
++	depends on SPI
++	default m
++	help
++	  good luck.
++
++endmenu
+Index: linux-2.6.22/drivers/sdio/hcd/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/Makefile	2007-11-08 17:25:17.000000000 +0100
+@@ -0,0 +1,8 @@
++# SDIO stack host controller Makefile
++obj-$(CONFIG_SDIO_STDHCD)		+= stdhost/
++obj-$(CONFIG_SDIO_ELLEN)		+= pci_ellen/
++obj-$(CONFIG_ARCH_MX21)			+= mx21/
++obj-$(CONFIG_ARCH_OMAP)			+= omap/
++obj-$(CONFIG_ARCH_OMAP24XX)		+= omap_2420/
++obj-$(CONFIG_PXA27x)			+= pxa270/
++obj-$(CONFIG_PXA255)			+= pxa255/
+Index: linux-2.6.22/drivers/sdio/hcd/pci_ellen/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pci_ellen/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,7 @@
++#
++# SDIO pci_ellen host controller makefile
++#
++obj-m += sdio_pciellen_hcd.o
++
++sdio_pciellen_hcd-objs := sdio_hcd.o sdio_hcd_os.o
++
+Index: linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1238 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd.c
++
++ at abstract: Tokyo Electron PCI Ellen SDIO Host Controller Driver
++
++#notes: OS independent code
++
++ at notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "sdio_hcd_linux.h"
++#include "sdio_pciellen_hcd.h"
++
++#define CLOCK_ON  TRUE
++#define CLOCK_OFF FALSE
++
++void Dbg_DumpBuffer(PUCHAR pBuffer, INT Length);
++SDIO_STATUS SetPowerLevel(PSDHCD_DEVICE pDeviceContext, BOOL On, SLOT_VOLTAGE_MASK Level);
++
++
++SD_CLOCK_TBL_ENTRY SDClockDivisorTable[SD_CLOCK_MAX_ENTRIES] =
++{   /* clock rate divisor, divisor setting */
++    {1, 0x0000},
++    {2, 0x0100},
++    {4, 0x0200},
++    {8, 0x0400},
++    {16,0x0800},
++    {32,0x1000},
++    {64,0x2000},
++    {128,0x4000},
++    {256,0x8000},
++};
++
++
++#define WAIT_REGISTER32_CHANGE(pDevice, pStatus, reg,mask,cmp,timout) \
++    {\
++        if (!WaitRegisterBitsChange((pDevice),    \
++                                    (pStatus),    \
++                                    (reg),        \
++                                    (mask),       \
++                                    (cmp),        \
++                                    (timout))) {  \
++           DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - Reg Change Timeout : 0x%X src:%s, line:%d \n",\
++           (reg),__FILE__, __LINE__));        \
++        }                                     \
++    }
++
++#define WAIT_FOR_DAT_CMD_DAT_READY(pDevice, pStatus) \
++        WAIT_REGISTER32_CHANGE(pDevice,            \
++                             pStatus,            \
++                             HOST_REG_PRESENT_STATE,(HOST_REG_PRESENT_STATE_BUFFER_COMMAND_INHIBIT_DAT | \
++                             HOST_REG_PRESENT_STATE_BUFFER_COMMAND_INHIBIT_CMD), \
++                             0, 30000)
++
++
++INLINE BOOL WaitRegisterBitsChange(PSDHCD_DEVICE pDevice,
++                                   SDIO_STATUS   *pStatus,
++                                   UINT32         Reg,
++                                   UINT32         Mask,
++                                   UINT32         CompareMask,
++                                   UINT32         Count)
++{
++    while (Count) {
++
++        if ((READ_HOST_REG32(pDevice, Reg) & Mask) == CompareMask) {
++            break;
++        }
++
++        Count--;
++    }
++
++    if (0 == Count) {
++        if (pStatus != NULL) {
++            *pStatus = SDIO_STATUS_ERROR;
++        }
++        return FALSE;
++    }
++
++    if (pStatus != NULL) {
++        *pStatus = SDIO_STATUS_SUCCESS;
++    }
++
++    return TRUE;
++}
++
++
++/* reset command data line state machines - xx*/
++void ResetCmdDatLine(PSDHCD_DEVICE pDevice)
++{
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen Issuing CMD DAT Reset \n"));
++        // issue reset
++    WRITE_HOST_REG32(pDevice, HOST_REG_SW_RESET,
++            (HOST_REG_SW_RST_CMD_LINE | HOST_REG_SW_RST_DAT_LINE));
++        // wait for bits to clear
++    WAIT_REGISTER32_CHANGE(pDevice, NULL,
++                         HOST_REG_SW_RESET,
++                         HOST_REG_SW_RST_CMD_LINE | HOST_REG_SW_RST_DAT_LINE,
++                         0,
++                         30000);
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen CMD DAT Reset Done \n"));
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetResponseData - get the response data
++  Input:    pDevice - device context
++            pReq - the request
++  Output:
++  Return: returns status
++  Notes: This function returns SDIO_STATUS_SUCCESS for SD mode.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS GetResponseData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     dwordCount;
++    INT     byteCount;
++    UINT32  readBuffer[4];
++    UINT    ii;
++
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP) {
++        return SDIO_STATUS_SUCCESS;
++    }
++
++
++    byteCount = SD_DEFAULT_RESPONSE_BYTES;
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++        byteCount = SD_R2_RESPONSE_BYTES;
++    }
++    dwordCount = (byteCount + 3) / 4;
++
++    /* move data into read buffer */
++    for (ii = 0; ii < dwordCount; ii++) {
++        readBuffer[ii] = READ_HOST_REG32(pDevice, HOST_REG_RESPONSE+(ii*4));
++    }
++
++    /* handle normal SD/MMC responses */
++
++    /* the standard host strips the CRC for all responses and puts them in
++     * a nice linear order */
++    memcpy(&pReq->Response[1],readBuffer,byteCount);
++
++    if (DBG_GET_DEBUG_LEVEL() >= PXA_TRACE_REQUESTS) {
++        if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++            byteCount = 17;
++        }
++        SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO PCI Ellen - Response Dump");
++    }
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  DumpCurrentRequestInfo - debug dump
++  Input:    pDevice - device context
++  Output:
++  Return:
++  Notes: This function debug prints the current request
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void DumpCurrentRequestInfo(PSDHCD_DEVICE pDevice)
++{
++    if (pDevice->Hcd.pCurrentRequest != NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - Current Request Command:%d, ARG:0x%8.8X\n",
++                  pDevice->Hcd.pCurrentRequest->Command, pDevice->Hcd.pCurrentRequest->Argument));
++        if (IS_SDREQ_DATA_TRANS(pDevice->Hcd.pCurrentRequest->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++                      IS_SDREQ_WRITE_DATA(pDevice->Hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
++                      pDevice->Hcd.pCurrentRequest->BlockCount,
++                      pDevice->Hcd.pCurrentRequest->BlockLen,
++                      pDevice->Hcd.pCurrentRequest->DataRemaining));
++        }
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TranslateSDError - check for an SD error
++  Input:    pDevice - device context
++            Status -  error interrupt status register value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TranslateSDError(PSDHCD_DEVICE pDevice, UINT16 Status)
++{
++    if (Status & HOST_REG_ERROR_INT_STATUS_CRCERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - RESP CRC ERROR \n"));
++        return SDIO_STATUS_BUS_RESP_CRC_ERR;
++    } else if (Status & HOST_REG_ERROR_INT_STATUS_DATATIMEOUTERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - DATA TIMEOUT ERROR \n"));
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    } else if (Status & HOST_REG_ERROR_INT_STATUS_DATACRCERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - READDATA CRC ERROR \n"));
++        DumpCurrentRequestInfo(pDevice);
++        return SDIO_STATUS_BUS_READ_CRC_ERR;
++    } else if (Status & HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR) {
++        if (pDevice->CardInserted) {
++                /* hide error if we are polling an empty slot */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - RESPONSE TIMEOUT \n"));
++        }
++        return SDIO_STATUS_BUS_RESP_TIMEOUT;
++    }
++    DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen - untranslated error 0x%X\n", (UINT)Status));
++
++    return SDIO_STATUS_DEVICE_ERROR;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ClockStartStop - SD clock control
++  Input:  pDevice - device object
++          On - turn on or off (TRUE/FALSE)
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ClockStartStop(PSDHCD_DEVICE pDevice, BOOL On)
++{
++    /* beware, an unprotected read-modify-write */
++    UINT16 state;
++
++    DBG_PRINT(PXA_TRACE_CLOCK, ("SDIO PCI Ellen - ClockStartStop, %d\n", (UINT)On));
++
++    state = READ_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL);
++
++    if (On) {
++        state |= HOST_REG_CLOCK_CONTROL_SD_ENABLE;
++        WRITE_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL, state);
++    } else {
++        state &= ~HOST_REG_CLOCK_CONTROL_SD_ENABLE;
++        WRITE_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL, state);
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetBusMode - Set Bus mode
++  Input:  pDevice - device object
++          pMode - mode
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetBusMode(PSDHCD_DEVICE pDevice, PSDCONFIG_BUS_MODE_DATA pMode)
++{
++    int ii;
++    int clockIndex;
++    UINT16 state;
++    UINT32 rate;
++
++    DBG_PRINT(PXA_TRACE_CONFIG , ("SDIO PCI Ellen - SetMode\n"));
++
++        /* set clock index to the end, the table is sorted this way */
++    clockIndex = SD_CLOCK_MAX_ENTRIES - 1;
++    pMode->ActualClockRate = (pDevice->BaseClock) / SDClockDivisorTable[clockIndex].ClockRateDivisor;
++    for (ii = 0; ii < SD_CLOCK_MAX_ENTRIES; ii++) {
++        rate = pDevice->BaseClock / SDClockDivisorTable[ii].ClockRateDivisor;
++        if (pMode->ClockRate >= rate) {
++            pMode->ActualClockRate = rate;
++            clockIndex = ii;
++            break;
++        }
++    }
++
++    switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++        case SDCONFIG_BUS_WIDTH_1_BIT:
++            WRITE_HOST_REG8(pDevice, HOST_REG_CONTROL, HOST_REG_CONTROL_1BIT_WIDTH);
++            //WRITE_HOST_REG16(pDevice, HOST_REG_CONTROL, HOST_REG_CONTROL_1BIT_WIDTH);
++            break;
++        case SDCONFIG_BUS_WIDTH_4_BIT:
++            WRITE_HOST_REG8(pDevice, HOST_REG_CONTROL, HOST_REG_CONTROL_4BIT_WIDTH);
++            //WRITE_HOST_REG16(pDevice, HOST_REG_CONTROL, HOST_REG_CONTROL_4BIT_WIDTH);
++            break;
++        default:
++            break;
++    }
++
++        /* set the clock divisor, unprotected read modify write */
++    state = SDClockDivisorTable[clockIndex].RegisterValue | HOST_REG_CLOCK_CONTROL_CLOCK_ENABLE;
++    WRITE_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL, state);
++
++        /* wait for stable */
++    while(!(READ_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL) & HOST_REG_CLOCK_CONTROL_CLOCK_STABLE)) {
++      ;
++    }
++    WRITE_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL, state | HOST_REG_CLOCK_CONTROL_SD_ENABLE);
++
++    state = READ_HOST_REG16(pDevice, HOST_REG_CLOCK_CONTROL);
++    DBG_PRINT(PXA_TRACE_CONFIG , ("SDIO PCI Ellen - Clock: %d Khz, ClockRate %d (%d) state:0x%X\n",
++                                   pMode->ActualClockRate, pMode->ClockRate, clockIndex, (UINT)state));
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdTransferTxData - data transmit transfer
++  Input:  pDevice - device object
++          pReq    - transfer request
++  Output:
++  Return:
++  Notes: writes request data
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++
++    dataCopy = min(pReq->DataRemaining, (UINT)pReq->BlockLen);
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++    /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++    /* set the block data */
++    while(dataCopy) {
++        UINT32 outData = 0;
++        UINT   count = 0;
++        if (dataCopy > 4) {
++            outData = ((UINT32)(*(pBuf+0))) |
++                      (((UINT32)(*(pBuf+1))) << 8) |
++                      (((UINT32)(*(pBuf+2))) << 16) |
++                      (((UINT32)(*(pBuf+3))) << 24);
++            WRITE_HOST_REG32(pDevice, HOST_REG_BUFFER_DATA_PORT, outData);
++            dataCopy -= 4;
++            pBuf += 4;
++        } else {
++            for(count = 0; (dataCopy > 0) && (count < 4); count++) {
++               outData |= (*pBuf) << (count*8);
++               pBuf++;
++               dataCopy--;
++            }
++            WRITE_HOST_REG32(pDevice, HOST_REG_BUFFER_DATA_PORT, outData);
++        }
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++    if (pReq->DataRemaining) {
++        return FALSE;
++    }
++    return TRUE;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdTransferRxData - data receive transfer
++  Input:  pDevice - device object
++          pReq    - transfer request
++  Output:
++  Return:
++  Notes: reads request data
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++
++    dataCopy = min(pReq->DataRemaining, (UINT)pReq->BlockLen);
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++    /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++    /* set the block data */
++    while(dataCopy) {
++        UINT32 inData;
++        UINT   count = 0;
++        inData = READ_HOST_REG32(pDevice, HOST_REG_BUFFER_DATA_PORT);
++        for(count = 0; (dataCopy > 0) && (count < 4); count++) {
++            *pBuf = (inData >> (count*8)) & 0xFF;
++            dataCopy--;
++            pBuf++;
++        }
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdRequest - SD request handler
++  Input:  pHcd - HCD object
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdRequest(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    UINT16                temp;
++    UINT16                ints;
++    PSDREQUEST            pReq;
++
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++        /* make sure clock is off */
++    ClockStartStop(pDevice, CLOCK_OFF);
++
++    if(pDevice->ShuttingDown) {
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen HcdRequest returning canceled\n"));
++        return SDIO_STATUS_CANCELED;
++    }
++    /* make sure error ints are disabled */
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                (UINT16)(~HOST_REG_ERROR_INT_STATUS_ALL_ERR));
++
++    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++        default:
++        case SDREQ_FLAGS_NO_RESP:
++            temp = 0x00;
++            break;
++        case SDREQ_FLAGS_RESP_R2:
++            temp = 0x01 |
++                    HOST_REG_COMMAND_REGISTER_CRC_CHECK_ENABLE;
++            break;
++        case SDREQ_FLAGS_RESP_R3:
++        case SDREQ_FLAGS_RESP_SDIO_R4:
++            temp = 0x02;
++            break;
++        case SDREQ_FLAGS_RESP_R1:
++        case SDREQ_FLAGS_RESP_SDIO_R5:
++        case SDREQ_FLAGS_RESP_R6:
++            temp = 0x02 | HOST_REG_COMMAND_REGISTER_CRC_CHECK_ENABLE
++                        | HOST_REG_COMMAND_REGISTER_CMD_INDEX_CHECK_ENABLE;
++            break;
++        case SDREQ_FLAGS_RESP_R1B:
++            temp = 0x03 | HOST_REG_COMMAND_REGISTER_CRC_CHECK_ENABLE
++                        | HOST_REG_COMMAND_REGISTER_CMD_INDEX_CHECK_ENABLE;
++            break;
++    }
++
++        /* start the clock */
++    ClockStartStop(pDevice, CLOCK_ON);
++    /* mask the remove while we are spinning on the CMD ready bits */
++    MaskIrq(pDevice, HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY);
++    WAIT_FOR_DAT_CMD_DAT_READY(pDevice, &status);
++
++    if (!SDIO_SUCCESS(status)) {
++        ResetCmdDatLine(pDevice);
++        goto processComplete;
++    }
++        /* clear any error statuses */
++    WRITE_HOST_REG16(pDevice, HOST_REG_ERROR_INT_STATUS, HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    WRITE_HOST_REG16(pDevice, HOST_REG_NORMAL_INT_STATUS, HOST_REG_NORMAL_INT_STATUS_ALL_ERR);
++
++    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS){
++        /* set the block size register */
++        WRITE_HOST_REG16(pDevice, HOST_REG_BLOCK_SIZE, pReq->BlockLen);
++        /* set block count register */
++        WRITE_HOST_REG16(pDevice, HOST_REG_BLOCK_COUNT, pReq->BlockCount);
++        pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++        DBG_PRINT(PXA_TRACE_DATA, ("SDIO PCI Ellen %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                   pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++            /* use the context to hold where we are in the buffer */
++        pReq->pHcdContext = pReq->pDataBuffer;
++        temp |= HOST_REG_COMMAND_REGISTER_DATA_PRESENT;
++    }
++
++    /* set the argument register */
++    WRITE_HOST_REG32(pDevice, HOST_REG_ARGUMENT, pReq->Argument);
++    /* set transfer mode register */
++    WRITE_HOST_REG16(pDevice, HOST_REG_TRANSFER_MODE,
++            ((pReq->BlockCount > 1) ? HOST_REG_TRANSFER_MODE_MULTI_BLOCK:0) |
++            ((pReq->BlockCount > 1) ? HOST_REG_TRANSFER_MODE_BLOCKCOUNT_ENABLE:0) |
++            ((pReq->Flags & SDREQ_FLAGS_AUTO_CMD12) ? HOST_REG_TRANSFER_MODE_AUTOCMD12 : 0) |
++            ((IS_SDREQ_WRITE_DATA(pReq->Flags))?0 : HOST_REG_TRANSFER_MODE_READ));
++
++    /* block cmd timeout errors */
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                HOST_REG_ERROR_INT_STATUS_ALL_ERR & ~HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR);
++
++    /* set command register, make sure it is clear to write */
++    temp |= (pReq->Command << HOST_REG_COMMAND_REGISTER_CMD_SHIFT);
++    DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen CMDDAT:0x%X (RespType:%d, Command:0x%X , Arg:0x%X) \n",
++              temp, GET_SDREQ_RESP_TYPE(pReq->Flags), pReq->Command, pReq->Argument));
++
++
++    if (SDHCD_GET_OPER_CLOCK(pHcd) < pDevice->ClockSpinLimit) {
++            /* clock rate is very low, need to use interrupts here */
++            /* enable error interrupts */
++        WRITE_HOST_REG16(pDevice, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++        UnmaskIrq(pDevice, HOST_REG_INT_STATUS_CMD_COMPLETE_ENABLE);
++        WRITE_HOST_REG16(pDevice, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                            HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++             if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                 TRACE_SIGNAL_DATA_WRITE(pDevice, TRUE);
++             } else {
++                 TRACE_SIGNAL_DATA_READ(pDevice, TRUE);
++             }
++        }
++
++        WRITE_HOST_REG16(pDevice, HOST_REG_COMMAND_REGISTER, temp);
++
++        status = SDIO_STATUS_PENDING;
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen using interrupt for command done.*** with data. (clock:%d, ref:%d)\n",
++                SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++        } else {
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen using interrupt for command done. (clock:%d, ref:%d) \n",
++                SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++        }
++        return status;
++    } else {
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++             if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                 TRACE_SIGNAL_DATA_WRITE(pDevice, TRUE);
++             } else {
++                 TRACE_SIGNAL_DATA_READ(pDevice, TRUE);
++             }
++        }
++        WRITE_HOST_REG16(pDevice, HOST_REG_COMMAND_REGISTER, temp);
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++            WAIT_REGISTER32_CHANGE(pDevice,
++                                   &status,
++                                   HOST_REG_PRESENT_STATE,
++                                   HOST_REG_PRESENT_STATE_BUFFER_COMMAND_INHIBIT_CMD,
++                                   0, 30000);
++        } else  {
++            WAIT_FOR_DAT_CMD_DAT_READY(pDevice, &status);
++        }
++
++        if (!SDIO_SUCCESS(status)) {
++            ResetCmdDatLine(pDevice);
++            goto processComplete;
++        }
++    }
++
++    /* check for errors */
++    temp = READ_HOST_REG16(pDevice, HOST_REG_ERROR_INT_STATUS);
++    ints = READ_HOST_REG16(pDevice, HOST_REG_NORMAL_INT_STATUS);
++    if (ints & HOST_REG_NORMAL_INT_STATUS_TRANSFER_COMPLETE) {
++        DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdRequest clearing possible data timeout errors: 0x%X, ints: 0x%X \n",
++                                      temp, ints));
++        temp &= ~HOST_REG_ERROR_INT_STATUS_DATATIMEOUTERR;
++    }
++    WRITE_HOST_REG16(pDevice, HOST_REG_NORMAL_INT_STATUS,
++                                HOST_REG_NORMAL_INT_STATUS_CMD_COMPLETE);
++
++    UnmaskIrq(pDevice, HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY);
++
++    if (temp != 0) {
++        if (temp & HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR) {
++            /* toggle timeout gpio */
++            TRACE_SIGNAL_DATA_TIMEOUT(pDevice, TRUE);
++            TRACE_SIGNAL_DATA_TIMEOUT(pDevice, FALSE);
++        }
++        status = TranslateSDError(pDevice, temp);
++        /* clear any existing errors - non-synchronized clear */
++        WRITE_HOST_REG16(pDevice, HOST_REG_ERROR_INT_STATUS, HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++            /* reset statemachine, just in case */
++        ResetCmdDatLine(pDevice);
++    } else if (pDevice->Cancel) {
++        status = SDIO_STATUS_CANCELED;
++    } else {
++            /* get the response data for the command */
++        status = GetResponseData(pDevice, pReq);
++    }
++
++
++        /* check for data */
++    if (SDIO_SUCCESS(status) && (pReq->Flags & SDREQ_FLAGS_DATA_TRANS)){
++
++            /* check with the bus driver if it is okay to continue with data */
++        status = SDIO_CheckResponse(pHcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++
++        if (SDIO_SUCCESS(status)) {
++            /* re-enable the cmd timeout error */
++            WRITE_HOST_REG16(pDevice, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                    HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                /* see if the buffer is ready, it should be */
++                ints = READ_HOST_REG16(pDevice, HOST_REG_NORMAL_INT_STATUS);
++                if (ints & HOST_REG_INT_STATUS_BUFFER_WRITE_RDY_ENABLE) {
++                    WRITE_HOST_REG16(pDevice,
++                                    HOST_REG_NORMAL_INT_STATUS,
++                                    HOST_REG_NORMAL_INT_STATUS_BUFFER_WRITE_RDY);
++
++                    /* send the initial buffer */
++                    /* transfer data */
++                    HcdTransferTxData(pDevice, pReq);
++                }
++                    /* expecting interrupt */
++                UnmaskIrq(pDevice, HOST_REG_INT_STATUS_TRANSFER_COMPLETE_ENABLE
++                                   | HOST_REG_INT_STATUS_BUFFER_WRITE_RDY_ENABLE);
++            } else {
++                UnmaskIrq(pDevice, HOST_REG_INT_STATUS_TRANSFER_COMPLETE_ENABLE
++                                   | HOST_REG_INT_STATUS_BUFFER_READ_RDY_ENABLE);
++            }
++            DBG_PRINT(PXA_TRACE_DATA, ("SDIO PCI Ellen Pending %s transfer \n",
++                                       IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++
++                /* return pending */
++            status = SDIO_STATUS_PENDING;
++        } else {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen : Response for Data transfer error :%d n",status));
++            ResetCmdDatLine(pDevice);
++        }
++    }
++
++processComplete:
++
++    if (status != SDIO_STATUS_PENDING) {
++        if (!pDevice->KeepClockOn) {
++            ClockStartStop(pDevice, CLOCK_OFF);
++        }
++        pReq->Status = status;
++
++        if (IS_SDREQ_FORCE_DEFERRED_COMPLETE(pReq->Flags)) {
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen deferring completion to work item \n"));
++                /* the HCD must do the indication in a separate context and return status pending */
++            QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++            return SDIO_STATUS_PENDING;
++        } else {
++                /* complete the request */
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen Command Done, status:%d \n", status));
++        }
++        pDevice->Cancel = FALSE;
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdConfig - HCD configuration handler
++  Input:  pHcd - HCD object
++          pConfig - configuration setting
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16      command;
++    UINT32 temp;
++
++    if(pDevice->ShuttingDown) {
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PCI Ellen HcdConfig returning canceled\n"));
++        return SDIO_STATUS_CANCELED;
++    }
++
++    command = GET_SDCONFIG_CMD(pConfig);
++
++    switch (command){
++        case SDCONFIG_GET_WP:
++            /* get write protect */
++            temp = READ_HOST_REG32(pDevice, HOST_REG_PRESENT_STATE);
++            /* if write enabled, set WP value to zero */
++            *((SDCONFIG_WP_VALUE *)pConfig->pData) =
++                    (temp & HOST_REG_PRESENT_STATE_WRITE_ENABLED )? 0 : 1;
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++            ClockStartStop(pDevice,CLOCK_ON);
++                /* should be at least 80 clocks at our lowest clock setting */
++            status = OSSleep(100);
++            ClockStartStop(pDevice,CLOCK_OFF);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                {
++                    SDIO_IRQ_MODE_FLAGS irqModeFlags;
++                    UINT8               blockGapControl;
++
++                    irqModeFlags = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->IRQDetectMode;
++                    if (irqModeFlags & IRQ_DETECT_4_BIT) {
++                        DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen: 4 Bit IRQ mode \r\n"));
++                            /* in 4 bit mode, the clock needs to be left on */
++                        pDevice->KeepClockOn = TRUE;
++                        blockGapControl = READ_HOST_REG8(pDevice,HOST_REG_BLOCK_GAP);
++                        if (irqModeFlags & IRQ_DETECT_MULTI_BLK) {
++                            blockGapControl |= HOST_REG_INT_DETECT_AT_BLOCK_GAP;
++                            DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen: 4 Bit Multi-block IRQ detection enabled \r\n"));
++                        } else {
++                                // no interrupts between blocks
++                            blockGapControl &= ~HOST_REG_INT_DETECT_AT_BLOCK_GAP;
++                        }
++                        WRITE_HOST_REG8(pDevice,HOST_REG_BLOCK_GAP,blockGapControl);
++                    } else {
++                            /* in 1 bit mode, the clock can be left off */
++                        pDevice->KeepClockOn = FALSE;
++                    }
++                }
++                    /* enable detection */
++                EnableDisableSDIOIRQ(pDevice,TRUE,FALSE);
++            } else {
++                pDevice->KeepClockOn = FALSE;
++                EnableDisableSDIOIRQ(pDevice,FALSE,FALSE);
++            }
++            break;
++        case SDCONFIG_SDIO_REARM_INT:
++                /* re-enable IRQ detection */
++            EnableDisableSDIOIRQ(pDevice,TRUE,FALSE);
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++            SetBusMode(pDevice, (PSDCONFIG_BUS_MODE_DATA)(pConfig->pData));
++            break;
++        case SDCONFIG_POWER_CTRL:
++            DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PCI Ellen PwrControl: En:%d, VCC:0x%X \n",
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask));
++            status = SetPowerLevel(pDevice,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask);
++            break;
++        default:
++            /* invalid request */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen Local HCD: HcdConfig - bad command: 0x%X\n",
++                                    command));
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return status;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetPowerLevel - Set power level of board
++  Input:  pDeviceContext - device context
++          On - if true turns power on, else off
++          Level - SLOT_VOLTAGE_MASK level
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS SetPowerLevel(PSDHCD_DEVICE pDeviceContext, BOOL On, SLOT_VOLTAGE_MASK Level)
++{
++    UINT8 out;
++    UINT32 capCurrent;
++
++    capCurrent = READ_HOST_REG32(pDeviceContext, HOST_REG_MAX_CURRENT_CAPABILITIES);
++
++    switch (Level) {
++      case SLOT_POWER_3_3V:
++        out = HOST_REG_POWER_CONTROL_VOLT_3_3;
++            /* extract */
++        capCurrent = (capCurrent & HOST_REG_MAX_CURRENT_CAPABILITIES_3_3_MASK) >>
++                        HOST_REG_MAX_CURRENT_CAPABILITIES_3_3_SHIFT;
++        break;
++      case SLOT_POWER_3_0V:
++        out = HOST_REG_POWER_CONTROL_VOLT_3_0;
++            /* extract */
++        capCurrent = (capCurrent & HOST_REG_MAX_CURRENT_CAPABILITIES_3_0_MASK) >>
++                        HOST_REG_MAX_CURRENT_CAPABILITIES_3_0_SHIFT;
++        break;
++      case SLOT_POWER_1_8V:
++        out = HOST_REG_POWER_CONTROL_VOLT_1_8;
++            /* extract */
++        capCurrent = (capCurrent & HOST_REG_MAX_CURRENT_CAPABILITIES_1_8_MASK) >>
++                        HOST_REG_MAX_CURRENT_CAPABILITIES_1_8_SHIFT;
++        break;
++      default:
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen SetPowerLevel - illegal power level %d\n",
++                                (UINT)Level));
++        return SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    if (capCurrent != 0) {
++            /* convert to mA and set max current */
++        pDeviceContext->Hcd.MaxSlotCurrent = capCurrent * HOST_REG_MAX_CURRENT_CAPABILITIES_SCALER;
++    } else {
++        DBG_PRINT(SDDBG_WARN, ("SDIO PCI Ellen No Current Caps value for VMask:0x%X, using 200mA \n",
++                  Level));
++            /* set a value */
++        pDeviceContext->Hcd.MaxSlotCurrent = 200;
++    }
++
++    if (On) {
++        out |= HOST_REG_POWER_CONTROL_ON;
++    }
++
++    WRITE_HOST_REG8(pDeviceContext, HOST_REG_POWER_CONTROL, out);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetPowerOn - Set power on or off for card
++  Input:  pDeviceContext - device context
++          On - if true turns power on, else off
++  Output:
++  Return:
++  Notes: leavse the level alone
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetPowerOn(PSDHCD_DEVICE pDeviceContext, BOOL On)
++{
++    /* non-synchronized read modify write */
++    UINT8 out = READ_HOST_REG8(pDeviceContext, HOST_REG_POWER_CONTROL);
++    if (On) {
++        out |= HOST_REG_POWER_CONTROL_ON;
++    } else {
++        out &= ~HOST_REG_POWER_CONTROL_ON;
++    }
++    WRITE_HOST_REG8(pDeviceContext, HOST_REG_POWER_CONTROL, out);
++    return;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInitialize - Initialize MMC controller
++  Input:  pDeviceContext - device context
++  Output:
++  Return:
++  Notes: I/O resources must be mapped before calling this function
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    UINT32 caps;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT32 clockValue;
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO PCI Ellen HcdInitialize\n"));
++
++        /* reset the device */
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen HcdInitialize, resetting\n"));
++    WRITE_HOST_REG8(pDeviceContext, HOST_REG_SW_RESET, HOST_REG_SW_RESET_ALL);
++        /* wait for done */
++    while(READ_HOST_REG8(pDeviceContext, HOST_REG_SW_RESET) &  HOST_REG_SW_RESET_ALL)
++        ;
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen HcdInitialize, reset\n"));
++
++        /* turn off clock */
++    ClockStartStop(pDeviceContext, CLOCK_OFF);
++        /* display version info */
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen HcdInitialize: Spec verison: %s, Vendor version: %d\n",
++       (((READ_HOST_REG16(pDeviceContext, HOST_REG_VERSION) & HOST_REG_VERSION_SPEC_VERSION_MASK )== 0)?
++        "SD Host Spec. 1.0": "SD Host Spec. **UNKNOWN**"),
++        (READ_HOST_REG16(pDeviceContext, HOST_REG_VERSION) >> HOST_REG_VERSION_VENDOR_VERSION_SHIFT) &&
++        HOST_REG_VERSION_VENDOR_VERSION_MASK));
++
++        /* get capabilities */
++    caps = READ_HOST_REG32(pDeviceContext, HOST_REG_CAPABILITIES);
++    pDeviceContext->HighSpeed = (caps & HOST_REG_CAPABILITIES_HIGH_SPEED);
++    switch((caps & HOST_REG_CAPABILITIES_MAX_BLOCK_LEN_MASK) >> HOST_REG_CAPABILITIES_MAX_BLOCK_LEN_SHIFT) {
++        case 0x00:
++            pDeviceContext->Hcd.MaxBytesPerBlock = 512;
++            break;
++        case 0x01:
++            pDeviceContext->Hcd.MaxBytesPerBlock = 1024;
++            break;
++        case 0x02:
++            pDeviceContext->Hcd.MaxBytesPerBlock = 2048;
++            break;
++        case 0x03:
++            pDeviceContext->Hcd.MaxBytesPerBlock = 512;
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen invalid buffer length\n"));
++            status = SDIO_STATUS_DEVICE_ERROR;
++            break;
++    }
++
++    clockValue = (caps & HOST_REG_CAPABILITIES_CLOCK_MASK) >> HOST_REG_CAPABILITIES_CLOCK_SHIFT;
++    if (clockValue != 0) {
++            /* convert to Hz */
++        pDeviceContext->BaseClock = clockValue*1000*1000;
++    } else {
++        DBG_PRINT(SDDBG_WARN, ("SDIO PCI Ellen base clock is zero! (caps:0x%X) \n",caps));
++            /* fall through and see if a default was setup */
++    }
++    if (pDeviceContext->BaseClock == 0) {
++         DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen invalid base clock setting\n"));
++         status = SDIO_STATUS_DEVICE_ERROR;
++         return status;
++    }
++
++    pDeviceContext->Hcd.MaxClockRate =  pDeviceContext->BaseClock;
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen Using clock %dHz, max. block %d, high speed %s\n",
++                            pDeviceContext->BaseClock, pDeviceContext->Hcd.MaxBytesPerBlock,
++                            (pDeviceContext->HighSpeed)? "supported" : "not supported"));
++    /* setup the supported voltages and max current */
++    pDeviceContext->Hcd.SlotVoltageCaps = 0;
++    /* max current is dynamically set based on the desired voltage, see SetPowerLevel() */
++    pDeviceContext->Hcd.MaxSlotCurrent = 0;
++
++    if (caps & HOST_REG_CAPABILITIES_VOLT_1_8) {
++        pDeviceContext->Hcd.SlotVoltageCaps |= SLOT_POWER_1_8V;
++        pDeviceContext->Hcd.SlotVoltagePreferred = SLOT_POWER_1_8V;
++    }
++    if(caps & HOST_REG_CAPABILITIES_VOLT_3_0) {
++        pDeviceContext->Hcd.SlotVoltageCaps |= SLOT_POWER_3_0V;
++        pDeviceContext->Hcd.SlotVoltagePreferred = SLOT_POWER_3_0V;
++    }
++    if(caps & HOST_REG_CAPABILITIES_VOLT_3_3) {
++        pDeviceContext->Hcd.SlotVoltageCaps |= SLOT_POWER_3_3V;
++        pDeviceContext->Hcd.SlotVoltagePreferred = SLOT_POWER_3_3V;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen HcdInitialize: caps: 0x%X, SlotVoltageCaps: 0x%X, MaxSlotCurrent: 0x%X\n",
++                        (UINT)caps, (UINT)pDeviceContext->Hcd.SlotVoltageCaps, (UINT)pDeviceContext->Hcd.MaxSlotCurrent));
++
++        /* set the default timeout */
++    WRITE_HOST_REG8(pDeviceContext, HOST_REG_TIMEOUT_CONTROL, pDeviceContext->TimeOut);
++
++    /* clear any existing errors */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_NORMAL_INT_STATUS, HOST_REG_NORMAL_INT_STATUS_ALL_ERR);
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_ERROR_INT_STATUS, HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    /* enable error interrupts */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_ERR_STATUS_ENABLE, HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++//??    WRITE_HOST_REG16(pDeviceContext, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++//??                HOST_REG_ERROR_INT_STATUS_ALL_ERR & ~HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR);
++    /* leave disabled for now */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                (UINT16)~HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    /* enble statuses */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_INT_STATUS_ENABLE, HOST_REG_INT_STATUS_ALL);
++
++
++    /* interrupts will get enabled by the caller after all of the OS dependent work is done */
++    /*UnmaskIrq(pDeviceContext, HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY);*/
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCI Ellen HcdInitialize\n"));
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdDeinitialize - deactivate controller
++  Input:  pDeviceContext - context
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO PCI Ellen HcdDeinitialize\n"));
++    pDeviceContext->KeepClockOn = FALSE;
++    MaskIrq(pDeviceContext, HOST_REG_INT_STATUS_ALL);
++    pDeviceContext->ShuttingDown = TRUE;
++    /* disable error interrupts */
++    /* clear any existing errors */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_ERROR_INT_STATUS, HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    /* disable error interrupts */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                                     (UINT16)~HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_ERR_STATUS_ENABLE,
++                                     (UINT16)~HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++    ClockStartStop(pDeviceContext, CLOCK_OFF);
++    SetPowerOn(pDeviceContext, FALSE);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCI Ellen HcdDeinitialize\n"));
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdSDInterrupt - process controller interrupt
++  Input:  pDeviceContext - context
++  Output:
++  Return: TRUE if interrupt was handled
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDeviceContext)
++{
++    UINT16      ints;
++    UINT16      errors;
++    UINT16 enables;
++    UINT16 statenables;
++    PSDREQUEST  pReq;
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++
++    DBG_PRINT(PXA_TRACE_MMC_INT, ("+SDIO PCI Ellen HcdSDInterrupt Int handler \n"));
++
++
++    ints = READ_HOST_REG16(pDeviceContext, HOST_REG_NORMAL_INT_STATUS);
++    errors = READ_HOST_REG16(pDeviceContext, HOST_REG_ERROR_INT_STATUS);
++
++    if ((ints == 0) && (errors == 0)) {
++        DBG_PRINT(SDDBG_ERROR, ("-SDIO PCI Ellen HcdSDInterrupt False Interrupt! \n"));
++        return FALSE;
++    }
++    enables = READ_HOST_REG16(pDeviceContext, HOST_REG_INT_SIGNAL_ENABLE);
++    statenables = READ_HOST_REG16(pDeviceContext, HOST_REG_INT_STATUS_ENABLE);
++    DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt, ints: 0x%X errors: 0x%x, sigenables: 0x%X, statenable: 0x%X\n",
++            (UINT)ints, (UINT)errors, (UINT)enables, (UINT)statenables));
++                /* clear any error statuses */
++    WRITE_HOST_REG16(pDeviceContext, HOST_REG_ERROR_INT_STATUS, errors);
++
++    pReq = GET_CURRENT_REQUEST(&pDeviceContext->Hcd);
++
++    if (ints & HOST_REG_NORMAL_INT_STATUS_TRANSFER_COMPLETE) {
++        DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt clearing possible data timeout errors: 0x%X \n",
++                                      errors));
++        errors &= ~HOST_REG_ERROR_INT_STATUS_DATATIMEOUTERR;
++    }
++    /* handle the error cases first */
++    if (errors != 0) {
++        if (errors & HOST_REG_ERROR_INT_STATUS_VENDOR_MASK) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt vendor error 0x%X: \n",
++                        (UINT)((errors & HOST_REG_ERROR_INT_STATUS_VENDOR_MASK) >>
++                                HOST_REG_ERROR_INT_STATUS_VENDOR_SHIFT)));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_AUTOCMD12ERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt auto cmd12 error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_CURRENTLIMITERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt current limit error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_DATAENDBITERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt data end bit error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_DATACRCERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt data CRC error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_DATATIMEOUTERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt data timeout error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_CMDINDEXERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt CMD index error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_CMDENDBITERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt CMD end bit error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_CRCERR) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt CRC error\n"));
++        }
++        if (errors & HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR) {
++            /* toggle timeout gpio */
++            TRACE_SIGNAL_DATA_TIMEOUT(pDeviceContext, TRUE);
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen HcdSDInterrupt CMD timeout error\n"));
++            TRACE_SIGNAL_DATA_TIMEOUT(pDeviceContext, FALSE);
++        }
++        if (ints & HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE) {
++              /* disable SDIO interrupt */
++            EnableDisableSDIOIRQ(pDeviceContext,FALSE,TRUE);
++        }
++        /* process insert/remove even on error conditions */
++        if (ints &
++            (HOST_REG_INT_STATUS_CARD_INSERT_ENABLE | HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE)){
++            /* card was inserted or removed, clear interrupt */
++            WRITE_HOST_REG16(pDeviceContext,
++                             HOST_REG_NORMAL_INT_STATUS,
++                             HOST_REG_INT_STATUS_CARD_INSERT_ENABLE |
++                             HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE);
++            enables = MaskIrqFromIsr(pDeviceContext, HOST_REG_INT_STATUS_ALL);
++            QueueEventResponse(pDeviceContext, WORK_ITEM_CARD_DETECT);
++        }
++
++    } else {
++        /* only look at ints that are enabled */
++        ints &= enables;
++
++        //DBG_PRINT(SDDBG_TRACE, ("SDIO PCI Ellen ints: 0x%X errors: 0x%x, sigenables: 0x%X, statenable: 0x%X\n",
++        //    (UINT)ints, (UINT)errors, (UINT)enables, (UINT)statenables));
++        if ((pDeviceContext->CardInserted) &&
++            (ints & HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE)) {
++              /* SD card interrupt*/
++              /* disable the interrupt, the user must clear the interrupt */
++            EnableDisableSDIOIRQ(pDeviceContext,FALSE,TRUE);
++            QueueEventResponse(pDeviceContext, WORK_ITEM_SDIO_IRQ);
++            /* continue looking for other interrupt causes */
++        } else if (ints & HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE) {
++              /* disable bogus interrupt */
++            EnableDisableSDIOIRQ(pDeviceContext,FALSE,TRUE);
++        }
++
++        if (ints &
++            (HOST_REG_INT_STATUS_CARD_INSERT_ENABLE | HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE)){
++            /* card was inserted or removed, clear interrupt */
++            WRITE_HOST_REG16(pDeviceContext,
++                             HOST_REG_NORMAL_INT_STATUS,
++                             HOST_REG_INT_STATUS_CARD_INSERT_ENABLE |
++                             HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE);
++            enables = MaskIrqFromIsr(pDeviceContext, HOST_REG_INT_STATUS_ALL);
++            QueueEventResponse(pDeviceContext, WORK_ITEM_CARD_DETECT);
++            return TRUE;
++        }
++
++        if (pDeviceContext->CardInserted && (pReq != NULL)) {
++            if (ints & HOST_REG_NORMAL_INT_STATUS_CMD_COMPLETE) {
++                WRITE_HOST_REG16(pDeviceContext, HOST_REG_NORMAL_INT_STATUS,
++                                HOST_REG_NORMAL_INT_STATUS_CMD_COMPLETE);
++                MaskIrqFromIsr(pDeviceContext, HOST_REG_INT_STATUS_CMD_COMPLETE_ENABLE);
++                    /* get the response data for the command */
++                status = GetResponseData(pDeviceContext, pReq);
++                DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt command complete, status: %d\n",status));
++
++                if (SDIO_SUCCESS(status) && (pReq->Flags & SDREQ_FLAGS_DATA_TRANS)){
++
++                        /* check with the bus driver if it is okay to continue with data */
++                    status = SDIO_CheckResponse(&pDeviceContext->Hcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++
++                    /* re-enable the cmd timeout error */
++                    WRITE_HOST_REG16(pDeviceContext, HOST_REG_INT_ERR_SIGNAL_ENABLE,
++                            HOST_REG_ERROR_INT_STATUS_ALL_ERR);
++
++                    DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt status %d\n", status));
++                    if (SDIO_SUCCESS(status)) {
++                        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                                /* expecting interrupt */
++                            DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt unmasking write\n"));
++                            UnmaskIrqFromIsr(pDeviceContext, HOST_REG_INT_STATUS_TRANSFER_COMPLETE_ENABLE
++                                            | HOST_REG_INT_STATUS_BUFFER_WRITE_RDY_ENABLE);
++                        } else {
++                            DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt unmasking read\n"));
++                            UnmaskIrqFromIsr(pDeviceContext, HOST_REG_INT_STATUS_TRANSFER_COMPLETE_ENABLE
++                                            | HOST_REG_INT_STATUS_BUFFER_READ_RDY_ENABLE);
++                        }
++                        DBG_PRINT(PXA_TRACE_DATA, ("SDIO PCI Ellen Pending from ISR %s transfer \n",
++                                                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++                    	status = SDIO_STATUS_PENDING;
++                    } else {
++                        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI Ellen : Response for Data transfer error :%d n",status));
++                        ResetCmdDatLine(pDeviceContext);
++                    }
++                } else {
++                    status = SDIO_STATUS_SUCCESS;
++                }
++            } else {
++                if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                    if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                        /* TX processing */
++                        if (ints &
++                                (HOST_REG_NORMAL_INT_STATUS_BUFFER_WRITE_RDY)) {
++                            /* clear interrupt */
++                            WRITE_HOST_REG16(pDeviceContext,
++                                            HOST_REG_NORMAL_INT_STATUS,
++                                            HOST_REG_NORMAL_INT_STATUS_BUFFER_WRITE_RDY);
++                            if (pReq->DataRemaining > 0) {
++                                /* transfer data */
++                                HcdTransferTxData(pDeviceContext, pReq);
++                                return TRUE;
++                            } else {
++                                /* re-read the interrupt status message to allow us to catch the
++                                   transfer complete in one interrupt */
++                                ints = READ_HOST_REG16(pDeviceContext, HOST_REG_NORMAL_INT_STATUS);
++                                ints &= enables;
++                                DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt re-enable \n"));
++                            }
++                        }
++                    } else {
++                        /* RX processing */
++                        if (ints &
++                            (HOST_REG_NORMAL_INT_STATUS_BUFFER_READ_RDY)) {
++                            /* clear interrupt */
++                            WRITE_HOST_REG16(pDeviceContext,
++                                            HOST_REG_NORMAL_INT_STATUS,
++                                            HOST_REG_NORMAL_INT_STATUS_BUFFER_READ_RDY );
++                                /* unload fifo */
++                            HcdTransferRxData(pDeviceContext, pReq);
++                            if (pReq->DataRemaining > 0) {
++                                return TRUE;
++                            }
++                        }
++                    }
++                }
++            }
++
++            if (ints & HOST_REG_NORMAL_INT_STATUS_TRANSFER_COMPLETE) {
++                if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                    DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt Transfer done \n"));
++                    /* clear interrupt */
++                    WRITE_HOST_REG16(pDeviceContext,
++                                     HOST_REG_NORMAL_INT_STATUS,
++                                     HOST_REG_NORMAL_INT_STATUS_TRANSFER_COMPLETE);
++                        /* if we get here without an error, we are done with the read
++                         * data operation */
++                    status = SDIO_STATUS_SUCCESS;
++                }
++            }
++        }
++    }
++    if (errors) {
++            /* alter status based on error */
++        status = TranslateSDError(pDeviceContext, errors);
++    }
++
++    if (status != SDIO_STATUS_PENDING) {
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                TRACE_SIGNAL_DATA_WRITE(pDeviceContext, FALSE);
++            } else {
++                TRACE_SIGNAL_DATA_READ(pDeviceContext, FALSE);
++            }
++        }
++            /* turn off interrupts and clock */
++        MaskIrqFromIsr(pDeviceContext,
++                    ~(HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY |
++                      HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE) );
++
++        if (errors) {
++                /* reset statemachine */
++            ResetCmdDatLine(pDeviceContext);
++        }
++
++        if (!pDeviceContext->KeepClockOn) {
++            ClockStartStop(pDeviceContext, CLOCK_OFF);
++        }
++        if (pDeviceContext->CardInserted && (pReq != NULL)) {
++                /* set the status */
++            pReq->Status = status;
++                /* queue work item to notify bus driver of I/O completion */
++            QueueEventResponse(pDeviceContext, WORK_ITEM_IO_COMPLETE);
++        } else {
++            DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PCI Ellen HcdSDInterrupt, no request to report: status %d \n",
++                                           status));
++        }
++    }
++
++    DBG_PRINT(PXA_TRACE_MMC_INT, ("-SDIO PCI Ellen HcdSDInterrupt Int handler \n"));
++    return TRUE;
++}
++
++
++
+Index: linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd_linux.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd_linux.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,185 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_linux.h
++
++ at abstract: include file for Tokyo Electron PCI Ellen host controller, linux dependent code
++
++ at notice: Copyright (c), 2004-2005 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_HCD_LINUX_H___
++#define __SDIO_HCD_LINUX_H___
++
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/errno.h>
++#include <linux/device.h>
++
++
++#include <asm/irq.h>
++
++
++#define SDHCD_MAX_DEVICE_NAME 12
++
++#define CARD_INSERT_POLARITY   FALSE
++#define WP_POLARITY            TRUE
++#define HCD_COMMAND_MIN_POLLING_CLOCK 5000000
++
++/* debounce delay for slot */
++#define SD_SLOT_DEBOUNCE_MS  500
++
++/* the config space slot number and start for SD host */
++#define PCI_CONFIG_SLOT   0x40
++#define GET_SLOT_COUNT(config)\
++    ((((config)>>4)& 0x7) +1)
++#define GET_SLOT_FIRST(config)\
++    ((config) & 0x7)
++
++/* device base name */
++#define SDIO_BD_BASE "sdiobd"
++
++/* mapped memory address */
++typedef struct _SDHCD_MEMORY {
++    ULONG Raw;      /* start of address range */
++    ULONG Length;   /* length of range */
++    PVOID pMapped;  /* the mapped address */
++}SDHCD_MEMORY, *PSDHCD_MEMORY;
++
++typedef enum _SDHCD_TYPE {
++    TYPE_CLASS,     /* standard class device */
++    TYPE_PCIELLEN,  /* Tokuo Electron PCI Ellen card */
++}SDHCD_TYPE, *PSDHCD_TYPE;
++
++/* device data*/
++typedef struct _SDHCD_DEVICE {
++    struct pci_dev *pBusDevice;    /* our device registered with bus driver */
++    SDLIST  List;                  /* linked list */
++    SDHCD   Hcd;                   /* HCD description for bus driver */
++    char    DeviceName[SDHCD_MAX_DEVICE_NAME]; /* our chr device name */
++    SDHCD_MEMORY Address;          /* memory address of this device */
++    spinlock_t AddressSpinlock;    /* use to protect reghisters when needed */
++    SDHCD_MEMORY ControlRegs;      /* memory address of shared control registers */
++    SDHCD_TYPE Type;               /* type of this device */
++    UINT8   InitStateMask;
++#define SDIO_BAR_MAPPED            0x01
++#define SDIO_LAST_CONTROL_BAR_MAPPED 0x02 /* set on device that will unmap the shared control registers */
++#define SDIO_IRQ_INTERRUPT_INIT    0x04
++#define SDHC_REGISTERED            0x10
++#define SDHC_HW_INIT               0x40
++#define TIMER_INIT                 0x80
++    spinlock_t   Lock;            /* lock against the ISR */
++    BOOL         CardInserted;    /* card inserted flag */
++    BOOL         Cancel;
++    BOOL         ShuttingDown;    /* indicates shut down of HCD) */
++    BOOL         HighSpeed;       /* device supports high speed, 25-50 Mhz */
++    UINT32       BaseClock;       /* base clock in hz */
++    UINT32       TimeOut;         /* timeout setting */
++    UINT32       ClockSpinLimit;  /* clock limit for command spin loops */
++    BOOL         KeepClockOn;
++    struct work_struct iocomplete_work; /* work item definintions */
++    struct work_struct carddetect_work; /* work item definintions */
++    struct work_struct sdioirq_work; /* work item definintions */
++}SDHCD_DEVICE, *PSDHCD_DEVICE;
++
++
++#define WORK_ITEM_IO_COMPLETE  0
++#define WORK_ITEM_CARD_DETECT  1
++#define WORK_ITEM_SDIO_IRQ     2
++
++
++#define READ_HOST_REG32(pDevice, OFFSET)  \
++    _READ_DWORD_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG32(pDevice, OFFSET, VALUE) \
++    _WRITE_DWORD_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET),(VALUE))
++#define READ_HOST_REG16(pDevice, OFFSET)  \
++    _READ_WORD_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG16(pDevice, OFFSET, VALUE) \
++    _WRITE_WORD_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET),(VALUE))
++#define READ_HOST_REG8(pDevice, OFFSET)  \
++    _READ_BYTE_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG8(pDevice, OFFSET, VALUE) \
++    _WRITE_BYTE_REG((((UINT32)((pDevice)->Address.pMapped))) + (OFFSET),(VALUE))
++
++#define READ_CONTROL_REG32(pDevice, OFFSET)  \
++    _READ_DWORD_REG((((UINT32)((pDevice)->ControlRegs.pMapped))) + (OFFSET))
++#define WRITE_CONTROL_REG32(pDevice, OFFSET, VALUE) \
++    _WRITE_DWORD_REG((((UINT32)((pDevice)->ControlRegs.pMapped))) + (OFFSET),(VALUE))
++#define READ_CONTROL_REG16(pDevice, OFFSET)  \
++    _READ_WORD_REG((((UINT32)((pDevice)->ControlRegs.pMapped))) + (OFFSET))
++#define WRITE_CONTROL_REG16(pDevice, OFFSET, VALUE) \
++    _WRITE_WORD_REG((((UINT32)((pDevice)->ControlRegs.pMapped))) + (OFFSET),(VALUE))
++
++/* PLX 9030 control registers */
++#define INTCSR 0x4C
++#define INTCSR_LINTi1ENABLE         (1 << 0)
++#define INTCSR_LINTi1STATUS         (1 << 2)
++#define INTCSR_LINTi2ENABLE         (1 << 3)
++#define INTCSR_LINTi2STATUS         (1 << 5)
++#define INTCSR_PCIINTENABLE         (1 << 6)
++
++#define GPIOCTRL 0x54
++#define GPIO8_PIN_DIRECTION     (1 << 25)
++#define GPIO8_DATA_MASK         (1 << 26)
++#define GPIO3_PIN_SELECT        (1 << 9)
++#define GPIO3_PIN_DIRECTION     (1 << 10)
++#define GPIO3_DATA_MASK         (1 << 11)
++#define GPIO2_PIN_SELECT        (1 << 6)
++#define GPIO2_PIN_DIRECTION     (1 << 7)
++#define GPIO2_DATA_MASK         (1 << 8)
++#define GPIO4_PIN_SELECT        (1 << 12)
++#define GPIO4_PIN_DIRECTION     (1 << 13)
++#define GPIO4_DATA_MASK         (1 << 14)
++
++#define GPIO_CONTROL(pDevice, on,  GpioMask)   \
++{                                   \
++     UINT32 temp;                    \
++     temp = READ_CONTROL_REG32((pDevice),GPIOCTRL);   \
++     if (on) temp |= (GpioMask); else temp &= ~(GpioMask);   \
++     WRITE_CONTROL_REG32((pDevice),GPIOCTRL, temp);   \
++}
++
++//??#define TRACE_SIGNAL_DATA_WRITE(pDevice, on) GPIO_CONTROL((pDevice),(on),GPIO8_DATA_MASK)
++//??#define TRACE_SIGNAL_DATA_READ(pDevice, on) GPIO_CONTROL((pDevice),(on),GPIO2_DATA_MASK)
++//??#define TRACE_SIGNAL_DATA_ISR(pDevice, on) GPIO_CONTROL((pDevice),(on),GPIO4_DATA_MASK)
++//??#define TRACE_SIGNAL_DATA_IOCOMP(pDevice, on) GPIO_CONTROL((pDevice),(on),GPIO3_DATA_MASK)
++#define TRACE_SIGNAL_DATA_WRITE(pDevice, on)
++#define TRACE_SIGNAL_DATA_READ(pDevice, on)
++#define TRACE_SIGNAL_DATA_ISR(pDevice, on)
++#define TRACE_SIGNAL_DATA_IOCOMP(pDevice, on)
++#define TRACE_SIGNAL_DATA_TIMEOUT(pDevice, on) GPIO_CONTROL((pDevice),(on),GPIO3_DATA_MASK)
++
++/* prototypes */
++#endif /* __SDIO_HCD_LINUX_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd_os.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_hcd_os.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,781 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_os.c
++
++ at abstract: Linux Tokyo Electron PCI Ellen SDIO Host Controller Driver
++
++#notes: includes module load and unload functions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++
++#define DBG_DECLARE 3;
++#include <linux/sdio/ctsystem.h>
++
++#include "sdio_pciellen_hcd.h"
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++#include <linux/pci.h>
++
++#define DESCRIPTION "SDIO Tokyo Electron PCI Ellen HCD"
++#define AUTHOR "Atheros Communications, Inc."
++
++static SYSTEM_STATUS Probe(struct pci_dev *pPCIdevice, const struct pci_device_id *pId);
++static void Remove(struct pci_dev *pPCIdevice);
++static int MapAddress(struct pci_dev *pPCIdevice, char *pName, UINT8 bar, PSDHCD_MEMORY pAddress);
++static void UnmapAddress(PSDHCD_MEMORY pMap);
++static void RemoveDevice(struct pci_dev *pPCIdevice, PSDHCD_DRIVER_CONTEXT pHcdContext);
++static SDIO_STATUS InitEllen(PSDHCD_DEVICE pDeviceContext);
++static void GetDefaults(PSDHCD_DEVICE pDeviceContext);
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r);
++
++static void hcd_iocomplete_wqueue_handler(void *context);
++static void hcd_carddetect_wqueue_handler(void *context);
++static void hcd_sdioirq_wqueue_handler(void *context);
++
++/* debug print parameter */
++module_param(debuglevel, int, 0644);
++MODULE_PARM_DESC(debuglevel, "debuglevel 0-7, controls debug prints");
++#define DEFAULT_ATTRIBUTES (SDHCD_ATTRIB_BUS_1BIT      | \
++                            SDHCD_ATTRIB_BUS_4BIT      | \
++                            SDHCD_ATTRIB_MULTI_BLK_IRQ | \
++                            SDHCD_ATTRIB_AUTO_CMD12    | \
++                            SDHCD_ATTRIB_POWER_SWITCH )
++
++static UINT32 hcdattributes = DEFAULT_ATTRIBUTES;
++module_param(hcdattributes, int, 0644);
++MODULE_PARM_DESC(hcdattributes, "PCIELLEN Attributes");
++static INT BaseClock = 0;
++module_param(BaseClock, int, 0444);
++MODULE_PARM_DESC(BaseClock, "BaseClock Hz when not present in configuration");
++static UINT32 timeout = HOST_REG_TIMEOUT_CONTROL_DEFAULT;
++module_param(timeout, int, 0644);
++MODULE_PARM_DESC(timeout, "PCIELLEN timeout flags");
++static UINT32 ClockSpinLimit = HCD_COMMAND_MIN_POLLING_CLOCK;
++module_param(ClockSpinLimit, int, 0644);
++MODULE_PARM_DESC(ClockSpinLimit, "PCIELLEN command clock spin time");
++
++
++
++
++/* the driver context data */
++static SDHCD_DRIVER_CONTEXT HcdContext = {
++   .pDescription  = DESCRIPTION,
++   .DeviceCount   = 0,
++};
++
++#define PCI_CLASS_SYSTEM_SDIO    0x0805
++/* PCI devices supported */
++static const struct pci_device_id pci_ids [] = {
++  {
++    .vendor = 0x1679, .device = 0x3000,
++    .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID,
++    .driver_data =  (unsigned long) &HcdContext,
++  },
++  {
++   PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDIO << 8, 0xFFFFFF00),
++    .driver_data =  (unsigned long) &HcdContext,
++  },
++ { /* end: all zeroes */ }
++};
++MODULE_DEVICE_TABLE (pci, pci_ids);
++
++/* tell PCI bus driver about us */
++static struct pci_driver sdio_pci_driver = {
++    .name =     "sdio_pciellenhcd",
++    .id_table = pci_ids,
++
++    .probe =    Probe,
++    .remove =   Remove,
++
++#ifdef CONFIG_PM
++    .suspend =  NULL,
++    .resume =  NULL,
++#endif
++};
++
++
++
++/*
++ * Probe - probe to setup our device, if present
++*/
++static SYSTEM_STATUS Probe(struct pci_dev *pPCIdevice, const struct pci_device_id *pId)
++{
++    SYSTEM_STATUS err = 0;
++    SDIO_STATUS   status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHcdContext;
++    PSDHCD_DEVICE pDeviceContext = NULL;
++    PSDHCD_DEVICE pLastDeviceContext;
++    int ii;
++    int count;
++    int firstBar;
++    UINT8 config;
++    SDHCD_TYPE type = TYPE_CLASS;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN HCD: Probe - probing for new device\n"));
++    if ((pId == NULL) || (pId->driver_data == 0)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN HCD: Probe - no device\n"));
++        return -EINVAL;
++    }
++    pHcdContext = (PSDHCD_DRIVER_CONTEXT)pId->driver_data;
++
++    if (pci_enable_device(pPCIdevice) < 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN HCD: Probe  - failed to enable device\n"));
++        return -ENODEV;
++    }
++    if ((pId->vendor == pci_ids[0].vendor) && (pId->device == pci_ids[0].device)) {
++        type = TYPE_PCIELLEN;
++        DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN HCD: Probe  - setting PCI Ellen type\n"));
++    }
++    /* get the number of slots supported and the initial BAR for it */
++    pci_read_config_byte(pPCIdevice, PCI_CONFIG_SLOT, &config);
++    count = GET_SLOT_COUNT(config);
++    firstBar = GET_SLOT_FIRST(config);
++    if (type == TYPE_PCIELLEN) {
++        /* move the first bar to the right start place */
++        firstBar = 2;
++    }
++    if (count > 0) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO PCI BD: Probe - slot count: %d, first BAR: %d\n", count, firstBar));
++    } else {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCI BD: Probe - no slots defined, first BAR: %d\n", firstBar));
++        pci_disable_device(pPCIdevice);
++        return -ENODEV;
++    }
++
++    /* create a device for each slot that we have */
++    for(ii = 0; ii < count; ii++, firstBar++) {
++        pLastDeviceContext = pDeviceContext;
++        /* allocate a device context for this new device */
++        pDeviceContext =  (PSDHCD_DEVICE)KernelAlloc(sizeof(SDHCD_DEVICE));
++        if (pDeviceContext == NULL) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCI BD: Probe - no memory for device context\n"));
++            err = -ENOMEM;
++            break;
++        }
++        ZERO_POBJECT(pDeviceContext);
++        SDLIST_INIT(&pDeviceContext->List);
++        pDeviceContext->Type = type;
++        pDeviceContext->pBusDevice = pPCIdevice;
++        spin_lock_init(&pDeviceContext->Lock);
++        spin_lock_init(&pDeviceContext->AddressSpinlock);
++
++        SET_SDIO_STACK_VERSION(&pDeviceContext->Hcd);
++        pDeviceContext->Hcd.pName = (PTEXT)KernelAlloc(SDHCD_MAX_DEVICE_NAME+1);
++        snprintf(pDeviceContext->Hcd.pName, SDHCD_MAX_DEVICE_NAME, SDIO_BD_BASE"%i:%i",
++                 pHcdContext->DeviceCount++, ii);
++        pDeviceContext->Hcd.Attributes = hcdattributes;
++        pDeviceContext->Hcd.MaxBlocksPerTrans = SDIO_SD_MAX_BLOCKS;
++        pDeviceContext->Hcd.pContext = pDeviceContext;
++        pDeviceContext->Hcd.pRequest = HcdRequest;
++        pDeviceContext->Hcd.pConfigure = HcdConfig;
++        pDeviceContext->Hcd.pDevice = &pPCIdevice->dev;
++        pDeviceContext->Hcd.pModule = THIS_MODULE;
++        pDeviceContext->BaseClock = BaseClock;
++        pDeviceContext->TimeOut = timeout;
++        pDeviceContext->ClockSpinLimit = ClockSpinLimit;
++        /* add device to our list of devices */
++            /* protect the devicelist */
++        if (!SDIO_SUCCESS(status = SemaphorePendInterruptable(&pHcdContext->DeviceListSem))) {
++            break;;   /* wait interrupted */
++        }
++        SDListInsertTail(&pHcdContext->DeviceList, &pDeviceContext->List);
++        SemaphorePost(&pHcdContext->DeviceListSem);
++
++        /* map the slots memory BAR */
++        status = MapAddress(pPCIdevice, pDeviceContext->DeviceName,
++                            (UINT8)firstBar, &pDeviceContext->Address);
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR,
++               ("SDIO PCIELLEN HCD: Probe - failed to map device memory address %s 0x%X, status %d\n",
++                pDeviceContext->DeviceName, (UINT)pci_resource_start(pPCIdevice, firstBar),
++                status));
++               break;
++        }
++        pDeviceContext->InitStateMask |= SDIO_BAR_MAPPED;
++
++        if (type == TYPE_PCIELLEN) {
++            if (pLastDeviceContext == NULL) {
++                /* map the slots control register BAR */
++                status = MapAddress(pPCIdevice, pDeviceContext->DeviceName,
++                                    (UINT8)0, &pDeviceContext->ControlRegs);
++                if (!SDIO_SUCCESS(status)) {
++                    DBG_PRINT(SDDBG_ERROR,
++                       ("SDIO PCIELLEN HCD: Probe - failed to map device control address %s 0x%X, status %d\n",
++                        pDeviceContext->DeviceName, (UINT)pci_resource_start(pPCIdevice, 0),
++                        status));
++                       break;
++                }
++            } else {
++                /* copy the prior mapping */
++                pDeviceContext->ControlRegs = pLastDeviceContext->ControlRegs;
++            }
++            if ((ii+1) == count) {
++                /* mark last one */
++                pDeviceContext->InitStateMask |= SDIO_LAST_CONTROL_BAR_MAPPED;
++            }
++        }
++        /* initialize work items */
++        INIT_WORK(&(pDeviceContext->iocomplete_work), hcd_iocomplete_wqueue_handler, pDeviceContext);
++        INIT_WORK(&(pDeviceContext->carddetect_work), hcd_carddetect_wqueue_handler, pDeviceContext);
++        INIT_WORK(&(pDeviceContext->sdioirq_work), hcd_sdioirq_wqueue_handler, pDeviceContext);
++
++        /* map the controller interrupt, we map it to each device.
++           Interrupts can be called from this point on */
++        err = request_irq(pPCIdevice->irq, hcd_sdio_irq, SA_SHIRQ,
++                          pDeviceContext->DeviceName, pDeviceContext);
++        if (err < 0) {
++              DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN - probe, unable to map interrupt \n"));
++              err = -ENODEV;
++              break;
++        }
++        pDeviceContext->InitStateMask |= SDIO_IRQ_INTERRUPT_INIT;
++
++        if (!SDIO_SUCCESS((status = HcdInitialize(pDeviceContext)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN Probe - failed to init HW, status =%d\n",status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++        pDeviceContext->InitStateMask |= SDHC_HW_INIT;
++
++           /* register with the SDIO bus driver */
++        if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&pDeviceContext->Hcd)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN Probe - failed to register with host, status =%d\n",status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++        pDeviceContext->InitStateMask |= SDHC_REGISTERED;
++
++        /* queue a work item to check for a card present at start up
++           this call will unmask the insert/remove interrupts */
++        QueueEventResponse(pDeviceContext, WORK_ITEM_CARD_DETECT);
++    }
++
++
++    if ((err < 0) || (!SDIO_SUCCESS(status))){
++        pHcdContext->DeviceCount--;
++        RemoveDevice(pPCIdevice, pHcdContext);
++    } else {
++
++      if (type == TYPE_PCIELLEN) {
++          InitEllen(pDeviceContext);
++      }
++
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN Probe - HCD ready! \n"));
++    }
++    return 0;
++}
++
++/* Remove - remove  device
++ * perform the undo of the Probe
++*/
++static void Remove(struct pci_dev *pPCIdevice)
++{
++    PSDHCD_DRIVER_CONTEXT pHcdContext = &HcdContext;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO PCIELLEN HCD: Remove - removing device\n"));
++
++    RemoveDevice(pPCIdevice, pHcdContext);
++    pHcdContext->DeviceCount--;
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCIELLEN HCD: Remove\n"));
++    return;
++}
++
++/*
++ * RemoveDevice - remove all devices associated with bus device
++*/
++static void RemoveDevice(struct pci_dev *pPCIdevice, PSDHCD_DRIVER_CONTEXT pHcdContext)
++{
++    PSDHCD_DEVICE pDeviceContext;
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO PCIELLEN HCD: RemoveDevice\n"));
++
++    /* protect the devicelist */
++    if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pHcdContext->DeviceListSem))) {
++        return;   /* wait interrupted */
++    }
++
++    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pHcdContext->DeviceList, pDeviceContext, SDHCD_DEVICE, List)
++        if (pDeviceContext->pBusDevice == pPCIdevice) {
++            if (pDeviceContext->InitStateMask & SDHC_HW_INIT) {
++                HcdDeinitialize(pDeviceContext);
++            }
++
++            if (pDeviceContext->InitStateMask & SDHC_REGISTERED) {
++                SDIO_UnregisterHostController(&pDeviceContext->Hcd);
++            }
++
++            /* wait for any of our work items to run */
++            flush_scheduled_work();
++
++            if (pDeviceContext->InitStateMask & SDIO_IRQ_INTERRUPT_INIT) {
++                free_irq(pPCIdevice->irq, pDeviceContext);
++            }
++
++            if (pDeviceContext->InitStateMask & SDIO_BAR_MAPPED) {
++                UnmapAddress(&pDeviceContext->Address);
++            }
++
++            if (pDeviceContext->InitStateMask & SDIO_LAST_CONTROL_BAR_MAPPED) {
++                UnmapAddress(&pDeviceContext->ControlRegs);
++            }
++            if (pDeviceContext->Hcd.pName != NULL) {
++                KernelFree(pDeviceContext->Hcd.pName);
++                pDeviceContext->Hcd.pName = NULL;
++            }
++            KernelFree(pDeviceContext);
++        }
++    SDITERATE_END;
++    SemaphorePost(&pHcdContext->DeviceListSem);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCIELLEN HCD: RemoveDevice\n"));
++}
++
++/*
++ * MapAddress - sets up the address for a given BAR
++*/
++static int MapAddress(struct pci_dev *pPCIdevice, char *pName, UINT8 bar, PSDHCD_MEMORY pAddress)
++{
++    if (pci_resource_flags(pPCIdevice, bar) & PCI_BASE_ADDRESS_SPACE  ) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO PCIELLEN HCD: MapAddress, port I/O not supported\n"));
++        return -ENOMEM;
++    }
++    pAddress->Raw = pci_resource_start(pPCIdevice, bar);
++    pAddress->Length = pci_resource_len(pPCIdevice, bar);
++    if (!request_mem_region (pAddress->Raw, pAddress->Length, pName)) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO PCIELLEN HCD: MapAddress - memory in use: 0x%X(0x%X)\n",
++                               (UINT)pAddress->Raw, (UINT)pAddress->Length));
++        return -EBUSY;
++    }
++    pAddress->pMapped = ioremap_nocache(pAddress->Raw, pAddress->Length);
++    if (pAddress->pMapped == NULL) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO PCIELLEN HCD: MapAddress - unable to map memory\n"));
++        /* cleanup region */
++        release_mem_region (pAddress->Raw, pAddress->Length);
++        return -EFAULT;
++    }
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN HCD: MapAddress - mapped memory: 0x%X(0x%X) to 0x%X\n",
++                            (UINT)pAddress->Raw, (UINT)pAddress->Length, (UINT)pAddress->pMapped));
++    return 0;
++}
++
++
++
++/*
++ * UnmapAddress - unmaps the address
++*/
++static void UnmapAddress(PSDHCD_MEMORY pAddress) {
++    iounmap(pAddress->pMapped);
++    release_mem_region(pAddress->Raw, pAddress->Length);
++    pAddress->pMapped = NULL;
++}
++
++/*
++ * InitEllen - initialize the Ellen card control registers
++ *
++*/
++static SDIO_STATUS InitEllen(PSDHCD_DEVICE pDeviceContext)
++{
++    UINT32 temp = READ_CONTROL_REG16(pDeviceContext, INTCSR);
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN HCD: InitEllen INTCSR - 0x%X\n", (UINT)temp));
++
++    WRITE_CONTROL_REG16(pDeviceContext, INTCSR,
++        (UINT16)temp | INTCSR_LINTi1ENABLE | INTCSR_LINTi2ENABLE | INTCSR_PCIINTENABLE);
++
++    temp = READ_CONTROL_REG32((pDeviceContext),GPIOCTRL);
++        /* set GPIO 2,3 and 8 as output */
++    temp &= ~(GPIO3_PIN_SELECT | GPIO2_PIN_SELECT | GPIO4_PIN_SELECT);
++    temp |= (GPIO8_PIN_DIRECTION | GPIO3_PIN_DIRECTION | GPIO2_PIN_DIRECTION | GPIO4_PIN_DIRECTION);
++    WRITE_CONTROL_REG32((pDeviceContext),GPIOCTRL, temp);
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN HCD: InitEllen GPIOCTRL - 0x%X\n", (UINT)temp));
++    TRACE_SIGNAL_DATA_WRITE(pDeviceContext, FALSE);
++    TRACE_SIGNAL_DATA_READ(pDeviceContext, FALSE);
++    TRACE_SIGNAL_DATA_ISR(pDeviceContext, FALSE);
++    TRACE_SIGNAL_DATA_IOCOMP(pDeviceContext, FALSE);
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*
++ * QueueEventResponse - queues an event in a process context back to the bus driver
++ *
++*/
++SDIO_STATUS QueueEventResponse(PSDHCD_DEVICE pDeviceContext, INT WorkItemID)
++{
++    struct work_struct *work;
++
++    if (pDeviceContext->ShuttingDown) {
++        return SDIO_STATUS_CANCELED;
++    }
++
++    switch (WorkItemID) {
++        case WORK_ITEM_IO_COMPLETE:
++            work = &pDeviceContext->iocomplete_work;
++            break;
++        case WORK_ITEM_CARD_DETECT:
++            work = &pDeviceContext->carddetect_work;
++            break;
++        case WORK_ITEM_SDIO_IRQ:
++            work = &pDeviceContext->sdioirq_work;
++            break;
++        default:
++            DBG_ASSERT(FALSE);
++            return SDIO_STATUS_ERROR;
++            break;
++    }
++
++    if (schedule_work(work) > 0) {
++        return SDIO_STATUS_SUCCESS;
++    } else {
++        return SDIO_STATUS_PENDING;
++    }
++}
++
++/*
++ * hcd_iocomplete_wqueue_handler - the work queue for io completion
++*/
++static void hcd_iocomplete_wqueue_handler(void *context)
++{
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    if (!pDeviceContext->ShuttingDown) {
++        TRACE_SIGNAL_DATA_IOCOMP(pDeviceContext, TRUE);
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_TRANSFER_DONE);
++        TRACE_SIGNAL_DATA_IOCOMP(pDeviceContext, FALSE);
++    }
++}
++
++/*
++ * hcd_carddetect_handler - the work queue for card detect debouncing
++*/
++static void hcd_carddetect_wqueue_handler(void *context)
++{
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    HCD_EVENT event;
++    volatile UINT32 temp;
++
++    event = EVENT_HCD_NOP;
++
++    DBG_PRINT(SDDBG_TRACE, ("+ SDIO PCIELLEN Card Detect Work Item \n"));
++    if (pDeviceContext->ShuttingDown) {
++        return;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO PCIELLEN Card Detect Delaying to debounce card... \n"));
++        /* sleep for slot debounce if there is no card */
++    OSSleep(SD_SLOT_DEBOUNCE_MS);
++
++    /* wait for stable */
++    while(!(temp = READ_HOST_REG32(pDeviceContext, HOST_REG_PRESENT_STATE))&
++            HOST_REG_PRESENT_STATE_CARD_STATE_STABLE) {
++        ;
++    }
++
++    if (pDeviceContext->CardInserted) {
++        /* look for removal */
++        if (!(temp & HOST_REG_PRESENT_STATE_CARD_INSERTED)) {
++            /* card not present */
++            event = EVENT_HCD_DETACH;
++            pDeviceContext->CardInserted = FALSE;
++            pDeviceContext->KeepClockOn = FALSE;
++            /* turn the power off */
++            SetPowerOn(pDeviceContext, FALSE);
++            MaskIrq(pDeviceContext, HOST_REG_INT_STATUS_ALL);
++            DBG_PRINT(PXA_TRACE_CARD_INSERT, ("SDIO PCIELLEN Card Detect REMOVE\n"));
++        }
++    } else {
++        /* look for insert */
++        if (temp & HOST_REG_PRESENT_STATE_CARD_INSERTED) {
++            /* card present */
++            event = EVENT_HCD_ATTACH;
++            pDeviceContext->CardInserted = TRUE;
++            GetDefaults(pDeviceContext);
++
++            DBG_PRINT(PXA_TRACE_CARD_INSERT, ("SDIO PCIELLEN Card Detect INSERT\n"));
++        }
++    }
++                /* clear interrupt */
++    WRITE_HOST_REG16(pDeviceContext,
++                     HOST_REG_NORMAL_INT_STATUS,
++                     HOST_REG_INT_STATUS_CARD_INSERT_ENABLE |
++                     HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE);
++    UnmaskIrq(pDeviceContext, HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY);
++
++    if (event != EVENT_HCD_NOP) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, event);
++    }
++
++    DBG_PRINT(PXA_TRACE_CARD_INSERT, ("- SDIO PCIELLEN Card Detect Work Item \n"));
++}
++
++/*
++ * hcd_sdioirq_handler - the work queue for handling SDIO IRQ
++*/
++static void hcd_sdioirq_wqueue_handler(void *context)
++{
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    DBG_PRINT(PXA_TRACE_SDIO_INT, ("SDIO PCIELLEN: hcd_sdioirq_wqueue_handler \n"));
++    if (!pDeviceContext->ShuttingDown) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_SDIO_IRQ_PENDING);
++    }
++}
++
++
++/* SDIO interrupt request */
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r)
++{
++    irqreturn_t retStat;
++    UINT16 intStat;
++
++    DBG_PRINT(PXA_TRACE_SDIO_INT, ("SDIO PCIELLEN SDIO IRQ \n"));
++
++    if (((PSDHCD_DEVICE)context)->Type == TYPE_PCIELLEN) {
++        /* see if we interrupted */
++        intStat = READ_CONTROL_REG16((PSDHCD_DEVICE)context, INTCSR);
++        DBG_PRINT(PXA_TRACE_SDIO_INT, ("intStat: 0x%X\n", (UINT)intStat));
++        if (!(intStat & (INTCSR_LINTi1STATUS | INTCSR_LINTi2STATUS))) {
++            return IRQ_NONE;
++        }
++    }
++
++    TRACE_SIGNAL_DATA_ISR((PSDHCD_DEVICE)context, TRUE);
++        /* call OS independent ISR */
++    if (HcdSDInterrupt((PSDHCD_DEVICE)context)) {
++        retStat = IRQ_HANDLED;
++    } else {
++        retStat = IRQ_NONE;
++    }
++    TRACE_SIGNAL_DATA_ISR((PSDHCD_DEVICE)context, FALSE);
++    return retStat;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  UnmaskIrq - Unmask SD interrupts
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 UnmaskIrq(PSDHCD_DEVICE pDevice, UINT32 Mask)
++{
++    UINT16 ints;
++    /* protected read-modify-write */
++    spin_lock_irq(&pDevice->AddressSpinlock);
++    ints = READ_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE);
++    ints |= Mask;
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE, ints);
++    spin_unlock_irq(&pDevice->AddressSpinlock);
++    return ints;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  MaskIrq - Mask SD interrupts
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 MaskIrq(PSDHCD_DEVICE pDevice, UINT32 Mask)
++{
++    UINT16 ints;
++    /* protected read-modify-write */
++    spin_lock_irq(&pDevice->AddressSpinlock);
++    ints = READ_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE);
++    ints &= ~Mask;
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE, ints);
++    spin_unlock_irq(&pDevice->AddressSpinlock);
++    return ints;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  MaskIrqFromIsr - Mask SD interrupts, called from ISR
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 MaskIrqFromIsr(PSDHCD_DEVICE pDevice, UINT32 Mask)
++{
++    UINT16 ints;
++    /* protected read-modify-write */
++    spin_lock(&pDevice->AddressSpinlock);
++    ints = READ_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE);
++    ints &= ~Mask;
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE, ints);
++    spin_unlock(&pDevice->AddressSpinlock);
++    return ints;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  UnmaskIrqFromIsr - Unmask SD interrupts
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 UnmaskIrqFromIsr(PSDHCD_DEVICE pDevice, UINT32 Mask)
++{
++    UINT16 ints;
++    /* protected read-modify-write */
++    spin_lock(&pDevice->AddressSpinlock);
++    ints = READ_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE);
++    ints |= Mask;
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_SIGNAL_ENABLE, ints);
++    spin_unlock(&pDevice->AddressSpinlock);
++    return ints;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetDefaults - get the user modifiable data items
++  Input:    pDeviceContext - host controller
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void GetDefaults(PSDHCD_DEVICE pDeviceContext)
++{
++    //can't change this dynanmically: pDeviceContext->BaseClock = BaseClock;
++    pDeviceContext->TimeOut = timeout;
++    pDeviceContext->ClockSpinLimit = ClockSpinLimit;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  EnableDisableSDIOIRQ - enable SDIO interrupt detection
++  Input:    pDevice - host controller
++            Enable - enable SDIO IRQ detection
++            FromIsr - called from ISR
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void EnableDisableSDIOIRQ(PSDHCD_DEVICE pDevice, BOOL Enable, BOOL FromIsr)
++{
++    UINT16 intsEnables;
++
++    if (FromIsr) {
++        if (Enable) {
++                // isr should never re-enable
++            DBG_ASSERT(FALSE);
++        } else {
++            MaskIrqFromIsr(pDevice, HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE);
++        }
++    } else {
++        if (Enable) {
++            UnmaskIrq(pDevice, HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE);
++        } else {
++            MaskIrq(pDevice, HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE);
++        }
++    }
++
++    /* protected read-modify-write */
++    if (FromIsr) {
++        spin_lock(&pDevice->AddressSpinlock);
++    } else {
++        spin_lock_irq(&pDevice->AddressSpinlock);
++    }
++
++    intsEnables = READ_HOST_REG16(pDevice, HOST_REG_INT_STATUS_ENABLE);
++    if (Enable) {
++        intsEnables |=  HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE;
++    } else {
++        intsEnables &= ~HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE;
++    }
++
++    WRITE_HOST_REG16(pDevice, HOST_REG_INT_STATUS_ENABLE, intsEnables);
++
++    if (FromIsr) {
++        spin_unlock(&pDevice->AddressSpinlock);
++    } else {
++        spin_unlock_irq(&pDevice->AddressSpinlock);
++    }
++
++
++}
++
++/*
++ * module init
++*/
++static int __init sdio_pci_hcd_init(void) {
++    SYSTEM_STATUS err;
++    SDIO_STATUS status;
++
++    REL_PRINT(SDDBG_TRACE, ("+SDIO PCIELLEN HCD: loaded\n"));
++
++    SDLIST_INIT(&HcdContext.DeviceList);
++    status = SemaphoreInitialize(&HcdContext.DeviceListSem, 1);
++    if (!SDIO_SUCCESS(status)) {
++       return SDIOErrorToOSError(status);
++    }
++
++    /* register with the PCI bus driver */
++    err = pci_module_init(&sdio_pci_driver);
++    if (err < 0) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PCIELLEN HCD: failed to register with system PCI bus driver, %d\n",
++                                err));
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCIELLEN HCD: sdio_pci_hcd_init\n"));
++    return err;
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_pci_hcd_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("+SDIO PCIELLEN HCD: unloaded\n"));
++    pci_unregister_driver(&sdio_pci_driver);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO PCIELLEN HCD: leave sdio_pci_hcd_cleanup\n"));
++}
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_pci_hcd_init);
++module_exit(sdio_pci_hcd_cleanup);
++
+Index: linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_pciellen_hcd.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pci_ellen/sdio_pciellen_hcd.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,253 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_pciellen_hcd.h
++
++ at abstract: include file for Tokyo Electron PCI Ellen host controller, OS independent code
++
++ at notice: Copyright (c), 2004 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_PCIELLEN_HCD_H___
++#define __SDIO_PCIELLEN_HCD_H___
++
++#include <linux/sdio/ctsystem.h>
++
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "sdio_hcd_linux.h"
++
++enum PXA_TRACE_ENUM {
++    PXA_TRACE_CARD_INSERT = (SDDBG_TRACE + 1),
++    PXA_TRACE_DATA = (SDDBG_TRACE + 2),
++    PXA_TRACE_REQUESTS,
++    PXA_TRACE_CONFIG,
++    PXA_TRACE_MMC_INT,
++    PXA_TRACE_CLOCK,
++    PXA_TRACE_SDIO_INT,
++    PXA_TRACE_LAST
++};
++
++#define HOST_REG_BLOCK_SIZE                         0x04
++
++#define HOST_REG_BLOCK_COUNT                        0x06
++
++#define HOST_REG_ARGUMENT                           0x08
++
++#define HOST_REG_TRANSFER_MODE                      0x0C
++#define HOST_REG_TRANSFER_MODE_MULTI_BLOCK          (1 << 5)
++#define HOST_REG_TRANSFER_MODE_READ                 (1 << 4)
++#define HOST_REG_TRANSFER_MODE_AUTOCMD12            (1 << 2)
++#define HOST_REG_TRANSFER_MODE_BLOCKCOUNT_ENABLE    (1 << 1)
++#define HOST_REG_TRANSFER_MODE_DMA_ENABLE           (1 << 0)
++
++#define HOST_REG_COMMAND_REGISTER                   0x0E
++#define HOST_REG_COMMAND_REGISTER_CMD_SHIFT         8
++#define HOST_REG_COMMAND_REGISTER_DATA_PRESENT      (1 << 5)
++#define HOST_REG_COMMAND_REGISTER_CMD_INDEX_CHECK_ENABLE (1 << 4)
++#define HOST_REG_COMMAND_REGISTER_CRC_CHECK_ENABLE  (1 << 3)
++
++
++#define HOST_REG_RESPONSE                           0x10  /* 32-bit reguisters 0x10 through 0x1C */
++
++#define HOST_REG_BUFFER_DATA_PORT                   0x20
++
++#define HOST_REG_PRESENT_STATE                      0x24
++#define HOST_REG_PRESENT_STATE_WRITE_ENABLED        (1 << 19)
++#define HOST_REG_PRESENT_STATE_CARD_DETECT          (1 << 18)
++#define HOST_REG_PRESENT_STATE_CARD_STATE_STABLE    (1 << 17)
++#define HOST_REG_PRESENT_STATE_CARD_INSERTED        (1 << 16)
++#define HOST_REG_PRESENT_STATE_BUFFER_READ_ENABLE   (1 << 11)
++#define HOST_REG_PRESENT_STATE_BUFFER_WRITE_ENABLE  (1 << 10)
++#define HOST_REG_PRESENT_STATE_BUFFER_READ_TRANSFER_ACTIVE (1 << 9)
++#define HOST_REG_PRESENT_STATE_BUFFER_WRITE_TRANSFER_ACTIVE (1 << 8)
++#define HOST_REG_PRESENT_STATE_BUFFER_DAT_LINE_ACTIVE (1 << 2)
++#define HOST_REG_PRESENT_STATE_BUFFER_COMMAND_INHIBIT_DAT (1 << 1)
++#define HOST_REG_PRESENT_STATE_BUFFER_COMMAND_INHIBIT_CMD (1 << 0)
++
++
++#define HOST_REG_CONTROL                        0x28
++#define HOST_REG_CONTROL_LED_ON                 (1 << 0)
++#define HOST_REG_CONTROL_1BIT_WIDTH             0x00
++#define HOST_REG_CONTROL_4BIT_WIDTH             (1 << 1)
++#define HOST_REG_CONTROL_HI_SPEED               (1 << 2)
++
++#define HOST_REG_POWER_CONTROL                      0x29
++#define HOST_REG_POWER_CONTROL_ON                   (1 << 0)
++#define HOST_REG_POWER_CONTROL_VOLT_3_3             (7 << 1)
++#define HOST_REG_POWER_CONTROL_VOLT_3_0             (6 << 1)
++#define HOST_REG_POWER_CONTROL_VOLT_1_8             (5 << 1)
++
++#define HOST_REG_BLOCK_GAP                          0x2A
++#define HOST_REG_INT_DETECT_AT_BLOCK_GAP             (1 << 3)
++
++#define HOST_REG_CLOCK_CONTROL                      0x2C
++#define HOST_REG_CLOCK_CONTROL_CLOCK_ENABLE         (1 << 0)
++#define HOST_REG_CLOCK_CONTROL_CLOCK_STABLE         (1 << 1)
++#define HOST_REG_CLOCK_CONTROL_SD_ENABLE            (1 << 2)
++
++#define HOST_REG_TIMEOUT_CONTROL                    0x2E
++#define HOST_REG_TIMEOUT_CONTROL_DEFAULT            0x0C
++
++#define HOST_REG_SW_RESET                           0x2F
++#define HOST_REG_SW_RESET_ALL                       (1 << 0)
++#define HOST_REG_SW_RST_CMD_LINE                    (1 << 1)
++#define HOST_REG_SW_RST_DAT_LINE                    (1 << 2)
++
++#define HOST_REG_NORMAL_INT_STATUS                  0x30
++#define HOST_REG_NORMAL_INT_STATUS_ERROR            (1 << 15)
++#define HOST_REG_NORMAL_INT_STATUS_CARD_INTERRUPT   (1 << 8)
++#define HOST_REG_NORMAL_INT_STATUS_CARD_REMOVAL     (1 << 7)
++#define HOST_REG_NORMAL_INT_STATUS_CARD_INSERT      (1 << 6)
++#define HOST_REG_NORMAL_INT_STATUS_BUFFER_READ_RDY  (1 << 5)
++#define HOST_REG_NORMAL_INT_STATUS_BUFFER_WRITE_RDY (1 << 4)
++#define HOST_REG_NORMAL_INT_STATUS_DMA_INT          (1 << 3)
++#define HOST_REG_NORMAL_INT_STATUS_BLOCK_GAP        (1 << 2)
++#define HOST_REG_NORMAL_INT_STATUS_TRANSFER_COMPLETE (1 << 1)
++#define HOST_REG_NORMAL_INT_STATUS_CMD_COMPLETE     (1 << 0)
++#define HOST_REG_NORMAL_INT_STATUS_ALL_ERR          0xFFFF
++
++#define HOST_REG_ERROR_INT_STATUS                   0x32
++#define HOST_REG_ERROR_INT_STATUS_VENDOR_MASK       0xF000
++#define HOST_REG_ERROR_INT_STATUS_VENDOR_SHIFT      12
++#define HOST_REG_ERROR_INT_STATUS_AUTOCMD12ERR      (1 << 8)
++#define HOST_REG_ERROR_INT_STATUS_CURRENTLIMITERR   (1 << 7)
++#define HOST_REG_ERROR_INT_STATUS_DATAENDBITERR     (1 << 6)
++#define HOST_REG_ERROR_INT_STATUS_DATACRCERR        (1 << 5)
++#define HOST_REG_ERROR_INT_STATUS_DATATIMEOUTERR    (1 << 4)
++#define HOST_REG_ERROR_INT_STATUS_CMDINDEXERR       (1 << 3)
++#define HOST_REG_ERROR_INT_STATUS_CMDENDBITERR      (1 << 2)
++#define HOST_REG_ERROR_INT_STATUS_CRCERR            (1 << 1)
++#define HOST_REG_ERROR_INT_STATUS_CMDTIMEOUTERR     (1 << 0)
++#define HOST_REG_ERROR_INT_STATUS_ALL_ERR           0xFFFF
++
++#define HOST_REG_INT_STATUS_ENABLE                  0x34
++#define HOST_REG_INT_STATUS_CARD_INT_STAT_ENABLE    (1 << 8)
++#define HOST_REG_INT_STATUS_CARD_REMOVAL_ENABLE     (1 << 7)
++#define HOST_REG_INT_STATUS_CARD_INSERT_ENABLE      (1 << 6)
++#define HOST_REG_INT_STATUS_BUFFER_READ_RDY_ENABLE  (1 << 5)
++#define HOST_REG_INT_STATUS_BUFFER_WRITE_RDY_ENABLE (1 << 4)
++#define HOST_REG_INT_STATUS_DMA_ENABLE              (1 << 3)
++#define HOST_REG_INT_STATUS_BLOCK_GAP_ENABLE        (1 << 2)
++#define HOST_REG_INT_STATUS_TRANSFER_COMPLETE_ENABLE (1 << 1)
++#define HOST_REG_INT_STATUS_CMD_COMPLETE_ENABLE     (1 << 0)
++#define HOST_REG_INT_STATUS_ALL                      0x00F3
++#define HOST_REG_INT_STATUS_ALLOW_INSERT_REMOVE_ONLY 0x00C0
++
++#define HOST_REG_ERR_STATUS_ENABLE                  0x36
++/* same bits as HOST_REG_ERROR_INT_STATUS */
++
++#define HOST_REG_INT_SIGNAL_ENABLE                  0x38
++/* same bits as HOST_REG_INT_STATUS_ENABLE */
++
++#define HOST_REG_INT_ERR_SIGNAL_ENABLE              0x3A
++/* same bits as HOST_REG_ERR_STATUS_ENABLE */
++
++#define HOST_REG_CAPABILITIES                       0x40
++#define HOST_REG_CAPABILITIES_VOLT_1_8              (1 << 26)
++#define HOST_REG_CAPABILITIES_VOLT_3_0              (1 << 25)
++#define HOST_REG_CAPABILITIES_VOLT_3_3              (1 << 24)
++#define HOST_REG_CAPABILITIES_SUSPEND_RESUME        (1 << 23)
++#define HOST_REG_CAPABILITIES_DMA                   (1 << 22)
++#define HOST_REG_CAPABILITIES_HIGH_SPEED            (1 << 21)
++#define HOST_REG_CAPABILITIES_SUSPEND_RESUME        (1 << 23)
++#define HOST_REG_CAPABILITIES_MAX_BLOCK_LEN_MASK    0x30000
++#define HOST_REG_CAPABILITIES_MAX_BLOCK_LEN_SHIFT   16
++#define HOST_REG_CAPABILITIES_CLOCK_MASK            0x3F00
++#define HOST_REG_CAPABILITIES_CLOCK_SHIFT           8
++#define HOST_REG_CAPABILITIES_TIMEOUT_CLOCK_UNITS   (1 << 7)
++#define HOST_REG_CAPABILITIES_TIMEOUT_FREQ_MASK     0x3F
++#define HOST_REG_CAPABILITIES_TIMEOUT_FREQ_SHIFT    0
++
++#define HOST_REG_MAX_CURRENT_CAPABILITIES           0x48
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_1_8_MASK  0xFF0000
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_1_8_SHIFT 16
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_3_0_MASK  0x00FF00
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_3_0_SHIFT 8
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_3_3_MASK  0x0000FF
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_3_3_SHIFT 0
++#define HOST_REG_MAX_CURRENT_CAPABILITIES_SCALER    4
++
++#define HOST_REG_VERSION                            0xFE
++#define HOST_REG_VERSION_SPEC_VERSION_MASK          0xFF
++#define HOST_REG_VERSION_VENDOR_VERSION_MASK        0xFF00
++#define HOST_REG_VERSION_VENDOR_VERSION_SHIFT       8
++
++#define SDIO_BD_MAX_SLOTS                           24
++#define SDIO_SD_MAX_BLOCKS                      ((UINT)0xFFFF)
++#define SDMMC_RESP_TIMEOUT_CLOCKS          64
++#define SDMMC_DATA_TIMEOUT_CLOCKS          0xFFFF
++
++#define SPI_ENABLE_WITH_CRC  (MMC_SPI_CS_ENABLE | MMC_SPI_ENABLE | \
++                              MMC_SPI_CRC_ENABLE | MMC_SPI_SEL_CS0)
++#define SPI_ENABLE_NO_CRC  (MMC_SPI_CS_ENABLE | MMC_SPI_ENABLE | \
++                            MMC_SPI_SEL_CS0)
++
++#define SD_DEFAULT_RESPONSE_BYTES 6
++#define SD_R2_RESPONSE_BYTES      16
++
++#define SD_CLOCK_MAX_ENTRIES 9
++
++typedef struct _SD_CLOCK_TBL_ENTRY {
++    INT       ClockRateDivisor;  /* divisor */
++    UINT16    RegisterValue;     /* register value for clock divisor */
++}SD_CLOCK_TBL_ENTRY;
++
++/* driver wide data, this driver only supports one device,
++ * so we include the per device data here also */
++typedef struct _SDHCD_DRIVER_CONTEXT {
++    PTEXT        pDescription;       /* human readable device decsription */
++    SDLIST       DeviceList;         /* the list of current devices handled by this driver */
++    OS_SEMAPHORE DeviceListSem;      /* protection for the DeviceList */
++    UINT         DeviceCount;        /* number of devices currently installed */
++}SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++
++/* prototypes */
++SDIO_STATUS HcdRequest(PSDHCD pHcd);
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pReq);
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext);
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext);
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDeviceContext);
++SDIO_STATUS QueueEventResponse(PSDHCD_DEVICE pDeviceContext, INT WorkItemID);
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq);
++void HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq);
++void SetPowerOn(PSDHCD_DEVICE pDeviceContext, BOOL On);
++UINT16 MaskIrq(PSDHCD_DEVICE pDevice, UINT32 Mask);
++UINT16 UnmaskIrq(PSDHCD_DEVICE pDevice, UINT32 Mask);
++UINT16 MaskIrqFromIsr(PSDHCD_DEVICE pDevice, UINT32 Mask);
++UINT16 UnmaskIrqFromIsr(PSDHCD_DEVICE pDevice, UINT32 Mask);
++void EnableDisableSDIOIRQ(PSDHCD_DEVICE pDevice, BOOL Enable, BOOL FromIsr);
++
++
++#endif /* __SDIO_PCIELLEN_HCD_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/mx21/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/mx21/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,7 @@
++#
++# SDIO mx21 host controller makefile
++#
++obj-m += sdio_mx21_hcd.o
++
++sdio_mx21_hcd-objs := sdio_mx21_hcd.o sdio_mx21_hcd_os.o
++
+Index: linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1286 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_mx21c
++
++ at abstract: iMX21 Local Bus SDIO Host Controller Driver
++
++#notes: OS independent code
++
++ at notice: Copyright (c), 2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#include "sdio_mx21.h"
++
++#define CLOCK_ON  TRUE
++#define CLOCK_OFF FALSE
++#define FROM_ISR     TRUE
++#define FROM_NORMAL  FALSE
++
++#define POLL_TIMEOUT 10000000
++
++#define WAIT_FOR_HC_STATUS(pHct,DoneMask,pError,ErrorMask,Status,Timeout)   \
++{                                                                            \
++     INT _timeoutCnt = (Timeout);                                            \
++     while((_timeoutCnt > 0) &&                                               \
++            !(READ_HC_REG((pHct), SDHC_STATUS_REG) & (DoneMask)) &&            \
++            !(*(pError) = READ_HC_REG((pHct), SDHC_STATUS_REG) & (ErrorMask))){_timeoutCnt--;} \
++     *(pError) = READ_HC_REG((pHct), SDHC_STATUS_REG) & (ErrorMask);            \
++     if (0 == _timeoutCnt) {(Status) = SDIO_STATUS_DEVICE_ERROR; \
++           DBG_PRINT(SDDBG_ERROR, \
++           ("SDIO MX21 - status timeout, waiting for %s (stat=0x%X)\n",\
++               #DoneMask, READ_HC_REG((pHct), SDHC_STATUS_REG))); \
++                             DBG_ASSERT(FALSE);}       \
++}
++
++#define SD_DEFAULT_RESPONSE_BYTES 6
++#define SD_R2_RESPONSE_BYTES      16
++
++void DMATransferComplete(PVOID pContext, SDIO_STATUS Status, BOOL FromIsr);
++void ResetController(PSDHCD_DRIVER_CONTEXT pHct, BOOL RestoreHcdSettings, BOOL FromIsr);
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetResponseData - get the response data
++  Input:    pHct - host context
++            pReq - the request
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void GetResponseData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++    INT     wordCount;
++    INT     byteCount;
++    UINT16  readBuffer[8];
++    UINT16  *pBuf;
++
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP) {
++        return;
++    }
++
++    byteCount = SD_DEFAULT_RESPONSE_BYTES;
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++        byteCount = SD_R2_RESPONSE_BYTES;
++    }
++
++    wordCount = byteCount >> 1;
++
++        /* start the buffer at the tail and work backwards since responses are sent MSB first
++            and shifted into the FIFO  */
++    pBuf = &readBuffer[(wordCount - 1)];
++    while (wordCount) {
++        *pBuf = (UINT16)READ_HC_REG(pHct, SDHC_RES_FIFO_REG);
++        pBuf--;
++        wordCount--;
++    }
++
++    memcpy(pReq->Response,readBuffer,byteCount);
++        /* the CRC is not returned in the FIFO, just zero it out */
++    pReq->Response[0] = 0x00;
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++            /* on R2 responses, the start token is removed, just stick it in */
++        pReq->Response[SD_R2_RESPONSE_BYTES] = 0x3F;
++    }
++    if (DBG_GET_DEBUG_LEVEL() >= SDHC_TRACE_REQUESTS) {
++        if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++            byteCount = 17;
++        }
++        SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO MX21 - Response Dump");
++    }
++
++    return;
++}
++
++void DumpCurrentRequestInfo(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    PSDREQUEST pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
++    if (pReq != NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - Current Request (0x%X) Command:%d, ARG:0x%8.8X\n",
++                  (INT)pReq, pReq->Command, pReq->Argument));
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "WRITE":"READ",
++                pReq->BlockCount,
++                pReq->BlockLen,
++                pReq->DataRemaining));
++        }
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TranslateHCError - translate error
++  Input:  ErrorStatus - error status register value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TranslateHCError(PSDHCD_DRIVER_CONTEXT pHct,UINT32 ErrorStatus)
++{
++    if (ErrorStatus & SDHC_STATUS_RESP_CRC_ERROR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - RESP CRC ERROR \n"));
++        return SDIO_STATUS_BUS_RESP_CRC_ERR;
++    } else if (ErrorStatus & SDHC_STATUS_READ_CRC_ERROR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - READDATA CRC ERROR \n"));
++        DumpCurrentRequestInfo(pHct);
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - READ ERROR (STAT:0x%X:IMASK:0x%X)\n",
++                READ_HC_REG(pHct,SDHC_STATUS_REG),READ_HC_REG(pHct, SDHC_INT_MASK_REG)));
++        if (pHct->DmaType != SDHC_DMA_NONE) {
++            DumpDmaInfo(pHct);
++        }
++        return SDIO_STATUS_BUS_READ_CRC_ERR;
++    } else if (ErrorStatus & SDHC_STATUS_WRITE_CRC_ERROR) {
++        DumpCurrentRequestInfo(pHct);
++
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - WRITE CRC ERROR \n"));
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - WRITE ERROR (STAT:0x%X:IMASK:0x%X)\n",
++                READ_HC_REG(pHct,SDHC_STATUS_REG),READ_HC_REG(pHct, SDHC_INT_MASK_REG)));
++
++        if (pHct->DmaType != SDHC_DMA_NONE) {
++            DumpDmaInfo(pHct);
++        }
++        return SDIO_STATUS_BUS_WRITE_ERROR;
++    } else if (ErrorStatus & SDHC_STATUS_RESP_TIMEOUT) {
++        return SDIO_STATUS_BUS_RESP_TIMEOUT;
++    } else if (ErrorStatus & SDHC_STATUS_READ_TIMEOUT) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 - READ TIMEOUT \n"));
++        DumpCurrentRequestInfo(pHct);
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    }
++
++    return SDIO_STATUS_DEVICE_ERROR;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ClockStartStop - clock control
++  Input:  pHcd - HCD object
++          pReq - request to issue
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL _DoClockStartStop(PSDHCD_DRIVER_CONTEXT pHct, BOOL On)
++{
++    INT timeout;
++    INT retry = 3;
++
++    while (retry) {
++        timeout = 70000;
++        if (On) {
++            WRITE_HC_REG(pHct,
++                         SDHC_STR_STP_CLK_REG,
++                         SDHC_STR_STP_CLK_ENABLE | SDHC_STR_STP_CLK_START);
++                /* wait for clock to start */
++            while (timeout) {
++                if ((READ_HC_REG(pHct, SDHC_STATUS_REG) & SDHC_STATUS_CLK_RUN)) {
++                    break;
++                }
++                timeout--;
++            }
++        } else {
++            WRITE_HC_REG(pHct,
++                         SDHC_STR_STP_CLK_REG,
++                         SDHC_STR_STP_CLK_ENABLE | SDHC_STR_STP_CLK_STOP);
++                /* wait for clock to stop */
++            while (timeout) {
++                if (!(READ_HC_REG(pHct, SDHC_STATUS_REG) & SDHC_STATUS_CLK_RUN)) {
++                    break;
++                }
++                timeout--;
++            }
++        }
++
++        if (0 == timeout) {
++            retry--;
++        } else {
++            break;
++        }
++    }
++
++    if (0 == retry) {
++        return FALSE;
++    }
++    return TRUE;
++}
++
++#define ClockStartStop(pHct, On) \
++{if (!_DoClockStartStop((pHct),(On))) DBG_ASSERT(FALSE);}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetBusMode - Set Bus mode
++  Input:  pHcd - HCD object
++          pMode - mode
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetBusMode(PSDHCD_DRIVER_CONTEXT pHct, PSDCONFIG_BUS_MODE_DATA pMode)
++{
++    int    i;
++    int    clockIndex;
++    UINT32 regValue;
++
++    DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21 - SetMode\n"));
++
++        /* set clock index to the end, the table is sorted this way */
++    clockIndex = pHct->ValidClockEntries - 1;
++    pMode->ActualClockRate = pHct->ClockDivisorTable[clockIndex].ClockRate;
++    for (i = 0; i < pHct->ValidClockEntries; i++) {
++        if (pMode->ClockRate >= pHct->ClockDivisorTable[i].ClockRate) {
++            pMode->ActualClockRate = pHct->ClockDivisorTable[i].ClockRate;
++            clockIndex = i;
++            break;
++        }
++    }
++
++    switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++        case SDCONFIG_BUS_WIDTH_1_BIT:
++            DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21 - 1-bit bus width\n"));
++            pHct->SD4Bit = FALSE;
++            break;
++        case SDCONFIG_BUS_WIDTH_4_BIT:
++            DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21 - 4-bit bus width\n"));
++            pHct->SD4Bit = TRUE;
++            break;
++        default:
++            break;
++    }
++        /* get the base clock divisor value and preserve */
++    regValue = READ_HC_REG(pHct, SDHC_CLK_RATE_REG);
++        /* set new value */
++    regValue &= ~SDHC_CLK_RATE_PRESCALE_MASK;
++    regValue |= pHct->ClockDivisorTable[clockIndex].RegisterValue << SDHC_CLK_RATE_PRESCALE_SHIFT;
++        /* set the clock divisor */
++    WRITE_HC_REG(pHct, SDHC_CLK_RATE_REG, regValue);
++
++    DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21 - SD Clock: %d Hz (CLK_RATE_REG:0x%X)\n",
++            pMode->ActualClockRate,regValue));
++
++    memcpy(&pHct->SavedBusMode,pMode,sizeof(pHct->SavedBusMode));
++
++}
++
++BOOL HcdTransferTxData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT32 *pFifo;
++
++    pFifo = (volatile UINT32 *)(GET_HC_REG_BASE(pHct) + SDHC_BUF_ACCESS_REG);
++    dataCopy = min(pReq->DataRemaining,pHct->FifoDepth);
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++        /* copy to fifo */
++    while (dataCopy) {
++        data = *pBuf;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            data |= ((UINT16)*pBuf) << 8;
++            dataCopy--;
++            pBuf++;
++        }
++        _WRITE_DWORD_REG(pFifo,(UINT32)data);
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++
++    DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 Pending TX Remaining: %d \n",pReq->DataRemaining));
++
++    if (pReq->DataRemaining) {
++        return FALSE;
++    }
++
++    return TRUE;
++}
++
++void HcdTransferRxData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT32 *pFifo;
++
++    pFifo = (volatile UINT32 *)(GET_HC_REG_BASE(pHct) + SDHC_BUF_ACCESS_REG);
++
++        /* read the whole FIFO or up to what is left */
++    dataCopy = min(pReq->DataRemaining,pHct->FifoDepth);
++        /* get where we are */
++    pBuf = (PUINT8)pReq->pHcdContext;
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++        /* copy from fifo */
++    while (dataCopy) {
++        data = (UINT16)_READ_DWORD_REG(pFifo);
++        *pBuf = (UINT8)data;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            *pBuf = (UINT8)(data >> 8);
++            pBuf++;
++            dataCopy--;
++        }
++    }
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++    DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 Pending RX Remaining: %d \n",pReq->DataRemaining));
++}
++
++SDIO_STATUS ProcessCommandDone(PSDHCD_DRIVER_CONTEXT pHct,
++                               PSDREQUEST            pReq,
++                               UINT32                HwErrors,
++                               BOOL                  FromIsr)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    do {
++        if (HwErrors) {
++            status = TranslateHCError(pHct,HwErrors);
++            DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 command failure: STAT:0x%X \n",HwErrors));
++            break;
++        } else {
++              /* get the response data for the command */
++            GetResponseData(pHct,pReq);
++        }
++
++        if (!IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                /* all done */
++            break;
++        }
++            /* check with the bus driver if it is okay to continue with data */
++        status = SDIO_CheckResponse(&pHct->Hcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++            /* start up DMA for data transfers */
++        if (pHct->DmaType != SDHC_DMA_NONE) {
++
++            status = SetUpHCDDMA(pHct,
++                                 pReq,
++                                 DMATransferComplete,
++                                 pHct);
++
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++            /* data transfer pending */
++        status = SDIO_STATUS_PENDING;
++
++    } while (FALSE);
++
++    if (SDIO_STATUS_PENDING == status) {
++        DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 Pending %s transfer \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++    }
++
++    return status;
++}
++
++void EndHCTransfer(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq, BOOL FromIsr)
++{
++    if (!SDIO_SUCCESS(pReq->Status)) {
++            /* bus responses are normal errors */
++        if (pReq->Status != SDIO_STATUS_BUS_RESP_TIMEOUT) {
++            ResetController(pHct,TRUE,FromIsr);
++        } else {
++                /* a bus response timeout occured, find it what command it was, some commands
++                 * will normally time out */
++            if (!((pReq->Command == 5) || (pReq->Command == 55) || (pReq->Command == 1))) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Bus Timeout: CMD:%d\n",pReq->Command));
++            }
++        }
++    } else {
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++            /* on data transfers, reset the controller, on occasion we
++             * see Write CRC errors  */
++            ResetController(pHct,TRUE,FromIsr);
++        }
++    }
++        /* turn off interrupts (except SDIO IRQs) and clock */
++    MaskHcdIrq(pHct,(SDHC_INT_MASK_ALL & (~SDHC_INT_SDIO_MASK)),FromIsr);
++        /* stop the clock, this apparently clears statuses */
++    ClockStartStop(pHct, CLOCK_OFF);
++        /* restart the clock if we need interrupt detection */
++    if (pHct->KeepClockOn) {
++        ClockStartStop(pHct, CLOCK_ON);
++    }
++
++    if (pHct->SDIOIrqDetectArmed) {
++            /* re-arm interrupt detection */
++        UnmaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,FromIsr);
++    }
++}
++
++void DMATransferComplete(PVOID pContext, SDIO_STATUS Status, BOOL FromIsr)
++{
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pContext;
++    PSDREQUEST            pReq;
++
++    pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
++    DBG_ASSERT(pReq != NULL);
++
++    DBG_PRINT(SDHC_TRACE_DATA,
++            ("+SDIO MX21 %s DMATransferComplete, Status:%d Req:0x%X \n",
++                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",Status,(UINT32)pReq));
++
++    if (!SDIO_SUCCESS(Status)) {
++            /* if DMA failed, we need to complete the request here
++             * the SDIO controller ISR will not fire in this case */
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 %s DMATransferComplete failed with status:%d \n",
++                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",Status));
++        pReq->Status = Status;
++            /* turn off interrupts and clock */
++        EndHCTransfer(pHct,pReq,FromIsr);
++            /* complete the request */
++        CompleteRequestSyncDMA(pHct,pReq,FromIsr);
++    } else {
++
++        DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 From DMA, StatReg:0x%X IMASK:0x%X \n",
++                        READ_HC_REG(pHct,SDHC_STATUS_REG),
++                        READ_HC_REG(pHct, SDHC_INT_MASK_REG)));
++    }
++
++    DBG_PRINT(SDHC_TRACE_DATA, ("-SDIO MX21 DMATransferComplete\n"));
++}
++
++PTEXT GetRespString(PSDREQUEST pReq)
++{
++     switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++        case SDREQ_FLAGS_NO_RESP:
++            return "NONE";
++        case SDREQ_FLAGS_RESP_SDIO_R5:
++            return "SDIO R5";
++        case SDREQ_FLAGS_RESP_R1:
++            return "R1";
++        case SDREQ_FLAGS_RESP_R1B:
++            return "R1B";
++        case SDREQ_FLAGS_RESP_R2:
++            return "R2";
++        case SDREQ_FLAGS_RESP_R3:
++            return "R3";
++        case SDREQ_FLAGS_RESP_SDIO_R4:
++            return "SDIO R4";
++        case SDREQ_FLAGS_RESP_R6:
++            return "R6";
++        default:
++            return "Unknown";
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdRequest - SD request handler
++  Input:  pHcd - HCD object
++          pReq - request to issue
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdRequest(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT32                temp = 0;
++    PSDREQUEST            pReq;
++    UINT32                irqsToUnMask = 0;
++    UINT32                shortTransferStatMask = 0;
++    UINT32                shortTransferErrorsMask = 0;
++    BOOL                  localIrqMasked = FALSE;
++
++        /* make sure clock is off before we do anything */
++    ClockStartStop(pHct, CLOCK_OFF);
++
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++
++        /* reset current DMA type flag */
++    pHct->DmaType = SDHC_DMA_NONE;
++    pHct->CmdProcessed = FALSE;
++
++    if (pHct->SDIOIrqDetectArmed) {
++            /* mask SDIO interrupt detection if it was armed, bus activity seems to
++             * cause false triggering of SDIO interrupts which the bus driver has to
++             * process */
++        MaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,FALSE);
++            /* it will be re-enabled on request completion */
++    }
++
++    do {
++
++        if (pHct->SD4Bit) {
++                /* only set 4 bit mode for data */
++            temp = SDHCD_CMD_DAT_BUS_4BIT;
++            pHct->FifoDepth = SDHC_MAX_FIFO_4BIT;
++        } else {
++            temp = SDHCD_CMD_DAT_BUS_1BIT;
++            pHct->FifoDepth  = SDHC_MAX_FIFO_1BIT;
++        }
++
++        if (pReq->BlockCount > 1) {
++                /* the MX21 by design is broken, for mult-block transfers the block size must
++                 * be a multiple of the FIFO depth! */
++            if (pReq->BlockLen & (pHct->FifoDepth- 1)) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 %s Multi-block transfer has BlockLen:%d, must be a multiple of:%d \n",
++                        IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                        pReq->BlockLen, pHct->FifoDepth));
++                status = SDIO_STATUS_UNSUPPORTED;
++                break;
++            }
++        }
++
++        if (pHct->IssueInitClocks) {
++            pHct->IssueInitClocks = FALSE;
++            temp |= SDHCD_CMD_DAT_INIT_CLKS;
++        }
++
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_NO_RESP:
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                    /* an SDIO R5 response is the same as an R1 */
++            case SDREQ_FLAGS_RESP_R1:
++                temp |= SDHCD_CMD_DAT_RESP_R1R5R6;
++                break;
++            case SDREQ_FLAGS_RESP_R1B:
++                temp |= SDHCD_CMD_DAT_RESP_R1R5R6;
++                break;
++            case SDREQ_FLAGS_RESP_R2:
++                temp |= SDHCD_CMD_DAT_RESP_R2;
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                temp |= SDHCD_CMD_DAT_RESP_R3R4;
++                break;
++            case SDREQ_FLAGS_RESP_R6:
++                temp |= SDHCD_CMD_DAT_RESP_R1R5R6;
++                break;
++            default:
++                DBG_ASSERT(FALSE);
++                status = SDIO_STATUS_INVALID_PARAMETER;
++                break;
++        }
++
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++            temp |= SDHCD_CMD_DAT_DATA_ENABLE;
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                temp |= SDHCD_CMD_DAT_DATA_WRITE;
++            }
++                /* set block length */
++            WRITE_HC_REG(pHct, SDHC_BLK_LEN_REG, pReq->BlockLen);
++            WRITE_HC_REG(pHct, SDHC_NOB_REG, pReq->BlockCount);
++            pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++            DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                        IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                        pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++                /* check scatter gather DMA */
++            if (pReq->Flags & SDREQ_FLAGS_DATA_DMA) {
++                DBG_ASSERT(pHcd->pDmaDescription != NULL);
++                DBG_PRINT(SDHC_TRACE_DATA, ("               : Data Transfer using Scatter Gather DMA: %d Descriptors\n",
++                        pReq->DescriptorCount));
++                pHct->DmaType = SDHC_DMA_SCATTER_GATHER;
++                pReq->pHcdContext = NULL;
++                if (!IsDMAAllowed(pHct, pReq)) {
++                    DBG_PRINT(SDDBG_ERROR,
++                      ("SDIO MX21 DMA HCLK Errata, cannot support the current bus width with multi-block transfer \n"));
++                        /* see DMA HCLK issues with SD controller
++                         * need to punt this operation to PIO mode to work around
++                         * chip errata */
++                    status = SDIO_STATUS_UNSUPPORTED;
++                    break;
++                }
++            } else {
++                    /* non-scatter gather, could be common buffer or PIO */
++                if (IsDMAAllowed(pHct, pReq)) {
++                        /* the FIFOs are a bit puny, so we use common buffer DMA (if available)
++                         * to transfer the buffer if the data is larger than a FIFO's worth */
++                    if (pReq->DataRemaining > pHct->FifoDepth) {
++                        pHct->DmaType = SDHC_DMA_COMMON_BUFFER;
++                    }
++                }
++
++                DBG_PRINT(SDHC_TRACE_DATA, ("               : Data Transfer will use %s \n",
++                    (pHct->DmaType == SDHC_DMA_COMMON_BUFFER) ? "common buffer DMA" : "PIO Mode"));
++
++                    /* use the context to hold where we are in the buffer */
++                pReq->pHcdContext = pReq->pDataBuffer;
++
++                    /* check for short transfer optimization */
++                if ((pReq->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER) &&
++                    (pHct->DmaType == SDHC_DMA_NONE) &&
++                    (pReq->DataRemaining <= pHct->FifoDepth)) {
++                        /* the data will fit in the FIFO and the caller indicates this
++                         * transfer will be short */
++                    if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                        shortTransferStatMask = SDHC_STATUS_WRITE_DONE;
++                        shortTransferErrorsMask = SDHC_STATUS_WRITE_CRC_ERROR;
++                    } else {
++                        shortTransferStatMask = SDHC_STATUS_READ_DONE;
++                        shortTransferErrorsMask = SDHC_STATUS_READ_TIMEOUT |
++                                                   SDHC_STATUS_READ_CRC_ERROR;
++                    }
++                }
++            }
++        }
++
++        if (0 == shortTransferStatMask) {
++                /* normal PIO or DMA mode */
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* interrupts will be used for data transfer completion */
++                irqsToUnMask |= SDHC_INT_WRITE_DONE_MASK;
++            } else {
++                    /* interrupts will be used for data transfer completion */
++                irqsToUnMask |= SDHC_INT_DATA_TRANS_DONE_MASK;
++            }
++
++            if (pHct->DmaType == SDHC_DMA_NONE) {
++                    /* data requires multiple FIFO fills, the spec is not clear if
++                     * we can pre-load for TX, so we'll wait for a FIFO EMPTY interrupt */
++                    /* Enable FIFO full and EMPTY interrupts */
++                irqsToUnMask |= SDHC_INT_BUFF_RDY_MASK;
++            }
++        } else {
++            DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 Short %s transfer (stat:0x%X, errs:0x%X)\n",
++                                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                shortTransferStatMask,shortTransferErrorsMask ));
++        }
++
++        if (SDHCD_GET_OPER_CLOCK(pHcd) < HCD_COMMAND_MIN_POLLING_CLOCK) {
++                /* clock rate is very low, need to use interrupts here */
++            irqsToUnMask |= SDHC_INT_END_CMD_MASK;
++        }
++
++        DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 CMD_DAT:0x%X (RespType:%s, Command:0x%X , Arg:0x%X Irqs:0x%X) \n",
++                  temp, GetRespString(pReq), pReq->Command, pReq->Argument,irqsToUnMask));
++
++        WRITE_HC_REG(pHct, SDHC_CMD_REG, pReq->Command);
++        WRITE_HC_REG(pHct, SDHC_ARGH_REG, (pReq->Argument >> 16));
++        WRITE_HC_REG(pHct, SDHC_ARGL_REG, (pReq->Argument & 0xFFFF));
++        WRITE_HC_REG(pHct, SDHC_CMD_DAT_REG, temp);
++
++        if (irqsToUnMask & SDHC_INT_END_CMD_MASK) {
++                /* command/resp uses interrupts */
++                /* unmask required interrupts */
++            UnmaskHcdIrq(pHct, irqsToUnMask, FALSE);
++                /* start the clock */
++            ClockStartStop(pHct, CLOCK_ON);
++            status = SDIO_STATUS_PENDING;
++            DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 using interrupt for command done.. \n"));
++            break;
++        }
++
++            /* if we get here, we are optimizing the transfer using command done polling */
++        if (irqsToUnMask) {
++                /* we can only write to the MASK register once during a transaction, so while
++                 * we poll and check processing, we mask the interrupt at the CPU */
++            DisableHcdInterrupt(pHct, FROM_NORMAL);
++            localIrqMasked = TRUE;
++            UnmaskHcdIrq(pHct, irqsToUnMask, FALSE);
++        }
++            /* start the clock */
++        ClockStartStop(pHct, CLOCK_ON);
++        DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 polling for command done.. \n"));
++        temp = 0;
++
++        if ((pReq->Flags & SDREQ_FLAGS_DATA_TRANS) &&
++            (!IS_SDREQ_WRITE_DATA(pReq->Flags))) {
++            /* on READ operations, the MX21 has a hardware bug:
++             * if the read data arrives early while the controller is
++             * reading in the response to the command, the READ_OP_DONE or FIFO_FULL
++             * bits will be set and the END_CMD will NEVER be set.  For read operations
++             * we must poll for either of END_CMD or READ_OP_DONE or FIFO_FULL */
++            WAIT_FOR_HC_STATUS(pHct,
++                               (SDHC_STATUS_END_CMD | SDHC_STATUS_READ_DONE | SDHC_STATUS_FIFO_FULL),
++                               &temp,
++                               SDHC_STATUS_RESP_ERRORS | SDHC_STATUS_RD_WR_ERRORS,
++                               status,
++                               POLL_TIMEOUT);
++        } else {
++               /* wait for command done */
++            WAIT_FOR_HC_STATUS(pHct,
++                               SDHC_STATUS_END_CMD,
++                               &temp,
++                               SDHC_STATUS_RESP_ERRORS,
++                               status,
++                               POLL_TIMEOUT);
++        }
++
++        if (SDIO_SUCCESS(status)) {
++                /* process the command completion */
++            status = ProcessCommandDone(pHct,pReq,temp,FALSE);
++        }
++
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        if (0 == shortTransferStatMask) {
++                /* no short data transfer necessary, we're done */
++            break;
++        }
++
++        /* if we get here, we need to deal with the short transfer DATA phase */
++
++            /* reset status for polling again */
++        status = SDIO_STATUS_SUCCESS;
++        temp = 0;
++            /* polling status here to accelerate processing */
++        DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 Short %s transfer \n",
++                                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                /* load the buffer */
++            HcdTransferTxData(pHct, pReq);
++        }
++
++        WAIT_FOR_HC_STATUS(pHct,
++                           shortTransferStatMask,
++                           &temp,
++                           shortTransferErrorsMask,
++                           status,
++                           POLL_TIMEOUT);
++
++        if (!SDIO_SUCCESS(status)) {
++                /* command timed out */
++            break;
++        }
++
++        if (temp) {
++                /* some error bits were set */
++            DBG_PRINT(SDHC_TRACE_REQUESTS,
++                        ("SDIO MX21 Short Transfer Failure: STAT:0x%X \n",temp));
++            status = TranslateHCError(pHct,temp);
++            break;
++        }
++            /* no errors */
++        if (!IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* drain the FIFO on reads */
++            HcdTransferRxData(pHct,pReq);
++            DBG_ASSERT(pReq->DataRemaining == 0);
++        }
++
++    } while (FALSE);
++
++    if (status != SDIO_STATUS_PENDING) {
++        pReq->Status = status;
++        EndHCTransfer(pHct,pReq,FROM_NORMAL);
++        if (IS_SDREQ_FORCE_DEFERRED_COMPLETE(pReq->Flags) || (pHct->DmaType != SDHC_DMA_NONE)) {
++            DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 deferring completion to work item \n"));
++                /* the HCD must do the indication in a separate context and return status pending */
++            if (SDHC_DMA_NONE == pHct->DmaType) {
++                    /* normal deferred completion */
++                QueueEventResponse(pHct, WORK_ITEM_IO_COMPLETE);
++            } else {
++                    /* deferred completion that synchronizes with the DMA controller
++                     * in case it got started */
++                CompleteRequestSyncDMA(pHct,pReq,FALSE);
++            }
++            status = SDIO_STATUS_PENDING;
++        } else {
++                /* complete the request */
++            DBG_PRINT(SDHC_TRACE_REQUESTS, ("SDIO MX21 Command Done - inline, status:%d \n", status));
++            /* fall through and return the non-pending status */
++        }
++    }
++
++    if (localIrqMasked) {
++            /* re-enable if we turned them off */
++        EnableHcdInterrupt(pHct, FROM_NORMAL);
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdConfig - HCD configuration handler
++  Input:  pHcd - HCD object
++          pConfig - configuration setting
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT16      command;
++
++    command = GET_SDCONFIG_CMD(pConfig);
++
++    switch (command){
++        case SDCONFIG_SDIO_REARM_INT:
++            pHct->SDIOIrqDetectArmed = TRUE;
++                /* re-enable IRQ detection */
++            UnmaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,FALSE);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                SDIO_IRQ_MODE_FLAGS irqModeFlags;
++                    /* get detect mode */
++                irqModeFlags = GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->IRQDetectMode;
++                if (irqModeFlags & IRQ_DETECT_4_BIT) {
++                    DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21: 4 Bit IRQ mode \r\n"));
++                        /* in 4 bit mode, the clock needs to be left on */
++                    pHct->KeepClockOn = TRUE;
++                } else {
++                    DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21: 1 Bit IRQ mode \r\n"));
++                        /* in 1 bit mode, the clock can be left off */
++                    pHct->KeepClockOn = FALSE;
++                }
++                    /* enable */
++                UnmaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,FALSE);
++                pHct->SDIOIrqDetectArmed = TRUE;
++                pHct->SDIOCardIrqDetectRequested = TRUE;
++            } else {
++                    /* disable */
++                MaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,FALSE);
++                pHct->KeepClockOn = FALSE;
++                pHct->SDIOIrqDetectArmed = FALSE;
++                pHct->SDIOCardIrqDetectRequested = FALSE;
++            }
++            break;
++        case SDCONFIG_GET_WP:
++            if (IsSlotWPSet(pHct)) {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++            } else {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++            }
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++                /* the first command will have the 80 clocks */
++            pHct->IssueInitClocks = TRUE;
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++                /* reset the controller, there appears to be a FIFO problem when you switch
++                 * between 4 and 1 bit modes, some residual data remains in the FIFO */
++            ResetController(pHct,TRUE,FROM_NORMAL);
++            SetBusMode(pHct, (PSDCONFIG_BUS_MODE_DATA)(pConfig->pData));
++            break;
++        case SDCONFIG_POWER_CTRL:
++            /* the slot just connects VCC straight to the slot nothing to adjust here */
++            DBG_PRINT(SDHC_TRACE_CONFIG, ("SDIO MX21 PwrControl: En:%d, VCC:0x%X \n",
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask));
++            break;
++        case SDCONFIG_GET_HCD_DEBUG:
++            *((CT_DEBUG_LEVEL *)pConfig->pData) = DBG_GET_DEBUG_LEVEL();
++            break;
++        case SDCONFIG_SET_HCD_DEBUG:
++            DBG_SET_DEBUG_LEVEL(*((CT_DEBUG_LEVEL *)pConfig->pData));
++            break;
++        default:
++            /* invalid request */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Local HCD: HcdConfig - bad command: 0x%X\n",command));
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return status;
++}
++
++void ResetController(PSDHCD_DRIVER_CONTEXT pHct, BOOL RestoreHcdSettings, BOOL FromIsr)
++{
++    INT i;
++
++    if (RestoreHcdSettings) {
++            /* disable interrupts, when a reset is applied some interrupts
++             * are unmasked */
++        DisableHcdInterrupt(pHct,FromIsr);
++    }
++        /* reset as per spec */
++    WRITE_HC_REG(pHct,SDHC_STR_STP_CLK_REG, SDHC_STR_STP_CLK_RESET);
++    WRITE_HC_REG(pHct,SDHC_STR_STP_CLK_REG, SDHC_STR_STP_CLK_RESET | SDHC_STR_STP_CLK_STOP);
++
++        /* eight register writes to finish reset cycle */
++    for (i = 0; i < 8; i++) {
++        WRITE_HC_REG(pHct,SDHC_STR_STP_CLK_REG, SDHC_STR_STP_CLK_STOP);
++    }
++        /* set base clock divisor */
++    WRITE_HC_REG(pHct,SDHC_CLK_RATE_REG, pHct->BaseClkDivisorReg);
++        /* set response and data timeouts */
++    WRITE_HC_REG(pHct, SDHC_CMD_RES_TO_REG, SDMMC_RESP_TIMEOUT_CLOCKS);
++    WRITE_HC_REG(pHct, SDHC_CMD_READ_TO_REG, SDMMC_DATA_TIMEOUT_CLOCKS);
++
++    MaskHcdIrq(pHct,SDHC_INT_MASK_ALL, FromIsr);
++
++    if (RestoreHcdSettings) {
++        EnableHcdInterrupt(pHct,FromIsr);
++    }
++
++    if (!RestoreHcdSettings) {
++        return;
++    }
++
++        /* restore the bus mode */
++    SetBusMode(pHct,&pHct->SavedBusMode);
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInitialize - Initialize host controller
++  Input:  pHct - HCD context
++  Output:
++  Return:
++  Notes: I/O resources must be mapped before calling this function
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdInitialize(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    int     i;
++    int     clkdivisor;
++    UINT32  actualBaseClk;
++
++    if (0 == pHct->Device.PeripheralClockRate) {
++        DBG_ASSERT(pHct->Device.PeripheralClockRate != 0);
++        return SDIO_STATUS_ERROR;
++    }
++
++    pHct->SDIOIrqDetectArmed = FALSE;
++    pHct->SDIOIrqMasked = FALSE;
++    pHct->SDIOCardIrqDetectRequested = FALSE;
++    pHct->KeepClockOn = FALSE;
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO MX21 SDIO Module Revision :0x%X \n",
++            READ_HC_REG(pHct, SDHC_REVISION_REG)));
++
++    clkdivisor = 1;
++    while (1) {
++            /* figure out the divisor to set module to <= 20Mhz */
++        actualBaseClk = pHct->Device.PeripheralClockRate/clkdivisor;
++        if (actualBaseClk <= SDHC_MODULE_MAX_CLK) {
++            break;
++        }
++        clkdivisor++;
++    }
++        /* clock divisor is 1 less */
++    clkdivisor--;
++
++    if (clkdivisor > 16) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Local HCD: HcdConfig - bad clk divisor: %d for base:%d\n",
++            clkdivisor,pHct->Device.PeripheralClockRate));
++        return SDIO_STATUS_ERROR;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO MX21 Clock Base:%d Hz, Using Divisor:%d\n",
++        pHct->Device.PeripheralClockRate,clkdivisor));
++
++        /* save this for resets */
++    pHct->BaseClkDivisorReg = clkdivisor;
++
++    pHct->Hcd.MaxClockRate = actualBaseClk;
++        /* build the clock table */
++        /* the first entry is unity clock */
++    pHct->ValidClockEntries = 1;
++    pHct->ClockDivisorTable[0].ClockRate = actualBaseClk;
++    pHct->ClockDivisorTable[0].RegisterValue = 0;
++        /* the remaining entries are a divisor that is a power of 2 */
++    clkdivisor = 2;
++    for (i = 1; i < HCD_MAX_CLOCK_ENTRIES; i++) {
++        pHct->ClockDivisorTable[i].ClockRate = actualBaseClk/clkdivisor;
++        if (0 == pHct->ClockDivisorTable[i].ClockRate) {
++            break;
++        }
++        pHct->ClockDivisorTable[i].RegisterValue = 1 << (i - 1);
++        clkdivisor <<= 1;
++        pHct->ValidClockEntries++;
++    }
++
++    for (i = 0; i <  pHct->ValidClockEntries; i++) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO MX21 Clock Index:%d, Rate:%d Hz, CLKDIV:0x%X\n",
++            i,pHct->ClockDivisorTable[i].ClockRate,pHct->ClockDivisorTable[i].RegisterValue));
++    }
++
++        /* reset the controller */
++    ResetController(pHct,FALSE,FALSE);
++
++    MaskHcdIrq(pHct,SDHC_INT_MASK_ALL, FALSE);
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdDeinitialize - deactivate MMC controller
++  Input:  pHct - HCD context
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdDeinitialize(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    MaskHcdIrq(pHct,SDHC_INT_MASK_ALL, FALSE);
++    ClockStartStop(pHct, CLOCK_OFF);
++}
++
++UINT32 GetValidStatusBitsForIRQ(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pCurrentReq)
++{
++    UINT32 statusBits = 0;
++    UINT32 ints;
++
++    ints = READ_HC_REG(pHct, SDHC_INT_MASK_REG);
++
++    if (ints & SDHC_INT_CARD_DETECT) {
++        statusBits |= SDHC_STATUS_CARD_PRESENT;
++    }
++
++    if (!(ints & SDHC_INT_SDIO_MASK)) {
++        statusBits |= SDHC_STATUS_SDIO_INT;
++    }
++
++    if (pCurrentReq != NULL) {
++            /* these require a current request */
++            /* command done */
++        if (!(ints & SDHC_INT_END_CMD_MASK)) {
++            statusBits |= SDHC_STATUS_END_CMD | SDHC_STATUS_RESP_ERRORS;
++        }
++            /* READ/WRITE processing */
++        if (IS_SDREQ_WRITE_DATA(pCurrentReq->Flags)) {
++                /* write data */
++            if (!(ints & SDHC_INT_BUFF_RDY_MASK)) {
++                statusBits |= SDHC_STATUS_FIFO_EMPTY;
++            }
++            if (!(ints & SDHC_INT_WRITE_DONE_MASK)) {
++                statusBits |= SDHC_STATUS_WRITE_DONE;
++            }
++            statusBits |= SDHC_STATUS_WRITE_CRC_ERROR;
++        } else {
++            if (!(ints & SDHC_INT_BUFF_RDY_MASK)) {
++                statusBits |= SDHC_STATUS_FIFO_FULL;
++            }
++            if (!(ints & SDHC_INT_DATA_TRANS_DONE_MASK)) {
++                statusBits |= SDHC_STATUS_READ_DONE;
++            }
++            statusBits |= SDHC_STATUS_READ_CRC_ERROR | SDHC_STATUS_READ_TIMEOUT;
++        }
++    }
++    DBG_PRINT(SDHC_TRACE_HC_INT, ("SDIO MX21 Valid Stats in IRQ:0x%X \n", statusBits));
++    return statusBits;
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInterrupt - process controller interrupt
++  Input:  pHct - HCD context
++  Output:
++  Return: TRUE if interrupt was handled
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdInterrupt(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    UINT32      statReg,errors,validStatBits;
++    PSDREQUEST  pReq;
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++
++    DBG_PRINT(SDHC_TRACE_HC_INT, ("+SDIO MX21 HCD Int handler \n"));
++
++    errors = 0;
++
++    pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
++
++
++    while (1) {
++            /* get the status we care about */
++        statReg = READ_HC_REG(pHct,SDHC_STATUS_REG);
++        validStatBits = GetValidStatusBitsForIRQ(pHct,pReq);
++        DBG_PRINT(SDHC_TRACE_HC_INT, ("SDIO MX21 StatReg:0x%X IMASK:0x%X ValidBits:0x%X\n",
++                        statReg,  READ_HC_REG(pHct, SDHC_INT_MASK_REG), validStatBits));
++
++            /* keep only relevent status bits */
++        statReg &= validStatBits;
++
++        if (pHct->CmdProcessed) {
++                /* mask out command bit, this will stay set until the interrupt mask is written
++                 * to or until the clock is stopped */
++            statReg &= ~SDHC_STATUS_END_CMD;
++        }
++
++        if (0 == statReg) {
++            break;
++        }
++
++        DBG_PRINT(SDHC_TRACE_HC_INT, ("SDIO MX21 After Mask: StatReg:0x%X  \n", statReg));
++
++        if (statReg & SDHC_STATUS_SDIO_INT) {
++            DBG_PRINT(SDHC_TRACE_SDIO_INT, ("SDIO MX21 SDIO IRQ (STAT:0x%X:IMASK:0x%X)\n",
++                READ_HC_REG(pHct,SDHC_STATUS_REG),READ_HC_REG(pHct, SDHC_INT_MASK_REG)));
++            if (pHct->SDIOIrqMasked) {
++                DBG_ASSERT(FALSE);
++                DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 SDIO IRQ (STAT:0x%X:IMASK:0x%X)\n",
++                    READ_HC_REG(pHct,SDHC_STATUS_REG),READ_HC_REG(pHct, SDHC_INT_MASK_REG)));
++            }
++            pHct->SDIOIrqDetectArmed = FALSE;
++                /* mask off */
++            MaskHcdIrq(pHct,SDHC_INT_SDIO_MASK,TRUE);
++            QueueEventResponse(pHct, WORK_ITEM_SDIO_IRQ);
++        }
++
++        if (NULL == pReq) {
++                /* might just be an SDIO irq */
++            break;
++        }
++
++        if (statReg & SDHC_STATUS_END_CMD) {
++                /* set flag to mask END_CMD status bit */
++            pHct->CmdProcessed = TRUE;
++                /* only care about response errors */
++            status = ProcessCommandDone(pHct,
++                                        pReq,
++                                        (statReg & SDHC_STATUS_RESP_ERRORS),
++                                        TRUE);
++            if (status != SDIO_STATUS_PENDING) {
++                    /* no data phase or the command failed, get out */
++                break;
++            }
++        }
++
++        /* if we get here we are processing interrupts associated with DATA */
++
++            /* check for any read/write errors */
++        if (statReg & SDHC_STATUS_RD_WR_ERRORS) {
++            status = TranslateHCError(pHct,(statReg & SDHC_STATUS_RD_WR_ERRORS));
++            break;
++        }
++
++        /* at this point, there are no status errors */
++
++        if (statReg & SDHC_STATUS_FIFO_EMPTY) {
++                /* write use Fifo EMPTY signal */
++            DBG_ASSERT(SDHC_DMA_NONE == pHct->DmaType);
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++                /* transfer data */
++            if (HcdTransferTxData(pHct, pReq)) {
++                MaskHcdIrq(pHct,SDHC_INT_BUFF_RDY_MASK, FROM_ISR);
++                DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 TX Fifo writes done. Waiting for WRITE_DONE \n"));
++            }
++        }
++
++        if (statReg & SDHC_STATUS_FIFO_FULL) {
++                /* READs use Fifo FULL signal */
++            DBG_ASSERT(SDHC_DMA_NONE == pHct->DmaType);
++            DBG_ASSERT(!IS_SDREQ_WRITE_DATA(pReq->Flags));
++                /* unload fifo */
++            HcdTransferRxData(pHct,pReq);
++            if (pReq->DataRemaining < pHct->FifoDepth) {
++                UINT32 temp = 0;
++                MaskHcdIrq(pHct,SDHC_INT_BUFF_RDY_MASK, FROM_ISR);
++                DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 RX Fifo reads done. waiting for READ_DONE \n"));
++
++                if (pReq->DataRemaining & 0x1) {
++                    DBG_PRINT(SDHC_TRACE_DATA,
++                            ("SDIO MX21 RX - Non-WORD aligned remaining bytes:%d \n",pReq->DataRemaining));
++                    WAIT_FOR_HC_STATUS(pHct,
++                                       SDHC_STATUS_READ_DONE | SDHC_STATUS_FIFO_FULL,
++                                       &temp,
++                                       SDHC_STATUS_RESP_ERRORS | SDHC_STATUS_RD_WR_ERRORS,
++                                       status,
++                                       POLL_TIMEOUT);
++                    if (!SDIO_SUCCESS(status)) {
++                        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 RX Fifo READ DONE Timeout! -- \n"));
++                    }
++                    if (temp & SDHC_STATUS_RD_WR_ERRORS) {
++                        status = TranslateHCError(pHct,(temp & SDHC_STATUS_RD_WR_ERRORS));
++                        break;
++                    }
++                    status = SDIO_STATUS_SUCCESS;
++                    statReg |= SDHC_STATUS_READ_DONE;
++                }
++                    /* fall through and let READ done processing continue */
++            }
++        }
++
++        if (statReg & SDHC_STATUS_READ_DONE) {
++            DBG_ASSERT(!IS_SDREQ_WRITE_DATA(pReq->Flags));
++                /* read operation is done */
++            if (SDHC_DMA_NONE == pHct->DmaType) {
++                if (pReq->DataRemaining) {
++                        /* there was a partial FIFO, we need to drain it */
++                    HcdTransferRxData(pHct,pReq);
++                        /* this should drain it */
++                    DBG_ASSERT(pReq->DataRemaining == 0);
++                }
++            }
++            status = SDIO_STATUS_SUCCESS;
++            DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 READ Transfer done. \n"));
++            break;
++        }
++
++        if (statReg & SDHC_STATUS_WRITE_DONE) {
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++                /* write operation is done */
++            status = SDIO_STATUS_SUCCESS;
++            DBG_PRINT(SDHC_TRACE_DATA, ("SDIO MX21 WRITE Transfer done. \n"));
++            break;
++        }
++    }
++
++    if (status != SDIO_STATUS_PENDING) {
++            /* set the status */
++        pReq->Status = status;
++        EndHCTransfer(pHct,pReq,FROM_ISR);
++        if ((DBG_GET_DEBUG_LEVEL() >= SDHC_TRACE_DATA_DUMP) && SDIO_SUCCESS(status) &&
++            IS_SDREQ_DATA_TRANS(pReq->Flags) && !IS_SDREQ_WRITE_DATA(pReq->Flags) &&
++            (pHct->DmaType != SDHC_DMA_SCATTER_GATHER)) {
++            SDLIB_PrintBuffer(pReq->pDataBuffer,(pReq->BlockLen*pReq->BlockCount),"SDIO MX21 - RX DataDump");
++        }
++        if (SDHC_DMA_NONE == pHct->DmaType) {
++                /* queue work item to notify bus driver of I/O completion */
++            QueueEventResponse(pHct, WORK_ITEM_IO_COMPLETE);
++        } else {
++                /* the request used DMA, we need to let the OS-specific code deal with DMA */
++            CompleteRequestSyncDMA(pHct,pReq,TRUE);
++        }
++    }
++
++    DBG_PRINT(SDHC_TRACE_HC_INT, ("-SDIO MX21 HCD Int handler \n"));
++    return TRUE;
++}
++
++
++
++
+Index: linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,210 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_mx21.h
++
++ at abstract: include file for Freescale MX21 SDIO bus host controller, OS independent  code
++
++ at notice: Copyright (c), 2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_MX21HCD_H___
++#define __SDIO_MX21HCD_H___
++
++#include <linux/sdio/ctsystem.h>
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/sdio_lib.h>
++#include "sdio_mx21_linux.h"
++
++enum SDHC_TRACE_ENUM {
++    SDHC_TRACE_CARD_INSERT = (SDDBG_TRACE + 1),
++    SDHC_TRACE_SDIO_INT = (SDDBG_TRACE + 2),
++    SDHC_TRACE_DATA,
++    SDHC_TRACE_DMA_DEBUG,
++    SDHC_TRACE_REQUESTS,
++    SDHC_TRACE_DATA_DUMP,
++    SDHC_TRACE_CONFIG,
++    SDHC_TRACE_HC_INT,
++    SDHC_TRACE_LAST
++};
++
++typedef enum _SDHC_DMA_TYPE {
++    SDHC_DMA_NONE = 0,
++    SDHC_DMA_COMMON_BUFFER = 1,
++    SDHC_DMA_SCATTER_GATHER
++}SDHC_DMA_TYPE, *PSDHC_DMA_TYPE;
++
++#define SDHC_MODULE_MAX_CLK      20000000
++#define SDHC_CONTROLLER1_BASE_ADDRESS    0x10013000
++#define SDHC_CONTROLLER2_BASE_ADDRESS    0x10014000
++#define SDHC_CONTROLLER_ADDRESS_LENGTH   0x1000
++
++#define SDIO_SDHC_MAX_BYTES_PER_BLOCK   2048
++
++#define SDIO_SDHC_MAX_BLOCKS            0xFFFF
++
++#define HCD_MAX_CLOCK_ENTRIES 8
++typedef struct _HCD_CLOCK_TBL_ENTRY {
++    SD_BUSCLOCK_RATE  ClockRate;  /* rate */
++    UINT16            RegisterValue;
++}HCD_CLOCK_TBL_ENTRY;
++
++/* register definitions */
++#define SDHC_STR_STP_CLK_REG  0x00
++#define SDHC_STR_STP_CLK_RESET      (1 << 3)
++#define SDHC_STR_STP_CLK_ENABLE     (1 << 2)
++#define SDHC_STR_STP_CLK_START      (1 << 1)
++#define SDHC_STR_STP_CLK_STOP       (1 << 0)
++
++#define SDHC_STATUS_REG       0x04
++#define SDHC_STATUS_CARD_PRESENT   (1 << 15)
++#define SDHC_STATUS_SDIO_INT       (1 << 14)
++#define SDHC_STATUS_END_CMD        (1 << 13 )
++#define SDHC_STATUS_WRITE_DONE     (1 << 12)
++#define SDHC_STATUS_READ_DONE      (1 << 11)
++#define SDHC_STATUS_WRITE_CRC_CODE_MASK (3 << 9)
++#define SDHC_STATUS_CLK_RUN        (1 << 8)
++#define SDHC_STATUS_FIFO_FULL      (1 << 7)
++#define SDHC_STATUS_FIFO_EMPTY     (1 << 6)
++#define SDHC_STATUS_RESP_CRC_ERROR (1 << 5)
++#define SDHC_STATUS_READ_CRC_ERROR (1 << 3)
++#define SDHC_STATUS_WRITE_CRC_ERROR (1 << 2)
++#define SDHC_STATUS_RESP_TIMEOUT    (1 << 1)
++#define SDHC_STATUS_READ_TIMEOUT    (1 << 0)
++
++#define SDHC_STATUS_RESP_ERRORS  (SDHC_STATUS_RESP_CRC_ERROR | SDHC_STATUS_RESP_TIMEOUT)
++#define SDHC_STATUS_RD_WR_ERRORS (SDHC_STATUS_READ_CRC_ERROR | SDHC_STATUS_READ_TIMEOUT |\
++                                  SDHC_STATUS_WRITE_CRC_ERROR)
++
++#define SDHC_CLK_RATE_REG            0x08
++#define SDHC_CLK_RATE_PRESCALE_SHIFT 4
++#define SDHC_CLK_RATE_PRESCALE_MASK  (0xFFF << SDHC_CLK_RATE_PRESCALE_SHIFT)
++
++#define SDHC_CMD_DAT_REG             0x0C
++#define SDHCD_CMD_DAT_BUS_1BIT       0x00
++#define SDHCD_CMD_DAT_BUS_4BIT       (0x2 << 8)
++#define SDHCD_CMD_DAT_INIT_CLKS      (1 << 7)
++#define SDHCD_CMD_DAT_RESP_BUSY      (1 << 6) /* undocumented bit */
++#define SDHCD_CMD_DAT_DATA_WRITE     (1 << 4)
++#define SDHCD_CMD_DAT_DATA_ENABLE    (1 << 3)
++#define SDHCD_CMD_DAT_RESP_NO_RESP   0x00
++#define SDHCD_CMD_DAT_RESP_R1R5R6    0x01
++#define SDHCD_CMD_DAT_RESP_R2        0x02
++#define SDHCD_CMD_DAT_RESP_R3R4      0x03
++
++#define SDHC_CMD_RES_TO_REG             0x10
++#define SDMMC_RESP_TIMEOUT_CLOCKS       64
++
++#define SDHC_CMD_READ_TO_REG            0x14
++#define SDMMC_DATA_TIMEOUT_CLOCKS       0xFFFF
++
++#define SDHC_BLK_LEN_REG                0x18
++#define SDHC_NOB_REG                    0x1C
++
++#define SDHC_REVISION_REG               0x20
++
++#define SDHC_INT_MASK_REG               0x24
++#define SDHC_INT_CARD_DETECT            (1 << 15)
++#define SDHC_INT_SDIO_INT_WAKEUP        (1 << 14)
++#define SDHC_INT_DAT0_ENABLE            (1 << 5)
++
++#define SDHC_INT_SDIO_MASK              (1 << 4)
++#define SDHC_INT_BUFF_RDY_MASK          (1 << 3)
++#define SDHC_INT_END_CMD_MASK           (1 << 2)
++#define SDHC_INT_WRITE_DONE_MASK        (1 << 1)
++#define SDHC_INT_DATA_TRANS_DONE_MASK   (1 << 0)
++#define SDHC_INT_MASK_ALL               0x1F
++
++#define SDHC_CMD_REG                    0x28
++#define SDHC_ARGH_REG                   0x2C
++#define SDHC_ARGL_REG                   0x30
++#define SDHC_RES_FIFO_REG               0x34
++#define SDHC_BUF_ACCESS_REG             0x38
++
++#define SDHC_MAX_FIFO_1BIT  16
++#define SDHC_MAX_FIFO_4BIT  64
++
++/* driver wide data, this driver only supports one device,
++ * so we include the per device data here also */
++typedef struct _SDHCD_DRIVER_CONTEXT {
++    PTEXT         pDescription;       /* human readable device decsription */
++    SDHCD         Hcd;                /* HCD description for bus driver */
++    SDHCD_DEVICE  Device;             /* the single device's info */
++    BOOL          CardInserted;       /* card inserted flag */
++    BOOL          KeepClockOn;
++    BOOL          SD4Bit;             /* 4 bit bus mode */
++    BOOL          CmdProcessed;       /* command phase was processed */
++    BOOL          IssueInitClocks;
++    UINT32        FifoDepth;          /* FIFO depth for the bus mode */
++    SDHC_DMA_TYPE DmaType;
++    INT           ValidClockEntries;
++    HCD_CLOCK_TBL_ENTRY ClockDivisorTable[HCD_MAX_CLOCK_ENTRIES];
++    BOOL          SDIOIrqMasked;
++    BOOL          SDIOIrqDetectArmed;
++    BOOL          SDIOCardIrqDetectRequested;
++    INT           BaseClkDivisorReg;
++    SDCONFIG_BUS_MODE_DATA SavedBusMode;
++}SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++
++/* prototypes */
++SDIO_STATUS HcdRequest(PSDHCD pHcd);
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pReq);
++SDIO_STATUS HcdInitialize(PSDHCD_DRIVER_CONTEXT pHcdContext);
++void HcdDeinitialize(PSDHCD_DRIVER_CONTEXT pHcdContext);
++BOOL HcdInterrupt(PSDHCD_DRIVER_CONTEXT pHcdContext);
++SDIO_STATUS QueueEventResponse(PSDHCD_DRIVER_CONTEXT pHcdContext, INT WorkItemID);
++BOOL GetGpioPinLevel(PSDHCD_DRIVER_CONTEXT pHcdContext, INT Pin);
++void ModifyCSForSPIIntDetection(PSDHCD_DRIVER_CONTEXT pHcdContext, BOOL Enable);
++void UnmaskHcdIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask, BOOL FromIsr);
++void MaskHcdIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask, BOOL FromIsr);
++void SlotPowerOnOff(PSDHCD_DRIVER_CONTEXT pHct , BOOL On);
++BOOL IsSlotWPSet(PSDHCD_DRIVER_CONTEXT pHct);
++SDIO_STATUS SetUpHCDDMA(PSDHCD_DRIVER_CONTEXT pHct,
++                         PSDREQUEST pReq,
++                         PDMA_TRANSFER_COMPLETION pCompletion,
++                         PVOID                    pContext);
++SDIO_STATUS InitMX21(PSDHCD_DRIVER_CONTEXT pHct);
++void DeinitMX21(PSDHCD_DRIVER_CONTEXT pHct);
++void CompleteRequestSyncDMA(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq, BOOL FromIsr);
++void DisableHcdInterrupt(PSDHCD_DRIVER_CONTEXT pHct, BOOL FromIsr);
++void EnableHcdInterrupt(PSDHCD_DRIVER_CONTEXT pHct, BOOL FromIsr);
++BOOL IsDMAAllowed(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq);
++void DumpDmaInfo(PSDHCD_DRIVER_CONTEXT pHct);
++#define WORK_ITEM_IO_COMPLETE  0
++#define WORK_ITEM_CARD_DETECT  1
++#define WORK_ITEM_SDIO_IRQ     2
++
++#define HCD_COMMAND_MIN_POLLING_CLOCK 5000000
++
++#endif
+Index: linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21_linux.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21_linux.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,105 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_mx21_linux.h
++
++ at abstract: include file for MX21 local bus host controller, linux dependent code
++
++ at notice: Copyright (c), 2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_HCD_LINUX_H___
++#define __SDIO_HCD_LINUX_H___
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/errno.h>
++#include <linux/device.h>
++#include <asm/irq.h>
++
++#define SDHC_DMA_COMMON_BUFFER_SIZE       16*1024
++#define SDHC_MAX_BYTES_PER_DMA_DESCRIPTOR 16*1024*1024 /* 16MB per descriptor */
++
++/* mapped memory address */
++typedef struct _SDHCD_MEMORY {
++    ULONG Raw;      /* start of address range */
++    ULONG Length;   /* length of range */
++    PVOID pMapped;  /* the mapped address */
++}SDHCD_MEMORY, *PSDHCD_MEMORY;
++
++typedef void (*PDMA_TRANSFER_COMPLETION)(PVOID,SDIO_STATUS,BOOL);
++
++#define SDHCD_MAX_DEVICE_NAME 12
++
++/* device data*/
++typedef struct _SDHCD_DEVICE {
++    OS_PNPDEVICE   HcdDevice;     /* the OS device for this HCD */
++    OS_PNPDRIVER   HcdDriver;     /* the OS driver for this HCD */
++    SDDMA_DESCRIPTION Dma;        /* driver DMA description */
++    POS_PNPDEVICE pBusDevice;     /* our device registered with bus driver */
++    UINT    ControllerInterrupt;  /* controller interrupt */
++    UINT8   InitStateMask;
++#define SDHC_INTERRUPT_INIT        0x01
++#define SDHC_REGISTERED            0x10
++#define SDHC_HW_INIT               0x20
++#define SDHC_DMA_ALLOCATED         0x40
++    SDHCD_MEMORY ControlRegs;    /* memory addresses of device */
++    spinlock_t   Lock;           /* lock against the ISR */
++    BOOL         StartUpCheck;
++    PDMA_TRANSFER_COMPLETION pDmaCompletion;
++    PVOID        pContext;
++    PUINT8       pDmaCommonBuffer;      /* common buffer for DMA */
++    DMA_ADDRESS  DmaCommonBufferPhys;   /* physical address for common buffer */
++    UINT32       DmaCommonBufferSize;   /* size of DMA common buffer */
++    INT          DmaChannel;            /* DMA channel to use */
++    BOOL         DmaSgMapped;
++    INT          LastRxCopy;
++    UINT32       PeripheralClockRate;
++    UINT32       DmaHclkErrata;         /* see errata 13 in MX21 chip errata doc */
++    BOOL         LocalIrqDisabled;
++}SDHCD_DEVICE, *PSDHCD_DEVICE;
++
++#define OsMicroDelay(x) udelay((x))
++
++#define READ_HC_REG(pC, OFFSET)  \
++    _READ_DWORD_REG(((UINT32)(pC)->Device.ControlRegs.pMapped) + (OFFSET))
++#define WRITE_HC_REG(pC, OFFSET, VALUE) \
++    _WRITE_DWORD_REG(((UINT32)(pC)->Device.ControlRegs.pMapped) + (OFFSET),(VALUE))
++
++#define WRITE_HC_REG_D(pC, OFFSET, VALUE) \
++    { WRITE_HC_REG(pC, OFFSET, VALUE);OsMicroDelay(1);}
++
++#define GET_HC_REG_BASE(pC) ((UINT32)((pC)->Device.ControlRegs.pMapped))
++
++#endif
+Index: linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21_os.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/mx21/sdio_mx21_os.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,435 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_os.c
++
++ at abstract: Linux MX21 Local Bus SDIO Host Controller Driver
++
++#notes: includes module load and unload functions
++
++ at notice: Copyright (c), 2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++
++#define DBG_DECLARE 7;
++#include <linux/sdio/ctsystem.h>
++#include "sdio_mx21.h"
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++
++#define DESCRIPTION "SDIO MX21 Local Bus HCD"
++#define AUTHOR "Atheros Communications, Inc."
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static int Probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId);
++static void Remove(struct pnp_dev *pBusDevice);
++#else
++static int Probe(POS_PNPDEVICE pBusDevice, const PUINT pId);
++static void Remove(POS_PNPDEVICE pBusDevice);
++#endif
++
++static void hcd_iocomplete_wqueue_handler(void *context);
++static void hcd_sdioirq_wqueue_handler(void *context);
++
++#define BASE_HCD_ATTRIBUTES (SDHCD_ATTRIB_BUS_1BIT      |      \
++                             SDHCD_ATTRIB_SLOT_POLLING)
++
++#define DEFAULT_ATTRIBUTES (BASE_HCD_ATTRIBUTES | SDHCD_ATTRIB_BUS_4BIT)
++
++/* debug print parameter */
++module_param(debuglevel, int, 0644);
++MODULE_PARM_DESC(debuglevel, "debuglevel 0-7, controls debug prints");
++
++static SDHCD_DRIVER_CONTEXT HcdContext = {
++   .pDescription  = DESCRIPTION,
++   .Hcd.pName = "sdio_mx21hcd",
++   .Hcd.Version = CT_SDIO_STACK_VERSION_CODE,
++   .Hcd.SlotNumber = 0,
++   .Hcd.Attributes = DEFAULT_ATTRIBUTES,
++   .Hcd.MaxBytesPerBlock = SDIO_SDHC_MAX_BYTES_PER_BLOCK,
++   .Hcd.MaxBlocksPerTrans = SDIO_SDHC_MAX_BLOCKS,
++   .Hcd.MaxSlotCurrent = 500, /* 1/2 amp */
++   .Hcd.SlotVoltageCaps = SLOT_POWER_3_3V, /* 3.3V */
++   .Hcd.SlotVoltagePreferred = SLOT_POWER_3_3V, /* 3.3V */
++   .Hcd.MaxClockRate = 20000000,
++   .Hcd.pContext = &HcdContext,
++   .Hcd.pRequest = HcdRequest,
++   .Hcd.pConfigure = HcdConfig,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++   .Device.HcdDevice.name = "sdio_mx21_hcd",
++   .Device.HcdDriver.name = "sdio_mx21_hcd",
++   .Device.HcdDriver.probe  = Probe,
++   .Device.HcdDriver.remove = Remove,
++#endif
++   .Device.Dma.Mask = 0xFFFFFFFF,    /* any address */
++   .Device.Dma.Flags = SDDMA_DESCRIPTION_FLAG_DMA,
++   .Device.Dma.MaxBytesPerDescriptor = SDHC_MAX_BYTES_PER_DMA_DESCRIPTOR, /* max per descriptor */
++   .Device.Dma.AddressAlignment = 0x0,  /* no illegal bits, buffers address can be on any boundary*/
++   .Device.Dma.LengthAlignment = 0x0,   /* no illegal bits, buffer lengths can be any byte count */
++   .Device.Dma.MaxDescriptors = 1,      /* only 1 scatter gather descriptor */
++};
++
++/* work queues */
++static struct work_struct iocomplete_work;
++static struct work_struct sdioirq_work;
++
++/*
++ * Probe - probe to setup our device, if present
++*/
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++int Probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId)
++#else
++static int Probe(POS_PNPDEVICE pBusDevice, const PUINT pId)
++#endif
++{
++    SYSTEM_STATUS err = 0;
++    SDIO_STATUS   status;
++    PSDHCD_DRIVER_CONTEXT pHct = &HcdContext; /* for now , only 1 instance */
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO MX21 Local HCD: Probe  \n"));
++
++    do {
++
++        pHct->Device.pBusDevice = pBusDevice;
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        pHct->Hcd.pDevice = &pBusDevice->dev;
++#endif
++
++        pHct->Hcd.pModule = THIS_MODULE;
++        pHct->Device.ControlRegs.Raw = SDHC_CONTROLLER1_BASE_ADDRESS;
++        pHct->Device.ControlRegs.Length = SDHC_CONTROLLER_ADDRESS_LENGTH;
++
++        spin_lock_init(&pHct->Device.Lock);
++
++        status = InitMX21(pHct);
++
++        if (!SDIO_SUCCESS(status)) {
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++
++        status = HcdInitialize(pHct);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Probe - failed to init HW, status =%d\n", status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++
++        pHct->Device.InitStateMask |= SDHC_HW_INIT;
++
++    	   /* register with the SDIO bus driver */
++    	if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&pHct->Hcd)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Probe - failed to register with host, status =%d\n",
++                                    status));
++            err = SDIOErrorToOSError(status);
++            break;
++    	}
++
++        pHct->Device.InitStateMask |= SDHC_REGISTERED;
++
++    } while (FALSE);
++
++    if (err < 0) {
++        Remove(pBusDevice); /* TODO: the cleanup should not really be done in the Remove function */
++    } else {
++#ifdef USE_CARD_DETECT_HW
++        pHct->Device.StartUpCheck = TRUE;
++            /* queue the work item test the slot */
++        if (!SDIO_SUCCESS(QueueEventResponse(pHct, WORK_ITEM_CARD_DETECT))) {
++                /* failed */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Probe - queue event failed\n"));
++        }
++#endif
++        DBG_PRINT(SDDBG_ERROR, ("SDIO MX21 Probe - HCD ready! \n"));
++    }
++    return err;
++}
++
++/* Remove - remove  device
++ * perform the undo of the Probe
++*/
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static void Remove(struct pnp_dev *pBusDevice)
++#else
++static void Remove(POS_PNPDEVICE pBusDevice)
++#endif
++{
++    PSDHCD_DRIVER_CONTEXT pHct = &HcdContext;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO MX21 Local HCD: Remove - removing device\n"));
++
++    if (pHct->Device.InitStateMask & SDHC_REGISTERED) {
++            /* unregister from the bus driver */
++        SDIO_UnregisterHostController(&pHct->Hcd);
++        pHct->Device.InitStateMask &= ~SDHC_REGISTERED;
++    }
++
++    if (pHct->Device.InitStateMask & SDHC_HW_INIT) {
++        HcdDeinitialize(pHct);
++        pHct->Device.InitStateMask &= ~SDHC_HW_INIT;
++    }
++
++    DeinitMX21(pHct);
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO MX21 Local HCD: Remove\n"));
++}
++
++/*
++ * QueueEventResponse - queues an event in a process context back to the bus driver
++ *
++*/
++SDIO_STATUS QueueEventResponse(PSDHCD_DRIVER_CONTEXT pHct, INT WorkItemID)
++{
++    struct work_struct *work;
++
++    switch (WorkItemID) {
++        case WORK_ITEM_IO_COMPLETE:
++            work = &iocomplete_work;
++            break;
++#ifdef USE_CARD_DETECT_HW
++        case WORK_ITEM_CARD_DETECT:
++            work = &carddetect_work;
++            break;
++#endif
++        case WORK_ITEM_SDIO_IRQ:
++            work = &sdioirq_work;
++            break;
++        default:
++            DBG_ASSERT(FALSE);
++            return SDIO_STATUS_ERROR;
++            break;
++    }
++
++    if (schedule_work(work) > 0) {
++        return SDIO_STATUS_SUCCESS;
++    } else {
++        return SDIO_STATUS_PENDING;
++    }
++}
++
++/*
++ * hcd_iocomplete_wqueue_handler - the work queue for io completion
++*/
++static void hcd_iocomplete_wqueue_handler(void *context)
++{
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)context;
++
++    SDIO_HandleHcdEvent(&pHct->Hcd, EVENT_HCD_TRANSFER_DONE);
++}
++
++#ifdef USE_CARD_DETECT_HW
++/*
++ * hcd_carddetect_handler - the work queue for card detect debouncing
++*/
++static void hcd_carddetect_wqueue_handler(void *context)
++{
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)context;
++    HCD_EVENT event;
++
++    event = EVENT_HCD_NOP;
++    //SDHC_TRACE_CARD_INSERT
++
++    DBG_PRINT(SDDBG_TRACE, ("+ SDIO MX21 Card Detect Work Item \n"));
++
++    if (!pHct->CardInserted) {
++        DBG_PRINT(SDDBG_TRACE, ("Delaying to debounce card... \n"));
++            /* sleep for slot debounce if there is no card */
++        msleep(SDHC_SLOT_DEBOUNCE_MS);
++    }
++
++        /* check board status pin */
++    if (IsCardInserted(pHct)) {
++        if (!pHct->CardInserted) {
++            pHct->CardInserted = TRUE;
++            event = EVENT_HCD_ATTACH;
++            DBG_PRINT(SDDBG_TRACE, (" Card Inserted! \n"));
++                /* disable insert */
++            disable_irq(pHct->Device.CanomralrdInsertInterrupt);
++                /* enable remove */
++            enable_irq(pHct->Device.CardRemoveInterrupt);
++        } else {
++            DBG_PRINT(SDDBG_ERROR, ("Card detect interrupt , already inserted card! \n"));
++        }
++    } else {
++        if (pHct->CardInserted) {
++            event = EVENT_HCD_DETACH;
++            pHct->CardInserted = FALSE;
++            DBG_PRINT(SDDBG_TRACE, (" Card Removed! \n"));
++                /* disable remove */
++            disable_irq(pHct->Device.CardRemoveInterrupt);
++                /* enable insert */
++            enable_irq(pHct->Device.CardInsertInterrupt);
++        } else {
++            if (pHct->Device.StartUpCheck) {
++                pHct->Device.StartUpCheck = FALSE;
++                DBG_PRINT(SDDBG_TRACE, ("No card at power up. \n"));
++            } else {
++                DBG_PRINT(SDDBG_ERROR, nomral("Card detect interrupt , already removed card! \n"));
++            }
++        }
++    }
++
++    if (event != EVENT_HCD_NOP) {
++        SDIO_HandleHcdEvent(&pHct->Hcd, event);
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("- SDIO MX21 Card Detect Work Item \n"));
++}
++
++
++BOOL IsCardInserted(PSDHCD_DRIVER_CONTEXT pHct)
++{
++        // TODO
++    return TRUE;
++}
++
++#endif
++
++/*
++ * hcd_sdioirq_handler - the work queue for handling SDIO IRQ
++*/
++static void hcd_sdioirq_wqueue_handler(void *context)
++{
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)context;
++    DBG_PRINT(SDHC_TRACE_SDIO_INT, ("SDIO MX21: hcd_sdioirq_wqueue_handler \n"));
++    SDIO_HandleHcdEvent(&pHct->Hcd, EVENT_HCD_SDIO_IRQ_PENDING);
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  UnmaskHcdIrq - Un mask a HCD interrupts
++  Input:    pHct - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void UnmaskHcdIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask, BOOL FromIsr)
++{
++    ULONG  flags = 0;
++    UINT32 ints;
++
++    if (!FromIsr) {
++        spin_lock_irqsave(&pHct->Device.Lock,flags);
++    }
++    if (Mask & SDHC_INT_SDIO_MASK) {
++        pHct->SDIOIrqMasked = FALSE;
++    }
++
++    ints = READ_HC_REG(pHct, SDHC_INT_MASK_REG);
++    ints &= ~Mask;
++    WRITE_HC_REG(pHct, SDHC_INT_MASK_REG, ints);
++    if (!FromIsr) {
++        spin_unlock_irqrestore(&pHct->Device.Lock,flags);
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  MaskHcdIrq - Mask Hcd interrupts
++  Input:    pHct - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void MaskHcdIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask, BOOL FromIsr)
++{
++    UINT32 ints;
++    ULONG  flags = 0;
++
++    if (!FromIsr) {
++        spin_lock_irqsave(&pHct->Device.Lock,flags);
++    }
++    if (Mask & SDHC_INT_SDIO_MASK) {
++        pHct->SDIOIrqMasked = TRUE;
++    }
++    ints = READ_HC_REG(pHct, SDHC_INT_MASK_REG);
++    ints |= Mask;
++    WRITE_HC_REG(pHct, SDHC_INT_MASK_REG, ints);
++    if (!FromIsr) {
++        spin_unlock_irqrestore(&pHct->Device.Lock,flags);
++    }
++}
++
++
++/*
++ * module init
++*/
++static int __init sdio_local_hcd_init(void) {
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    SDIO_STATUS status;
++#endif
++    INIT_WORK(&iocomplete_work, hcd_iocomplete_wqueue_handler, &HcdContext);
++    INIT_WORK(&sdioirq_work, hcd_sdioirq_wqueue_handler, &HcdContext);
++
++    REL_PRINT(SDDBG_TRACE, ("SDIO MX21 Local HCD: loaded\n"));
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    status = SDIO_BusAddOSDevice(&HcdContext.Driver.Dma, &HcdContext.Driver.HcdDriver, &HcdContext.Driver.HcdDevice);
++    return SDIOErrorToOSError(status);
++#else
++    DBG_PRINT(SDDBG_TRACE, ("SDIO MX21 Local HCD: sdio_local_hcd_init exit\n"));
++    /* 2.4 */
++    return Probe(NULL, NULL);
++#endif
++
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_local_hcd_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("+SDIO MX21 Local HCD: unloaded\n"));
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    SDIO_BusRemoveOSDevice(&HcdContext.Driver.HcdDriver, &HcdContext.Driver.HcdDevice);
++#else
++    /* 2.4 */
++    Remove(NULL);
++#endif
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO MX21 Local HCD: leave sdio_local_hcd_cleanup\n"));
++}
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_local_hcd_init);
++module_exit(sdio_local_hcd_cleanup);
++
+Index: linux-2.6.22/drivers/sdio/hcd/omap/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,3 @@
++# SDIO omap host controller makefile
++sdio_omap_hcd-objs		:= sdio_hcd_os.o sdio_hcd_os_2_6.o
++obj-$(CONFIG_ARCH_OMAP)		+= sdio_hcd.o
+Index: linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1337 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd.c
++
++ at abstract: Texas Instruments OMAP native Host Controller Driver
++
++#notes: OS independent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDOMAPHCD
++#include "sdio_omap_hcd.h"
++
++#define FROM_ISR    TRUE
++#define FROM_NORMAL FALSE
++
++void EndHCTransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL FromIsr);
++void ResetController(PSDHCD_DEVICE pDevice, BOOL Restore, BOOL FromIsr);
++
++#ifdef OMAP_REQ_PROCESSING_USE_CLOCK_CONTROL
++    /* control clock during request processing */
++#define ReqProcClkStartStop(p,on) ClockStartStop((p),(on))
++#else
++    /* let clock run free */
++#define ReqProcClkStartStop(p,on)
++#endif
++
++#define OMAP_COMMAND_DONE_POLLING         2000000
++#define OMAP_SHORT_TRANSFER_DONE_POLLING  3000000
++
++#define WAIT_FOR_HC_STATUS(pHct,DoneMask,Error,ErrorMask,Status,Timeout)   \
++{                                                                            \
++     INT _timeoutCnt = (Timeout);                                            \
++     (Status) = SDIO_STATUS_SUCCESS;                                         \
++     while((_timeoutCnt > 0) &&                                               \
++            !(READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (DoneMask)) &&            \
++            !((Error) = READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (ErrorMask))){_timeoutCnt--;} \
++     (Error) = READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (ErrorMask);            \
++     if (0 == _timeoutCnt) {(Status) = SDIO_STATUS_DEVICE_ERROR; \
++           DBG_PRINT(SDDBG_ERROR, \
++           ("SDIO OMAP - status timeout, waiting for (mask=0x%X) (stat=0x%X)\n",\
++               (UINT)(DoneMask), READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS))); \
++                             DBG_ASSERT(FALSE);}       \
++}
++
++#define SetFifoAFL(pHct,Depth) \
++{                              \
++    UINT16 fifoSettings = (Depth)/2;  \
++    if (fifoSettings > 0) {fifoSettings--;} \
++    fifoSettings = ((fifoSettings) << OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT) & \
++                                        OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK; \
++    WRITE_HOST_REG16((pHct), OMAP_REG_MMC_BUFFER_CONFIG, fifoSettings);     \
++}
++
++#define SetFifoAEL(pHct,Depth) \
++{                              \
++    UINT16 fifoSettings = (Depth)/2;  \
++    if (fifoSettings > 0) {fifoSettings--;} \
++    fifoSettings = ((fifoSettings) << OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT) & \
++                                        OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK; \
++    WRITE_HOST_REG16((pHct), OMAP_REG_MMC_BUFFER_CONFIG, fifoSettings);     \
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetResponseData - get the response data
++  Input:    pDevice - device context
++            pReq - the request
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void GetResponseData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     wordCount;
++    INT     byteCount;
++    UINT16  readBuffer[8];
++    UINT    ii;
++
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP) {
++        return;
++    }
++
++
++    byteCount = SD_DEFAULT_RESPONSE_BYTES;
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++        byteCount = SD_R2_RESPONSE_BYTES - 1;
++        wordCount = (byteCount + 1) / 2;
++        /* move data into read buffer */
++        for (ii = 0; ii < wordCount; ii++) {
++            readBuffer[ii] = READ_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_RESPONSE0+(ii*4));
++        }
++        memcpy(&pReq->Response[0],readBuffer,byteCount);
++    } else {
++        wordCount = (byteCount + 1) / 2;
++
++        /* move data into read buffer */
++        for (ii = 0; ii < wordCount; ii++) {
++            readBuffer[ii] = READ_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_RESPONSE6+(ii*4));
++        }
++        memcpy(&pReq->Response[1],readBuffer,byteCount);
++    }
++
++    if (DBG_GET_DEBUG_LEVEL() >= OMAP_TRACE_REQUESTS) {
++        SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO OMAP - Response Dump");
++    }
++
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  DumpCurrentRequestInfo - debug dump
++  Input:    pDevice - device context
++  Output:
++  Return:
++  Notes: This function debug prints the current request
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void DumpCurrentRequestInfo(PSDHCD_DEVICE pDevice)
++{
++    if (pDevice->Hcd.pCurrentRequest != NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - Current Request Command:%d, ARG:0x%8.8X\n",
++                  pDevice->Hcd.pCurrentRequest->Command, pDevice->Hcd.pCurrentRequest->Argument));
++        if (IS_SDREQ_DATA_TRANS(pDevice->Hcd.pCurrentRequest->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++                      IS_SDREQ_WRITE_DATA(pDevice->Hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
++                      pDevice->Hcd.pCurrentRequest->BlockCount,
++                      pDevice->Hcd.pCurrentRequest->BlockLen,
++                      pDevice->Hcd.pCurrentRequest->DataRemaining));
++        }
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TranslateSDError - check for an SD error
++  Input:    pDevice - device context
++            Status -  error interrupt status register value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TranslateSDError(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, UINT16 Status)
++{
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CERR) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO OMAP TranslateSDError : Warning command response has error bits set\n"));
++        return SDIO_STATUS_SUCCESS;
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CTO) {
++        if (!((pReq->Command == 5) || (pReq->Command == 55) || (pReq->Command == 1))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Command Timeout: CMD:%d\n",pReq->Command));
++        }
++        return SDIO_STATUS_BUS_RESP_TIMEOUT;
++    }
++
++    DBG_PRINT(SDDBG_WARN, ("SDIO OMAP TranslateSDError : current controller status: 0x%X\n",
++        READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS)));
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CCRC) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : command CRC error\n"));
++        return SDIO_STATUS_BUS_RESP_CRC_ERR;
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_DCRC) {
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : write data CRC error\n"));
++            return SDIO_STATUS_BUS_WRITE_ERROR;
++        } else {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : read data CRC error\n"));
++            return SDIO_STATUS_BUS_READ_CRC_ERR;
++        }
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_DTO) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : data timeout\n"));
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    }
++
++    DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - untranslated error 0x%X\n", (UINT)Status));
++    return SDIO_STATUS_DEVICE_ERROR;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ClockStartStop - SD clock control
++  Input:  pDevice - device object
++          On - turn on or off (TRUE/FALSE)
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ClockStartStop(PSDHCD_DEVICE pDevice, BOOL On)
++{
++    UINT16 state;
++
++    DBG_PRINT(OMAP_TRACE_CLOCK, ("SDIO OMAP - ClockStartStop, %d\n", (UINT)On));
++
++    state = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG);
++    if (On) {
++        ClockEnable(pDevice, TRUE);
++        state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++        state |= pDevice->Clock;
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    } else {
++        ClockEnable(pDevice, FALSE);
++        state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetBusMode - Set Bus mode
++  Input:  pDevice - device object
++          pMode - mode
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetBusMode(PSDHCD_DEVICE pDevice, PSDCONFIG_BUS_MODE_DATA pMode)
++{
++    int ii;
++    int clockIndex;
++    UINT16 state  = 0;
++    UINT32 rate;
++
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetBusMode\n"));
++
++        /* set clock index to the end max. divide */
++    pMode->ActualClockRate = (pDevice->BaseClock) / OMAP_MAX_CLOCK_DIVIDE;
++    clockIndex = OMAP_MAX_CLOCK_DIVIDE;
++    for (ii = 1; ii <= OMAP_MAX_CLOCK_DIVIDE ; ii++) {
++        rate = pDevice->BaseClock / ii;
++        if (pMode->ClockRate >= rate) {
++            pMode->ActualClockRate = rate;
++            clockIndex = ii;
++            break;
++        }
++    }
++
++    state = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG);
++
++    switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++        case SDCONFIG_BUS_WIDTH_1_BIT:
++            state &=  ~OMAP_REG_MMC_MODULE_CONFIG_4BIT;
++            break;
++        case SDCONFIG_BUS_WIDTH_4_BIT:
++            state |=  OMAP_REG_MMC_MODULE_CONFIG_4BIT;
++            break;
++        default:
++            break;
++    }
++
++    pDevice->Clock = clockIndex;
++    state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++    state |= pDevice->Clock;
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    MicroDelay(pDevice, 50);
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetBusMode Clock: %d Khz, ClockRate %d (%d) state:0x%X\n",
++                                   pMode->ActualClockRate, pMode->ClockRate, clockIndex, (UINT)state));
++}
++
++/*
++ * SetDataTimeout - set timeout for data transfers
++*/
++static void SetDataTimeout(PSDHCD_DEVICE pDevice, UINT TimeOut)
++{
++    UINT sdreg;
++    UINT to = TimeOut;
++
++    /* Check if we need to use timeout multiplier register */
++    sdreg = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++    if (TimeOut > 0xFFFF) {
++        sdreg |= OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE;
++        to /= 1024;
++    } else {
++        sdreg &= ~OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE;
++    }
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetDataTimeout Timeout: %d, mode: 0x%x,  to: 0x%x\n",
++                        TimeOut, sdreg, to));
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, sdreg);
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_DATA_READ_TIMEOUT, to);
++}
++
++/* DMA completion routine */
++void DMACompletion(PVOID pContext, SDIO_STATUS status, BOOL FromIsr)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pContext;
++    PSDREQUEST pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP (%s) (%s) DMA transfer failed, status: %d\n",
++            IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++            (OMAP_DMA_COMMON == pDevice->DmaMode) ? "Common-Buffer" : "Direct",
++            status));
++    } else {
++        DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP (%s) (%s) DMA transfer completed \n",
++            IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++            (OMAP_DMA_COMMON == pDevice->DmaMode) ? "Common-Buffer" : "Direct"));
++    }
++        /* clear the any TXDE RXDE bits */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, 0);
++    CompleteRequestSyncDMA(pDevice, pReq, status);
++    return;
++}
++
++/* transfer a FIFO worth of data, returns TRUE of all data was transfered */
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT16 *pFifo;
++
++    pFifo = (volatile UINT16 *)(GET_HC_REG_BASE(pDevice) + OMAP_REG_MMC_DATA_ACCESS);
++
++        /* if we get called here because of an AEL interrupt, we know we have
++         * OMAP_MMC_FIFO_SIZE - OMAP_MMC_AEL_FIFO_THRESH room in the fifo to store more data */
++    dataCopy = min(pReq->DataRemaining,(UINT32)(OMAP_MMC_FIFO_SIZE - OMAP_MMC_AEL_FIFO_THRESH));
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++
++        /* copy to fifo */
++    while (dataCopy) {
++        data = *pBuf;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            data |= ((UINT16)*pBuf) << 8;
++            dataCopy--;
++            pBuf++;
++        }
++        *pFifo = data;
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Pending TX Remaining: %d \n",pReq->DataRemaining));
++
++    if (pReq->DataRemaining) {
++        return FALSE;
++    }
++
++    return TRUE;
++}
++
++/* transfer a FIFO worth of data */
++BOOL HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL Flush)
++{
++
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT16 *pFifo;
++
++    pFifo = (volatile UINT16 *)(GET_HC_REG_BASE(pDevice) + OMAP_REG_MMC_DATA_ACCESS);
++
++    if (Flush) {
++        dataCopy = min(pReq->DataRemaining,(UINT32)OMAP_MMC_FIFO_SIZE);
++    } else {
++            /* each time we are called, we know we have at least a threshold's worth of data */
++        dataCopy = min(pReq->DataRemaining,(UINT32)OMAP_MMC_AFL_FIFO_THRESH);
++    }
++        /* get where we are */
++    pBuf = (PUINT8)pReq->pHcdContext;
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++
++        /* copy from fifo */
++    while (dataCopy) {
++        data = *pFifo;
++        *pBuf = (UINT8)data;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            *pBuf = (UINT8)(data >> 8);
++            pBuf++;
++            dataCopy--;
++        }
++    }
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Pending RX Remaining: %d \n",pReq->DataRemaining));
++
++    if (pReq->DataRemaining < OMAP_MMC_AFL_FIFO_THRESH) {
++        return TRUE;
++    }
++
++    return FALSE;
++}
++
++SDIO_STATUS ProcessCommandDone(PSDHCD_DEVICE         pDevice,
++                               PSDREQUEST            pReq,
++                               BOOL                  FromIsr)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16      irqUnmask = 0;
++
++    do {
++
++            /* get the response data for the command */
++        GetResponseData(pDevice, pReq);
++
++            /* check for data */
++        if (!IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++            break;
++        }
++
++            /* check with the bus driver if it is okay to continue with data */
++        status = SDIO_CheckResponse(&pDevice->Hcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++
++        if (!SDIO_SUCCESS(status)) {
++            break;
++        }
++
++        if (pDevice->ShortTransfer) {
++            UINT16 hwErrors;
++            UINT16 waitMask;
++
++            DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Short %s data transfer (%d bytes) \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                   pReq->DataRemaining));
++
++                /* wait for block sent/receive or error */
++            waitMask = OMAP_REG_MMC_MODULE_STATUS_BRS;
++
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* load FIFO */
++                HcdTransferTxData(pDevice, pReq);
++                waitMask |= OMAP_REG_MMC_MODULE_STATUS_EOFB;
++            }
++
++            WAIT_FOR_HC_STATUS(pDevice,
++                               waitMask,
++                               hwErrors,
++                               OMAP_STATUS_DATA_PROCESSING_ERRORS,
++                               status,
++                               OMAP_SHORT_TRANSFER_DONE_POLLING)
++
++            if (!SDIO_SUCCESS(status)) {
++                ResetController(pDevice,TRUE,FromIsr);
++                break;
++            }
++
++            if (hwErrors) {
++                status = TranslateSDError(pDevice, pReq, hwErrors);
++                if (!SDIO_SUCCESS(status)) {
++                    break;
++                }
++            }
++
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* check for busy */
++                MicroDelay(pDevice, 1);
++                    /* check if card entered busy */
++                if (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) &
++                      OMAP_REG_MMC_MODULE_STATUS_CB)) {
++                        /* we are done */
++                    break;
++                }
++                    /* card entered busy */
++                WRITE_HOST_REG16(pDevice,
++                                 OMAP_REG_MMC_MODULE_STATUS,
++                                 OMAP_REG_MMC_MODULE_STATUS_CB);
++
++                     /* wait end of busy */
++                WAIT_FOR_HC_STATUS(pDevice,
++                                   OMAP_REG_MMC_MODULE_STATUS_EOFB,
++                                   hwErrors,
++                                   0, /* no need to check for errors */
++                                   status,
++                                   OMAP_SHORT_TRANSFER_DONE_POLLING)
++
++                if (!SDIO_SUCCESS(status)) {
++                    ResetController(pDevice,TRUE,FromIsr);
++                }
++
++            } else {
++                    /* unload FIFO */
++                HcdTransferRxData(pDevice, pReq, TRUE);
++            }
++                /* done */
++            break;
++        }
++
++            /* enable error interrupts, data transfer will require interrupts */
++        irqUnmask = OMAP_REG_MMC_INTERRUPT_ERRORS;
++        status = SDIO_STATUS_PENDING;
++
++        if (pDevice->DmaMode != OMAP_DMA_NONE) {
++                /* for DMA let the DMA hardware run , we only want the interrupt
++                 * for block sent/received in addition to the errors */
++            irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_BRS;
++            break;
++        }
++
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                /* set threshold for FIFO empty level */
++            SetFifoAEL(pDevice,OMAP_MMC_AEL_FIFO_THRESH);
++                /* wait for AEL interrupts */
++            irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_AE;
++        } else {
++            if (pReq->DataRemaining < OMAP_MMC_AFL_FIFO_THRESH) {
++                    /* don't need AFL, wait for last block received interrupt instead */
++                irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_BRS;
++            } else {
++                    /* set trigger level for FIFO full level */
++                SetFifoAFL(pDevice,OMAP_MMC_AFL_FIFO_THRESH);
++                    /* more data is expected */
++                irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_AF;
++            }
++        }
++
++    } while (FALSE);
++
++    if (SDIO_STATUS_PENDING == status) {
++        if (irqUnmask != 0) {
++            UnmaskIrq(pDevice, irqUnmask, FromIsr);
++        }
++        DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP HcdRequest Pending %s data transfer \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++    }
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdRequest - SD request handler
++  Input:  pHcd - HCD object
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdRequest(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    UINT16                temp;
++    PSDREQUEST            pReq;
++
++    pDevice->CompletionCount = 0;
++    pDevice->DmaMode = OMAP_DMA_NONE;
++    pDevice->ShortTransfer = FALSE;
++
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++
++    do {
++        if (pDevice->ShuttingDown) {
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest returning canceled\n"));
++            status = SDIO_STATUS_CANCELED;
++            break;
++        }
++
++        ReqProcClkStartStop(pDevice, CLOCK_OFF);
++
++            /* make sure error ints and EOC is masked*/
++        MaskIrq(pDevice,
++                OMAP_REG_MMC_INTERRUPT_ERRORS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOC,
++                FROM_NORMAL);
++
++            /* clear all status bits (including error bits) that deals with request processing */
++        WRITE_HOST_REG16(pDevice,
++                         OMAP_REG_MMC_MODULE_STATUS,
++                         OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS);
++
++        if (READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS) &
++            OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS) {
++            DBG_PRINT(SDDBG_WARN, ("SDIO OMAP ERROR!!! status did not clear: 0x%X\n",
++                READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS)));
++        }
++
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            default:
++            case SDREQ_FLAGS_NO_RESP:
++                temp = OMAP_REG_MMC_CMD_NORESPONSE;
++                break;
++            case SDREQ_FLAGS_RESP_R1:
++                temp = OMAP_REG_MMC_CMD_R1;
++                break;
++            case SDREQ_FLAGS_RESP_R1B:
++                temp = OMAP_REG_MMC_CMD_R1 | OMAP_REG_MMC_CMD_R1BUSY;
++                break;
++            case SDREQ_FLAGS_RESP_R2:
++                temp = OMAP_REG_MMC_CMD_R2;
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++                temp = OMAP_REG_MMC_CMD_R3;
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                    /* SDIO R4s are just OCR responses equivalent to an R3*/
++                 temp = OMAP_REG_MMC_CMD_R3;
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                    /* R5s are just R1 responses, do not use the R5 type in this controller
++                     * because it will disable response timeout detection unless you set
++                     * the C5E,C14E..bits */
++                temp = OMAP_REG_MMC_CMD_R1;
++                break;
++            case SDREQ_FLAGS_RESP_R6:
++                temp = OMAP_REG_MMC_CMD_R6;
++                break;
++        }
++
++            /* get the command type */
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_NO_RESP:
++                    /* broadcast no-response */
++                temp |= OMAP_REG_MMC_CMD_TYPE_BC;
++                break;
++
++            case SDREQ_FLAGS_RESP_R2:
++                if ((pReq->Command == CMD9) || (pReq->Command == CMD10)) {
++                    temp |= OMAP_REG_MMC_CMD_TYPE_AC;
++                } else if (pReq->Command == CMD2) {
++                    temp |= OMAP_REG_MMC_CMD_TYPE_BCR;
++                } else {
++                    DBG_ASSERT(FALSE);
++                }
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++            case SDREQ_FLAGS_RESP_R6:
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                    /* responses that are broadcast */
++                temp |= OMAP_REG_MMC_CMD_TYPE_BCR;
++                break;
++            default:
++                /* all other commands are addressed responses */
++                if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                        /* commands with data */
++                    temp |= OMAP_REG_MMC_CMD_TYPE_ADTC;
++                } else {
++                        /* all commands without data */
++                    temp |= OMAP_REG_MMC_CMD_TYPE_AC;
++                }
++                break;
++        }
++
++        GetDefaults(pDevice);
++
++        ReqProcClkStartStop(pDevice, CLOCK_ON);
++
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)){
++            /* set the block size register */
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH, pReq->BlockLen-1);
++            /* set block count register */
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT, pReq->BlockCount-1);
++            pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++            DBG_PRINT(OMAP_TRACE_DATA,
++                     ("SDIO OMAP HcdRequest: %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                                       IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                       pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++        	DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest: blen: %d, nblk: %d\n",
++                                 READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH),
++                                 READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT)));
++                /* use the context to hold where we are in the buffer */
++            pReq->pHcdContext = pReq->pDataBuffer;
++            temp |= IS_SDREQ_WRITE_DATA(pReq->Flags) ?
++                    OMAP_REG_MMC_CMD_DDIR_WRITE : OMAP_REG_MMC_CMD_DDIR_READ;
++
++            SetDataTimeout(pDevice, pDevice->DataTimeOut);
++
++            if ((pReq->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER) && (pReq->BlockCount == 1) &&
++                (pReq->BlockLen < OMAP_MAX_SHORT_TRANSFER_SIZE)) {
++                    /* flag current request as a short transfer */
++                pDevice->ShortTransfer = TRUE;
++            }
++
++            if (!pDevice->ShortTransfer) {
++                    /* setup dma transfer */
++                if (pDevice->DmaCapable) {
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_DMA) {
++                            /* caller passed a scatter gather list */
++                        pDevice->DmaMode = OMAP_DMA_SG;
++                    } else {
++                    		/* don't do DMA if the transfer will fit in one FIFO, just adds extra ints. */
++//force DMA use to avoid missing transfer completes                    	if (pReq->DataRemaining > OMAP_MMC_FIFO_SIZE) {
++                            	/* try common buffer */
++                        	pDevice->DmaMode = OMAP_DMA_COMMON;
++//??                        }
++                    }
++                } else {
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_DMA) {
++                        DBG_ASSERT(FALSE);
++                        status = SDIO_STATUS_INVALID_PARAMETER;
++                        break;
++                    }
++                }
++            }
++
++            if (pDevice->DmaMode != OMAP_DMA_NONE) {
++                    /* setup DMA */
++                status = SetUpHCDDMA(pDevice,
++                                     pReq,
++                                     DMACompletion,
++                                     pDevice);
++
++                if (!SDIO_SUCCESS(status)) {
++                    if ((SDIO_STATUS_UNSUPPORTED == status) &&
++                        (OMAP_DMA_COMMON == pDevice->DmaMode)){
++                            /* if we tried common buffer, the length may be unaligned,
++                             * punt it to PIO mode */
++                        pDevice->DmaMode = OMAP_DMA_NONE;
++                        status = SDIO_STATUS_SUCCESS;
++                    } else {
++                            /* fail the request */
++                        break;
++                    }
++                }
++            }
++
++        	DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest:(1) blen: %d, nblk: %d\n",
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH),
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT)));
++        }
++
++            /* set the argument register */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_ARG_LOW, (UINT16)(pReq->Argument & 0xFFFF));
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_ARG_HI,  (UINT16)((pReq->Argument & 0xFFFF0000) >> 16));
++            /* set the command */
++        temp |= (pReq->Command & OMAP_REG_MMC_CMD_MASK);
++        DBG_PRINT(OMAP_TRACE_REQUESTS,
++                  ("SDIO OMAP HcdRequest CMDDAT:0x%X (RespType:%d, Command:0x%X , Arg:0x%X) \n",
++                  temp, GET_SDREQ_RESP_TYPE(pReq->Flags), pReq->Command, pReq->Argument));
++
++            /* set command timeout */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_TIMEOUT, pDevice->TimeOut);
++
++        if ((SDHCD_GET_OPER_CLOCK(pHcd) < pDevice->ClockSpinLimit) &&
++            (pReq->Command != CMD3)){
++                /* clock rate is very low, need to use interrupts here
++                   or cmd 3 that is not handled properly by OMAP controllers */
++            UnmaskIrq(pDevice,
++                      OMAP_REG_MMC_INTERRUPT_ERRORS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOC,
++                      FROM_NORMAL);
++
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, temp);
++
++            status = SDIO_STATUS_PENDING;
++
++            if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++                DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HcdRequest using interrupt for command done.*** with data. (clock:%d, ref:%d)\n",
++                    SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++            } else {
++                DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HcdRequest using interrupt for command done. (clock:%d, ref:%d) \n",
++                    SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++            }
++
++            break;
++        }
++
++            /* if we get here we are polling, interrupt errors and EOC should be masked */
++
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, temp);
++
++        WAIT_FOR_HC_STATUS(pDevice,
++                           OMAP_REG_MMC_MODULE_STATUS_EOC,
++                           temp,
++                           OMAP_STATUS_CMD_PROCESSING_ERRORS,
++                           status,
++                           OMAP_COMMAND_DONE_POLLING);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR,
++                    ("SDIO OMAP HCD (cmd-inline) polling failed (sd command:%d,status:%d)\n",
++                    pReq->Command,status));
++            ResetController(pDevice,TRUE,FROM_NORMAL);
++            if (pReq->Command == CMD3) {
++                /* fake the cmd3, if it was a real error it will be picked up in the cmd7 */
++                status = SDIO_STATUS_SUCCESS;
++            } else {
++                break;
++            }
++            break;
++        }
++        DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HCD (cmd-inline) statreg: 0x%X config:0x%X\n",
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS),
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG)));
++
++        if (temp & OMAP_STATUS_CMD_PROCESSING_ERRORS) {
++            status = TranslateSDError(pDevice, pReq, temp);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++        status = ProcessCommandDone(pDevice,pReq,FALSE);
++
++    } while (FALSE);
++
++    if (status != SDIO_STATUS_PENDING) {
++        pReq->Status = status;
++        EndHCTransfer(pDevice, pReq, FROM_NORMAL);
++        if (IS_SDREQ_FORCE_DEFERRED_COMPLETE(pReq->Flags)) {
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest deferring completion to work item \n"));
++                /* the HCD must do the indication in a separate context and return status pending */
++            QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++            return SDIO_STATUS_PENDING;
++        } else {
++                /* complete the request */
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest Command Done, status:%d \n", status));
++        }
++        pDevice->Cancel = FALSE;
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdConfig - HCD configuration handler
++  Input:  pHcd - HCD object
++          pConfig - configuration setting
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16 configSave;
++
++    if(pDevice->ShuttingDown) {
++        DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdConfig returning canceled\n"));
++        return SDIO_STATUS_CANCELED;
++    }
++
++    switch (GET_SDCONFIG_CMD(pConfig)){
++        case SDCONFIG_GET_WP:
++            if (WriteProtectSwitchOn(pDevice)) {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++            } else {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++            }
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdConfig sending init clocks\n"));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ALL_INT,FROM_NORMAL);
++            ReqProcClkStartStop(pDevice, CLOCK_ON);
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_ALL);
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, OMAP_REG_MMC_CMD_INAB);
++            while(!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) & OMAP_REG_MMC_MODULE_STATUS_EOC))
++                ;
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_EOC);
++            ReqProcClkStartStop(pDevice, CLOCK_OFF);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                {
++                    SDIO_IRQ_MODE_FLAGS irqModeFlags;
++
++                    irqModeFlags =
++                        GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->IRQDetectMode;
++                    if (irqModeFlags & IRQ_DETECT_4_BIT) {
++                        DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: 4 Bit IRQ mode \n"));
++                            /* in 4 bit mode, the clock needs to be left on */
++                        pDevice->KeepClockOn = TRUE;
++                    } else {
++                            /* in 1 bit mode, the clock can be left off */
++                        pDevice->KeepClockOn = FALSE;
++                    }
++                }
++                pDevice->IrqDetectArmed = TRUE;
++
++                    /* enable SDIO mode IRQ detection */
++                configSave = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++                configSave |= OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE;
++                WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, configSave);
++                    /* enable detection IRQ */
++                DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: enable SDIO IRQ\n"));
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++            } else {
++                pDevice->KeepClockOn = FALSE;
++                pDevice->IrqDetectArmed = FALSE;
++                DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: disable SDIO IRQ\n"));
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++                configSave = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++                configSave &= ~OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE;
++                WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, configSave);
++            }
++            break;
++        case SDCONFIG_SDIO_REARM_INT:
++                /* re-enable IRQ detection */
++            DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig - SDIO IRQ re-armed\n"));
++            pDevice->IrqDetectArmed = TRUE;
++            UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++            SetBusMode(pDevice, (PSDCONFIG_BUS_MODE_DATA)(pConfig->pData));
++                /* save it in case we have to restore it later */
++            memcpy(&pDevice->SavedBusMode,pConfig->pData,sizeof(SDCONFIG_BUS_MODE_DATA));
++            break;
++        case SDCONFIG_POWER_CTRL:
++            DBG_PRINT(OMAP_TRACE_CONFIG, ("SDIO OMAP HcdConfig PwrControl: En:%d, VCC:0x%X \n",
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask));
++            status = SetPowerLevel(pDevice,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask);
++            break;
++        case SDCONFIG_GET_HCD_DEBUG:
++            *((CT_DEBUG_LEVEL *)pConfig->pData) = DBG_GET_DEBUG_LEVEL();
++            break;
++        case SDCONFIG_SET_HCD_DEBUG:
++            DBG_SET_DEBUG_LEVEL(*((CT_DEBUG_LEVEL *)pConfig->pData));
++            break;
++        default:
++            /* invalid request */
++            DBG_PRINT(SDDBG_WARN, ("SDIO OMAP HCD: HcdConfig - unsupported command: 0x%X\n",
++                                    GET_SDCONFIG_CMD(pConfig)));
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return status;
++}
++
++void ResetController(PSDHCD_DEVICE pDevice, BOOL Restore, BOOL FromIsr)
++{
++    INT ii;
++
++    ClockStartStop(pDevice, CLOCK_OFF);
++
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_CONTROL, OMAP_REG_MMC_SYSTEM_CONTROL_SW_RESET);
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_CONTROL, 0);
++
++        /* wait for done */
++    for(ii = 0;
++        (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_STATUS) &  OMAP_REG_MMC_SYSTEM_STATUS_RESET_DONE))
++        && (ii < 1000);
++        ii++);
++
++    if (ii >= 1000) {
++            /* reset on 1610 is broken, see errata, use alternate approach */
++            /* cycle power */
++         WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, 0);
++         WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG,
++                                         OMAP_REG_MMC_MODULE_CONFIG_PWRON | 1);
++    }
++
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG,
++                     OMAP_REG_MMC_MODULE_CONFIG_MODE_MMCSD | OMAP_REG_MMC_MODULE_CONFIG_PWRON);
++
++         /* configure the SDIO mode */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG,
++                     OMAP_REG_MMC_SDIO_MODE_CONFIG_DCR4);
++
++    SetDataTimeout(pDevice, OMAP_DEFAULT_DATA_TIMEOUT);
++
++        /* set the default timeouts */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_TIMEOUT, pDevice->TimeOut);
++        /* clear all status bits, from chip erratta, the status may not clear on a reset */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_ALL);
++
++    if (!Restore) {
++        return;
++    }
++
++        /* restore bus clock and bus mode */
++    SetBusMode(pDevice,&pDevice->SavedBusMode);
++
++        /* restore interrupt state */
++    if (pDevice->IrqDetectArmed) {
++    	UINT16 configSave;
++        configSave = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++        configSave |= OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE;
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, configSave);
++        UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FromIsr);
++    }
++
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInitialize - Initialize controller
++  Input:  pDeviceContext - device context
++  Output:
++  Return:
++  Notes: I/O resources must be mapped before calling this function
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16 version;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HcdInitialize\n"));
++
++        /* reset the controller */
++    ResetController(pDeviceContext, FALSE,FROM_NORMAL);
++
++        /* display version info */
++    version = READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_MODULE_REV);
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HcdInitialize: Module Spec verison: %d.%d\n",
++              ((version & OMAP_REG_MMC_MODULE_REV_MAJOR_MASK) >> OMAP_REG_MMC_MODULE_REV_MAJOR_SHIFT),
++              ((version & OMAP_REG_MMC_MODULE_REV_MINOR_MASK) >> OMAP_REG_MMC_MODULE_REV_MINOR_SHIFT)));
++
++    if (pDeviceContext->BaseClock == 0) {
++         DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP invalid base clock setting\n"));
++         status = SDIO_STATUS_DEVICE_ERROR;
++         return status;
++    }
++
++    DBG_PRINT(SDDBG_TRACE,
++    ("SDIO OMAP Using base clock: %dHz, max bus clock: %dHz, max blocks: %d max bytes per block: %d\n",
++                            pDeviceContext->BaseClock,
++                            pDeviceContext->Hcd.MaxClockRate,
++                            pDeviceContext->Hcd.MaxBlocksPerTrans,
++                            pDeviceContext->Hcd.MaxBytesPerBlock));
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HcdInitialize: SlotVoltageCaps: 0x%X, MaxSlotCurrent: 0x%X\n",
++                        (UINT)pDeviceContext->Hcd.SlotVoltageCaps, (UINT)pDeviceContext->Hcd.MaxSlotCurrent));
++
++    /* interrupts will get enabled by the caller after all of the OS dependent work is done */
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HcdInitialize\n"));
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdDeinitialize - deactivate controller
++  Input:  pDeviceContext - context
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    PSDREQUEST pReq;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HcdDeinitialize\n"));
++
++
++    pReq = GET_CURRENT_REQUEST(&pDeviceContext->Hcd);
++
++    if (pReq != NULL) {
++        pReq->Status = SDIO_STATUS_CANCELED;
++        DBG_PRINT(SDDBG_TRACE,
++        ("SDIO OMAP HcdDeinitialize - cancelling request. (command:%d) mod status:0x%X, IRQ Enables:0x%X\n",
++        pReq->Command,  (UINT)READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_MODULE_STATUS),
++        (UINT)READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_INTERRUPT_ENABLE)));
++    }
++
++    pDeviceContext->KeepClockOn = FALSE;
++    MaskIrq(pDeviceContext, OMAP_REG_MMC_INTERRUPT_ALL_INT, FROM_NORMAL);
++    pDeviceContext->ShuttingDown = TRUE;
++    ClockStartStop(pDeviceContext, CLOCK_OFF);
++
++    if (pReq != NULL) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_TRANSFER_DONE);
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HcdDeinitialize\n"));
++}
++
++void EndHCTransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL FromIsr)
++{
++    ReqProcClkStartStop(pDevice, CLOCK_OFF);
++
++    if (!SDIO_SUCCESS(pReq->Status) && (pDevice->DmaMode != OMAP_DMA_NONE)) {
++            /* DMA may be running cancel the DMA transfer */
++        SDCancelDMATransfer(pDevice);
++    }
++
++    MaskIrq(pDevice,
++            (OMAP_REG_MMC_INTERRUPT_ALL_INT & ~OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ),FromIsr);
++
++    if (!SDIO_SUCCESS(pReq->Status)) {
++          switch (pReq->Status) {
++            case SDIO_STATUS_BUS_READ_TIMEOUT:
++            case SDIO_STATUS_BUS_READ_CRC_ERR:
++            case SDIO_STATUS_BUS_WRITE_ERROR:
++            case SDIO_STATUS_BUS_RESP_CRC_ERR:
++                DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP - resetting controller on bus errors (CMD:%d) \n",
++                        pReq->Command));
++                    /* controller gets stuck on some errors */
++                ResetController(pDevice,TRUE,FromIsr);
++                break;
++            default:
++                break;
++        }
++    }
++
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdSDInterrupt - process controller interrupt
++  Input:  pDeviceContext - context
++  Output:
++  Return: TRUE if interrupt was handled
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDevice)
++{
++    UINT16      statusErrs,errorMask,statusMask;
++    PSDREQUEST  pReq = NULL;
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("+SDIO OMAP ISR handler \n"));
++
++    pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    while (1) {
++            /* get status */
++        statusErrs = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS);
++        DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, status: 0x%X \n",
++                  (UINT)statusErrs));
++
++            /* for ISR processing, only deal with interrupts that are actually enabled */
++        statusMask = READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE);
++        statusErrs &= statusMask;
++            /* ack the status bits we care about */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, (statusErrs & (~OMAP_REG_MMC_MODULE_STATUS_CIRQ)));
++
++        DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, valid status: 0x%X, IRQ Enables:0x%X\n",
++                  (UINT)statusErrs, statusMask));
++            /* deal with SDIO interrupts */
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_CIRQ) {
++            if (READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG)
++                    & OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE) {
++                        /* this interrupt is level triggered and will remain set until the card interrupt
++                       source is cleared. */
++                    DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP ISR - SDIO_IRQ detected\n"));
++                if (READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE)
++                                    & OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ) {
++                    QueueEventResponse(pDevice, WORK_ITEM_SDIO_IRQ);
++                    MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_ISR);
++                    WRITE_HOST_REG16(pDevice,
++                                     OMAP_REG_MMC_MODULE_STATUS,
++                                     OMAP_REG_MMC_MODULE_STATUS_CIRQ);
++				}
++            } else {
++                DBG_ASSERT_WITH_MSG(FALSE,
++                        "SDIO OMAP ISR - unexpected card interrupt!\n");
++            }
++        }
++
++        if (0 == statusErrs) {
++                /* nothing to process */
++            break;
++        }
++
++        if (NULL == pReq) {
++                /* nothing more to do */
++            break;
++        }
++
++        errorMask = OMAP_REG_MMC_MODULE_STATUS_CTO  |
++                    OMAP_REG_MMC_MODULE_STATUS_CCRC;
++
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)){
++            errorMask |= OMAP_REG_MMC_MODULE_STATUS_DTO | OMAP_REG_MMC_MODULE_STATUS_DCRC;
++        }
++
++        if (statusErrs & errorMask) {
++            status = TranslateSDError(pDevice, pReq, (statusErrs & errorMask));
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++
++        /* if we reach here, there were no command processing errors */
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_EOC) {
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOC, FROM_ISR);
++            status = ProcessCommandDone(pDevice,
++                                        pReq,
++                                        TRUE);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_AE) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++            DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR TX Transfer AE\n"));
++                /* refill the FIFO */
++            if (HcdTransferTxData(pDevice, pReq)) {
++                ToggleGPIOPin(pDevice, DBG_GPIO_PIN_1);
++                    /* fifo contains final data, disable almost empty interrupts */
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_AE, FROM_ISR);
++                    /* get ready for BRS or EOFB, it has been observed that EOFB can come early
++                     * and mask out the BRS bit, this looks like a controller bug */
++                UnmaskIrq(pDevice,
++                          OMAP_REG_MMC_INTERRUPT_ENABLE_BRS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,
++                          FROM_ISR);
++                DBG_PRINT(OMAP_TRACE_BUSY,
++                    ("SDIO OMAP ISR, TX near complete, waiting for BRS or EOFB (bcnt:%d,blen:%d)\n",
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT),
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH)));
++            } else {
++                    /* more data to go, if this is a multi-block transfer we want to make sure
++                     * the EOFB is cleared for all blocks except the last one, we will
++                     * actually wait for EOFB on the last block */
++                if (READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT) > 2) {
++                    WRITE_HOST_REG16(pDevice,
++                                     OMAP_REG_MMC_MODULE_STATUS,
++                                     OMAP_REG_MMC_MODULE_STATUS_EOFB);
++                }
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_AF) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(!IS_SDREQ_WRITE_DATA(pReq->Flags));
++            DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR RX Transfer AF\n"));
++                /* drain the FIFO */
++            if (HcdTransferRxData(pDevice, pReq, FALSE)) {
++                    /* last bit of data remaining, we can wait for BRS */
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_AF, FROM_ISR);
++                    /* get ready for BRS */
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_BRS,FROM_ISR);
++                DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, RX near complete, waiting for BRS \n"));
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_BRS) {
++            ToggleGPIOPin(pDevice, DBG_GPIO_PIN_2);
++            DBG_PRINT(OMAP_TRACE_BUSY,("SDIO OMAP ISR BRS (bcnt:%d,blen:%d)\n",
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT),
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH)));
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_BRS, FROM_ISR);
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* check for busy on write operations */
++                MicroDelay(pDevice, 10);
++                    /* check card enter busy */
++                if (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) &
++                      OMAP_REG_MMC_MODULE_STATUS_CB)) {
++                    ToggleGPIOPin(pDevice, DBG_GPIO_PIN_1);
++                    DBG_PRINT(OMAP_TRACE_BUSY, ("SDIO OMAP ISR TX Transfer Done - not busy \n"));
++                    status = SDIO_STATUS_SUCCESS;
++                        /* we are done */
++                    break;
++                }
++                    /* clear status */
++                WRITE_HOST_REG16(pDevice,
++                                 OMAP_REG_MMC_MODULE_STATUS,
++                                 OMAP_REG_MMC_MODULE_STATUS_CB);
++                DBG_PRINT(OMAP_TRACE_BUSY, ("SDIO OMAP ISR TX Transfer Done - waiting on busy release \n"));
++                statusErrs &= ~OMAP_REG_MMC_MODULE_STATUS_CB;
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,FROM_ISR);
++
++            } else {
++                 DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR RX Transfer Done \n"));
++                 if (pDevice->DmaMode == OMAP_DMA_NONE) {
++                        /* In PIO mode, the FIFO may contain some residue data */
++                     HcdTransferRxData(pDevice, pReq, TRUE);
++                     DBG_ASSERT(pReq->DataRemaining == 0);
++                 }
++                 status = SDIO_STATUS_SUCCESS;
++                 break;
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_EOFB) {
++            ToggleGPIOPin(pDevice, DBG_GPIO_PIN_1);
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,FROM_ISR);
++            DBG_PRINT(OMAP_TRACE_BUSY,("SDIO OMAP ISR Card Busy Done (bcnt:%d,blen:%d)\n",
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT),
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH)));
++                /* the write operation is finally done */
++            status = SDIO_STATUS_SUCCESS;
++            break;
++        }
++
++    }
++
++
++    if (status != SDIO_STATUS_PENDING) {
++        pReq->Status = status;
++        EndHCTransfer(pDevice,pReq,FROM_ISR);
++        if (OMAP_DMA_NONE == pDevice->DmaMode) {
++                /* queue work item to notify bus driver of I/O completion */
++            QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++        } else {
++                /* using some form of DMA */
++            if (!SDIO_SUCCESS(status)) {
++                    /* EndHCTransfer will cancel DMA, no need to synch with DMA */
++                QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++            } else {
++                    /* sync request completion with DMA */
++                CompleteRequestSyncDMA(pDevice,pReq,status);
++            }
++        }
++    }
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("-SDIO OMAP ISR handler \n"));
++
++    return TRUE;
++}
++
++
++
+Index: linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd_linux.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd_linux.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,165 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_linux.h
++
++ at abstract: include file for Texas Instruments OMAP host controller, linux dependent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_HCD_LINUX_H___
++#define __SDIO_HCD_LINUX_H___
++
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/errno.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/device.h>
++#endif
++#include <asm/arch/dma.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <asm/hardware/clock.h>
++#endif
++#include <asm/irq.h>
++#include <linux/delay.h>
++
++
++#define SDHCD_MAX_DEVICE_NAME     12
++
++#define OMAP_BASE_ADDRESS1        0xFFFB7800
++#define OMAP_BASE_ADDRESS2        0xFFFB7C00
++#define OMAP_INTERRUPT1           INT_MMC
++#define OMAP_INTERRUPT2           INT_1610_MMC2
++#define OMAP_DMA_RX1              OMAP_DMA_MMC_RX
++#define OMAP_DMA_TX1              OMAP_DMA_MMC_TX
++#define OMAP_DMA_RX2              OMAP_DMA_MMC2_RX
++#define OMAP_DMA_TX2              OMAP_DMA_MMC2_TX
++
++#define OMAP_BASE_LENGTH          0x6C
++#define OMAP_MODULE_CLOCK         48000000
++#define OMAP_MAX_DEVICE_COUNT     2
++#define OMAP_DEFAULT_DEVICE_COUNT 1
++#define OMAP_DEFAULT_FIRST_DEVICE 0
++#define OMAP_DMA_MASK             0xFFFFFFFE
++
++
++#define CARD_INSERT_POLARITY   FALSE
++#define WP_POLARITY            TRUE
++#define HCD_COMMAND_MIN_POLLING_CLOCK 5000000
++
++/* debounce delay for slot */
++#define SD_SLOT_DEBOUNCE_MS  500
++
++
++/* device base name */
++#define SDIO_BD_BASE "sdiobd"
++
++/* mapped memory address */
++typedef struct _SDHCD_MEMORY {
++    ULONG Raw;      /* start of address range */
++    ULONG Length;   /* length of range */
++    PVOID pMapped;  /* the mapped address */
++}SDHCD_MEMORY, *PSDHCD_MEMORY;
++
++typedef void (*PDMA_TRANSFER_COMPLETION)(PVOID,SDIO_STATUS,BOOL);
++
++/* device data*/
++typedef struct _HCD_OS_INFO {
++    POS_PNPDEVICE pBusDevice;      /* our device registered with bus driver */
++    SDHCD_MEMORY  Address;          /* memory address of this device */
++    spinlock_t    AddressSpinlock;   /* use to protect reghisters when needed */
++    UINT8         InitStateMask;
++#define SDIO_BASE_MAPPED           0x01
++#define SDIO_IRQ_INTERRUPT_INIT    0x04
++#define SDHC_REGISTERED            0x10
++#define SDHC_HW_INIT               0x40
++#define SDHC_TIMER_INIT            0x80
++    spinlock_t   Lock;            /* lock against the ISR */
++    BOOL         CardInserted;    /* card inserted flag */
++    BOOL         Cancel;
++    BOOL         ShuttingDown;    /* indicates shut down of HCD) */
++    struct work_struct iocomplete_work; /* work item definintions */
++    struct work_struct carddetect_work; /* work item definintions */
++    struct work_struct sdioirq_work; /* work item definintions */
++    UINT32      Channel;          /* DMA channel for this device */
++    DMA_ADDRESS hDmaBuffer;       /* handle for data buffer */
++    PUINT8      pDmaBuffer;       /* virtual address of command buffer */
++    UINT32      CommonBufferSize; /* size of CommonBuffer */
++    struct clk *pMMCClock;        /* dma clock active */
++    s16         PowerPin;
++    s16         SwitchPin;
++    int         Interrupt;
++    int         DmaRxChannel;     /* receive DMA channel */
++    int         DmaTxChannel;     /* transmit DMA channel */
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    int         DmaChannel;       /* in use channel */
++#else
++    /* 2.4 */
++    dma_regs_t *DmaChannel;       /* in use channel registers */
++#endif
++    int         LastTransfer;     /* length of last transfer */
++    PSDDMA_DESCRIPTOR pDmaList;    /* in use scatter-gather list */
++    UINT        SGcount;           /* count of in-use scatter gather list */
++    PVOID       TransferContext;   /* context passed to TransferCompletion routine */
++    PDMA_TRANSFER_COMPLETION pTransferCompletion; /* transfer completion routine */
++}HCD_OS_INFO, *PHCD_OS_INFO;
++
++typedef struct _SDHCD_DRIVER {
++    OS_PNPDEVICE   HcdDevice;     /* the OS device for this HCD */
++    OS_PNPDRIVER   HcdDriver;     /* the OS driver for this HCD */
++    SDDMA_DESCRIPTION Dma;        /* driver DMA description */
++}SDHCD_DRIVER, *PSDHCD_DRIVER;
++
++
++#define WORK_ITEM_IO_COMPLETE  0
++#define WORK_ITEM_CARD_DETECT  1
++#define WORK_ITEM_SDIO_IRQ     2
++
++
++#define READ_HOST_REG32(pDevice, OFFSET)  \
++    _READ_DWORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG32(pDevice, OFFSET, VALUE) \
++    _WRITE_DWORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET),(VALUE))
++#define READ_HOST_REG16(pDevice, OFFSET)  \
++    _READ_WORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG16(pDevice, OFFSET, VALUE) \
++    _WRITE_WORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET),(VALUE))
++
++#define GET_HC_REG_BASE(pDevice) (pDevice)->OSInfo.Address.pMapped
++
++#define OMAP_USE_DBG_GPIO
++/* prototypes */
++#endif /* __SDIO_HCD_LINUX_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd_os_2_6.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap/sdio_hcd_os_2_6.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,574 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_os_2_6.c
++
++ at abstract: Linux OMAP native SDIO Host Controller Driver, 2.6 and higher
++
++#notes: includes initialization and DMA code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#include <linxu/sdio/ctsystem.h"
++#include "sdio_omap_hcd.h"
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++
++#include <asm/mach-types.h>
++#include <asm/arch/dma.h>
++#include <asm/arch/mux.h>
++#include <linux/dma-mapping.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/tps65010.h>
++
++extern INT gpiodebug;
++extern INT noDMA;
++extern SDHCD_DRIVER_CONTEXT HcdContext;
++
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r);
++static void setupOmapDma(PSDHCD_DEVICE pDevice,
++                         int           Length,
++                         DMA_ADDRESS   DmaAddress,
++                         BOOL          Transmit);
++/*
++ * unsetup the OMAP registers
++*/
++void DeinitOmap(PSDHCD_DEVICE pDevice)
++{
++        /* deallocate DMA buffer  */
++    if (pDevice->OSInfo.pDmaBuffer != NULL) {
++        dma_free_coherent(&pDevice->OSInfo.pBusDevice->dev,
++                          pDevice->OSInfo.CommonBufferSize,
++                          pDevice->OSInfo.pDmaBuffer,
++                          pDevice->OSInfo.hDmaBuffer);
++        pDevice->OSInfo.pDmaBuffer = NULL;
++    }
++
++    if (!IS_ERR(pDevice->OSInfo.pMMCClock)) {
++        clk_disable(pDevice->OSInfo.pMMCClock);
++        clk_put(pDevice->OSInfo.pMMCClock);
++    }
++
++    if (pDevice->OSInfo.InitStateMask & SDIO_IRQ_INTERRUPT_INIT) {
++        disable_irq(pDevice->OSInfo.Interrupt);
++        free_irq(pDevice->OSInfo.Interrupt, pDevice);
++        pDevice->OSInfo.InitStateMask &= ~SDIO_IRQ_INTERRUPT_INIT;
++    }
++
++    if (pDevice->OSInfo.PowerPin >= 0) {
++        omap_free_gpio(pDevice->OSInfo.PowerPin);
++    }
++}
++
++/*
++ * setup the OMAP registers
++*/
++SDIO_STATUS InitOmap(PSDHCD_DEVICE pDevice, UINT deviceNumber)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    const struct omap_mmc_config *pConfig = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config);
++    ULONG       baseAddress;
++    int         err;
++
++    if (pConfig == NULL) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO OMAP HCD: InitOmap - unable to get OMAP_TAG_MMC\n"));
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: InitOmap - OMAP_TAG_MMC blocks: %d, mmc1PowerPin: %d, mmc1SwitchPin: %d, mmc2PowerPin: %d, mmc2SwitchPin: %d\n",
++                            (UINT)pConfig->mmc_blocks, (UINT)pConfig->mmc1_power_pin, (UINT)pConfig->mmc1_switch_pin, (UINT)pConfig->mmc2_power_pin, (UINT)pConfig->mmc2_switch_pin));
++
++    if (pConfig->mmc_blocks == 0) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO OMAP HCD: InitOmap - no host controller blocks enabled\n"));
++        return SDIO_STATUS_NO_RESOURCES;
++    }
++
++    if (deviceNumber == 0) {
++        pDevice->OSInfo.PowerPin = pConfig->mmc1_power_pin;
++        pDevice->OSInfo.SwitchPin = pConfig->mmc1_switch_pin;
++    } else {
++        if (pConfig->mmc_blocks & 2) {
++            pDevice->OSInfo.PowerPin = pConfig->mmc2_power_pin;
++            pDevice->OSInfo.SwitchPin = pConfig->mmc2_switch_pin;
++        }else {
++            pDevice->OSInfo.PowerPin = pConfig->mmc1_power_pin;
++            pDevice->OSInfo.SwitchPin = pConfig->mmc1_switch_pin;
++        }
++    }
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: InitOmap - Number: %d, PowerPin: %d, SwitchPin: %d, DMAmask: 0x%X\n",
++                            deviceNumber, (UINT)pDevice->OSInfo.PowerPin, (UINT)pDevice->OSInfo.SwitchPin, (UINT)*pDevice->OSInfo.pBusDevice->dev.dma_mask));
++
++    do {
++        if (!noDMA) {
++
++                /* allocate a DMA buffer larger enough for the command buffers and the data buffers */
++            pDevice->OSInfo.pDmaBuffer =  dma_alloc_coherent(&pDevice->OSInfo.pBusDevice->dev,
++                                                             pDevice->OSInfo.CommonBufferSize,
++                                                             &pDevice->OSInfo.hDmaBuffer,
++                                                             GFP_DMA);
++            DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: InitOmap - pDmaBuffer: 0x%X, hDmaBuffer: 0x%X Size:%d\n",
++                (UINT)pDevice->OSInfo.pDmaBuffer ,
++                (UINT)pDevice->OSInfo.hDmaBuffer,
++                pDevice->OSInfo.CommonBufferSize));
++
++            if (pDevice->OSInfo.pDmaBuffer == NULL) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: InitOmap - unable to get DMA buffer\n"));
++                status =  SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++
++            pDevice->DmaCapable = TRUE;
++                /* tell upper drivers that we support direct DMA */
++            pDevice->Hcd.pDmaDescription = &HcdContext.Driver.Dma;
++
++        }
++
++        pDevice->OSInfo.pMMCClock = clk_get(&pDevice->OSInfo.pBusDevice->dev,
++                                            (deviceNumber == 0) ? "mmc1_ck" : "mmc2_ck");
++        if (IS_ERR(pDevice->OSInfo.pMMCClock)) {
++            DBG_PRINT(SDDBG_ERROR,
++                ("SDIO OMAP HCD: InitOmap - unable to get clock: %s, err: %d, device: %d\n",
++                     (deviceNumber) ? "mmc1_ck" : "mmc2_ck", (UINT)PTR_ERR(pDevice->OSInfo.pMMCClock), deviceNumber));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        clk_enable(pDevice->OSInfo.pMMCClock);
++
++        /* configure the mux for the sd controller */
++        if (deviceNumber == 0) {
++            omap_cfg_reg(MMC_CMD);
++            omap_cfg_reg(MMC_CLK);
++            omap_cfg_reg(MMC_DAT0);
++            omap_cfg_reg(MMC_DAT1);
++            omap_cfg_reg(MMC_DAT2);
++            omap_cfg_reg(MMC_DAT3);
++            baseAddress = OMAP_BASE_ADDRESS1;
++            pDevice->OSInfo.Interrupt = OMAP_INTERRUPT1;
++            pDevice->OSInfo.DmaRxChannel = OMAP_DMA_RX1;
++            pDevice->OSInfo.DmaTxChannel = OMAP_DMA_TX1;
++        } else {
++            omap_cfg_reg(Y8_1610_MMC2_CMD);
++            omap_cfg_reg(Y10_1610_MMC2_CLK);
++            omap_cfg_reg(R18_1610_MMC2_CLKIN);
++            omap_cfg_reg(W8_1610_MMC2_DAT0);
++            omap_cfg_reg(V8_1610_MMC2_DAT1);
++            omap_cfg_reg(W15_1610_MMC2_DAT2);
++            omap_cfg_reg(R10_1610_MMC2_DAT3);
++            omap_cfg_reg(V9_1610_MMC2_CMDDIR);
++            omap_cfg_reg(V5_1610_MMC2_DATDIR0);
++            omap_cfg_reg(W19_1610_MMC2_DATDIR1);
++            baseAddress = OMAP_BASE_ADDRESS2;
++            pDevice->OSInfo.Interrupt = OMAP_INTERRUPT2;
++            pDevice->OSInfo.DmaRxChannel = OMAP_DMA_RX2;
++            pDevice->OSInfo.DmaTxChannel = OMAP_DMA_TX2;
++        }
++        pDevice->OSInfo.DmaChannel = -1;
++            /* map the memory address for the control registers */
++        pDevice->OSInfo.Address.pMapped = (PVOID)IO_ADDRESS(baseAddress);
++        pDevice->OSInfo.Address.Raw = baseAddress;
++        DBG_PRINT(OMAP_TRACE_CONFIG ,
++               ("SDIO OMAP - InitOMAP 0x%X\n", (UINT)pDevice->OSInfo.Address.pMapped));
++
++        pDevice->OSInfo.InitStateMask |= SDIO_BASE_MAPPED;
++
++                /* map the controller interrupt, we map it to each device.
++                   Interrupts can be called from this point on */
++        err = request_irq(pDevice->OSInfo.Interrupt, hcd_sdio_irq, 0,
++                          "OMAP HCD", pDevice);
++        if (err < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: OmapInit, unable to map interrupt \n"));
++            err = -ENODEV;
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        pDevice->OSInfo.InitStateMask |= SDIO_IRQ_INTERRUPT_INIT;
++
++        if (pDevice->OSInfo.PowerPin >= 0) {
++            if (omap_request_gpio(pDevice->OSInfo.PowerPin) != 0) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: OmapInit, unable to get power pin GPIO, %d, (dev %d)\n",
++                                        pDevice->OSInfo.PowerPin, deviceNumber));
++            } else {
++                omap_set_gpio_direction(pDevice->OSInfo.PowerPin, 0);
++            }
++        }
++
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        DeinitOmap(pDevice);
++    }
++
++    return status;
++}
++
++void ToggleGPIOPin(PSDHCD_DEVICE pDevice, INT PinNo)
++{
++    /* not implemented */
++}
++
++
++void SetupTXCommonBufferDMATransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    UINT32 length;
++        /* adjust length */
++    length = min(pDevice->OSInfo.CommonBufferSize,
++                 pReq->DataRemaining);
++        /* copy to common buffer */
++    memcpy(pDevice->OSInfo.pDmaBuffer, pReq->pHcdContext, length);
++        /* adjust where we are */
++    pReq->pHcdContext = (PUCHAR)pReq->pHcdContext + length;
++    pReq->DataRemaining -= length;
++        /* setup this chunk */
++    setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,TRUE);
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("SDIO OMAP TX Common Buffer DMA,  This Transfer: %d, Remaining:%d\n",
++        length,pReq->DataRemaining));
++}
++/*
++ *  DMA transmit complete callback
++*/
++static void SD_DMACompleteCallback(int Channel, u16 DMAStatus, PVOID pContext)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pContext;
++    SDIO_STATUS   status = SDIO_STATUS_PENDING;
++    PSDREQUEST    pReq;
++
++    pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++            ("SDIO OMAP SD_DMACompleteCallback (%s)- DMAStatus: 0x%X, lch: %d \n",
++               IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",(UINT)status, Channel));
++    do {
++
++        if (-1 == pDevice->OSInfo.DmaChannel) {
++            DBG_PRINT(SDDBG_WARN,
++                  ("SDIO OMAP SD_DMACompleteCallback unexpected callback - DMAStatus: 0x%X, lch: %d\n",
++                        (UINT)DMAStatus, Channel));
++            break;
++        }
++
++        if (DMAStatus == OMAP_DMA_SYNC_IRQ) {
++                /* only a synch int, ignore it */
++            break;
++        }
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++            DBG_ASSERT(pDevice->OSInfo.pDmaList != NULL);
++            DBG_ASSERT(pDevice->OSInfo.SGcount != 0);
++                /* unmap scatter gather */
++            dma_unmap_sg(pDevice->Hcd.pDevice,
++                         pDevice->OSInfo.pDmaList,
++                         pDevice->OSInfo.SGcount,
++                         IS_SDREQ_WRITE_DATA(pReq->Flags) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++            pDevice->OSInfo.pDmaList = NULL;
++            pDevice->OSInfo.SGcount = 0;
++        }
++
++            /* handle errors */
++        if (DMAStatus & (OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ)) {
++            status = SDIO_STATUS_DEVICE_ERROR;
++            break;
++        }
++
++        if (!(DMAStatus & OMAP_DMA_BLOCK_IRQ)) {
++            status = SDIO_STATUS_DEVICE_ERROR;
++            break;
++        }
++
++            /* no DMA errors */
++        status = SDIO_STATUS_SUCCESS;
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++                /* nothing more to do */
++            break;
++        }
++
++            /* handle common buffer DMA */
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            if (pReq->DataRemaining) {
++                    /* send the next chunk */
++                SetupTXCommonBufferDMATransfer(pDevice,pReq);
++                status = SDIO_STATUS_PENDING;
++                break;
++            }
++        } else {
++            UINT32 length;
++                /* copy RX Data from common buffer */
++            memcpy(pReq->pHcdContext, pDevice->OSInfo.pDmaBuffer, pDevice->OSInfo.LastTransfer);
++                /* adjust where we are */
++            pReq->pHcdContext = (PUCHAR)pReq->pHcdContext + pDevice->OSInfo.LastTransfer;
++            pReq->DataRemaining -= pDevice->OSInfo.LastTransfer;
++                /* set up next transfer */
++            length = min(pDevice->OSInfo.CommonBufferSize,
++                         pReq->DataRemaining);
++            if (length) {
++                DBG_PRINT(OMAP_TRACE_DATA,
++                    ("SDIO OMAP RX Common Buffer DMA,  Pending Transfer: %d, Remaining:%d\n",
++                            length, pReq->DataRemaining));
++                setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,FALSE);
++                pDevice->OSInfo.LastTransfer = length;
++                status = SDIO_STATUS_PENDING;
++                break;
++            }
++        }
++    } while (FALSE);
++
++    if (status != SDIO_STATUS_PENDING) {
++        omap_free_dma(pDevice->OSInfo.DmaChannel);
++        pDevice->OSInfo.DmaChannel = -1;
++            /* call callback */
++        pDevice->OSInfo.pTransferCompletion(pDevice->OSInfo.TransferContext, status, TRUE);
++    }
++
++}
++
++#define FIFO_SYNC_BLOCK_SIZE 32
++
++/* setup DMA for transfer */
++static void setupOmapDma(PSDHCD_DEVICE pDevice,
++                         int           Length,
++                         DMA_ADDRESS   DmaAddress,
++                         BOOL          Transmit)
++{
++    INT  fifoLen;
++
++    if (Length == (FIFO_SYNC_BLOCK_SIZE * (Length/FIFO_SYNC_BLOCK_SIZE))) {
++            /* multiple of fifo size */
++         omap_set_dma_transfer_params(pDevice->OSInfo.DmaChannel,
++                                      OMAP_DMA_DATA_TYPE_S16,
++                                      FIFO_SYNC_BLOCK_SIZE>>1, (Length/FIFO_SYNC_BLOCK_SIZE),
++                                      OMAP_DMA_SYNC_FRAME);
++        fifoLen = 0xF;
++     } else {
++        if (Length < FIFO_SYNC_BLOCK_SIZE) {
++             omap_set_dma_transfer_params(pDevice->OSInfo.DmaChannel,
++                                          OMAP_DMA_DATA_TYPE_S16,
++                                          Length>>1, 1,
++                                          OMAP_DMA_SYNC_FRAME);
++            fifoLen = (Length>>1)-1;
++            fifoLen = (fifoLen < 0) ? 0 : fifoLen;
++        } else {
++            if (Length == (8 * (Length/8))) {
++                 omap_set_dma_transfer_params(pDevice->OSInfo.DmaChannel,
++                                              OMAP_DMA_DATA_TYPE_S16,
++                                              1, (Length+1)>>1,
++                                              OMAP_DMA_SYNC_FRAME);
++                fifoLen = 0;
++            } else {
++                 omap_set_dma_transfer_params(pDevice->OSInfo.DmaChannel,
++                                              OMAP_DMA_DATA_TYPE_S16,
++                                              1, (Length+1)>>1,
++                                              OMAP_DMA_SYNC_FRAME);
++                fifoLen = 0;
++            }
++        }
++     }
++
++     if (Transmit) {
++        omap_set_dma_src_params(pDevice->OSInfo.DmaChannel,
++                                OMAP_DMA_PORT_EMIFF,
++                                OMAP_DMA_AMODE_POST_INC,
++                                DmaAddress);
++
++        omap_set_dma_dest_params(pDevice->OSInfo.DmaChannel,
++                                OMAP_DMA_PORT_TIPB,
++                                OMAP_DMA_AMODE_CONSTANT,
++                                (virt_to_phys((void *)pDevice->OSInfo.Address.pMapped) +
++                                        OMAP_REG_MMC_DATA_ACCESS));
++
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, OMAP_REG_MMC_BUFFER_CONFIG_TXDE |
++                    ((fifoLen << OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT) & OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK));
++
++
++
++     } else {
++         omap_set_dma_src_params(pDevice->OSInfo.DmaChannel,
++                                 OMAP_DMA_PORT_TIPB,
++                                 OMAP_DMA_AMODE_CONSTANT,
++                                 (virt_to_phys((void *)pDevice->OSInfo.Address.pMapped) +
++                                        OMAP_REG_MMC_DATA_ACCESS));
++         omap_set_dma_dest_params(pDevice->OSInfo.DmaChannel,
++                                  OMAP_DMA_PORT_EMIFF,
++                                  OMAP_DMA_AMODE_POST_INC,
++                                  DmaAddress);
++         WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, OMAP_REG_MMC_BUFFER_CONFIG_RXDE |
++                        ((fifoLen << OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT) & OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK));
++     }
++
++     DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP SDReadBuffer: return pending, transfer size: %d, fifo: %d\n",
++                    Length, fifoLen));
++     omap_start_dma(pDevice->OSInfo.DmaChannel);
++
++}
++
++SDIO_STATUS SetUpHCDDMA(PSDHCD_DEVICE            pDevice,
++                        PSDREQUEST               pReq,
++                        PDMA_TRANSFER_COMPLETION pCompletion,
++                        PVOID                    pContext)
++{
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++    SYSTEM_STATUS err;
++    UINT32 length = pReq->BlockCount * pReq->BlockLen;
++    PSDDMA_DESCRIPTOR pDesc = NULL;
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("+SDIO OMAP SetUpHCDDMA: length: %d\n",length));
++
++    do {
++
++        if ((OMAP_DMA_COMMON == pDevice->DmaMode) &&
++            (length & 0x1)) {
++                /* DMA requires WORD alignment, tell caller to punt it to PIO mode */
++            status = SDIO_STATUS_UNSUPPORTED;
++            break;
++        }
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++                /* doing direct DMA */
++            if  (pReq->DescriptorCount > 1) {
++                DBG_ASSERT(FALSE);
++                status = SDIO_STATUS_INVALID_PARAMETER;
++                break;
++            }
++
++            pDesc = (PSDDMA_DESCRIPTOR)pReq->pDataBuffer;
++            DBG_ASSERT(pDesc != NULL);
++        }
++
++        pDevice->OSInfo.pTransferCompletion = pCompletion;
++        pDevice->OSInfo.TransferContext = pContext;
++
++        if (pDevice->OSInfo.DmaChannel != -1) {
++            DBG_PRINT(SDDBG_WARN, ("SDIO OMAP SetUpHCDDMA: **DMA still in use,  channel: %d\n",
++                      (UINT)pDevice->OSInfo.DmaChannel));
++            omap_free_dma(pDevice->OSInfo.DmaChannel);
++            pDevice->OSInfo.DmaChannel = -1;
++        }
++
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            err =  omap_request_dma(pDevice->OSInfo.DmaTxChannel,
++                                   "SDIO TX",
++                                    SD_DMACompleteCallback,
++                                    pDevice, &pDevice->OSInfo.DmaChannel);
++
++        } else {
++            err = omap_request_dma(pDevice->OSInfo.DmaRxChannel,
++                                   "SDIO RX",
++                                   SD_DMACompleteCallback,
++                                   pDevice,
++                                   &pDevice->OSInfo.DmaChannel);
++        }
++
++        if (err < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP SetUpHCDDMA: can't get DMA channel: %d, err:%d\n",
++                      IS_SDREQ_WRITE_DATA(pReq->Flags) ?
++                            pDevice->OSInfo.DmaTxChannel : pDevice->OSInfo.DmaRxChannel,
++                      err));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        if (OMAP_DMA_COMMON == pDevice->DmaMode) {
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                SetupTXCommonBufferDMATransfer(pDevice,pReq);
++            } else {
++                length = min(pDevice->OSInfo.CommonBufferSize,
++                             pReq->DataRemaining);
++                setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,FALSE);
++                pDevice->OSInfo.LastTransfer = length;
++            }
++            break;
++        }
++
++            /* setup scatter gather */
++        DBG_ASSERT(pDesc != NULL);
++            /* map DMA */
++        dma_map_sg(pDevice->Hcd.pDevice,
++                   pDesc,
++                   pReq->DescriptorCount,
++                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++
++        pDevice->OSInfo.pDmaList = pDesc;
++        pDevice->OSInfo.SGcount = pReq->DescriptorCount;
++        DBG_PRINT(OMAP_TRACE_DATA,
++          ("SDIO OMAP SetUpHCDDMA, Direct DMA  dma_address:0x%X\n", (UINT32)sg_dma_address(pDesc)));
++
++        setupOmapDma(pDevice,
++                     length,
++                     sg_dma_address(pDesc),
++                     IS_SDREQ_WRITE_DATA(pReq->Flags) ? TRUE : FALSE);
++
++    } while (FALSE);
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("-SDIO OMAP SetUpHCDDMA: status %d\n",status));
++
++    return status;
++}
++
++/*
++ * SDCancelTransfer - stop DMA transfer
++*/
++void SDCancelDMATransfer(PSDHCD_DEVICE pDevice)
++{
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP SDCancelDMATransfer\n"));
++    if (pDevice->OSInfo.DmaChannel != -1) {
++        omap_stop_dma(pDevice->OSInfo.DmaChannel);
++        omap_free_dma(pDevice->OSInfo.DmaChannel);
++        pDevice->OSInfo.DmaChannel  = -1;
++    }
++}
++
++/* SDIO interrupt request */
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r)
++{
++    irqreturn_t retStat;
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP SDIO IRQ \n"));
++
++        /* call OS independent ISR */
++    if (HcdSDInterrupt((PSDHCD_DEVICE)context)) {
++        retStat = IRQ_HANDLED;
++    } else {
++        retStat = IRQ_NONE;
++    }
++    return retStat;
++}
+Index: linux-2.6.22/drivers/sdio/hcd/omap/sdio_omap_hcd.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap/sdio_omap_hcd.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,372 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_pmap_hcd.h
++
++ at abstract: include file for OMAP native MMC/SD host controller, OS independent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_OMAP_HCD_H___
++#define __SDIO_OMAP_HCD_H___
++
++#include <linux/sdio/ctsystem.h>
++
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include "sdio_hcd_linux.h"
++
++enum OMAP_TRACE_ENUM {
++    OMAP_TRACE_CARD_INSERT = (SDDBG_TRACE + 1),
++    OMAP_TRACE_SDIO_INT = (SDDBG_TRACE + 2),
++    OMAP_TRACE_WORK,
++    OMAP_TRACE_DATA,
++    OMAP_TRACE_REQUESTS,
++    OMAP_TRACE_CONFIG,
++    OMAP_TRACE_MMC_INT,
++    OMAP_TRACE_CLOCK,
++    OMAP_TRACE_LAST
++};
++
++#define OMAP_TRACE_BUSY  OMAP_TRACE_DATA
++
++#define OMAP_MAX_BYTES_PER_BLOCK  2048
++#define OMAP_MAX_BLOCKS           2048
++#define OMAP_DEFAULT_VOLTAGE      SLOT_POWER_3_3V
++#define OMAP_DEFAULT_CURRENT      500
++#define OMAP_DEFAULT_CLOCK        500
++#define OMAP_DEFAULT_CMD_TIMEOUT  64
++#define OMAP_DEFAULT_DATA_TIMEOUT 400000
++
++#define OMAP_MMC_FIFO_SIZE           64
++/* almost full, for RX */
++#define OMAP_MMC_AFL_FIFO_THRESH     32 //62
++ /* almost empty, for TX */
++#define OMAP_MMC_AEL_FIFO_THRESH     32 // 2
++#define OMAP_MAX_SHORT_TRANSFER_SIZE 8
++
++#define OMAP_REG_MMC_CMD                    0x00
++    #define OMAP_REG_MMC_CMD_DDIR_READ           (1<<15)
++    #define OMAP_REG_MMC_CMD_DDIR_WRITE          (0)
++    #define OMAP_REG_MMC_CMD_STREAM_MODE_NORMAL  (0)
++    #define OMAP_REG_MMC_CMD_TYPE_BC             (0)
++    #define OMAP_REG_MMC_CMD_TYPE_BCR            (1<<12)
++    #define OMAP_REG_MMC_CMD_TYPE_AC             (2<<12)
++    #define OMAP_REG_MMC_CMD_TYPE_ADTC           (3<<12)
++    #define OMAP_REG_MMC_CMD_R1BUSY              (1<<11)
++    #define OMAP_REG_MMC_CMD_NORESPONSE          (0)
++    #define OMAP_REG_MMC_CMD_R1                  (1<<8)
++    #define OMAP_REG_MMC_CMD_R2                  (2<<8)
++    #define OMAP_REG_MMC_CMD_R3                  (3<<8)
++    #define OMAP_REG_MMC_CMD_R4                  (4<<8)
++    #define OMAP_REG_MMC_CMD_R5                  (5<<8)
++    #define OMAP_REG_MMC_CMD_R6                  (6<<8)
++    #define OMAP_REG_MMC_CMD_INAB                (1<<7)
++    #define OMAP_REG_MMC_CMD_CTO_DTO             (1<<6)
++    #define OMAP_REG_MMC_CMD_MASK                (0x3F)
++
++
++#define OMAP_REG_MMC_ARG_LOW                0x04
++#define OMAP_REG_MMC_ARG_HI                 0x08
++
++#define OMAP_REG_MMC_MODULE_CONFIG          0x0C
++    #define OMAP_REG_MMC_MODULE_CONFIG_4BIT      (1<<15)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_MMCSD (0<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_SPI  (1<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_TEST (2<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_PWRON     (1<<11)
++    #define OMAP_REG_MMC_MODULE_CONFIGE_BE       (1<<10)
++    #define OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK  (0x3FF)
++
++#define OMAP_REG_MMC_MODULE_STATUS          0x10
++    #define OMAP_REG_MMC_MODULE_STATUS_CERR      (1<<14)
++    #define OMAP_REG_MMC_MODULE_STATUS_CIRQ      (1<<13)
++    #define OMAP_REG_MMC_MODULE_STATUS_OCRB      (1<<12)
++    #define OMAP_REG_MMC_MODULE_STATUS_AE        (1<<11)
++    #define OMAP_REG_MMC_MODULE_STATUS_AF        (1<<10)
++    #define OMAP_REG_MMC_MODULE_STATUS_CRW       (1<<9)
++    #define OMAP_REG_MMC_MODULE_STATUS_CCRC      (1<<8)
++    #define OMAP_REG_MMC_MODULE_STATUS_CTO       (1<<7)
++    #define OMAP_REG_MMC_MODULE_STATUS_DCRC      (1<<6)
++    #define OMAP_REG_MMC_MODULE_STATUS_DTO       (1<<5)
++    #define OMAP_REG_MMC_MODULE_STATUS_EOFB      (1<<4)
++    #define OMAP_REG_MMC_MODULE_STATUS_BRS       (1<<3)
++    #define OMAP_REG_MMC_MODULE_STATUS_CB        (1<<2)
++    #define OMAP_REG_MMC_MODULE_STATUS_CD        (1<<1)
++    #define OMAP_REG_MMC_MODULE_STATUS_EOC       (1<<0)
++    #define OMAP_REG_MMC_MODULE_STATUS_ALL       (0x7FFF)
++    #define OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS \
++          ((~(OMAP_REG_MMC_MODULE_STATUS_CIRQ | OMAP_REG_MMC_MODULE_STATUS_CD\
++             )) & OMAP_REG_MMC_MODULE_STATUS_ALL)
++    #define OMAP_STATUS_CMD_PROCESSING_ERRORS \
++            (OMAP_REG_MMC_MODULE_STATUS_CERR | OMAP_REG_MMC_MODULE_STATUS_CTO | \
++            OMAP_REG_MMC_MODULE_STATUS_CCRC)
++    #define OMAP_STATUS_DATA_PROCESSING_ERRORS \
++            (OMAP_REG_MMC_MODULE_STATUS_DCRC | OMAP_REG_MMC_MODULE_STATUS_DTO)
++
++#define OMAP_REG_MMC_INTERRUPT_ENABLE       0x14
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CERR   (1<<14)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ   (1<<13)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_OCRB   (1<<12)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_AE     (1<<11)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_AF     (1<<10)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CRW    (1<<9)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CCRC   (1<<8)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CTO    (1<<7)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_DCRC   (1<<6)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_DTO    (1<<5)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB   (1<<4)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_BRS    (1<<3)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CB     (1<<2)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CD     (1<<1)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_EOC    (1<<0)
++    #define OMAP_REG_MMC_INTERRUPT_ALL_INT       (0x7FFF)
++    #define OMAP_REG_MMC_INTERRUPT_NONE_INT      (0)
++    #define OMAP_REG_MMC_INTERRUPT_ERRORS        (OMAP_REG_MMC_INTERRUPT_ENABLE_CCRC | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_CTO  | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_DCRC | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_DTO  | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_CERR)
++    #define OMAP_REG_MMC_INTERRUPT_REQUESTS  (OMAP_REG_MMC_INTERRUPT_ERRORS | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_EOC | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_AF | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_AE | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB )
++
++#define OMAP_REG_MMC_CMD_TIMEOUT            0x18
++    /* low 8-bit valid */
++
++#define OMAP_REG_MMC_DATA_READ_TIMEOUT      0x1C
++    /* 16-bit */
++
++#define OMAP_REG_MMC_DATA_ACCESS            0x20
++    /* 16-bit */
++
++#define OMAP_REG_MMC_BLOCK_LENGTH           0x24
++    /* low 11-bit */
++
++#define OMAP_REG_MMC_BLOCK_COUNT            0x28
++    /* low 11-bit */
++
++#define OMAP_REG_MMC_BUFFER_CONFIG          0x2C
++    #define OMAP_REG_MMC_BUFFER_CONFIG_RXDE      (1<<15)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK  (0x1F00)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT (8)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_TXDE      (1<<7)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK  (0x1F)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT (0)
++
++#define OMAP_REG_MMC_SPI_CONFIG             0x30
++    #define OMAP_REG_MMC_SPI_CONFIG_STR          (1<<15)
++    #define OMAP_REG_MMC_SPI_CONFIG_WNR          (1<<14)
++    #define OMAP_REG_MMC_SPI_CONFIG_SODV         (1<<13)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSTR         (1<<12)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD05     (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD15     (1<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD25     (2<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD35     (3<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS1        (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS2        (1<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS3        (2<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS4        (3<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSEL         (1<<7)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS1          (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS2          (1<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS3          (2<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS4          (3<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSM          (1<<3)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSD          (1<<2)
++    #define OMAP_REG_MMC_SPI_CONFIG_POL_RISE        (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_POL_FALL        (1)
++
++#define OMAP_REG_MMC_SDIO_MODE_CONFIG       0x34
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C5E    (1<<15)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C14E   (1<<14)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C13E   (1<<13)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C12E   (1<<12)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_D3PS   (1<<11)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_D3ES   (1<<10)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_CDWE   (1<<9)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_IWE    (1<<8)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_DCR4   (1<<7)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_XDTS   (1<<6)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE    (1<<5)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_RW     (1<<4)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_CDE    (1<<2)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_RWE    (1<<1)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE   (1<<0)
++
++#define OMAP_REG_MMC_SYSTEM_TEST            0x38
++    #define OMAP_REG_MMC_SYSTEM_TEST_WAKD        (1<<15)
++    #define OMAP_REG_MMC_SYSTEM_TEST_SSB         (1<<14)
++    #define OMAP_REG_MMC_SYSTEM_TEST_RDYD        (1<<13)
++    #define OMAP_REG_MMC_SYSTEM_TEST_DDIR        (1<<12)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D3D         (1<<11)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D2D         (1<<10)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D1D         (1<<9)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D0D         (1<<8)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CDIR        (1<<7)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CDAT        (1<<6)
++    #define OMAP_REG_MMC_SYSTEM_TEST_MCKD        (1<<5)
++    #define OMAP_REG_MMC_SYSTEM_TEST_SCKD        (1<<4)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS3D        (1<<3)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS2D        (1<<2)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS1D        (1<<1)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS0D        (1<<0)
++
++
++#define OMAP_REG_MMC_MODULE_REV             0x3C
++    #define OMAP_REG_MMC_MODULE_REV_MINOR_MASK   (0xF)
++    #define OMAP_REG_MMC_MODULE_REV_MINOR_SHIFT  (0)
++    #define OMAP_REG_MMC_MODULE_REV_MAJOR_MASK   (0xF0)
++    #define OMAP_REG_MMC_MODULE_REV_MAJOR_SHIFT  (4)
++
++#define OMAP_REG_MMC_CMD_RESPONSE0          0x40
++    /* response bits 15-0 */
++#define OMAP_REG_MMC_CMD_RESPONSE1          0x44
++    /* response bits 31-16 */
++#define OMAP_REG_MMC_CMD_RESPONSE2          0x48
++    /* response bits 47-32 */
++#define OMAP_REG_MMC_CMD_RESPONSE3          0x4C
++    /* response bits 63-48 */
++#define OMAP_REG_MMC_CMD_RESPONSE4          0x50
++    /* response bits 79-64 */
++#define OMAP_REG_MMC_CMD_RESPONSE5          0x54
++    /* response bits 95-80 */
++#define OMAP_REG_MMC_CMD_RESPONSE6          0x58
++    /* response bits 111-96 */
++#define OMAP_REG_MMC_CMD_RESPONSE7          0x5C
++    /* response bits 127-112 */
++
++#define OMAP_REG_MMC_SUSPEND_RESUME         0x60
++    #define OMAP_REG_MMC_SUSPEND_RESUME_STOP     (1<<3)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_SAVE     (1<<2)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_RESUME   (1<<1)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_SUSPEND  (1<<0)
++
++#define OMAP_REG_MMC_SYSTEM_CONTROL         0x64
++    #define OMAP_REG_MMC_SYSTEM_CONTROL_SW_RESET (1<<1)
++
++#define OMAP_REG_MMC_SYSTEM_STATUS          0x68
++    #define OMAP_REG_MMC_SYSTEM_STATUS_RESET_DONE (1<<0)
++
++
++
++#define SD_DEFAULT_RESPONSE_BYTES 6
++
++
++#define CLOCK_ON  TRUE
++#define CLOCK_OFF FALSE
++
++#define OMAP_MAX_CLOCK_DIVIDE   1023
++
++typedef struct _SD_CLOCK_TBL_ENTRY {
++    INT       ClockRateDivisor;  /* divisor */
++    UINT16    RegisterValue;     /* register value for clock divisor */
++}SD_CLOCK_TBL_ENTRY;
++
++typedef enum _OMAP_DMA_MODE {
++    OMAP_DMA_NONE = 0,
++    OMAP_DMA_COMMON,
++    OMAP_DMA_SG
++}OMAP_DMA_MODE,*POMAP_DMA_MODE;
++
++typedef struct _SDHCD_DEVICE {
++    SDLIST        List;              /* linked list */
++    SDHCD         Hcd;               /* HCD description for bus driver */
++    OMAP_DMA_MODE DmaMode;           /* current DMA mode */
++    BOOL          DmaCapable;        /* os layer supports DMA */
++    UINT16        Clock;             /* current clock bit settings */
++    UINT32        BaseClock;         /* base clock in hz */
++    UINT32        TimeOut;           /* command timeout setting */
++    UINT32        DataTimeOut;       /* data timeout setting */
++    UINT32        ClockSpinLimit;    /* clock limit for command spin loops */
++    BOOL          KeepClockOn;
++    BOOL          IrqDetectArmed;    /* IRQ detect was armed */
++    UINT8         CompletionCount;   /* used to track when both DMA and command complete are done */
++    BOOL          Cancel;
++    BOOL          ShuttingDown;
++    BOOL          ShortTransfer;     /* do short transfer */
++    SDCONFIG_BUS_MODE_DATA SavedBusMode; /* saved bus mode */
++    HCD_OS_INFO   OSInfo;            /* the single device's OS-Specific */
++}SDHCD_DEVICE, *PSDHCD_DEVICE;
++
++/* driver wide data, this driver only supports one device,
++ * so we include the per device data here also */
++typedef struct _SDHCD_DRIVER_CONTEXT {
++    PTEXT        pDescription;       /* human readable device decsription */
++    SDLIST       DeviceList;         /* the list of current devices handled by this driver */
++    OS_SEMAPHORE DeviceListSem;      /* protection for the DeviceList */
++    UINT         DeviceCount;        /* number of devices currently installed */
++    SDHCD_DRIVER Driver;             /* OS dependent driver specific info */
++}SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++
++/* prototypes */
++SDIO_STATUS HcdRequest(PSDHCD pHcd);
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pReq);
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext);
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext);
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDeviceContext);
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq);
++BOOL HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL Flush);
++
++
++/* OS-dependent layer prototypes */
++SDIO_STATUS QueueEventResponse(PSDHCD_DEVICE pDeviceContext, INT WorkItemID);
++UINT16 MaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr);
++UINT16 UnmaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr);
++SDIO_STATUS SetUpHCDDMA(PSDHCD_DEVICE            pDevice,
++                        PSDREQUEST               pReq,
++                        PDMA_TRANSFER_COMPLETION pCompletion,
++                        PVOID                    pContext);
++BOOL WriteProtectSwitchOn(PSDHCD_DEVICE pDevice);
++void SDCancelDMATransfer(PSDHCD_DEVICE pDevice);
++SDIO_STATUS SetPowerLevel(PSDHCD_DEVICE pDeviceContext, BOOL On, SLOT_VOLTAGE_MASK Level);
++void GetDefaults(PSDHCD_DEVICE pDeviceContext);
++void CompleteRequestSyncDMA(PSDHCD_DEVICE pDeviceContext, PSDREQUEST pRequest, SDIO_STATUS Status);
++void MicroDelay(PSDHCD_DEVICE pDevice, INT Microseconds);
++void ClockEnable(PSDHCD_DEVICE pDevice, BOOL Enable);
++#define DBG_GPIO_PIN_1  1
++#define DBG_GPIO_PIN_2  2
++
++#ifdef OMAP_USE_DBG_GPIO
++void ToggleGPIOPin(PSDHCD_DEVICE pDevice, INT PinNo);
++#else
++#define ToggleGPIOPin(p,n)
++#endif
++/* end OS layer prototypes */
++
++#endif /* __SDIO_OMAP_HCD_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,3 @@
++# SDIO omap host controller makefile
++obj-m += sdio_omap_hcd.o
++sdio_omap_hcd-objs := sdio_hcd.o sdio_hcd_os.o sdio_hcd_os_2_6.o
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,1363 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd.c
++
++ at abstract: Texas Instruments OMAP native Host Controller Driver
++
++#notes: OS independent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#define MODULE_NAME  SDOMAPHCD
++#include "sdio_omap_hcd.h"
++
++#define FROM_ISR    TRUE
++#define FROM_NORMAL FALSE
++
++void EndHCTransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL FromIsr);
++void ResetController(PSDHCD_DEVICE pDevice, BOOL Restore, BOOL FromIsr);
++
++#define OMAP_REQ_PROCESSING_USE_CLOCK_CONTROL
++
++#ifdef OMAP_REQ_PROCESSING_USE_CLOCK_CONTROL
++    /* control clock during request processing */
++#define ReqProcClkStartStop(p,on) ClockStartStop((p),(on))
++#else
++    /* let clock run free */
++#define ReqProcClkStartStop(p,on)
++#endif
++
++#define OMAP_COMMAND_DONE_POLLING         2000000
++#define OMAP_SHORT_TRANSFER_DONE_POLLING  3000000
++
++#define WAIT_FOR_HC_STATUS(pHct,DoneMask,Error,ErrorMask,Status,Timeout)   \
++{                                                                            \
++     INT _timeoutCnt = (Timeout);                                            \
++     (Status) = SDIO_STATUS_SUCCESS;                                         \
++     while((_timeoutCnt > 0) &&                                               \
++            !(READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (DoneMask)) &&            \
++            !((Error) = READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (ErrorMask))){_timeoutCnt--;} \
++     (Error) = READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS) & (ErrorMask);            \
++     if (0 == _timeoutCnt) {(Status) = SDIO_STATUS_DEVICE_ERROR; \
++           DBG_PRINT(SDDBG_ERROR, \
++           ("SDIO OMAP - status timeout, waiting for (mask=0x%X) (stat=0x%X)\n",\
++               (UINT)(DoneMask), READ_HOST_REG16((pHct), OMAP_REG_MMC_MODULE_STATUS))); \
++                             DBG_ASSERT(FALSE);}       \
++}
++
++#define SetFifoAFL(pHct,Depth) \
++{                              \
++    UINT16 fifoSettings = (Depth)/2;  \
++    if (fifoSettings > 0) {fifoSettings--;} \
++    fifoSettings = ((fifoSettings) << OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT) & \
++                                        OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK; \
++    WRITE_HOST_REG16((pHct), OMAP_REG_MMC_BUFFER_CONFIG, fifoSettings);     \
++}
++
++#define SetFifoAEL(pHct,Depth) \
++{                              \
++    UINT16 fifoSettings = (Depth)/2;  \
++    if (fifoSettings > 0) {fifoSettings--;} \
++    fifoSettings = ((fifoSettings) << OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT) & \
++                                        OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK; \
++    WRITE_HOST_REG16((pHct), OMAP_REG_MMC_BUFFER_CONFIG, fifoSettings);     \
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetResponseData - get the response data
++  Input:    pDevice - device context
++            pReq - the request
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void GetResponseData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     wordCount;
++    INT     byteCount;
++    UINT16  readBuffer[8];
++    UINT    ii;
++
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP) {
++        return;
++    }
++
++
++    byteCount = SD_DEFAULT_RESPONSE_BYTES;
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++        byteCount = SD_R2_RESPONSE_BYTES - 1;
++        wordCount = (byteCount + 1) / 2;
++        /* move data into read buffer */
++        for (ii = 0; ii < wordCount; ii++) {
++            readBuffer[ii] = READ_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_RESPONSE0+(ii*4));
++        }
++        memcpy(&pReq->Response[0],readBuffer,byteCount);
++    } else {
++        wordCount = (byteCount + 1) / 2;
++
++        /* move data into read buffer */
++        for (ii = 0; ii < wordCount; ii++) {
++            readBuffer[ii] = READ_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_RESPONSE6+(ii*4));
++        }
++        memcpy(&pReq->Response[1],readBuffer,byteCount);
++    }
++
++    if (DBG_GET_DEBUG_LEVEL() >= OMAP_TRACE_REQUESTS) {
++        SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO OMAP - Response Dump");
++    }
++
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  DumpCurrentRequestInfo - debug dump
++  Input:    pDevice - device context
++  Output:
++  Return:
++  Notes: This function debug prints the current request
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void DumpCurrentRequestInfo(PSDHCD_DEVICE pDevice)
++{
++    if (pDevice->Hcd.pCurrentRequest != NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - Current Request Command:%d, ARG:0x%8.8X\n",
++                  pDevice->Hcd.pCurrentRequest->Command, pDevice->Hcd.pCurrentRequest->Argument));
++        if (IS_SDREQ_DATA_TRANS(pDevice->Hcd.pCurrentRequest->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++                      IS_SDREQ_WRITE_DATA(pDevice->Hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
++                      pDevice->Hcd.pCurrentRequest->BlockCount,
++                      pDevice->Hcd.pCurrentRequest->BlockLen,
++                      pDevice->Hcd.pCurrentRequest->DataRemaining));
++        }
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TranslateSDError - check for an SD error
++  Input:    pDevice - device context
++            Status -  error interrupt status register value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TranslateSDError(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, UINT16 Status)
++{
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CERR) {
++        DBG_PRINT(SDDBG_WARN, ("SDIO OMAP TranslateSDError : Warning command response has error bits set\n"));
++        return SDIO_STATUS_SUCCESS;
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CTO) {
++        if (!((pReq->Command == 5) || (pReq->Command == 55) || (pReq->Command == 1))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Command Timeout: CMD:%d\n",pReq->Command));
++            if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                DBG_PRINT(SDDBG_ERROR,
++                    ("SDIO OMAP (CMD:%d) Timeout, %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                    pReq->Command,
++                    IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                    pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++            }
++        }
++        return SDIO_STATUS_BUS_RESP_TIMEOUT;
++    }
++
++    DBG_PRINT(SDDBG_WARN, ("SDIO OMAP TranslateSDError : current controller status: 0x%X\n",
++        READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS)));
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_CCRC) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : command CRC error\n"));
++        return SDIO_STATUS_BUS_RESP_CRC_ERR;
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_DCRC) {
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : write data CRC error\n"));
++            return SDIO_STATUS_BUS_WRITE_ERROR;
++        } else {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : read data CRC error\n"));
++            return SDIO_STATUS_BUS_READ_CRC_ERR;
++        }
++    }
++
++    if (Status & OMAP_REG_MMC_MODULE_STATUS_DTO) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP TranslateSDError : data timeout\n"));
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    }
++
++    DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP - untranslated error 0x%X\n", (UINT)Status));
++    return SDIO_STATUS_DEVICE_ERROR;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ClockStartStop - SD clock control
++  Input:  pDevice - device object
++          On - turn on or off (TRUE/FALSE)
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ClockStartStop(PSDHCD_DEVICE pDevice, BOOL On)
++{
++    UINT16 state;
++
++    DBG_PRINT(OMAP_TRACE_CLOCK, ("SDIO OMAP - ClockStartStop, %d\n", (UINT)On));
++
++    state = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG);
++    if (On) {
++        state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++        state |= pDevice->Clock;
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    } else {
++        state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetBusMode - Set Bus mode
++  Input:  pDevice - device object
++          pMode - mode
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetBusMode(PSDHCD_DEVICE pDevice, PSDCONFIG_BUS_MODE_DATA pMode)
++{
++    int ii;
++    int clockIndex;
++    UINT16 state  = 0;
++    UINT32 rate;
++
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetBusMode\n"));
++
++        /* set clock index to the end max. divide */
++    pMode->ActualClockRate = (pDevice->BaseClock) / OMAP_MAX_CLOCK_DIVIDE;
++    clockIndex = OMAP_MAX_CLOCK_DIVIDE;
++    for (ii = 1; ii <= OMAP_MAX_CLOCK_DIVIDE ; ii++) {
++        rate = pDevice->BaseClock / ii;
++        if (pMode->ClockRate >= rate) {
++            pMode->ActualClockRate = rate;
++            clockIndex = ii;
++            break;
++        }
++    }
++
++    state = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG);
++
++    switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++        case SDCONFIG_BUS_WIDTH_1_BIT:
++            state &=  ~OMAP_REG_MMC_MODULE_CONFIG_4BIT;
++            break;
++        case SDCONFIG_BUS_WIDTH_4_BIT:
++            state |=  OMAP_REG_MMC_MODULE_CONFIG_4BIT;
++            break;
++        default:
++            break;
++    }
++
++    pDevice->Clock = clockIndex;
++    state &= ~OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK;
++    state |= pDevice->Clock;
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, state);
++    MicroDelay(50);
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetBusMode Clock: %d Khz, ClockRate %d (%d) state:0x%X\n",
++                                   pMode->ActualClockRate, pMode->ClockRate, clockIndex, (UINT)state));
++}
++
++/*
++ * SetDataTimeout - set timeout for data transfers
++*/
++static void SetDataTimeout(PSDHCD_DEVICE pDevice, UINT TimeOut)
++{
++    UINT sdreg;
++    UINT to = TimeOut;
++
++    /* Check if we need to use timeout multiplier register */
++    sdreg = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++    if (TimeOut > 0xFFFF) {
++        sdreg |= OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE;
++        to /= 1024;
++    } else {
++        sdreg &= ~OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE;
++    }
++    DBG_PRINT(OMAP_TRACE_CONFIG , ("SDIO OMAP - SetDataTimeout Timeout: %d, mode: 0x%x,  to: 0x%x\n",
++                        TimeOut, sdreg, to));
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, sdreg);
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_DATA_READ_TIMEOUT, to);
++}
++
++/* DMA completion routine */
++void DMACompletion(PVOID pContext, SDIO_STATUS status, BOOL FromIsr)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pContext;
++    PSDREQUEST pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    if (!SDIO_SUCCESS(status)) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP (%s) (%s) DMA transfer failed, status: %d\n",
++            IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++            (OMAP_DMA_COMMON == pDevice->DmaMode) ? "Common-Buffer" : "Direct",
++            status));
++    } else {
++        DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP (%s) (%s) DMA transfer completed \n",
++            IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++            (OMAP_DMA_COMMON == pDevice->DmaMode) ? "Common-Buffer" : "Direct"));
++    }
++
++    CompleteRequestSyncDMA(pDevice, pReq, status);
++    return;
++}
++
++/* transfer a FIFO worth of data, returns TRUE of all data was transfered */
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT16 *pFifo;
++
++    pFifo = (volatile UINT16 *)((UINT32)GET_HC_REG_BASE(pDevice) + OMAP_REG_MMC_DATA_ACCESS);
++
++        /* if we get called here because of an AEL interrupt, we know we have
++         * OMAP_MMC_FIFO_SIZE - OMAP_MMC_AEL_FIFO_THRESH room in the fifo to store more data */
++    dataCopy = min(pReq->DataRemaining,(UINT32)(OMAP_MMC_FIFO_SIZE - OMAP_MMC_AEL_FIFO_THRESH));
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++    DBG_ASSERT((INT)pReq->DataRemaining >= 0);
++
++        /* copy to fifo */
++    while (dataCopy) {
++        data = *pBuf;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            data |= ((UINT16)*pBuf) << 8;
++            dataCopy--;
++            pBuf++;
++        }
++        *pFifo = data;
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Pending TX Remaining: %d \n",pReq->DataRemaining));
++
++    if (pReq->DataRemaining) {
++        return FALSE;
++    }
++
++    return TRUE;
++}
++
++/* transfer a FIFO worth of data */
++BOOL HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL Flush)
++{
++
++    INT     dataCopy;
++    PUINT8  pBuf;
++    UINT16  data;
++    volatile UINT16 *pFifo;
++
++    pFifo = (volatile UINT16 *)((UINT32)GET_HC_REG_BASE(pDevice) + OMAP_REG_MMC_DATA_ACCESS);
++
++    if (Flush) {
++        dataCopy = min(pReq->DataRemaining,(UINT32)OMAP_MMC_FIFO_SIZE);
++    } else {
++            /* each time we are called, we know we have at least a threshold's worth of data */
++        dataCopy = min(pReq->DataRemaining,(UINT32)OMAP_MMC_AFL_FIFO_THRESH);
++    }
++        /* get where we are */
++    pBuf = (PUINT8)pReq->pHcdContext;
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++
++    DBG_ASSERT((INT)pReq->DataRemaining >= 0);
++
++        /* copy from fifo */
++    while (dataCopy) {
++        data = *pFifo;
++        *pBuf = (UINT8)data;
++        dataCopy--;
++        pBuf++;
++        if (dataCopy) {
++            *pBuf = (UINT8)(data >> 8);
++            pBuf++;
++            dataCopy--;
++        }
++    }
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Pending RX Remaining: %d \n",pReq->DataRemaining));
++
++    if (pReq->DataRemaining < OMAP_MMC_AFL_FIFO_THRESH) {
++        return TRUE;
++    }
++
++    return FALSE;
++}
++
++SDIO_STATUS ProcessCommandDone(PSDHCD_DEVICE         pDevice,
++                               PSDREQUEST            pReq,
++                               BOOL                  FromIsr)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16      irqUnmask = 0;
++
++    do {
++
++            /* get the response data for the command */
++        GetResponseData(pDevice, pReq);
++
++            /* check for data */
++        if (!IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++            break;
++        }
++
++            /* check with the bus driver if it is okay to continue with data */
++        status = SDIO_CheckResponse(&pDevice->Hcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR,
++                ("SDIO OMAP Check Response failed (CMD:%d), %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                pReq->Command,
++                IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++            break;
++        }
++
++        if (pDevice->ShortTransfer) {
++            UINT16 hwErrors;
++            UINT16 waitMask;
++
++            DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP Short %s data transfer (%d bytes) \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                   pReq->DataRemaining));
++
++                /* wait for block sent/receive or error */
++            waitMask = OMAP_REG_MMC_MODULE_STATUS_BRS;
++
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* load FIFO */
++                HcdTransferTxData(pDevice, pReq);
++                waitMask |= OMAP_REG_MMC_MODULE_STATUS_EOFB;
++            }
++
++            WAIT_FOR_HC_STATUS(pDevice,
++                               waitMask,
++                               hwErrors,
++                               OMAP_STATUS_DATA_PROCESSING_ERRORS,
++                               status,
++                               OMAP_SHORT_TRANSFER_DONE_POLLING);
++
++            if (!SDIO_SUCCESS(status)) {
++                ResetController(pDevice,TRUE,FromIsr);
++                break;
++            }
++
++            if (hwErrors) {
++                status = TranslateSDError(pDevice, pReq, hwErrors);
++                if (!SDIO_SUCCESS(status)) {
++                    break;
++                }
++            }
++
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* check for busy */
++                MicroDelay(1);
++                    /* check if card entered busy */
++                if (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) &
++                      OMAP_REG_MMC_MODULE_STATUS_CB)) {
++                        /* we are done */
++                    break;
++                }
++                    /* card entered busy */
++                WRITE_HOST_REG16(pDevice,
++                                 OMAP_REG_MMC_MODULE_STATUS,
++                                 OMAP_REG_MMC_MODULE_STATUS_CB);
++
++                     /* wait end of busy */
++                WAIT_FOR_HC_STATUS(pDevice,
++                                   OMAP_REG_MMC_MODULE_STATUS_EOFB,
++                                   hwErrors,
++                                   0, /* no need to check for errors */
++                                   status,
++                                   OMAP_SHORT_TRANSFER_DONE_POLLING)
++
++                if (!SDIO_SUCCESS(status)) {
++                    ResetController(pDevice,TRUE,FromIsr);
++                }
++
++            } else {
++                    /* unload FIFO */
++                HcdTransferRxData(pDevice, pReq, TRUE);
++            }
++                /* done */
++            break;
++        }
++
++            /* enable error interrupts, data transfer will require interrupts */
++        irqUnmask = OMAP_REG_MMC_INTERRUPT_ERRORS;
++        status = SDIO_STATUS_PENDING;
++
++        if (pDevice->DmaMode != OMAP_DMA_NONE) {
++                /* for DMA let the DMA hardware run , we only want the interrupt
++                 * for block sent/received in addition to the errors */
++            irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_BRS;
++
++            break;
++        }
++
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                /* set threshold for FIFO empty level */
++            SetFifoAEL(pDevice,OMAP_MMC_AEL_FIFO_THRESH);
++                /* wait for AEL interrupts */
++            irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_AE;
++        } else {
++            if (pReq->DataRemaining < OMAP_MMC_AFL_FIFO_THRESH) {
++                    /* don't need AFL, wait for last block received interrupt instead */
++                irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_BRS;
++            } else {
++                    /* set trigger level for FIFO full level */
++                SetFifoAFL(pDevice,OMAP_MMC_AFL_FIFO_THRESH);
++                    /* more data is expected */
++                irqUnmask |= OMAP_REG_MMC_INTERRUPT_ENABLE_AF;
++            }
++        }
++
++    } while (FALSE);
++
++    if (SDIO_STATUS_PENDING == status) {
++        if (irqUnmask != 0) {
++            UnmaskIrq(pDevice, irqUnmask, FromIsr);
++        }
++        DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP HcdRequest Pending %s data transfer \n",
++                                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++    }
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdRequest - SD request handler
++  Input:  pHcd - HCD object
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdRequest(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    UINT16                temp;
++    PSDREQUEST            pReq;
++
++    pDevice->CompletionCount = 0;
++    pDevice->DmaMode = OMAP_DMA_NONE;
++    pDevice->ShortTransfer = FALSE;
++
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++
++    do {
++        if (pDevice->ShuttingDown) {
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest returning canceled\n"));
++            status = SDIO_STATUS_CANCELED;
++            break;
++        }
++
++        ReqProcClkStartStop(pDevice, CLOCK_OFF);
++
++            /* make sure error ints and EOC is masked*/
++        MaskIrq(pDevice,
++                OMAP_REG_MMC_INTERRUPT_ERRORS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOC,
++                FROM_NORMAL);
++
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, 0);
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_TIMEOUT, pDevice->TimeOut);
++
++            /* clear all status bits (including error bits) that deals with request processing */
++        WRITE_HOST_REG16(pDevice,
++                         OMAP_REG_MMC_MODULE_STATUS,
++                         OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS);
++
++        if (READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS) &
++            OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS) {
++            DBG_PRINT(SDDBG_WARN, ("SDIO OMAP ERROR!!! status did not clear: 0x%X\n",
++                READ_HOST_REG16(pDevice,OMAP_REG_MMC_MODULE_STATUS)));
++        }
++
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            default:
++            case SDREQ_FLAGS_NO_RESP:
++                temp = OMAP_REG_MMC_CMD_NORESPONSE;
++                break;
++            case SDREQ_FLAGS_RESP_R1:
++                temp = OMAP_REG_MMC_CMD_R1;
++                break;
++            case SDREQ_FLAGS_RESP_R1B:
++                temp = OMAP_REG_MMC_CMD_R1 | OMAP_REG_MMC_CMD_R1BUSY;
++                break;
++            case SDREQ_FLAGS_RESP_R2:
++                temp = OMAP_REG_MMC_CMD_R2;
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++                temp = OMAP_REG_MMC_CMD_R3;
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                    /* SDIO R4s are just OCR responses equivalent to an R3*/
++                 temp = OMAP_REG_MMC_CMD_R3;
++                break;
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                    /* R5s are just R1 responses, do not use the R5 type in this controller
++                     * because it will disable response timeout detection unless you set
++                     * the C5E,C14E..bits */
++                temp = OMAP_REG_MMC_CMD_R1;
++                break;
++            case SDREQ_FLAGS_RESP_R6:
++                temp = OMAP_REG_MMC_CMD_R6;
++                break;
++        }
++
++            /* get the command type */
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_NO_RESP:
++                    /* broadcast no-response */
++                temp |= OMAP_REG_MMC_CMD_TYPE_BC;
++                break;
++
++            case SDREQ_FLAGS_RESP_R2:
++                if ((pReq->Command == CMD9) || (pReq->Command == CMD10)) {
++                    temp |= OMAP_REG_MMC_CMD_TYPE_AC;
++                } else if (pReq->Command == CMD2) {
++                    temp |= OMAP_REG_MMC_CMD_TYPE_BCR;
++                } else {
++                    DBG_ASSERT(FALSE);
++                }
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++            case SDREQ_FLAGS_RESP_R6:
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                    /* responses that are broadcast */
++                temp |= OMAP_REG_MMC_CMD_TYPE_BCR;
++                break;
++            default:
++                /* all other commands are addressed responses */
++                if (IS_SDREQ_DATA_TRANS(pReq->Flags)) {
++                        /* commands with data */
++                    temp |= OMAP_REG_MMC_CMD_TYPE_ADTC;
++                } else {
++                        /* all commands without data */
++                    temp |= OMAP_REG_MMC_CMD_TYPE_AC;
++                }
++                break;
++        }
++
++        GetDefaults(pDevice);
++
++        ReqProcClkStartStop(pDevice, CLOCK_ON);
++
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)){
++            /* set the block size register */
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH, pReq->BlockLen-1);
++            /* set block count register */
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT, pReq->BlockCount-1);
++            pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++            DBG_PRINT(OMAP_TRACE_DATA,
++                     ("SDIO OMAP HcdRequest: %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                                       IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                                       pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++        	DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest: blen: 0x%X, nblk: 0x%X\n",
++                                 READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH),
++                                 READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT)));
++                /* use the context to hold where we are in the buffer */
++            pReq->pHcdContext = pReq->pDataBuffer;
++            temp |= IS_SDREQ_WRITE_DATA(pReq->Flags) ?
++                    OMAP_REG_MMC_CMD_DDIR_WRITE : OMAP_REG_MMC_CMD_DDIR_READ;
++
++            SetDataTimeout(pDevice, pDevice->DataTimeOut);
++
++            if ((pReq->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER) &&
++                (pReq->DataRemaining < OMAP_MAX_SHORT_TRANSFER_SIZE)) {
++                    /* flag current request as a short transfer */
++                pDevice->ShortTransfer = TRUE;
++            }
++
++            if (!pDevice->ShortTransfer) {
++                    /* setup dma transfer */
++                if (pDevice->DmaCapable) {
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_DMA) {
++                            /* caller passed a scatter gather list */
++                        pDevice->DmaMode = OMAP_DMA_SG;
++                    } else {
++                            /* try common buffer */
++                        pDevice->DmaMode = OMAP_DMA_COMMON;
++                    }
++                } else {
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_DMA) {
++                        DBG_ASSERT(FALSE);
++                        status = SDIO_STATUS_INVALID_PARAMETER;
++                        break;
++                    }
++                }
++            }
++
++            if (pDevice->DmaMode != OMAP_DMA_NONE) {
++                    /* check DMA */
++                status = CheckDMA(pDevice, pReq);
++
++                if (!SDIO_SUCCESS(status)) {
++                    if ((SDIO_STATUS_UNSUPPORTED == status) &&
++                        (OMAP_DMA_COMMON == pDevice->DmaMode)){
++                            /* if we tried common buffer, the length may be unaligned,
++                             * punt it to PIO mode */
++                        pDevice->DmaMode = OMAP_DMA_NONE;
++                        status = SDIO_STATUS_SUCCESS;
++                            /* fall through */
++                    } else {
++                            /* fail the request */
++                        break;
++                    }
++                } else {
++                        /* we are doing DMA */
++                    status = SetUpHCDDMA(pDevice,
++                                         pReq,
++                                         DMACompletion,
++                                         pDevice);
++                    if (!SDIO_SUCCESS(status)) {
++                        break;
++                    }
++                }
++            }
++
++        	DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest:(1) blen: %d, nblk: %d\n",
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH),
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT)));
++        }
++
++            /* set the argument register */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_ARG_LOW, (UINT16)(pReq->Argument & 0xFFFF));
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_ARG_HI,  (UINT16)((pReq->Argument & 0xFFFF0000) >> 16));
++            /* set the command */
++        temp |= (pReq->Command & OMAP_REG_MMC_CMD_MASK);
++        DBG_PRINT(OMAP_TRACE_REQUESTS,
++                  ("SDIO OMAP HcdRequest CMDDAT:0x%X (RespType:%d, Command:0x%X , Arg:0x%X) \n",
++                  temp, GET_SDREQ_RESP_TYPE(pReq->Flags), pReq->Command, pReq->Argument));
++
++            /* set command timeout */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_TIMEOUT, pDevice->TimeOut);
++
++        if ((SDHCD_GET_OPER_CLOCK(pHcd) < pDevice->ClockSpinLimit) &&
++            (pReq->Command != CMD3)) {
++                /* clock rate is very low, need to use interrupts here */
++            UnmaskIrq(pDevice,
++                      OMAP_REG_MMC_INTERRUPT_ERRORS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOC,
++                      FROM_NORMAL);
++
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, temp);
++
++            status = SDIO_STATUS_PENDING;
++
++            if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS) {
++                DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HcdRequest using interrupt for command done.*** with data. (clock:%d, ref:%d)\n",
++                    SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++            } else {
++                DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HcdRequest using interrupt for command done. (clock:%d, ref:%d) \n",
++                    SDHCD_GET_OPER_CLOCK(pHcd),pDevice->ClockSpinLimit));
++            }
++
++            break;
++        }
++
++            /* if we get here we are polling, interrupt errors and EOC should be masked */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, temp);
++
++        WAIT_FOR_HC_STATUS(pDevice,
++                           OMAP_REG_MMC_MODULE_STATUS_EOC,
++                           temp,
++                           OMAP_STATUS_CMD_PROCESSING_ERRORS,
++                           status,
++                           OMAP_COMMAND_DONE_POLLING);
++
++        if (!SDIO_SUCCESS(status)) {
++            DBG_PRINT(SDDBG_ERROR,
++                    ("SDIO OMAP HCD (cmd-inline) polling failed (sd command:%d,status:%d)\n",
++                    pReq->Command,status));
++            ResetController(pDevice,TRUE,FROM_NORMAL);
++            if (pReq->Command == CMD3) {
++                status = SDIO_STATUS_SUCCESS;
++            } else {
++                break;
++            }
++        }
++
++        DBG_PRINT(OMAP_TRACE_REQUESTS,
++                    ("SDIO OMAP HCD (cmd-inline) statreg: 0x%X config:0x%X\n",
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS),
++                   READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG)));
++
++        if (temp & OMAP_STATUS_CMD_PROCESSING_ERRORS) {
++            status = TranslateSDError(pDevice, pReq, temp);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++        status = ProcessCommandDone(pDevice,pReq,FALSE);
++
++    } while (FALSE);
++
++    if (status != SDIO_STATUS_PENDING) {
++        pReq->Status = status;
++        EndHCTransfer(pDevice, pReq, FROM_NORMAL);
++        if (IS_SDREQ_FORCE_DEFERRED_COMPLETE(pReq->Flags)) {
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest deferring completion to work item \n"));
++                /* the HCD must do the indication in a separate context and return status pending */
++            QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++            return SDIO_STATUS_PENDING;
++        } else {
++                /* complete the request */
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdRequest Command Done, status:%d \n", status));
++        }
++        pDevice->Cancel = FALSE;
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdConfig - HCD configuration handler
++  Input:  pHcd - HCD object
++          pConfig - configuration setting
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pHcd->pContext;
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16 configSave;
++
++    if(pDevice->ShuttingDown) {
++        DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdConfig returning canceled\n"));
++        return SDIO_STATUS_CANCELED;
++    }
++
++    switch (GET_SDCONFIG_CMD(pConfig)){
++        case SDCONFIG_GET_WP:
++            if (WriteProtectSwitchOn(pDevice)) {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++            } else {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++            }
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++            DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP HcdConfig sending init clocks\n"));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ALL_INT,FROM_NORMAL);
++            ReqProcClkStartStop(pDevice, CLOCK_ON);
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD, OMAP_REG_MMC_CMD_INAB);
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_ALL);
++            while(!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) & OMAP_REG_MMC_MODULE_STATUS_EOC))
++                ;
++            WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_EOC);
++            ReqProcClkStartStop(pDevice, CLOCK_OFF);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                {
++                    SDIO_IRQ_MODE_FLAGS irqModeFlags;
++
++                    irqModeFlags =
++                        GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->IRQDetectMode;
++                    if (irqModeFlags & IRQ_DETECT_4_BIT) {
++                        DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: 4 Bit IRQ mode \n"));
++                            /* in 4 bit mode, the clock needs to be left on */
++                        pDevice->KeepClockOn = TRUE;
++                    } else {
++                            /* in 1 bit mode, the clock can be left off */
++                        pDevice->KeepClockOn = FALSE;
++                    }
++                }
++                pDevice->IrqDetectArmed = TRUE;
++
++                    /* enable SDIO mode IRQ detection */
++                configSave = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++                configSave |= OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE;
++                WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, configSave);
++                    /* enable detection IRQ */
++                DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: enable SDIO IRQ\n"));
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++            } else {
++                pDevice->KeepClockOn = FALSE;
++                pDevice->IrqDetectArmed = FALSE;
++                DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig: disable SDIO IRQ\n"));
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++                configSave = READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG);
++                configSave &= ~OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE;
++                WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG, configSave);
++            }
++            break;
++        case SDCONFIG_SDIO_REARM_INT:
++                /* re-enable IRQ detection */
++            DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP HcdConfig - SDIO IRQ re-armed\n"));
++                /* make sure status is cleared */
++            WRITE_HOST_REG16(pDevice,
++                             OMAP_REG_MMC_MODULE_STATUS,
++                             OMAP_REG_MMC_MODULE_STATUS_CIRQ);
++            pDevice->IrqDetectArmed = TRUE;
++            UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_NORMAL);
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++            SetBusMode(pDevice, (PSDCONFIG_BUS_MODE_DATA)(pConfig->pData));
++                /* save it in case we have to restore it later */
++            memcpy(&pDevice->SavedBusMode,pConfig->pData,sizeof(SDCONFIG_BUS_MODE_DATA));
++            break;
++        case SDCONFIG_POWER_CTRL:
++            DBG_PRINT(OMAP_TRACE_CONFIG, ("SDIO OMAP HcdConfig PwrControl: En:%d, VCC:0x%X \n",
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask));
++            status = SetPowerLevel(pDevice,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                     GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask);
++            break;
++        case SDCONFIG_GET_HCD_DEBUG:
++            *((CT_DEBUG_LEVEL *)pConfig->pData) = DBG_GET_DEBUG_LEVEL();
++            break;
++        case SDCONFIG_SET_HCD_DEBUG:
++            DBG_SET_DEBUG_LEVEL(*((CT_DEBUG_LEVEL *)pConfig->pData));
++            break;
++        default:
++            /* invalid request */
++            DBG_PRINT(SDDBG_WARN, ("SDIO OMAP HCD: HcdConfig - unsupported command: 0x%X\n",
++                                    GET_SDCONFIG_CMD(pConfig)));
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return status;
++}
++
++void ResetController(PSDHCD_DEVICE pDevice, BOOL Restore, BOOL FromIsr)
++{
++    INT ii;
++
++    ClockStartStop(pDevice, CLOCK_OFF);
++
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_CONTROL, OMAP_REG_MMC_SYSTEM_CONTROL_SW_RESET);
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_CONTROL, 0);
++
++        /* wait for done */
++    for(ii = 0;
++        (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_SYSTEM_STATUS) &  OMAP_REG_MMC_SYSTEM_STATUS_RESET_DONE))
++        && (ii < 1000);
++        ii++);
++
++    if (ii >= 1000) {
++            /* reset on 1610 is broken, see errata, use alternate approach */
++            /* cycle power */
++         WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG, 0);
++         WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG,
++                                         OMAP_REG_MMC_MODULE_CONFIG_PWRON | 1);
++    }
++
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_CONFIG,
++                     OMAP_REG_MMC_MODULE_CONFIG_MODE_MMCSD | OMAP_REG_MMC_MODULE_CONFIG_PWRON);
++
++         /* configure the SDIO mode */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG,
++                     OMAP_REG_MMC_SDIO_MODE_CONFIG_DCR4);
++
++    SetDataTimeout(pDevice, OMAP_DEFAULT_DATA_TIMEOUT);
++
++        /* set the default timeouts */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_CMD_TIMEOUT, pDevice->TimeOut);
++        /* clear all status bits, from chip erratta, the status may not clear on a reset */
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, OMAP_REG_MMC_MODULE_STATUS_ALL);
++
++    if (!Restore) {
++        return;
++    }
++
++        /* restore bus clock and bus mode */
++    SetBusMode(pDevice,&pDevice->SavedBusMode);
++
++        /* restore interrupt state */
++    if (pDevice->IrqDetectArmed) {
++        UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FromIsr);
++    }
++
++}
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInitialize - Initialize controller
++  Input:  pDeviceContext - device context
++  Output:
++  Return:
++  Notes: I/O resources must be mapped before calling this function
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    UINT16 version;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HcdInitialize\n"));
++
++        /* reset the controller */
++    ResetController(pDeviceContext, FALSE,FROM_NORMAL);
++
++        /* display version info */
++    version = READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_MODULE_REV);
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HcdInitialize: Module Spec verison: %d.%d\n",
++              ((version & OMAP_REG_MMC_MODULE_REV_MAJOR_MASK) >> OMAP_REG_MMC_MODULE_REV_MAJOR_SHIFT),
++              ((version & OMAP_REG_MMC_MODULE_REV_MINOR_MASK) >> OMAP_REG_MMC_MODULE_REV_MINOR_SHIFT)));
++
++    if (pDeviceContext->BaseClock == 0) {
++         DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP invalid base clock setting\n"));
++         status = SDIO_STATUS_DEVICE_ERROR;
++         return status;
++    }
++
++    DBG_PRINT(SDDBG_TRACE,
++    ("SDIO OMAP Using base clock: %dHz, max bus clock: %dHz, max blocks: %d max bytes per block: %d\n",
++                            pDeviceContext->BaseClock,
++                            pDeviceContext->Hcd.MaxClockRate,
++                            pDeviceContext->Hcd.MaxBlocksPerTrans,
++                            pDeviceContext->Hcd.MaxBytesPerBlock));
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HcdInitialize: SlotVoltageCaps: 0x%X, MaxSlotCurrent: 0x%X\n",
++                        (UINT)pDeviceContext->Hcd.SlotVoltageCaps, (UINT)pDeviceContext->Hcd.MaxSlotCurrent));
++
++    /* interrupts will get enabled by the caller after all of the OS dependent work is done */
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HcdInitialize\n"));
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdDeinitialize - deactivate controller
++  Input:  pDeviceContext - context
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext)
++{
++    PSDREQUEST pReq;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HcdDeinitialize\n"));
++
++
++    pReq = GET_CURRENT_REQUEST(&pDeviceContext->Hcd);
++
++    if (pReq != NULL) {
++        pReq->Status = SDIO_STATUS_CANCELED;
++        DBG_PRINT(SDDBG_TRACE,
++        ("SDIO OMAP HcdDeinitialize - cancelling request. (command:%d) mod status:0x%X, IRQ Enables:0x%X\n",
++        pReq->Command,  (UINT)READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_MODULE_STATUS),
++        (UINT)READ_HOST_REG16(pDeviceContext, OMAP_REG_MMC_INTERRUPT_ENABLE)));
++    }
++
++    pDeviceContext->KeepClockOn = FALSE;
++    MaskIrq(pDeviceContext, OMAP_REG_MMC_INTERRUPT_ALL_INT, FROM_NORMAL);
++    pDeviceContext->ShuttingDown = TRUE;
++    ClockStartStop(pDeviceContext, CLOCK_OFF);
++
++    if (pReq != NULL) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_TRANSFER_DONE);
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HcdDeinitialize\n"));
++}
++
++void EndHCTransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL FromIsr)
++{
++
++    if (!SDIO_SUCCESS(pReq->Status) && (pDevice->DmaMode != OMAP_DMA_NONE)) {
++            /* DMA may be running cancel the DMA transfer */
++        SDCancelDMATransfer(pDevice);
++    }
++
++    MaskIrq(pDevice,
++            (OMAP_REG_MMC_INTERRUPT_ALL_INT & ~OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ),FromIsr);
++
++    if (!pDevice->KeepClockOn) {
++        ReqProcClkStartStop(pDevice, CLOCK_OFF);
++    }
++
++    if (!SDIO_SUCCESS(pReq->Status)) {
++          switch (pReq->Status) {
++            case SDIO_STATUS_BUS_READ_TIMEOUT:
++            case SDIO_STATUS_BUS_READ_CRC_ERR:
++            case SDIO_STATUS_BUS_WRITE_ERROR:
++            case SDIO_STATUS_BUS_RESP_CRC_ERR:
++                DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP - resetting controller on bus errors (CMD:%d) \n",
++                        pReq->Command));
++                    /* controller gets stuck on some errors */
++                ResetController(pDevice,TRUE,FromIsr);
++                break;
++            default:
++                break;
++        }
++    }
++
++    if ((DBG_GET_DEBUG_LEVEL() >= OMAP_TRACE_DATA) && SDIO_SUCCESS(pReq->Status) &&
++        IS_SDREQ_DATA_TRANS(pReq->Flags) && (pDevice->DmaMode != OMAP_DMA_SG)) {
++        if (!IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            SDLIB_PrintBuffer(pReq->pDataBuffer,(pReq->BlockLen*pReq->BlockCount),"SDIO OMAP - RX DataDump");
++        } else {
++            SDLIB_PrintBuffer(pReq->pDataBuffer,(pReq->BlockLen*pReq->BlockCount),"SDIO OMAP - TX DataDump");
++        }
++    }
++
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdSDInterrupt - process controller interrupt
++  Input:  pDeviceContext - context
++  Output:
++  Return: TRUE if interrupt was handled
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDevice)
++{
++    UINT16      statusErrs,errorMask,statusMask;
++    PSDREQUEST  pReq = NULL;
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("+SDIO OMAP ISR handler \n"));
++
++    pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    while (1) {
++
++            /* get status */
++        statusErrs = READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS);
++
++        DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, status: 0x%X \n",
++                  (UINT)statusErrs));
++
++            /* for ISR processing, only deal with interrupts that are actually enabled */
++        statusMask = READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE);
++        statusErrs &= statusMask;
++            /* ack the status bits we care about */
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS, statusErrs);
++
++        DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, valid status: 0x%X, IRQ Enables:0x%X\n",
++                  (UINT)statusErrs, statusMask));
++
++            /* deal with SDIO interrupts */
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_CIRQ) {
++            if (READ_HOST_REG16(pDevice, OMAP_REG_MMC_SDIO_MODE_CONFIG)
++                    & OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE) {
++                        /* this interrupt is level triggered and will remain set until the card interrupt
++                       source is cleared. */
++                    DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP ISR - SDIO_IRQ detected\n"));
++                        /* ack*/
++                    WRITE_HOST_REG16(pDevice,
++                                     OMAP_REG_MMC_MODULE_STATUS,
++                                     OMAP_REG_MMC_MODULE_STATUS_CIRQ);
++                    MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ, FROM_ISR);
++                    QueueEventResponse(pDevice, WORK_ITEM_SDIO_IRQ);
++            } else {
++                DBG_ASSERT_WITH_MSG(FALSE,
++                        "SDIO OMAP ISR - unexpected card interrupt!\n");
++            }
++        }
++
++        if (0 == statusErrs) {
++                /* nothing to process */
++            break;
++        }
++
++        if (NULL == pReq) {
++                /* nothing more to do */
++            break;
++        }
++
++        errorMask = OMAP_REG_MMC_MODULE_STATUS_CTO  |
++                    OMAP_REG_MMC_MODULE_STATUS_CCRC;
++
++        if (IS_SDREQ_DATA_TRANS(pReq->Flags)){
++            errorMask |= OMAP_REG_MMC_MODULE_STATUS_DTO | OMAP_REG_MMC_MODULE_STATUS_DCRC;
++        }
++
++        if (statusErrs & errorMask) {
++            status = TranslateSDError(pDevice, pReq, (statusErrs & errorMask));
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++
++        /* if we reach here, there were no command processing errors */
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_EOC) {
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOC, FROM_ISR);
++            status = ProcessCommandDone(pDevice,
++                                        pReq,
++                                        TRUE);
++            if (!SDIO_SUCCESS(status)) {
++                break;
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_AE) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++            DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR TX Transfer AE\n"));
++
++                /* refill the FIFO */
++            if (HcdTransferTxData(pDevice, pReq)) {
++                    /* fifo contains final data, disable almost empty interrupts */
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_AE, FROM_ISR);
++                    /* get ready for BRS or EOFB, it has been observed that EOFB can come early
++                     * and mask out the BRS bit, this looks like a controller bug */
++                UnmaskIrq(pDevice,
++                          OMAP_REG_MMC_INTERRUPT_ENABLE_BRS | OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,
++                          FROM_ISR);
++                DBG_PRINT(OMAP_TRACE_BUSY,
++                    ("SDIO OMAP ISR, TX near complete, waiting for BRS or EOFB (bcnt:%d,blen:%d)\n",
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT),
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH)));
++            } else {
++                    /* more data to go, if this is a multi-block transfer we want to make sure
++                     * the EOFB is cleared for all blocks except the last one, we will
++                     * actually wait for EOFB on the last block */
++                if (READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT) > 2) {
++                    WRITE_HOST_REG16(pDevice,
++                                     OMAP_REG_MMC_MODULE_STATUS,
++                                     OMAP_REG_MMC_MODULE_STATUS_EOFB);
++                }
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_AF) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(!IS_SDREQ_WRITE_DATA(pReq->Flags));
++            DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR RX Transfer AF\n"));
++                /* drain the FIFO */
++            if (HcdTransferRxData(pDevice, pReq, FALSE)) {
++                    /* last bit of data remaining, we can wait for BRS */
++                MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_AF, FROM_ISR);
++                    /* get ready for BRS */
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_BRS,FROM_ISR);
++                DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR, RX near complete, waiting for BRS \n"));
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_BRS) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_BRS, FROM_ISR);
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* check for busy on write operations */
++                MicroDelay(10);
++                    /* check card enter busy */
++                if (!(READ_HOST_REG16(pDevice, OMAP_REG_MMC_MODULE_STATUS) &
++                      OMAP_REG_MMC_MODULE_STATUS_CB)) {
++                    DBG_PRINT(OMAP_TRACE_BUSY, ("SDIO OMAP ISR TX Transfer Done - not busy \n"));
++                    status = SDIO_STATUS_SUCCESS;
++                        /* we are done */
++                    break;
++                }
++
++                    /* clear status */
++                WRITE_HOST_REG16(pDevice,
++                                 OMAP_REG_MMC_MODULE_STATUS,
++                                 OMAP_REG_MMC_MODULE_STATUS_CB);
++                DBG_PRINT(OMAP_TRACE_BUSY, ("SDIO OMAP ISR TX Transfer Done - waiting on busy release \n"));
++                statusErrs &= ~OMAP_REG_MMC_MODULE_STATUS_CB;
++                UnmaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,FROM_ISR);
++
++            } else {
++                 DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP ISR RX Transfer Done \n"));
++                 if (pDevice->DmaMode == OMAP_DMA_NONE) {
++                        /* In PIO mode, the FIFO may contain some residue data */
++                     HcdTransferRxData(pDevice, pReq, TRUE);
++                     DBG_ASSERT(pReq->DataRemaining == 0);
++                 }
++                 status = SDIO_STATUS_SUCCESS;
++                 break;
++            }
++        }
++
++        if (statusErrs & OMAP_REG_MMC_MODULE_STATUS_EOFB) {
++            DBG_ASSERT(IS_SDREQ_DATA_TRANS(pReq->Flags));
++            DBG_ASSERT(IS_SDREQ_WRITE_DATA(pReq->Flags));
++            MaskIrq(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB,FROM_ISR);
++            DBG_PRINT(OMAP_TRACE_BUSY,("SDIO OMAP ISR Card Busy Done (bcnt:%d,blen:%d)\n",
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_COUNT),
++                   (UINT)READ_HOST_REG16(pDevice, OMAP_REG_MMC_BLOCK_LENGTH)));
++                /* the write operation is finally done */
++            status = SDIO_STATUS_SUCCESS;
++            break;
++        }
++
++    }
++
++    if (status != SDIO_STATUS_PENDING) {
++        pReq->Status = status;
++        EndHCTransfer(pDevice,pReq,FROM_ISR);
++        if (OMAP_DMA_NONE == pDevice->DmaMode) {
++                /* queue work item to notify bus driver of I/O completion */
++            QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++        } else {
++                /* using some form of DMA */
++            if (!SDIO_SUCCESS(status)) {
++                    /* EndHCTransfer will cancel DMA, no need to synch with DMA */
++                QueueEventResponse(pDevice, WORK_ITEM_IO_COMPLETE);
++            } else {
++                    /* sync request completion with DMA */
++                CompleteRequestSyncDMA(pDevice,pReq,status);
++            }
++        }
++    }
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("-SDIO OMAP ISR handler \n"));
++
++    return TRUE;
++}
++
++
++
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_linux.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_linux.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,147 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_linux.h
++
++ at abstract: include file for Texas Instruments OMAP host controller, linux dependent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_HCD_LINUX_H___
++#define __SDIO_HCD_LINUX_H___
++
++
++#include <linux/kernel.h>
++#include <linux/interrupt.h>
++#include <linux/list.h>
++#include <linux/errno.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <linux/device.h>
++#endif
++#include <asm/arch/dma.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <asm/hardware/clock.h>
++#endif
++#include <asm/irq.h>
++#include <linux/delay.h>
++
++
++#define SDHCD_MAX_DEVICE_NAME     12
++
++#define OMAP_BASE_ADDRESS1        0x4809C000
++#define OMAP_BASE_LENGTH          0x6A
++
++#define OMAP_MODULE_CLOCK         96000000
++#define OMAP_MAX_DEVICE_COUNT     2
++#define OMAP_DEFAULT_DEVICE_COUNT 1
++#define OMAP_DEFAULT_FIRST_DEVICE 0
++#define OMAP_DMA_MASK             0xFFFFFFFF
++
++#define HCD_COMMAND_MIN_POLLING_CLOCK 5000000
++
++/* debounce delay for slot */
++#define SD_SLOT_DEBOUNCE_MS  500
++
++
++/* device base name */
++#define SDIO_BD_BASE "sdiobd"
++
++/* mapped memory address */
++typedef struct _SDHCD_MEMORY {
++    ULONG Raw;      /* start of address range */
++    ULONG Length;   /* length of range */
++    PVOID pMapped;  /* the mapped address */
++}SDHCD_MEMORY, *PSDHCD_MEMORY;
++
++typedef void (*PDMA_TRANSFER_COMPLETION)(PVOID,SDIO_STATUS,BOOL);
++
++/* device data*/
++typedef struct _HCD_OS_INFO {
++    POS_PNPDEVICE pBusDevice;      /* our device registered with bus driver */
++    SDHCD_MEMORY  Address;          /* memory address of this device */
++    spinlock_t    AddressSpinlock;   /* use to protect reghisters when needed */
++    UINT8         InitStateMask;
++#define SDIO_BASE_MAPPED           0x01
++#define SDIO_IRQ_INTERRUPT_INIT    0x04
++#define SDHC_REGISTERED            0x10
++#define SDHC_HW_INIT               0x40
++#define SDHC_TIMER_INIT            0x80
++    spinlock_t   Lock;            /* lock against the ISR */
++    BOOL         CardInserted;    /* card inserted flag */
++    BOOL         Cancel;
++    BOOL         ShuttingDown;    /* indicates shut down of HCD) */
++    struct work_struct iocomplete_work; /* work item definintions */
++    struct work_struct carddetect_work; /* work item definintions */
++    struct work_struct sdioirq_work; /* work item definintions */
++    DMA_ADDRESS hDmaBuffer;       /* handle for data buffer */
++    PUINT8      pDmaBuffer;       /* virtual address of command buffer */
++    UINT32      CommonBufferSize; /* size of CommonBuffer */
++    int         Interrupt;
++    int         DmaRxId;
++    int         DmaTxId;
++    int         DmaRxChannel;      /* receive DMA channel */
++    int         DmaTxChannel;      /* transmit DMA channel */
++    int         LastTransfer;      /* length of last transfer */
++    PSDDMA_DESCRIPTOR pDmaList;    /* in use scatter-gather list */
++    UINT        SGcount;           /* count of in-use scatter gather list */
++    PVOID       TransferContext;   /* context passed to TransferCompletion routine */
++    PDMA_TRANSFER_COMPLETION pTransferCompletion; /* transfer completion routine */
++}HCD_OS_INFO, *PHCD_OS_INFO;
++
++typedef struct _SDHCD_DRIVER {
++    OS_PNPDEVICE   HcdDevice;     /* the OS device for this HCD */
++    OS_PNPDRIVER   HcdDriver;     /* the OS driver for this HCD */
++    SDDMA_DESCRIPTION Dma;        /* driver DMA description */
++}SDHCD_DRIVER, *PSDHCD_DRIVER;
++
++
++#define WORK_ITEM_IO_COMPLETE  0
++#define WORK_ITEM_CARD_DETECT  1
++#define WORK_ITEM_SDIO_IRQ     2
++
++
++#define READ_HOST_REG32(pDevice, OFFSET)  \
++    _READ_DWORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG32(pDevice, OFFSET, VALUE) \
++    _WRITE_DWORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET),(VALUE))
++#define READ_HOST_REG16(pDevice, OFFSET)  \
++    _READ_WORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET))
++#define WRITE_HOST_REG16(pDevice, OFFSET, VALUE) \
++    _WRITE_WORD_REG((((UINT32)((pDevice)->OSInfo.Address.pMapped))) + (OFFSET),(VALUE))
++
++#define GET_HC_REG_BASE(pDevice) (pDevice)->OSInfo.Address.pMapped
++
++#define OMAP_USE_DBG_GPIO
++/* prototypes */
++#endif /* __SDIO_HCD_LINUX_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_os.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_os.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,608 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_os.c
++
++ at abstract: Linux OMAP native SDIO Host Controller Driver
++
++#notes: includes module load and unload functions
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++/* debug level for this module*/
++
++#define DBG_DECLARE 4;
++#include <linux/sdio/ctsystem.h>
++#include "sdio_omap_hcd.h"
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++
++#include <asm/mach-types.h>
++#include <asm/arch/dma.h>
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++#include <asm/arch/mux.h>
++#include <linux/dma-mapping.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#else
++#include <asm/arch/irq.h>
++#endif
++
++#define DESCRIPTION "SDIO OMAP HCD"
++#define AUTHOR "Atheros Communications, Inc."
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static int Probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId);
++static void Remove(struct pnp_dev *pBusDevice);
++#else
++static int Probe(POS_PNPDEVICE pBusDevice, const PUINT pId);
++static void Remove(POS_PNPDEVICE pBusDevice);
++BOOL SetupTranceiver(void);
++void CleanupTranceiver(void);
++#endif
++
++static void RemoveDevice(POS_PNPDEVICE pBusDevice, PSDHCD_DRIVER_CONTEXT pHcdContext);
++SDIO_STATUS InitOmap(PSDHCD_DEVICE pDevice, UINT deviceNumber);
++void DeinitOmap(PSDHCD_DEVICE pDevice);
++
++static void hcd_iocomplete_wqueue_handler(void *context);
++static void hcd_carddetect_wqueue_handler(void *context);
++static void hcd_sdioirq_wqueue_handler(void *context);
++
++/* debug print parameter */
++module_param(debuglevel, int, 0644);
++MODULE_PARM_DESC(debuglevel, "debuglevel 0-7, controls debug prints");
++
++#define DEFAULT_ATTRIBUTES (SDHCD_ATTRIB_BUS_1BIT  |  SDHCD_ATTRIB_BUS_4BIT | \
++                            SDHCD_ATTRIB_POWER_SWITCH   |   \
++                            0)
++
++static UINT32 hcdattributes = DEFAULT_ATTRIBUTES;
++
++module_param(hcdattributes, int, 0644);
++MODULE_PARM_DESC(hcdattributes, "OMAP Attributes");
++static UINT32 base_clock = OMAP_MODULE_CLOCK;
++module_param(base_clock, int, 0444);
++MODULE_PARM_DESC(base_clock, "BaseClock Hz ");
++static UINT32 timeout = OMAP_DEFAULT_CMD_TIMEOUT;
++module_param(timeout, int, 0644);
++MODULE_PARM_DESC(timeout, "OMAP command timeout");
++static UINT32 data_timeout = OMAP_DEFAULT_DATA_TIMEOUT;
++module_param(data_timeout, int, 0644);
++MODULE_PARM_DESC(data_timeout, "OMAP data timeout");
++static UINT32 device_count = OMAP_DEFAULT_DEVICE_COUNT;
++module_param(device_count, int, 0644);
++MODULE_PARM_DESC(device_count, "OMAP number of devices");
++static UINT32 first_device = OMAP_DEFAULT_FIRST_DEVICE;
++module_param(first_device, int, 0644);
++MODULE_PARM_DESC(first_device, "OMAP first device to create");
++static UINT32 clock_spin_limit = HCD_COMMAND_MIN_POLLING_CLOCK;
++module_param(clock_spin_limit, int, 0644);
++MODULE_PARM_DESC(clock_spin_limit, "OMAP command clock spin time");
++
++static UINT32 max_sdbus_clock = OMAP_MODULE_CLOCK;
++module_param(max_sdbus_clock, int, 0644);
++MODULE_PARM_DESC(max_sdbus_clock, "OMAP max SDIO bus clock");
++
++UINT32 max_blocks = OMAP_MAX_BLOCKS;
++module_param(max_blocks, int, 0644);
++MODULE_PARM_DESC(max_blocks, "OMAP Max Blocks Per Transfer");
++UINT32 max_bytes_per_block = OMAP_MAX_BYTES_PER_BLOCK;
++module_param(max_bytes_per_block, int, 0644);
++MODULE_PARM_DESC(max_bytes_per_block, "OMAP Max Blocks per transfer");
++
++INT gpiodebug = 0;
++module_param(gpiodebug, int, 0444);
++MODULE_PARM_DESC(gpiodebug, "Special GPIO debug");
++
++INT noDMA = 0;
++module_param(noDMA, int, 0444);
++MODULE_PARM_DESC(noDMA, "Force No DMA");
++
++UINT32 dma_buffer_size = 16*1024;
++module_param(dma_buffer_size, int, 0644);
++MODULE_PARM_DESC(dma_buffer_size, "OMAP common buffer DMA size");
++
++UINT32 builtin_card = 0;
++module_param(builtin_card, int, 0644);
++MODULE_PARM_DESC(builtin_card, "SDIO card is built-in");
++
++UINT32 async_irq = 0;
++module_param(async_irq, int, 0644);
++MODULE_PARM_DESC(async_irq, "Allow async IRQ detection in 4 bit mode");
++
++/* the driver context data */
++SDHCD_DRIVER_CONTEXT HcdContext = {
++   .pDescription  = DESCRIPTION,
++   .DeviceCount   = 0,
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++   .Driver.HcdDevice.name = "sdio_omap_hcd",
++   .Driver.HcdDriver.name = "sdio_omap_hcd",
++   .Driver.HcdDriver.probe  = Probe,
++   .Driver.HcdDriver.remove = Remove,
++#endif
++   .Driver.Dma.Mask = OMAP_DMA_MASK,
++   .Driver.Dma.Flags = SDDMA_DESCRIPTION_FLAG_DMA,
++   .Driver.Dma.MaxBytesPerDescriptor = 0xFFFFFFFF, /* the controller can DMA up to 4GB per DMA transfer*/
++   .Driver.Dma.AddressAlignment = 0x01,  /* illegal address bits, buffers must be on even word bounadries */
++   .Driver.Dma.LengthAlignment = 0x1,    /* illegal address bits, buffer lengths must be even */
++   .Driver.Dma.MaxDescriptors = 1,       /* we don't suppport scatter-gather DMA, just a single buffer at a time */
++};
++
++/*
++ * Probe - probe to setup our device, if present
++*/
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++int Probe(struct pnp_dev *pBusDevice, const struct pnp_device_id *pId)
++#else
++static int Probe(POS_PNPDEVICE pBusDevice, const PUINT pId)
++#endif
++{
++    SYSTEM_STATUS err = 0;
++    SDIO_STATUS   status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DEVICE pDeviceContext = NULL;
++    int ii;
++    PSDHCD_DRIVER_CONTEXT pHcdContext = &HcdContext;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HCD: Probe - probing for new device\n"));
++
++    if (!async_irq) {
++        hcdattributes |= SDHCD_ATTRIB_NO_4BIT_IRQ;
++        DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: No 4-bit IRQ detection\n"));
++    } else {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: 4-bit IRQ detect without Clock enabled\n"));
++    }
++
++    if (!builtin_card) {
++            /* use slot polling */
++        hcdattributes |= SDHCD_ATTRIB_SLOT_POLLING;
++    } else {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: Built-in Card forcing ATTACH\n"));
++    }
++
++    max_blocks = min(max_blocks, (UINT32)OMAP_MAX_BLOCKS);
++    max_bytes_per_block = min(max_bytes_per_block, (UINT32)OMAP_MAX_BYTES_PER_BLOCK);
++
++    if (device_count > OMAP_MAX_DEVICE_COUNT) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: Probe - too many devices requested: %d\n", device_count));
++        return -EINVAL;
++    }
++
++    for (ii = first_device; ii < device_count+first_device; ii++) {
++        /* create a device the slot */
++        /* allocate a device context for this new device */
++        pDeviceContext =  (PSDHCD_DEVICE)KernelAlloc(sizeof(SDHCD_DEVICE));
++        if (pDeviceContext == NULL) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: Probe - no memory for device context\n"));
++            err = -ENOMEM;
++            break;
++        }
++        ZERO_POBJECT(pDeviceContext);
++        SDLIST_INIT(&pDeviceContext->List);
++        pDeviceContext->OSInfo.pBusDevice = pBusDevice;
++        pDeviceContext->OSInfo.CommonBufferSize = dma_buffer_size;
++        SET_SDIO_STACK_VERSION(&pDeviceContext->Hcd);
++        pDeviceContext->Hcd.pName = (PTEXT)KernelAlloc(SDHCD_MAX_DEVICE_NAME+1);
++        snprintf(pDeviceContext->Hcd.pName, SDHCD_MAX_DEVICE_NAME, SDIO_BD_BASE"%i:%i",
++                 pHcdContext->DeviceCount++, ii);
++        pDeviceContext->Hcd.Attributes = hcdattributes;
++        pDeviceContext->Hcd.pContext = pDeviceContext;
++        pDeviceContext->Hcd.pRequest = HcdRequest;
++        pDeviceContext->Hcd.pConfigure = HcdConfig;
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++        pDeviceContext->Hcd.pDevice = &pBusDevice->dev;
++#endif
++        pDeviceContext->Hcd.pModule = THIS_MODULE;
++        pDeviceContext->BaseClock = base_clock;
++        pDeviceContext->Hcd.MaxSlotCurrent = OMAP_DEFAULT_CURRENT;
++        pDeviceContext->Hcd.SlotVoltageCaps = SLOT_POWER_3_0V | SLOT_POWER_3_3V;
++        pDeviceContext->Hcd.SlotVoltagePreferred = SLOT_POWER_3_0V;
++        pDeviceContext->Hcd.MaxClockRate = min(max_sdbus_clock,base_clock);
++        pDeviceContext->TimeOut = timeout;
++        pDeviceContext->DataTimeOut = data_timeout;
++
++        pDeviceContext->Hcd.pConfigure = HcdConfig;
++
++        /* add device to our list of devices */
++            /* protect the devicelist */
++        if (!SDIO_SUCCESS(status = SemaphorePendInterruptable(&pHcdContext->DeviceListSem))) {
++            break;;   /* wait interrupted */
++        }
++        SDListInsertTail(&pHcdContext->DeviceList, &pDeviceContext->List);
++        SemaphorePost(&pHcdContext->DeviceListSem);
++
++        /* initialize work items */
++        INIT_WORK(&(pDeviceContext->OSInfo.iocomplete_work), hcd_iocomplete_wqueue_handler, pDeviceContext);
++        INIT_WORK(&(pDeviceContext->OSInfo.carddetect_work), hcd_carddetect_wqueue_handler, pDeviceContext);
++        INIT_WORK(&(pDeviceContext->OSInfo.sdioirq_work), hcd_sdioirq_wqueue_handler, pDeviceContext);
++
++        if (!SDIO_SUCCESS((status = InitOmap(pDeviceContext, ii - first_device)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Probe - failed to init OMAP HW, status =%d\n", status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++            /* InitOmap may back off these values because of DMA common buffer restrictions */
++        pDeviceContext->Hcd.MaxBytesPerBlock = max_bytes_per_block;
++        pDeviceContext->Hcd.MaxBlocksPerTrans = max_blocks;
++
++        if (!SDIO_SUCCESS((status = HcdInitialize(pDeviceContext)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Probe - failed to init HW, status =%d\n", status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++
++        pDeviceContext->OSInfo.InitStateMask |= SDHC_HW_INIT;
++
++           /* register with the SDIO bus driver */
++        if (!SDIO_SUCCESS((status = SDIO_RegisterHostController(&pDeviceContext->Hcd)))) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: Probe - failed to register with host, status =%d\n",status));
++            err = SDIOErrorToOSError(status);
++            break;
++        }
++        pDeviceContext->OSInfo.InitStateMask |= SDHC_REGISTERED;
++
++        if (builtin_card) {
++            DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD Forcing ATTACH on built-in card \n"));
++            SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_ATTACH);
++        }
++    }
++    if (err < 0) {
++        Remove(pBusDevice); /* TODO: the cleanup should not really be done in the Remove function */
++    } else {
++           /* TODO: check and see if there is a card inserted at powerup */
++        DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP Probe - HCD ready! \n"));
++    }
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HCD: Probe - err:%d\n", err));
++    return err;
++}
++
++/* Remove - remove  device
++ * perform the undo of the Probe
++*/
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++static void Remove(struct pnp_dev *pBusDevice)
++#else
++static void Remove(POS_PNPDEVICE pBusDevice)
++#endif
++{
++    PSDHCD_DRIVER_CONTEXT pHcdContext = &HcdContext;
++
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HCD: Remove - removing device\n"));
++    RemoveDevice(pBusDevice, pHcdContext);
++    pHcdContext->DeviceCount--;
++
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HCD: Remove\n"));
++}
++
++/*
++ * RemoveDevice - remove all devices associated with bus device
++*/
++static void RemoveDevice(POS_PNPDEVICE pBusDevice, PSDHCD_DRIVER_CONTEXT pHcdContext)
++{
++    PSDHCD_DEVICE pDeviceContext;
++    DBG_PRINT(SDDBG_TRACE, ("+SDIO OMAP HCD: RemoveDevice\n"));
++
++    /* protect the devicelist */
++    if (!SDIO_SUCCESS(SemaphorePendInterruptable(&pHcdContext->DeviceListSem))) {
++        return;   /* wait interrupted */
++    }
++
++    SDITERATE_OVER_LIST_ALLOW_REMOVE(&pHcdContext->DeviceList, pDeviceContext, SDHCD_DEVICE, List)
++        if (pDeviceContext->OSInfo.pBusDevice == pBusDevice) {
++            if (pDeviceContext->OSInfo.InitStateMask & SDHC_HW_INIT) {
++                HcdDeinitialize(pDeviceContext);
++            }
++
++            if (pDeviceContext->OSInfo.InitStateMask & SDHC_REGISTERED) {
++                SDIO_UnregisterHostController(&pDeviceContext->Hcd);
++            }
++
++            /* wait for any of our work items to run */
++            flush_scheduled_work();
++
++            DeinitOmap(pDeviceContext);
++
++            if (pDeviceContext->Hcd.pName != NULL) {
++                KernelFree(pDeviceContext->Hcd.pName);
++                pDeviceContext->Hcd.pName = NULL;
++            }
++            KernelFree(pDeviceContext);
++        }
++    SDITERATE_END;
++    SemaphorePost(&pHcdContext->DeviceListSem);
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HCD: RemoveDevice\n"));
++}
++
++/*
++ * QueueEventResponse - queues an event in a process context back to the bus driver
++ *
++*/
++SDIO_STATUS QueueEventResponse(PSDHCD_DEVICE pDeviceContext, INT WorkItemID)
++{
++    struct work_struct *work;
++
++    DBG_PRINT(OMAP_TRACE_WORK, ("+SDIO OMAP QueueEventResponse\n"));
++    if (pDeviceContext->OSInfo.ShuttingDown) {
++        return SDIO_STATUS_CANCELED;
++    }
++
++    switch (WorkItemID) {
++        case WORK_ITEM_IO_COMPLETE:
++            DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP QueueEventResponse - WORK_ITEM_IO_COMPLETE \n"));
++            work = &pDeviceContext->OSInfo.iocomplete_work;
++            break;
++        case WORK_ITEM_CARD_DETECT:
++            DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP QueueEventResponse - WORK_ITEM_CARD_DETECT \n"));
++            work = &pDeviceContext->OSInfo.carddetect_work;
++            break;
++        case WORK_ITEM_SDIO_IRQ:
++            DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP QueueEventResponse - WORK_ITEM_SDIO_IRQ \n"));
++            work = &pDeviceContext->OSInfo.sdioirq_work;
++            break;
++        default:
++            DBG_ASSERT(FALSE);
++            return SDIO_STATUS_ERROR;
++            break;
++    }
++
++    if (schedule_work(work) > 0) {
++        DBG_PRINT(OMAP_TRACE_WORK, ("-SDIO OMAP QueueEventResponse - Success \n"));
++        return SDIO_STATUS_SUCCESS;
++    } else {
++        DBG_PRINT(SDDBG_ERROR, ("-SDIO OMAP QueueEventResponse - Error scheduling work\n"));
++        return SDIO_STATUS_PENDING;
++    }
++}
++/*
++ * CompleteRequestSyncDMA - handle a synchronized request completion between the ISR and the DMA complete
++*/
++void CompleteRequestSyncDMA(PSDHCD_DEVICE pDeviceContext, PSDREQUEST pRequest, SDIO_STATUS Status)
++{
++    unsigned long flags;
++    DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP HcdCompleteRequest - enter, status: %d, count: %d\n",
++              Status, pDeviceContext->CompletionCount));
++
++    /* disable the DMA and the EOC interrupts */
++    local_irq_save(flags);
++    pDeviceContext->CompletionCount++;
++    DBG_ASSERT_WITH_MSG(pDeviceContext->CompletionCount < 3, "SDIO OMAP: HcdCompleteRequest completion count bad!")
++    DBG_ASSERT_WITH_MSG(Status != SDIO_STATUS_PENDING, "SDIO OMAP: HcdCompleteRequest completion still pending status!")
++    DBG_ASSERT_WITH_MSG(pRequest != NULL, "SDIO OMAP: HcdCompleteRequest completion NULL pRequest!")
++    if (((pDeviceContext->CompletionCount == 2) && (IS_SDREQ_DATA_TRANS(pRequest->Flags)))  ||
++        ((pDeviceContext->CompletionCount >= 1) && (!IS_SDREQ_DATA_TRANS(pRequest->Flags))) ||
++        !SDIO_SUCCESS(Status)) {
++        local_irq_restore(flags);
++
++        if (pRequest != NULL) {
++                /* set the status */
++            pRequest->Status = Status;
++            DBG_PRINT(OMAP_TRACE_WORK, ("SDIO OMAP HcdCompleteRequest - queueing work from IRQ , status: %d\n", Status));
++                /* queue work item to notify bus driver of I/O completion */
++            QueueEventResponse(pDeviceContext, WORK_ITEM_IO_COMPLETE);
++        } else {
++            DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP HcdCompleteRequest - no request to report: status %d \n",
++                                           Status));
++        }
++    } else {
++        local_irq_restore(flags);
++    }
++}
++
++/*
++ * hcd_iocomplete_wqueue_handler - the work queue for io completion
++*/
++static void hcd_iocomplete_wqueue_handler(void *context)
++{
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    DBG_PRINT(OMAP_TRACE_REQUESTS, ("SDIO OMAP hcd_iocomplete_wqueue_handler \n"));
++    if (!pDeviceContext->OSInfo.ShuttingDown) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_TRANSFER_DONE);
++    }
++}
++
++/*
++ * hcd_carddetect_handler - the work queue for card detect debouncing
++*/
++static void hcd_carddetect_wqueue_handler(void *context)
++{
++
++#if 0 /* TODO */
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    HCD_EVENT event;
++
++    event = EVENT_HCD_ATTACH;
++    pDeviceContext->OSInfo.CardInserted = TRUE;
++    SDIO_HandleHcdEvent(&pDeviceContext->Hcd, event);
++#endif
++}
++
++/*
++ * hcd_sdioirq_handler - the work queue for handling SDIO IRQ
++*/
++static void hcd_sdioirq_wqueue_handler(void *context)
++{
++    PSDHCD_DEVICE pDeviceContext = (PSDHCD_DEVICE)context;
++    DBG_PRINT(OMAP_TRACE_SDIO_INT, ("SDIO OMAP: hcd_sdioirq_wqueue_handler \n"));
++    if (!pDeviceContext->OSInfo.ShuttingDown) {
++        SDIO_HandleHcdEvent(&pDeviceContext->Hcd, EVENT_HCD_SDIO_IRQ_PENDING);
++    }
++}
++
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  UnmaskIrq - Unmask SD interrupts
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 UnmaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr)
++{
++    UINT16 ints;
++    UINT16 ints2;
++    /* protected read-modify-write */
++    if (!FromIsr) {
++        spin_lock_irq(&pDevice->OSInfo.AddressSpinlock);
++    }
++    ints = READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE);
++    ints2 = ints;
++    ints |= Mask;
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE, ints);
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP: UnmaskIrq ints: 0x%x, Mask: 0x%X, ints2: 0x%x, rge: 0x%X\n",
++        ints, Mask, ints2, READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE)));
++    if (!FromIsr) {
++        spin_unlock_irq(&pDevice->OSInfo.AddressSpinlock);
++    }
++    return ints;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  MaskIrq - Mask SD interrupts
++  Input:    pDevice - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++UINT16 MaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr)
++{
++    UINT16 ints;
++    UINT16 ints2;
++    /* protected read-modify-write */
++    if (!FromIsr) {
++        spin_lock_irq(&pDevice->OSInfo.AddressSpinlock);
++    }
++    ints = READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE);
++    ints2 = ints;
++    ints &= ~Mask;
++    WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE, ints);
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP: MaskIrq ints: 0x%x, Mask: 0x%X, ints2: 0x%x, rge: 0x%X\n",
++        ints, Mask, ints2, READ_HOST_REG16(pDevice, OMAP_REG_MMC_INTERRUPT_ENABLE)));
++    if (!FromIsr) {
++        spin_unlock_irq(&pDevice->OSInfo.AddressSpinlock);
++    }
++    return ints;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetDefaults - get the user modifiable data items
++  Input:    pDevice - host controller instance
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void GetDefaults(PSDHCD_DEVICE pDevice)
++{
++    //can't change this dynanmically: pDeviceContext->OSInfo.BaseClock = BaseClock;
++    pDevice->TimeOut = timeout;
++    pDevice->DataTimeOut = data_timeout;
++    pDevice->ClockSpinLimit = clock_spin_limit;
++}
++
++/*
++ * SetPowerLevel - OS dependent set power
++*/
++SDIO_STATUS SetPowerLevel(PSDHCD_DEVICE pDevice, BOOL On, SLOT_VOLTAGE_MASK Level)
++{
++    return SDIO_STATUS_SUCCESS;
++
++}
++
++/* platform-specific write protect switch test */
++BOOL WriteProtectSwitchOn(PSDHCD_DEVICE pDevice)
++{
++        /* TODO if write protect is implemented and is set, return TRUE */
++    return FALSE;
++}
++
++/* micro second delay */
++void MicroDelay(INT Microseconds)
++{
++    udelay(Microseconds);
++}
++
++
++/*
++ * module init
++*/
++static int __init sdio_local_hcd_init(void) {
++    SDIO_STATUS status;
++
++    REL_PRINT(SDDBG_TRACE, ("+SDIO OMAP HCD: loaded\n"));
++
++    SDLIST_INIT(&HcdContext.DeviceList);
++    status = SemaphoreInitialize(&HcdContext.DeviceListSem, 1);
++    if (!SDIO_SUCCESS(status)) {
++       return SDIOErrorToOSError(status);
++    }
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    status = SDIO_BusAddOSDevice(&HcdContext.Driver.Dma, &HcdContext.Driver.HcdDriver, &HcdContext.Driver.HcdDevice);
++    return SDIOErrorToOSError(status);
++#else
++    SetupTranceiver();
++    /* 2.4 */
++    return Probe(NULL, NULL);
++#endif
++}
++
++/*
++ * module cleanup
++*/
++static void __exit sdio_local_hcd_cleanup(void) {
++    REL_PRINT(SDDBG_TRACE, ("+SDIO OMAP HCD: unloaded\n"));
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
++    SDIO_BusRemoveOSDevice(&HcdContext.Driver.HcdDriver, &HcdContext.Driver.HcdDevice);
++#else
++    /* 2.4 */
++    Remove(NULL);
++    CleanupTranceiver();
++#endif
++    DBG_PRINT(SDDBG_TRACE, ("-SDIO OMAP HCD: leave sdio_local_hcd_cleanup\n"));
++}
++
++MODULE_LICENSE("GPL");
++MODULE_DESCRIPTION(DESCRIPTION);
++MODULE_AUTHOR(AUTHOR);
++
++module_init(sdio_local_hcd_init);
++module_exit(sdio_local_hcd_cleanup);
++
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_os_2_6.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_hcd_os_2_6.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,731 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd_os_2_6.c
++
++ at abstract: Linux OMAP native SDIO Host Controller Driver, 2.6 and higher
++
++#notes: includes initialization and DMA code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#include <linux/sdio/ctsystem.h>
++#include "sdio_omap_hcd.h"
++#include <linux/fs.h>
++#include <linux/ioport.h>
++#include <asm/io.h>
++#include <asm/uaccess.h>
++#include <linux/workqueue.h>
++#include <linux/delay.h>
++
++#include <asm/mach-types.h>
++#include <asm/arch/dma.h>
++#include <asm/arch/mux.h>
++#include <linux/dma-mapping.h>
++#include <asm/arch/board.h>
++#include <asm/arch/gpio.h>
++#include <asm/arch/menelaus.h>
++#include <asm/arch/clock.h>
++
++extern INT gpiodebug;
++extern INT noDMA;
++extern SDHCD_DRIVER_CONTEXT HcdContext;
++extern int clk_safe(struct clk *clk);
++
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r);
++static void setupOmapDma(PSDHCD_DEVICE pDevice,
++                         int           Length,
++                         DMA_ADDRESS   DmaAddress,
++                         BOOL          RX);
++static void SD_DMACompleteCallback(int Channel, u16 DMAStatus, PVOID pContext);
++
++void ToggleGPIOPin(PSDHCD_DEVICE pDevice, INT PinNo)
++{
++    if (!gpiodebug) {
++        return;
++    }
++
++    switch (PinNo) {
++        case DBG_GPIO_PIN_1:
++            omap_set_gpio_dataout(16,TRUE);
++            omap_set_gpio_dataout(16,FALSE);
++            break;
++        case DBG_GPIO_PIN_2:
++            break;
++        default:
++            break;
++    }
++}
++
++
++#define OMAP_CONTROL_PADCONF_BASE_ADDRESS 0x48000000
++#define OMAP_CONTROL_PADCONF_SIZE 0x0400
++#define OMAP_PAD_PULLUPDWN_ENABLE (1 << 3)
++#define OMAP_PAD_PULLUP_TYPE      (1 << 4)
++#define OMAP_PAD_PULLDOWN_TYPE    (0 << 4)
++
++void OmapPadConfig(UINT32 Offset, UINT8 BitPos, UINT8 PadValue)
++{
++    UINT32 value;
++    UINT32 padConfig = (UINT32)ioremap(OMAP_CONTROL_PADCONF_BASE_ADDRESS,
++                               OMAP_CONTROL_PADCONF_SIZE);
++
++    value = readl(padConfig+Offset);
++    value &= ~((UINT32)0xff << BitPos);
++    value |= (UINT32)PadValue << BitPos;
++    writel(value,padConfig+Offset);
++}
++
++
++/*
++ * MapAddress - maps I/O address
++*/
++static SYSTEM_STATUS MapAddress(PSDHCD_MEMORY pMap, PTEXT pDescription) {
++
++    if (request_mem_region(pMap->Raw, pMap->Length, pDescription) == NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Local HCD: MapAddress - memory in use\n"));
++        return -EBUSY;
++    }
++    pMap->pMapped = ioremap_nocache(pMap->Raw, pMap->Length);
++    if (pMap->pMapped == NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP Local HCD: MapAddress - unable to map memory\n"));
++        /* cleanup region */
++        release_mem_region(pMap->Raw, pMap->Length);
++        return -EFAULT;
++    }
++    return 0;
++}
++
++/*
++ * UnmapAddress - unmaps the address
++*/
++static void UnmapAddress(PSDHCD_MEMORY pMap) {
++    iounmap(pMap->pMapped);
++    release_mem_region(pMap->Raw, pMap->Length);
++    pMap->pMapped = NULL;
++}
++
++SDIO_STATUS SlotEnableControl(BOOL Enable)
++{
++    int value;
++    SDIO_STATUS status = SDIO_STATUS_ERROR;
++
++    do {
++        value = menelaus_read(MENELAUS_LDO_CTRL7);
++        if (value == -1) {
++            DBG_ASSERT(FALSE);
++            break;
++        }
++        if (Enable) {
++            value |= 0x03;
++        } else {
++            value &= ~0x03;
++        }
++        value = menelaus_write(value, MENELAUS_LDO_CTRL7);
++        if (value == -1) {
++            DBG_ASSERT(FALSE);
++            break;
++        }
++
++        value = menelaus_read(MENELAUS_MCT_CTRL3);
++        if (value == -1) {
++            DBG_ASSERT(FALSE);
++            break;
++        }
++        if (Enable) {
++            value |= 0x01;
++        } else {
++            value &= ~0x01;
++        }
++        value = menelaus_write(value, MENELAUS_MCT_CTRL3);
++        if (value == -1) {
++            DBG_ASSERT(FALSE);
++            break;
++        }
++
++
++        status = SDIO_STATUS_SUCCESS;
++    } while (FALSE);
++
++    return status;
++}
++/*
++ * unsetup the OMAP registers
++*/
++void DeinitOmap(PSDHCD_DEVICE pDevice)
++{
++
++    if (pDevice->OSInfo.InitStateMask & SDIO_IRQ_INTERRUPT_INIT) {
++        disable_irq(pDevice->OSInfo.Interrupt);
++        free_irq(pDevice->OSInfo.Interrupt, pDevice);
++        pDevice->OSInfo.InitStateMask &= ~SDIO_IRQ_INTERRUPT_INIT;
++    }
++
++        /* deallocate DMA buffer  */
++    if (pDevice->OSInfo.pDmaBuffer != NULL) {
++        dma_free_coherent(&pDevice->OSInfo.pBusDevice->dev,
++                          pDevice->OSInfo.CommonBufferSize,
++                          pDevice->OSInfo.pDmaBuffer,
++                          pDevice->OSInfo.hDmaBuffer);
++        pDevice->OSInfo.pDmaBuffer = NULL;
++    }
++
++    if (pDevice->OSInfo.DmaRxChannel != -1) {
++        omap_free_dma(pDevice->OSInfo.DmaRxChannel);
++        pDevice->OSInfo.DmaRxChannel = -1;
++    }
++
++    if (pDevice->OSInfo.DmaTxChannel != -1) {
++        omap_free_dma(pDevice->OSInfo.DmaTxChannel);
++        pDevice->OSInfo.DmaTxChannel = -1;
++    }
++
++    if (pDevice->OSInfo.InitStateMask & SDIO_BASE_MAPPED) {
++        pDevice->OSInfo.InitStateMask &= ~SDIO_BASE_MAPPED;
++        UnmapAddress(&pDevice->OSInfo.Address);
++    }
++
++    SlotEnableControl(FALSE);
++}
++
++void FifoTxTest(PSDHCD_DEVICE pDevice)
++{
++    INT     dataCopy = 1000;
++    volatile UINT16 *pFifo;
++
++    pFifo = (volatile UINT16 *)((UINT32)GET_HC_REG_BASE(pDevice) + OMAP_REG_MMC_DATA_ACCESS);
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: FifoTest (0x%X) \n", (UINT)pFifo));
++
++
++    while (dataCopy) {
++        *pFifo = (UINT16)dataCopy;
++        dataCopy--;
++    }
++
++    DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: FifoTest Done\n"));
++}
++
++/*
++ * setup the OMAP registers
++*/
++SDIO_STATUS InitOmap(PSDHCD_DEVICE pDevice, UINT deviceNumber)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    ULONG       baseAddress;
++    int         err;
++    struct      clk *clksrc;
++
++    do {
++
++        pDevice->OSInfo.Interrupt = INT_MMC_IRQ;
++        baseAddress = OMAP_BASE_ADDRESS1;
++        pDevice->OSInfo.DmaRxId = OMAP_DMA_MMC1_RX;
++        pDevice->OSInfo.DmaTxId = OMAP_DMA_MMC1_TX;
++        pDevice->OSInfo.DmaRxChannel = -1;
++        pDevice->OSInfo.DmaTxChannel = -1;
++
++        SlotEnableControl(TRUE);
++
++        clksrc = clk_get(NULL,"mmc_ick");
++        if (NULL == clksrc) {
++            DBG_ASSERT(FALSE);
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        clk_use(clksrc);
++
++        clksrc = clk_get(NULL,"mmc_fck");
++        if (NULL == clksrc) {
++            DBG_ASSERT(FALSE);
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++        clk_use(clksrc);
++        clk_safe(clksrc);
++
++
++        if (!noDMA) {
++            UINT32 gcrVal;
++
++            gcrVal = readl(OMAP_DMA4_GCR_REG);
++            DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: DMA4_GCR : 0x%X \n",gcrVal));
++            gcrVal &= ~0xff;
++            gcrVal |= 64;
++            writel(gcrVal, OMAP_DMA4_GCR_REG);
++            DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: DMA4_GCR reread: 0x%X \n",readl(OMAP_DMA4_GCR_REG)));
++                /* allocate a DMA buffer larger enough for the command buffers and the data buffers */
++            pDevice->OSInfo.pDmaBuffer =  dma_alloc_coherent(&pDevice->OSInfo.pBusDevice->dev,
++                                                             pDevice->OSInfo.CommonBufferSize,
++                                                             &pDevice->OSInfo.hDmaBuffer,
++                                                             GFP_DMA);
++            DBG_PRINT(SDDBG_TRACE, ("SDIO OMAP HCD: InitOmap - pDmaBuffer: 0x%X, hDmaBuffer: 0x%X Size:%d\n",
++                (UINT)pDevice->OSInfo.pDmaBuffer ,
++                (UINT)pDevice->OSInfo.hDmaBuffer,
++                pDevice->OSInfo.CommonBufferSize));
++
++            if (pDevice->OSInfo.pDmaBuffer == NULL) {
++                DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: InitOmap - unable to get DMA buffer\n"));
++                status =  SDIO_STATUS_NO_RESOURCES;
++                break;
++            }
++
++            pDevice->DmaCapable = TRUE;
++                /* tell upper drivers that we support direct DMA */
++            pDevice->Hcd.pDmaDescription = &HcdContext.Driver.Dma;
++
++        }
++
++        if (gpiodebug) {
++              /* setup GPIO 16 */
++#define CONTROL_PADCONF_Y11       0x00E8
++            OmapPadConfig(CONTROL_PADCONF_Y11,
++                          0,
++                          0x3 | OMAP_PAD_PULLUPDWN_ENABLE | OMAP_PAD_PULLUP_TYPE);
++            omap_set_gpio_direction(16, OMAP24XX_DIR_OUTPUT);
++            omap_set_gpio_dataout(16,FALSE);
++        }
++
++        err = omap_request_dma(pDevice->OSInfo.DmaRxId,
++                               "SDIO TX",
++                               SD_DMACompleteCallback,
++                               pDevice,
++                               &pDevice->OSInfo.DmaRxChannel);
++
++        if (err < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: OmapInit, unable to get RX DMA channel, %d\n",err));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        err = omap_request_dma(pDevice->OSInfo.DmaTxId,
++                               "SDIO TX",
++                               SD_DMACompleteCallback,
++                               pDevice,
++                               &pDevice->OSInfo.DmaTxChannel);
++
++        if (err < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: OmapInit, unable to get TX DMA channel, %d\n",err));
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++            /* map the memory address for the control registers */
++        pDevice->OSInfo.Address.pMapped = (PVOID)IO_ADDRESS(baseAddress);
++        pDevice->OSInfo.Address.Raw = baseAddress;
++        pDevice->OSInfo.Address.Length = OMAP_BASE_LENGTH;
++        if (MapAddress(&pDevice->OSInfo.Address, "SDHC Regs") < 0) {
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++        DBG_PRINT(SDDBG_TRACE,
++               ("SDIO OMAP - InitOMAP I/O Virt:0x%X Phys:0x%X\n",
++               (UINT)pDevice->OSInfo.Address.pMapped, (UINT)pDevice->OSInfo.Address.Raw));
++
++        //FifoTxTest(pDevice);
++
++        pDevice->OSInfo.InitStateMask |= SDIO_BASE_MAPPED;
++
++
++                /* map the controller interrupt, we map it to each device.
++                   Interrupts can be called from this point on */
++        err = request_irq(pDevice->OSInfo.Interrupt, hcd_sdio_irq, 0,
++                          "OMAP HCD", pDevice);
++        if (err < 0) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO OMAP HCD: OmapInit, unable to map interrupt \n"));
++            err = -ENODEV;
++            status = SDIO_STATUS_NO_RESOURCES;
++            break;
++        }
++
++        pDevice->OSInfo.InitStateMask |= SDIO_IRQ_INTERRUPT_INIT;
++
++    } while (FALSE);
++
++    if (!SDIO_SUCCESS(status)) {
++        DeinitOmap(pDevice);
++    }
++
++    return status;
++}
++
++void SetupTXCommonBufferDMATransfer(PSDHCD_DEVICE pDevice, PSDREQUEST pReq)
++{
++    UINT32 length;
++        /* adjust length */
++    length = min(pDevice->OSInfo.CommonBufferSize,
++                 pReq->DataRemaining);
++        /* copy to common buffer */
++    memcpy(pDevice->OSInfo.pDmaBuffer, pReq->pHcdContext, length);
++        /* adjust where we are */
++    pReq->pHcdContext = (PUCHAR)pReq->pHcdContext + length;
++    pReq->DataRemaining -= length;
++        /* setup this chunk */
++    setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,FALSE);
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("SDIO OMAP TX Common Buffer DMA,  This Transfer: %d, Remaining:%d\n",
++        length,pReq->DataRemaining));
++}
++/*
++ *  DMA transmit complete callback
++*/
++static void SD_DMACompleteCallback(int Channel, u16 DMAStatus, PVOID pContext)
++{
++    PSDHCD_DEVICE pDevice = (PSDHCD_DEVICE)pContext;
++    SDIO_STATUS   status = SDIO_STATUS_PENDING;
++    PSDREQUEST    pReq;
++
++    pReq = GET_CURRENT_REQUEST(&pDevice->Hcd);
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++            ("SDIO OMAP SD_DMACompleteCallback (%s)- DMAStatus: 0x%X, lch: %d \n",
++               IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",(UINT)status, Channel));
++    do {
++
++        if (DMAStatus == OMAP_DMA_SYNC_IRQ) {
++                /* only a synch int, ignore it */
++            break;
++        }
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++            DBG_ASSERT(pDevice->OSInfo.pDmaList != NULL);
++            DBG_ASSERT(pDevice->OSInfo.SGcount != 0);
++                /* unmap scatter gather */
++            dma_unmap_sg(pDevice->Hcd.pDevice,
++                         pDevice->OSInfo.pDmaList,
++                         pDevice->OSInfo.SGcount,
++                         IS_SDREQ_WRITE_DATA(pReq->Flags) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++            pDevice->OSInfo.pDmaList = NULL;
++            pDevice->OSInfo.SGcount = 0;
++        }
++
++            /* handle errors */
++        if (DMAStatus & (OMAP_DMA_TOUT_IRQ | OMAP_DMA_DROP_IRQ)) {
++            status = SDIO_STATUS_DEVICE_ERROR;
++            break;
++        }
++
++            /* no DMA errors */
++        status = SDIO_STATUS_SUCCESS;
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++                /* nothing more to do */
++            break;
++        }
++
++            /* handle common buffer DMA */
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            if (pReq->DataRemaining) {
++                    /* send the next chunk */
++                SetupTXCommonBufferDMATransfer(pDevice,pReq);
++                status = SDIO_STATUS_PENDING;
++                break;
++            }
++        } else {
++            UINT32 length;
++
++            memcpy(pReq->pHcdContext, pDevice->OSInfo.pDmaBuffer, pDevice->OSInfo.LastTransfer);
++                /* adjust where we are */
++            pReq->pHcdContext = (PUCHAR)pReq->pHcdContext + pDevice->OSInfo.LastTransfer;
++            pReq->DataRemaining -= pDevice->OSInfo.LastTransfer;
++                /* set up next transfer */
++            length = min(pDevice->OSInfo.CommonBufferSize,
++                         pReq->DataRemaining);
++            if (length) {
++                DBG_PRINT(OMAP_TRACE_DATA,
++                    ("SDIO OMAP RX Common Buffer DMA,  Pending Transfer: %d, Remaining:%d\n",
++                            length, pReq->DataRemaining));
++                setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,TRUE);
++                pDevice->OSInfo.LastTransfer = length;
++                status = SDIO_STATUS_PENDING;
++                break;
++            }
++        }
++    } while (FALSE);
++
++    if (status != SDIO_STATUS_PENDING) {
++            /* call callback */
++        pDevice->OSInfo.pTransferCompletion(pDevice->OSInfo.TransferContext, status, TRUE);
++    }
++
++}
++
++
++void DumpDMASettings(PSDHCD_DEVICE pDevice, BOOL TX)
++{
++    int channel = TX ? pDevice->OSInfo.DmaTxChannel : pDevice->OSInfo.DmaRxChannel;
++
++    DBG_PRINT(SDDBG_TRACE, ("OMAP DMA Reg Dump (%s) Channel:0x%X, DMAREQ:%d \n",
++             TX ? "Transmit":"Receive", channel,
++             TX ? pDevice->OSInfo.DmaTxId:pDevice->OSInfo.DmaRxId));
++    DBG_PRINT(SDDBG_TRACE, ("  CCR       : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CCR_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CLNK_CTRL : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CLNK_CTRL_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CICR      : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CICR_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSR       : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CSR_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSDP      : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CSDP_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CEN       : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CEN_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CFN       : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CFN_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSSA      : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CSSA_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CDSA      : 0x%X \n",_READ_DWORD_REG(OMAP_DMA4_CDSA_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSEI      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CSEI_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSFI      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CSFI_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CDEI      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CDEI_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CDFI      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CDFI_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CSAC      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CSAC_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CDAC      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CDAC_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CCEN     : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CCEN_REG(channel))));
++    DBG_PRINT(SDDBG_TRACE, ("  CCFN      : 0x%X \n", _READ_DWORD_REG(OMAP_DMA4_CCFN_REG(channel))));
++
++}
++
++#define FIFO_SYNC_BLOCK_SIZE (OMAP_MMC_FIFO_SIZE/2)  /* sync set to 1/2 full/empty*/
++
++/* setup DMA for transfer */
++static void setupOmapDma(PSDHCD_DEVICE pDevice,
++                         int           Length,
++                         DMA_ADDRESS   SystemAddress,
++                         BOOL          RX)
++{
++    INT  fifoLen;
++    INT  cen,cfn;
++    int channel = RX ? pDevice->OSInfo.DmaRxChannel : pDevice->OSInfo.DmaTxChannel;
++    BOOL burstEnable = FALSE;
++    UINT32 csdp;
++
++    UINT32 address = pDevice->OSInfo.Address.Raw + OMAP_REG_MMC_DATA_ACCESS;
++
++    if (Length == (FIFO_SYNC_BLOCK_SIZE * (Length/FIFO_SYNC_BLOCK_SIZE))) {
++            /* multiple of fifo synch size */
++        cen = FIFO_SYNC_BLOCK_SIZE>>1;
++        cfn = (Length/FIFO_SYNC_BLOCK_SIZE);
++        fifoLen = 0xF; /* threshold set to 32 bytes which is half way on the FIFOs */
++            /* enable bursting since we are nicely divisible by a FIFO size */
++        burstEnable = TRUE;
++    } else {
++        if (Length < FIFO_SYNC_BLOCK_SIZE) {
++            cen = Length>>1;
++            cfn = 1;
++            fifoLen = (Length>>1)-1;
++            fifoLen = (fifoLen < 0) ? 0 : fifoLen;
++        } else {
++            if (Length == (8 * (Length/8))) {
++                cen = 1;
++                cfn = (Length+1)>>1;
++                fifoLen = 0;
++            } else {
++                cen = 1;
++                cfn = (Length+1)>>1;
++                fifoLen = 0;
++            }
++        }
++    }
++
++    omap_set_dma_transfer_params(channel,
++                                 OMAP_DMA_DATA_TYPE_S16,
++                                 cen,
++                                 cfn,
++                                 OMAP_DMA_SYNC_BLOCK,
++                                 RX ? pDevice->OSInfo.DmaRxId : pDevice->OSInfo.DmaTxId,
++                                 RX ? TRUE : FALSE);
++
++
++    if (RX) {
++        omap_set_dma_src_params(channel,
++                                OMAP_DMA_AMODE_CONSTANT,
++                                (int)address,
++                                0,
++                                0);
++
++        omap_set_dma_dest_params(channel,
++                                 OMAP_DMA_AMODE_POST_INC,
++                                 SystemAddress,
++                                 0,
++                                 0);
++    } else {
++
++            /* source is system memory */
++        omap_set_dma_src_params(channel,
++                                OMAP_DMA_AMODE_POST_INC,
++                                (int)SystemAddress,
++                                0,
++                                0);
++
++        omap_set_dma_dest_params(channel,
++                                OMAP_DMA_AMODE_CONSTANT,
++                                (int)address,
++                                0,
++                                0);
++    }
++
++    DBG_PRINT(OMAP_TRACE_DATA, ("OMAP DMA channel sync ID: %d \n",
++             (RX) ? pDevice->OSInfo.DmaRxId : pDevice->OSInfo.DmaTxId));
++
++
++    if (DBG_GET_DEBUG_LEVEL() >= OMAP_TRACE_DMA_DUMP) {
++        DumpDMASettings(pDevice, RX ? FALSE:TRUE);
++    }
++
++    csdp = readl(OMAP_DMA4_CSDP_REG(channel));
++        /* clear previous burst settings */
++    csdp &= ~((0x3 << 7) | (0x3 << 14) | (1 << 13) | (1 << 6));
++
++    if (burstEnable) {
++        csdp |= (0x2 << 7) | (0x2 << 14) | (1 << 13) | (1 << 6); /* 32 byte burst enable */
++    }
++
++    writel(csdp, OMAP_DMA4_CSDP_REG(channel));
++
++    if (RX) {
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, OMAP_REG_MMC_BUFFER_CONFIG_RXDE |
++                        ((fifoLen << OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT) & OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK));
++    } else {
++        WRITE_HOST_REG16(pDevice, OMAP_REG_MMC_BUFFER_CONFIG, OMAP_REG_MMC_BUFFER_CONFIG_TXDE |
++                        ((fifoLen << OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT) & OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK));
++    }
++        /* start */
++    omap_start_dma(channel);
++}
++
++SDIO_STATUS CheckDMA(PSDHCD_DEVICE pDevice,
++                     PSDREQUEST    pReq)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++
++    do {
++
++        if ((OMAP_DMA_COMMON == pDevice->DmaMode) &&
++            (pReq->DataRemaining & 0x1)) {
++                /* DMA requires WORD alignment, tell caller to punt it to PIO mode */
++            status = SDIO_STATUS_UNSUPPORTED;
++            break;
++        }
++
++        if (OMAP_DMA_SG == pDevice->DmaMode) {
++                /* doing direct DMA */
++            if  (pReq->DescriptorCount > 1) {
++                DBG_ASSERT(FALSE);
++                status = SDIO_STATUS_INVALID_PARAMETER;
++                break;
++            }
++        }
++    } while (FALSE);
++
++    return status;
++}
++
++SDIO_STATUS SetUpHCDDMA(PSDHCD_DEVICE            pDevice,
++                        PSDREQUEST               pReq,
++                        PDMA_TRANSFER_COMPLETION pCompletion,
++                        PVOID                    pContext)
++{
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++    UINT32 length = pReq->DataRemaining;
++    PSDDMA_DESCRIPTOR pDesc = NULL;
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("+SDIO OMAP SetUpHCDDMA: length: %d\n",length));
++
++    do {
++
++        pDevice->OSInfo.pTransferCompletion = pCompletion;
++        pDevice->OSInfo.TransferContext = pContext;
++
++        if (OMAP_DMA_COMMON == pDevice->DmaMode) {
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                SetupTXCommonBufferDMATransfer(pDevice,pReq);
++            } else {
++                length = min(pDevice->OSInfo.CommonBufferSize,
++                             pReq->DataRemaining);
++                setupOmapDma(pDevice, length, pDevice->OSInfo.hDmaBuffer,TRUE);
++                pDevice->OSInfo.LastTransfer = length;
++            }
++            break;
++        }
++
++            /* setup scatter gather */
++        DBG_ASSERT(pDesc != NULL);
++            /* map DMA */
++        dma_map_sg(pDevice->Hcd.pDevice,
++                   pDesc,
++                   pReq->DescriptorCount,
++                   IS_SDREQ_WRITE_DATA(pReq->Flags) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
++
++        pDevice->OSInfo.pDmaList = pDesc;
++        pDevice->OSInfo.SGcount = pReq->DescriptorCount;
++        DBG_PRINT(OMAP_TRACE_DATA,
++          ("SDIO OMAP SetUpHCDDMA, Direct DMA  dma_address:0x%X\n", (UINT32)sg_dma_address(pDesc)));
++
++        setupOmapDma(pDevice,
++                     length,
++                     sg_dma_address(pDesc),
++                     IS_SDREQ_WRITE_DATA(pReq->Flags) ? FALSE : TRUE);
++
++    } while (FALSE);
++
++    DBG_PRINT(OMAP_TRACE_DATA,
++        ("-SDIO OMAP SetUpHCDDMA: status %d\n",status));
++
++    return status;
++}
++
++/*
++ * SDCancelTransfer - stop DMA transfer
++*/
++void SDCancelDMATransfer(PSDHCD_DEVICE pDevice)
++{
++    DBG_PRINT(OMAP_TRACE_DATA, ("SDIO OMAP SDCancelDMATransfer\n"));
++    if (pDevice->OSInfo.DmaRxChannel != -1) {
++        omap_stop_dma(pDevice->OSInfo.DmaRxChannel);
++    }
++    if (pDevice->OSInfo.DmaTxChannel != -1) {
++        omap_stop_dma(pDevice->OSInfo.DmaTxChannel);
++    }
++}
++
++/* SDIO interrupt request */
++static irqreturn_t hcd_sdio_irq(int irq, void *context, struct pt_regs * r)
++{
++    irqreturn_t retStat;
++
++    DBG_PRINT(OMAP_TRACE_MMC_INT, ("SDIO OMAP SDIO IRQ \n"));
++
++        /* call OS independent ISR */
++    if (HcdSDInterrupt((PSDHCD_DEVICE)context)) {
++        retStat = IRQ_HANDLED;
++    } else {
++        retStat = IRQ_NONE;
++    }
++    return retStat;
++}
+Index: linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_omap_hcd.h
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/omap_2420/sdio_omap_hcd.h	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,370 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_pmap_hcd.h
++
++ at abstract: include file for OMAP native MMC/SD host controller, OS independent code
++
++ at notice: Copyright (c), 2004-2006 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#ifndef __SDIO_OMAP_HCD_H___
++#define __SDIO_OMAP_HCD_H___
++
++#include <linux/sdio/ctsystem.h>
++
++#include <linux/sdio/sdio_busdriver.h>
++#include <linux/sdio/_sdio_defs.h>
++#include <linux/sdio/sdio_lib.h>
++#include "sdio_hcd_linux.h"
++
++enum OMAP_TRACE_ENUM {
++    OMAP_TRACE_CARD_INSERT = (SDDBG_TRACE + 1),
++    OMAP_TRACE_SDIO_INT = (SDDBG_TRACE + 2),
++    OMAP_TRACE_WORK,
++    OMAP_TRACE_REQUESTS,
++    OMAP_TRACE_DATA,
++    OMAP_TRACE_DMA_DUMP,
++    OMAP_TRACE_CONFIG,
++    OMAP_TRACE_MMC_INT,
++    OMAP_TRACE_CLOCK,
++    OMAP_TRACE_LAST
++};
++
++#define OMAP_TRACE_BUSY  OMAP_TRACE_DATA
++
++#define OMAP_MAX_BYTES_PER_BLOCK  2048
++#define OMAP_MAX_BLOCKS           2048
++#define OMAP_DEFAULT_CURRENT      500
++#define OMAP_DEFAULT_CMD_TIMEOUT  64
++#define OMAP_DEFAULT_DATA_TIMEOUT 400000
++
++#define OMAP_MMC_FIFO_SIZE           64
++/* almost full, for RX */
++#define OMAP_MMC_AFL_FIFO_THRESH     32 //62
++ /* almost empty, for TX */
++#define OMAP_MMC_AEL_FIFO_THRESH     32 // 2
++#define OMAP_MAX_SHORT_TRANSFER_SIZE 16
++
++#define OMAP_REG_MMC_CMD                    0x00
++    #define OMAP_REG_MMC_CMD_DDIR_READ           (1<<15)
++    #define OMAP_REG_MMC_CMD_DDIR_WRITE          (0)
++    #define OMAP_REG_MMC_CMD_STREAM_MODE_NORMAL  (0)
++    #define OMAP_REG_MMC_CMD_TYPE_BC             (0)
++    #define OMAP_REG_MMC_CMD_TYPE_BCR            (1<<12)
++    #define OMAP_REG_MMC_CMD_TYPE_AC             (2<<12)
++    #define OMAP_REG_MMC_CMD_TYPE_ADTC           (3<<12)
++    #define OMAP_REG_MMC_CMD_R1BUSY              (1<<11)
++    #define OMAP_REG_MMC_CMD_NORESPONSE          (0)
++    #define OMAP_REG_MMC_CMD_R1                  (1<<8)
++    #define OMAP_REG_MMC_CMD_R2                  (2<<8)
++    #define OMAP_REG_MMC_CMD_R3                  (3<<8)
++    #define OMAP_REG_MMC_CMD_R4                  (4<<8)
++    #define OMAP_REG_MMC_CMD_R5                  (5<<8)
++    #define OMAP_REG_MMC_CMD_R6                  (6<<8)
++    #define OMAP_REG_MMC_CMD_INAB                (1<<7)
++    #define OMAP_REG_MMC_CMD_CTO_DTO             (1<<6)
++    #define OMAP_REG_MMC_CMD_MASK                (0x3F)
++
++
++#define OMAP_REG_MMC_ARG_LOW                0x04
++#define OMAP_REG_MMC_ARG_HI                 0x08
++
++#define OMAP_REG_MMC_MODULE_CONFIG          0x0C
++    #define OMAP_REG_MMC_MODULE_CONFIG_4BIT      (1<<15)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_MMCSD (0<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_SPI  (1<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_MODE_TEST (2<<12)
++    #define OMAP_REG_MMC_MODULE_CONFIG_PWRON     (1<<11)
++    #define OMAP_REG_MMC_MODULE_CONFIGE_BE       (1<<10)
++    #define OMAP_REG_MMC_MODULE_CONFIG_CLK_MASK  (0x3FF)
++
++#define OMAP_REG_MMC_MODULE_STATUS          0x10
++    #define OMAP_REG_MMC_MODULE_STATUS_CERR      (1<<14)
++    #define OMAP_REG_MMC_MODULE_STATUS_CIRQ      (1<<13)
++    #define OMAP_REG_MMC_MODULE_STATUS_OCRB      (1<<12)
++    #define OMAP_REG_MMC_MODULE_STATUS_AE        (1<<11)
++    #define OMAP_REG_MMC_MODULE_STATUS_AF        (1<<10)
++    #define OMAP_REG_MMC_MODULE_STATUS_CRW       (1<<9)
++    #define OMAP_REG_MMC_MODULE_STATUS_CCRC      (1<<8)
++    #define OMAP_REG_MMC_MODULE_STATUS_CTO       (1<<7)
++    #define OMAP_REG_MMC_MODULE_STATUS_DCRC      (1<<6)
++    #define OMAP_REG_MMC_MODULE_STATUS_DTO       (1<<5)
++    #define OMAP_REG_MMC_MODULE_STATUS_EOFB      (1<<4)
++    #define OMAP_REG_MMC_MODULE_STATUS_BRS       (1<<3)
++    #define OMAP_REG_MMC_MODULE_STATUS_CB        (1<<2)
++    #define OMAP_REG_MMC_MODULE_STATUS_CD        (1<<1)
++    #define OMAP_REG_MMC_MODULE_STATUS_EOC       (1<<0)
++    #define OMAP_REG_MMC_MODULE_STATUS_ALL       (0x7FFF)
++    #define OMAP_REG_MMC_MODULE_STATUS_REQ_PROCESS \
++          ((~(OMAP_REG_MMC_MODULE_STATUS_CIRQ | OMAP_REG_MMC_MODULE_STATUS_CD\
++             )) & OMAP_REG_MMC_MODULE_STATUS_ALL)
++    #define OMAP_STATUS_CMD_PROCESSING_ERRORS \
++            (OMAP_REG_MMC_MODULE_STATUS_CERR | OMAP_REG_MMC_MODULE_STATUS_CTO | \
++            OMAP_REG_MMC_MODULE_STATUS_CCRC)
++    #define OMAP_STATUS_DATA_PROCESSING_ERRORS \
++            (OMAP_REG_MMC_MODULE_STATUS_DCRC | OMAP_REG_MMC_MODULE_STATUS_DTO)
++
++#define OMAP_REG_MMC_INTERRUPT_ENABLE       0x14
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CERR   (1<<14)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CIRQ   (1<<13)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_OCRB   (1<<12)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_AE     (1<<11)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_AF     (1<<10)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CRW    (1<<9)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CCRC   (1<<8)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CTO    (1<<7)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_DCRC   (1<<6)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_DTO    (1<<5)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB   (1<<4)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_BRS    (1<<3)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CB     (1<<2)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_CD     (1<<1)
++    #define OMAP_REG_MMC_INTERRUPT_ENABLE_EOC    (1<<0)
++    #define OMAP_REG_MMC_INTERRUPT_ALL_INT       (0x7FFF)
++    #define OMAP_REG_MMC_INTERRUPT_NONE_INT      (0)
++    #define OMAP_REG_MMC_INTERRUPT_ERRORS        (OMAP_REG_MMC_INTERRUPT_ENABLE_CCRC | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_CTO  | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_DCRC | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_DTO  | \
++                                                  OMAP_REG_MMC_INTERRUPT_ENABLE_CERR)
++    #define OMAP_REG_MMC_INTERRUPT_REQUESTS  (OMAP_REG_MMC_INTERRUPT_ERRORS | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_EOC | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_AF | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_AE | \
++                                              OMAP_REG_MMC_INTERRUPT_ENABLE_EOFB )
++
++#define OMAP_REG_MMC_CMD_TIMEOUT            0x18
++    /* low 8-bit valid */
++
++#define OMAP_REG_MMC_DATA_READ_TIMEOUT      0x1C
++    /* 16-bit */
++
++#define OMAP_REG_MMC_DATA_ACCESS            0x20
++    /* 16-bit */
++
++#define OMAP_REG_MMC_BLOCK_LENGTH           0x24
++    /* low 11-bit */
++
++#define OMAP_REG_MMC_BLOCK_COUNT            0x28
++    /* low 11-bit */
++
++#define OMAP_REG_MMC_BUFFER_CONFIG          0x2C
++    #define OMAP_REG_MMC_BUFFER_CONFIG_RXDE      (1<<15)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AFL_MASK  (0x1F00)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AFL_SHIFT (8)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_TXDE      (1<<7)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AEL_MASK  (0x1F)
++    #define OMAP_REG_MMC_BUFFER_CONFIG_AEL_SHIFT (0)
++
++#define OMAP_REG_MMC_SPI_CONFIG             0x30
++    #define OMAP_REG_MMC_SPI_CONFIG_STR          (1<<15)
++    #define OMAP_REG_MMC_SPI_CONFIG_WNR          (1<<14)
++    #define OMAP_REG_MMC_SPI_CONFIG_SODV         (1<<13)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSTR         (1<<12)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD05     (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD15     (1<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD25     (2<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSHOLD35     (3<<10)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS1        (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS2        (1<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS3        (2<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_TCSS4        (3<<8)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSEL         (1<<7)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS1          (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS2          (1<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS3          (2<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CS4          (3<<4)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSM          (1<<3)
++    #define OMAP_REG_MMC_SPI_CONFIG_CSD          (1<<2)
++    #define OMAP_REG_MMC_SPI_CONFIG_POL_RISE        (0)
++    #define OMAP_REG_MMC_SPI_CONFIG_POL_FALL        (1)
++
++#define OMAP_REG_MMC_SDIO_MODE_CONFIG       0x34
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C5E    (1<<15)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C14E   (1<<14)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C13E   (1<<13)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_C12E   (1<<12)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_D3PS   (1<<11)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_D3ES   (1<<10)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_CDWE   (1<<9)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_IWE    (1<<8)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_DCR4   (1<<7)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_XDTS   (1<<6)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_DPE    (1<<5)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_RW     (1<<4)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_CDE    (1<<2)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_RWE    (1<<1)
++    #define OMAP_REG_MMC_SDIO_MODE_CONFIG_IRQE   (1<<0)
++
++#define OMAP_REG_MMC_SYSTEM_TEST            0x38
++    #define OMAP_REG_MMC_SYSTEM_TEST_WAKD        (1<<15)
++    #define OMAP_REG_MMC_SYSTEM_TEST_SSB         (1<<14)
++    #define OMAP_REG_MMC_SYSTEM_TEST_RDYD        (1<<13)
++    #define OMAP_REG_MMC_SYSTEM_TEST_DDIR        (1<<12)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D3D         (1<<11)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D2D         (1<<10)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D1D         (1<<9)
++    #define OMAP_REG_MMC_SYSTEM_TEST_D0D         (1<<8)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CDIR        (1<<7)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CDAT        (1<<6)
++    #define OMAP_REG_MMC_SYSTEM_TEST_MCKD        (1<<5)
++    #define OMAP_REG_MMC_SYSTEM_TEST_SCKD        (1<<4)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS3D        (1<<3)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS2D        (1<<2)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS1D        (1<<1)
++    #define OMAP_REG_MMC_SYSTEM_TEST_CS0D        (1<<0)
++
++
++#define OMAP_REG_MMC_MODULE_REV             0x3C
++    #define OMAP_REG_MMC_MODULE_REV_MINOR_MASK   (0xF)
++    #define OMAP_REG_MMC_MODULE_REV_MINOR_SHIFT  (0)
++    #define OMAP_REG_MMC_MODULE_REV_MAJOR_MASK   (0xF0)
++    #define OMAP_REG_MMC_MODULE_REV_MAJOR_SHIFT  (4)
++
++#define OMAP_REG_MMC_CMD_RESPONSE0          0x40
++    /* response bits 15-0 */
++#define OMAP_REG_MMC_CMD_RESPONSE1          0x44
++    /* response bits 31-16 */
++#define OMAP_REG_MMC_CMD_RESPONSE2          0x48
++    /* response bits 47-32 */
++#define OMAP_REG_MMC_CMD_RESPONSE3          0x4C
++    /* response bits 63-48 */
++#define OMAP_REG_MMC_CMD_RESPONSE4          0x50
++    /* response bits 79-64 */
++#define OMAP_REG_MMC_CMD_RESPONSE5          0x54
++    /* response bits 95-80 */
++#define OMAP_REG_MMC_CMD_RESPONSE6          0x58
++    /* response bits 111-96 */
++#define OMAP_REG_MMC_CMD_RESPONSE7          0x5C
++    /* response bits 127-112 */
++
++#define OMAP_REG_MMC_SUSPEND_RESUME         0x60
++    #define OMAP_REG_MMC_SUSPEND_RESUME_STOP     (1<<3)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_SAVE     (1<<2)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_RESUME   (1<<1)
++    #define OMAP_REG_MMC_SUSPEND_RESUME_SUSPEND  (1<<0)
++
++#define OMAP_REG_MMC_SYSTEM_CONTROL         0x64
++    #define OMAP_REG_MMC_SYSTEM_CONTROL_SW_RESET (1<<1)
++
++#define OMAP_REG_MMC_SYSTEM_STATUS          0x68
++    #define OMAP_REG_MMC_SYSTEM_STATUS_RESET_DONE (1<<0)
++
++
++
++#define SD_DEFAULT_RESPONSE_BYTES 6
++
++
++#define CLOCK_ON  TRUE
++#define CLOCK_OFF FALSE
++
++#define OMAP_MAX_CLOCK_DIVIDE   1023
++
++typedef struct _SD_CLOCK_TBL_ENTRY {
++    INT       ClockRateDivisor;  /* divisor */
++    UINT16    RegisterValue;     /* register value for clock divisor */
++}SD_CLOCK_TBL_ENTRY;
++
++typedef enum _OMAP_DMA_MODE {
++    OMAP_DMA_NONE = 0,
++    OMAP_DMA_COMMON,
++    OMAP_DMA_SG
++}OMAP_DMA_MODE,*POMAP_DMA_MODE;
++
++typedef struct _SDHCD_DEVICE {
++    SDLIST        List;              /* linked list */
++    SDHCD         Hcd;               /* HCD description for bus driver */
++    OMAP_DMA_MODE DmaMode;           /* current DMA mode */
++    BOOL          DmaCapable;        /* os layer supports DMA */
++    UINT16        Clock;             /* current clock bit settings */
++    UINT32        BaseClock;         /* base clock in hz */
++    UINT32        TimeOut;           /* command timeout setting */
++    UINT32        DataTimeOut;       /* data timeout setting */
++    UINT32        ClockSpinLimit;    /* clock limit for command spin loops */
++    BOOL          KeepClockOn;
++    BOOL          IrqDetectArmed;    /* IRQ detect was armed */
++    UINT8         CompletionCount;   /* used to track when both DMA and command complete are done */
++    BOOL          Cancel;
++    BOOL          ShuttingDown;
++    BOOL          ShortTransfer;     /* do short transfer */
++    SDCONFIG_BUS_MODE_DATA SavedBusMode; /* saved bus mode */
++    HCD_OS_INFO   OSInfo;            /* the single device's OS-Specific */
++}SDHCD_DEVICE, *PSDHCD_DEVICE;
++
++/* driver wide data, this driver only supports one device,
++ * so we include the per device data here also */
++typedef struct _SDHCD_DRIVER_CONTEXT {
++    PTEXT        pDescription;       /* human readable device decsription */
++    SDLIST       DeviceList;         /* the list of current devices handled by this driver */
++    OS_SEMAPHORE DeviceListSem;      /* protection for the DeviceList */
++    UINT         DeviceCount;        /* number of devices currently installed */
++    SDHCD_DRIVER Driver;             /* OS dependent driver specific info */
++}SDHCD_DRIVER_CONTEXT, *PSDHCD_DRIVER_CONTEXT;
++
++
++/* prototypes */
++SDIO_STATUS HcdRequest(PSDHCD pHcd);
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pReq);
++SDIO_STATUS HcdInitialize(PSDHCD_DEVICE pDeviceContext);
++void HcdDeinitialize(PSDHCD_DEVICE pDeviceContext);
++BOOL HcdSDInterrupt(PSDHCD_DEVICE pDeviceContext);
++BOOL HcdTransferTxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq);
++BOOL HcdTransferRxData(PSDHCD_DEVICE pDevice, PSDREQUEST pReq, BOOL Flush);
++
++
++/* OS-dependent layer prototypes */
++SDIO_STATUS QueueEventResponse(PSDHCD_DEVICE pDeviceContext, INT WorkItemID);
++UINT16 MaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr);
++UINT16 UnmaskIrq(PSDHCD_DEVICE pDevice, UINT16 Mask, BOOL FromIsr);
++SDIO_STATUS SetUpHCDDMA(PSDHCD_DEVICE            pDevice,
++                        PSDREQUEST               pReq,
++                        PDMA_TRANSFER_COMPLETION pCompletion,
++                        PVOID                    pContext);
++BOOL WriteProtectSwitchOn(PSDHCD_DEVICE pDevice);
++void SDCancelDMATransfer(PSDHCD_DEVICE pDevice);
++SDIO_STATUS SetPowerLevel(PSDHCD_DEVICE pDeviceContext, BOOL On, SLOT_VOLTAGE_MASK Level);
++void GetDefaults(PSDHCD_DEVICE pDeviceContext);
++void CompleteRequestSyncDMA(PSDHCD_DEVICE pDeviceContext, PSDREQUEST pRequest, SDIO_STATUS Status);
++void MicroDelay(INT Microseconds);
++#define DBG_GPIO_PIN_1  1
++#define DBG_GPIO_PIN_2  2
++
++#ifdef OMAP_USE_DBG_GPIO
++void ToggleGPIOPin(PSDHCD_DEVICE pDevice, INT PinNo);
++#else
++#define ToggleGPIOPin(p,n)
++#endif
++/* end OS layer prototypes */
++
++#endif /* __SDIO_OMAP_HCD_H___ */
+Index: linux-2.6.22/drivers/sdio/hcd/pxa255/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pxa255/Makefile	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,5 @@
++#
++# SDIO pxa255 host controller
++#
++obj-m += sdio_pxa255hcd.o
++sdio_pxa255hcd-objs := sdio_hcd.o linux/sdio_hcd_os.o
+Index: linux-2.6.22/drivers/sdio/hcd/pxa255/sdio_hcd.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.22/drivers/sdio/hcd/pxa255/sdio_hcd.c	2007-11-08 15:47:58.000000000 +0100
+@@ -0,0 +1,914 @@
++/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++ at file: sdio_hcd.c
++
++ at abstract: PXA255 Local Bus SDIO Host Controller Driver
++
++#notes: OS independent code
++
++ at notice: Copyright (c), 2004 Atheros Communications, Inc.
++ *
++ *  This program is free software; you can redistribute it and/or modify
++ *  it under the terms of the GNU General Public License version 2 as
++ *  published by the Free Software Foundation;
++ *
++ *  Software distributed under the License is distributed on an "AS
++ *  IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
++ *  implied. See the License for the specific language governing
++ *  rights and limitations under the License.
++ *
++ *  Portions o this code were developed with information supplied from the
++ *  SD Card Association Simplified Specifications. The following conditions and disclaimers may apply:
++ *
++ *   The following conditions apply to the release of the SD simplified specification (“Simplified
++ *   Specification”) by the SD Card Association. The Simplified Specification is a subset of the complete
++ *   SD Specification which is owned by the SD Card Association. This Simplified Specification is provided
++ *   on a non-confidential basis subject to the disclaimers below. Any implementation of the Simplified
++ *   Specification may require a license from the SD Card Association or other third parties.
++ *   Disclaimers:
++ *   The information contained in the Simplified Specification is presented only as a standard
++ *   specification for SD Cards and SD Host/Ancillary products and is provided "AS-IS" without any
++ *   representations or warranties of any kind. No responsibility is assumed by the SD Card Association for
++ *   any damages, any infringements of patents or other right of the SD Card Association or any third
++ *   parties, which may result from its use. No license is granted by implication, estoppel or otherwise
++ *   under any patent or other rights of the SD Card Association or any third party. Nothing herein shall
++ *   be construed as an obligation by the SD Card Association to disclose or distribute any technical
++ *   information, know-how or other confidential information to any third party.
++ *
++ *
++ *  The initial developers of the original code are Seung Yi and Paul Lever
++ *
++ *  sdio at atheros.com
++ *
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++#include "sdio_pxa255hcd.h"
++
++#define CLOCK_ON  TRUE
++#define CLOCK_OFF FALSE
++
++void Dbg_DumpBuffer(PUCHAR pBuffer, INT Length);
++
++#define WAIT_FOR_MMC(pHct,pCancel,DoneMask,Error,ErrorMask) \
++{                                                                            \
++     while(!*(pCancel) &&                                                    \
++            !(READ_MMC_REG((pHct), MMC_STAT_REG) & (DoneMask)) &&            \
++            !(*(Error) = READ_MMC_REG((pHct), MMC_STAT_REG) & (ErrorMask))); \
++     *(Error) = READ_MMC_REG((pHct), MMC_STAT_REG) & (ErrorMask);            \
++}
++
++MMC_CLOCK_TBL_ENTRY MMCClockDivisorTable[MMC_MAX_CLOCK_ENTRIES] =
++{
++    {20000000,0x00},  /* must be in decending order */
++    {10000000,0x01},
++    {5000000,0x02},
++    {2500000,0x03},
++    {1250000,0x04},
++    {625000,0x05},
++    {312000,0x06}
++};
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  UnmaskMMCIrq - Un mask an MMC interrupts
++  Input:    pHct - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void UnmaskMMCIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask)
++{
++    UINT32 ints;
++    ints = READ_MMC_REG(pHct, MMC_I_MASK_REG);
++    ints &= ~Mask;
++    WRITE_MMC_REG(pHct, MMC_I_MASK_REG, ints);
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  MaskMMCIrq - Mask MMC interrupts
++  Input:    pHct - host controller
++            Mask - mask value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++static inline void MaskMMCIrq(PSDHCD_DRIVER_CONTEXT pHct, UINT32 Mask)
++{
++    UINT32 ints;
++    ints = READ_MMC_REG(pHct, MMC_I_MASK_REG);
++    ints |= Mask;
++    WRITE_MMC_REG(pHct, MMC_I_MASK_REG, ints);
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  GetResponseData - get the response data
++  Input:    pHct - host context
++            pReq - the request
++  Output:
++  Return: returns status
++  Notes: This function returns SDIO_STATUS_SUCCESS for SD mode.  In SPI mode, all cards return
++  response tokens regardless of whether the command is supported or not.  In SD, the response times
++  times-out and we would never reach here.  In SPI mode we query the bus driver to check the SPI
++  response and return an appropriate error status to "simulate" timeouts.
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS  GetResponseData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++    INT     wordCount;
++    INT     byteCount;
++    UINT16  readBuffer[8];
++    UINT16  *pBuf;
++
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_NO_RESP) {
++        return SDIO_STATUS_SUCCESS;
++    }
++
++    if (IS_HCD_BUS_MODE_SPI(&pHct->Hcd)) {
++        /* handle SPI oddities */
++        switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++            case SDREQ_FLAGS_RESP_R2:
++            case SDREQ_FLAGS_RESP_SDIO_R5:
++                    /* this is the special SPI R2 and SPI SDIO R5 responses */
++                byteCount = 2;
++                wordCount = 1;
++                break;
++            case SDREQ_FLAGS_RESP_R3:
++            case SDREQ_FLAGS_RESP_SDIO_R4:
++                    /* SD, MMC, SDIO OCR reading */
++                byteCount = 5;
++                wordCount = 3;
++                break;
++            default:
++                byteCount = 1;
++                wordCount = 1;
++                break;
++        }
++    } else {
++
++        byteCount = SD_DEFAULT_RESPONSE_BYTES;
++        if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++            byteCount = SD_R2_RESPONSE_BYTES;
++        }
++        wordCount = byteCount / 2;
++    }
++
++        /* start the buffer at the tail and work backwards since responses are sent MSB first
++            and shifted into the FIFO  */
++    pBuf = &readBuffer[(wordCount - 1)];
++    while (wordCount) {
++        *pBuf = (UINT16)READ_MMC_REG(pHct, MMC_RES_REG);
++        pBuf--;
++        wordCount--;
++    }
++
++    if (IS_HCD_BUS_MODE_SPI(&pHct->Hcd)) {
++        switch (byteCount) {
++            case 1:
++                    /* the single response byte is stuck in the MSB */
++                pReq->Response[0] = readBuffer[0] >> 8;
++                break;
++            case 2:
++                    /* extended status token , shifted in last */
++                pReq->Response[0] = (UINT8)readBuffer[0];
++                    /* response token shifted in first (in the high byte) */
++                pReq->Response[1] = (UINT8)(readBuffer[0] >> 8);
++                break;
++            case 5:
++                    /* offset the read buffer by one byte since we read WORDs from fifo */
++                memcpy(&pReq->Response[0],((PUINT8)readBuffer) + 1, 5);
++                break;
++        }
++        if (DBG_GET_DEBUG_LEVEL() >= PXA_TRACE_REQUESTS) {
++            SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO PXA255 - Response Dump (SPI)");
++        }
++            /* the bus driver will determine the appropriate status based on the SPI
++             * token received, the bus driver may return a time-out status for tokens indicating an
++             * illegal command */
++        return SDIO_CheckResponse(&pHct->Hcd, pReq, SDHCD_CHECK_SPI_TOKEN);
++    }
++
++        /* handle normal SD/MMC responses */
++    if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++        pReq->Response[0] = 0x00;
++            /* adjust for lack of CRC */
++        memcpy(&pReq->Response[1],readBuffer,byteCount);
++    } else {
++        memcpy(pReq->Response,readBuffer,byteCount);
++    }
++    if (DBG_GET_DEBUG_LEVEL() >= PXA_TRACE_REQUESTS) {
++        if (GET_SDREQ_RESP_TYPE(pReq->Flags) == SDREQ_FLAGS_RESP_R2) {
++            byteCount = 17;
++        }
++        SDLIB_PrintBuffer(pReq->Response,byteCount,"SDIO PXA255 - Response Dump");
++    }
++
++    return SDIO_STATUS_SUCCESS;
++}
++
++void DumpCurrentRequestInfo(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    if (pHct->Hcd.pCurrentRequest != NULL) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - Current Request Command:%d, ARG:0x%8.8X\n",
++                  pHct->Hcd.pCurrentRequest->Command, pHct->Hcd.pCurrentRequest->Argument));
++        if (IS_SDREQ_DATA_TRANS(pHct->Hcd.pCurrentRequest->Flags)) {
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - Data %s, Blocks: %d, BlockLen:%d Remaining: %d \n",
++                IS_SDREQ_WRITE_DATA(pHct->Hcd.pCurrentRequest->Flags) ? "WRITE":"READ",
++                pHct->Hcd.pCurrentRequest->BlockCount,
++                pHct->Hcd.pCurrentRequest->BlockLen,
++                pHct->Hcd.pCurrentRequest->DataRemaining));
++        }
++    }
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  TranslateMMCError - check for an MMC error
++  Input:  MMCStatus - MMC status register value
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS TranslateMMCError(PSDHCD_DRIVER_CONTEXT pHct,UINT32 MMCStatus)
++{
++
++
++
++    if (MMCStatus & MMC_STAT_RESP_CRC_ERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - RESP CRC ERROR \n"));
++        return SDIO_STATUS_BUS_RESP_CRC_ERR;
++    } else if (MMCStatus & MMC_STAT_SPI_RDTKN_ERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - SPI RDTKN ERROR \n"));
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    } else if (MMCStatus & MMC_STAT_RDDAT_CRC_ERR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - READDATA CRC ERROR \n"));
++        DumpCurrentRequestInfo(pHct);
++        return SDIO_STATUS_BUS_READ_CRC_ERR;
++    } else if (MMCStatus & MMC_STAT_WR_ERROR) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - WRITE ERROR \n"));
++        DumpCurrentRequestInfo(pHct);
++        return SDIO_STATUS_BUS_WRITE_ERROR;
++    } else if (MMCStatus & MMC_STAT_RESP_TIMEOUT) {
++        if (pHct->CardInserted) {
++                /* hide error if we are polling an empty slot */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - RESPONSE TIMEOUT \n"));
++        }
++        return SDIO_STATUS_BUS_RESP_TIMEOUT;
++    } else if (MMCStatus & MMC_STAT_READ_TIMEOUT) {
++        DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 - READ TIMEOUT \n"));
++        DumpCurrentRequestInfo(pHct);
++        return SDIO_STATUS_BUS_READ_TIMEOUT;
++    }
++
++    return SDIO_STATUS_DEVICE_ERROR;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  ClockStartStop - MMC clock control
++  Input:  pHcd - HCD object
++          pReq - request to issue
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void ClockStartStop(PSDHCD_DRIVER_CONTEXT pHct, BOOL On)
++{
++
++    if (On) {
++        WRITE_MMC_REG(pHct, MMC_STRPCL_REG, MMC_CLOCK_START);
++    } else {
++        if (READ_MMC_REG(pHct, MMC_STAT_REG) & MMC_STAT_CLK_ON) {
++            WRITE_MMC_REG(pHct, MMC_STRPCL_REG, MMC_CLOCK_STOP);
++                /* wait for clock to stop */
++            while (READ_MMC_REG(pHct, MMC_STAT_REG) & MMC_STAT_CLK_ON);
++        }
++        CLEAR_TEST_PIN(pHct);
++    }
++
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  SetBusMode - Set Bus mode
++  Input:  pHcd - HCD object
++          pMode - mode
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void SetBusMode(PSDHCD_DRIVER_CONTEXT pHct, PSDCONFIG_BUS_MODE_DATA pMode)
++{
++    int i;
++    int clockIndex;
++
++    DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 - SetMode\n"));
++
++        /* set clock index to the end, the table is sorted this way */
++    clockIndex = MMC_MAX_CLOCK_ENTRIES - 1;
++    pMode->ActualClockRate = MMCClockDivisorTable[clockIndex].ClockRate;
++    for (i = 0; i < MMC_MAX_CLOCK_ENTRIES; i++) {
++        if (pMode->ClockRate >= MMCClockDivisorTable[i].ClockRate) {
++            pMode->ActualClockRate = MMCClockDivisorTable[i].ClockRate;
++            clockIndex = i;
++            break;
++        }
++    }
++
++    switch (SDCONFIG_GET_BUSWIDTH(pMode->BusModeFlags)) {
++        case SDCONFIG_BUS_WIDTH_SPI:
++            /* nothing to really do here */
++            if (pMode->BusModeFlags & SDCONFIG_BUS_MODE_SPI_NO_CRC) {
++                /* caller wants all SPI transactions without CRC */
++            } else {
++                /* caller wants all SPI transaction to use CRC */
++            }
++            break;
++        case SDCONFIG_BUS_WIDTH_1_BIT:
++            break;
++        case SDCONFIG_BUS_WIDTH_4_BIT:
++            DBG_ASSERT(FALSE);
++            break;
++        default:
++            break;
++    }
++
++        /* set the clock divisor */
++    WRITE_MMC_REG(pHct, MMC_CLKRT_REG, MMCClockDivisorTable[clockIndex].Divisor);
++
++    DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 - MMCClock: %d Khz\n", pMode->ActualClockRate));
++
++}
++
++BOOL HcdTransferTxData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++    INT     dataCopy;
++    PUINT8  pBuf;
++    volatile UINT32 *pFifo;
++    BOOL    partial = FALSE;
++
++    pFifo = (volatile UINT32 *)((UINT32)GET_MMC_BASE(pHct) + MMC_TXFIFO_REG);
++    dataCopy = min(pReq->DataRemaining,(UINT32)MMC_MAX_TXFIFO);
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++        /* clear partial flag */
++    WRITE_MMC_REG(pHct,MMC_PRTBUF_REG,0);
++
++    if (dataCopy < MMC_MAX_TXFIFO) {
++            /* need to set partial flag after we load the fifos */
++        partial = TRUE;
++    }
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++        /* copy to fifo */
++    while(dataCopy) {
++        _WRITE_DWORD_REG(pFifo,(UINT32)(*pBuf));
++        dataCopy--;
++        pBuf++;
++    }
++
++    if (partial) {
++            /* partial buffer */
++        WRITE_MMC_REG(pHct,MMC_PRTBUF_REG,MMC_PRTBUF_PARTIAL);
++    }
++
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++    if (pReq->DataRemaining) {
++        return FALSE;
++    }
++    return TRUE;
++}
++
++void HcdTransferRxData(PSDHCD_DRIVER_CONTEXT pHct, PSDREQUEST pReq)
++{
++    INT     dataCopy, thisCopy;
++    PUINT8  pBuf;
++    volatile UINT32 *pFifo;
++
++    pFifo = (volatile UINT32 *)((UINT32)GET_MMC_BASE(pHct) + MMC_RXFIFO_REG);
++    dataCopy = min(pReq->DataRemaining,(UINT32)MMC_MAX_RXFIFO);
++    pBuf = (PUINT8)pReq->pHcdContext;
++
++        /* update remaining count */
++    pReq->DataRemaining -= dataCopy;
++    thisCopy = dataCopy;
++       /* copy from fifo */
++    while(dataCopy) {
++        (*pBuf) = (UINT8)_READ_DWORD_REG(pFifo);
++        dataCopy--;
++        pBuf++;
++    }
++    if (DBG_GET_DEBUG_LEVEL() >= PXA_TRACE_DATA) {
++        SDLIB_PrintBuffer(pReq->pHcdContext,thisCopy,"SDIO PXA255 - RX FIFO Dump");
++    }
++        /* update pointer position */
++    pReq->pHcdContext = (PVOID)pBuf;
++}
++
++SDIO_STATUS ProcessCommandDone(PSDHCD_DRIVER_CONTEXT pHct,
++                               PSDREQUEST            pReq,
++                               UINT32                HwErrors)
++{
++    SDIO_STATUS status;
++    UINT32      statValue = 0;
++    UINT32      errorMask = 0;
++
++    if (HwErrors) {
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 command failure: STAT:0x%X \n",HwErrors));
++        status = TranslateMMCError(pHct,HwErrors);
++    } else if (pHct->Cancel) {
++        status = SDIO_STATUS_CANCELED;
++    } else {
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 command success:  STAT:0x%X \n",
++                                        READ_MMC_REG((pHct), MMC_STAT_REG)));
++            /* get the response data for the command */
++        status = GetResponseData(pHct,pReq);
++    }
++        /* check for data */
++    if (SDIO_SUCCESS(status) && IS_SDREQ_DATA_TRANS(pReq->Flags)){
++            /* check with the bus driver if it is okay to continue with data */
++        status = SDIO_CheckResponse(&pHct->Hcd, pReq, SDHCD_CHECK_DATA_TRANS_OK);
++        if (SDIO_SUCCESS(status)) {
++            if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* for writes, we need to pre-load the TX FIFO */
++                if (HcdTransferTxData(pHct, pReq)) {
++                        /* entire transfer fits inside the fifos */
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER) {
++                            /* the requestor has provided us with a hint, we can poll for
++                             * completion if it fits in the fifo */
++                        statValue = MMC_STAT_PRG_DONE;
++                        errorMask = MMC_STAT_WR_ERROR;
++
++                    } else {
++                        UnmaskMMCIrq(pHct, MMC_MASK_DATA_TRANS);
++                    }
++                } else {
++                        /* expecting a TX empty interrupt */
++                    UnmaskMMCIrq(pHct, MMC_MASK_TXFIFO_WR);
++                }
++            } else {
++                if (pReq->DataRemaining <= MMC_MAX_RXFIFO) {
++                    if (pReq->Flags & SDREQ_FLAGS_DATA_SHORT_TRANSFER) {
++                         /* the requestor has provided us with a hint, we can poll for
++                             * completion since this is less than a FIFOs worth */
++                        statValue = MMC_STAT_DATA_DONE;
++                        errorMask = MMC_STAT_RD_ERRORS;
++                    } else {
++                            /* just wait for data transfer done,  we won't get fifo full interrupts  */
++                        UnmaskMMCIrq(pHct, MMC_MASK_DATA_TRANS);
++                    }
++                } else {
++                        /* turn on fifo full interrupts */
++                    UnmaskMMCIrq(pHct, MMC_MASK_RXFIFO_RD);
++                }
++            }
++            DBG_PRINT(PXA_TRACE_DATA, ("SDIO PXA255 Pending %s transfer \n",
++                                       IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX"));
++
++            if (0 == statValue) {
++                    /* return pending */
++                status = SDIO_STATUS_PENDING;
++            } else {
++                    /* this will be polled in-line */
++                status = SDIO_STATUS_SUCCESS;
++            }
++        }
++    }
++
++    if (statValue != 0) {
++        UINT32 temp = 0;
++        {
++            volatile BOOL *pCancel;
++            pCancel = (volatile BOOL *)&pHct->Cancel;
++
++            WAIT_FOR_MMC(pHct,pCancel,statValue,&temp,errorMask);
++        }
++
++        if (temp) {
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 Short Transfer Failure: STAT:0x%X \n",temp));
++            status = TranslateMMCError(pHct,temp);
++        } else {
++            if (!IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++                    /* drain the FIFO on reads */
++                HcdTransferRxData(pHct,pReq);
++                DBG_ASSERT(pReq->DataRemaining == 0);
++            }
++        }
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdRequest - SD request handler
++  Input:  pHcd - HCD object
++          pReq - request to issue
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdRequest(PSDHCD pHcd)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT32                temp = 0;
++    PSDREQUEST            pReq;
++
++    pReq = GET_CURRENT_REQUEST(pHcd);
++    DBG_ASSERT(pReq != NULL);
++
++    if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++            /* check for CMD0 */
++        if (pReq->Command == 0x00) {
++                /* this command must always have a CRC */
++            WRITE_MMC_REG(pHct,
++                          MMC_SPI_REG,
++                          SPI_ENABLE_WITH_CRC);
++        } else {
++                /* for all other SPI-mode commands, check bus mode */
++            if (IS_HCD_BUS_MODE_SPI_NO_CRC(pHcd)) {
++                    /* not running with CRC */
++                WRITE_MMC_REG(pHct,
++                              MMC_SPI_REG,
++                              SPI_ENABLE_NO_CRC);
++            } else {
++                    /* running with CRC */
++                WRITE_MMC_REG(pHct,
++                              MMC_SPI_REG,
++                              SPI_ENABLE_WITH_CRC);
++            }
++        }
++    }
++
++    switch (GET_SDREQ_RESP_TYPE(pReq->Flags)) {
++        case SDREQ_FLAGS_NO_RESP:
++            break;
++        case SDREQ_FLAGS_RESP_R1:
++        case SDREQ_FLAGS_RESP_MMC_R4:
++        case SDREQ_FLAGS_RESP_MMC_R5:
++        case SDREQ_FLAGS_RESP_R6:
++            temp |= MMC_CMDDAT_RES_R1_R4_R5;
++            break;
++        case SDREQ_FLAGS_RESP_R1B:
++            temp |= (MMC_CMDDAT_RES_R1_R4_R5 | MMC_CMDAT_RES_BUSY);
++            break;
++        case SDREQ_FLAGS_RESP_R2:
++            temp |= MMC_CMDDAT_RES_R2;
++            break;
++        case SDREQ_FLAGS_RESP_SDIO_R5:
++            if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                    /* sdio R5s in SPI mode is really an R2 in SPI mode */
++                temp |= MMC_CMDDAT_RES_R2;
++            } else {
++                    /* in SD mode, its an R1 */
++                temp |= MMC_CMDDAT_RES_R1_R4_R5;
++            }
++            break;
++        case SDREQ_FLAGS_RESP_R3:
++        case SDREQ_FLAGS_RESP_SDIO_R4:
++             temp |= MMC_CMDDAT_RES_R3;
++            break;
++    }
++
++    if (pReq->Flags & SDREQ_FLAGS_DATA_TRANS){
++        temp |= MMC_CMDDAT_DATA_EN;
++            /* set block length */
++        WRITE_MMC_REG(pHct, MMC_BLKLEN_REG, pReq->BlockLen);
++        WRITE_MMC_REG(pHct, MMC_NOB_REG_REG, pReq->BlockCount);
++        pReq->DataRemaining = pReq->BlockLen * pReq->BlockCount;
++        DBG_PRINT(PXA_TRACE_DATA, ("SDIO PXA255 %s Data Transfer, Blocks:%d, BlockLen:%d, Total:%d \n",
++                    IS_SDREQ_WRITE_DATA(pReq->Flags) ? "TX":"RX",
++                    pReq->BlockCount, pReq->BlockLen, pReq->DataRemaining));
++            /* use the context to hold where we are in the buffer */
++        pReq->pHcdContext = pReq->pDataBuffer;
++        if (IS_SDREQ_WRITE_DATA(pReq->Flags)) {
++            temp |= MMC_CMDDAT_DATA_WR;
++        }
++    }
++
++    DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 CMDDAT:0x%X (RespType:%d, Command:0x%X , Arg:0x%X) \n",
++              temp, GET_SDREQ_RESP_TYPE(pReq->Flags), pReq->Command, pReq->Argument));
++
++
++
++    WRITE_MMC_REG(pHct, MMC_CMD_REG, pReq->Command);
++    WRITE_MMC_REG(pHct, MMC_ARGH_REG, (pReq->Argument >> 16));
++    WRITE_MMC_REG(pHct, MMC_ARGL_REG, (pReq->Argument & 0xFFFF));
++    WRITE_MMC_REG(pHct, MMC_CMDAT_REG, temp);
++
++    if (SDHCD_GET_OPER_CLOCK(pHcd) < HCD_COMMAND_MIN_POLLING_CLOCK) {
++            /* clock rate is very low, need to use interrupts here */
++        UnmaskMMCIrq(pHct, MMC_MASK_END_CMD);
++            /* start the clock */
++        ClockStartStop(pHct, CLOCK_ON);
++        status = SDIO_STATUS_PENDING;
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 using interrupt for command done.. \n"));
++    } else {
++            /* start the clock */
++        ClockStartStop(pHct, CLOCK_ON);
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 waiting for command done.. \n"));
++        temp = 0;
++        {
++            volatile BOOL *pCancel;
++            pCancel = (volatile BOOL *)&pHct->Cancel;
++               /* this macro polls */
++            WAIT_FOR_MMC(pHct,pCancel,MMC_STAT_END_CMD,&temp,MMC_RESP_ERRORS);
++        }
++            /* process the command completion */
++        status = ProcessCommandDone(pHct,pReq,temp);
++    }
++
++    if (status != SDIO_STATUS_PENDING) {
++        ClockStartStop(pHct, CLOCK_OFF);
++        pReq->Status = status;
++        pHct->Cancel = FALSE;
++        if (IS_SDREQ_FORCE_DEFERRED_COMPLETE(pReq->Flags)) {
++            DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 deferring completion to work item \n"));
++                /* the HCD must do the indication in a separate context and return status pending */
++            QueueEventResponse(pHct, WORK_ITEM_IO_COMPLETE);
++            return SDIO_STATUS_PENDING;
++        }
++            /* complete the request */
++        DBG_PRINT(PXA_TRACE_REQUESTS, ("SDIO PXA255 Command Done - inline, status:%d \n", status));
++        /* fall through and return the non-pending status */
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdConfig - HCD configuration handler
++  Input:  pHcd - HCD object
++          pConfig - configuration setting
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdConfig(PSDHCD pHcd, PSDCONFIG pConfig)
++{
++    SDIO_STATUS status = SDIO_STATUS_SUCCESS;
++    PSDHCD_DRIVER_CONTEXT pHct = (PSDHCD_DRIVER_CONTEXT)pHcd->pContext;
++    UINT16      command;
++
++    command = GET_SDCONFIG_CMD(pConfig);
++
++    switch (command){
++        case SDCONFIG_GET_WP:
++            if (GetGpioPinLevel(pHct,SDIO_CARD_WP_GPIO) == WP_POLARITY) {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 1;
++            } else {
++                *((SDCONFIG_WP_VALUE *)pConfig->pData) = 0;
++            }
++            break;
++        case SDCONFIG_SEND_INIT_CLOCKS:
++            ClockStartStop(pHct,CLOCK_ON);
++                /* should be at least 80 clocks at our lowest clock setting */
++            status = OSSleep(100);
++            ClockStartStop(pHct,CLOCK_OFF);
++            break;
++        case SDCONFIG_SDIO_INT_CTRL:
++            if (GET_SDCONFIG_CMD_DATA(PSDCONFIG_SDIO_INT_CTRL_DATA,pConfig)->SlotIRQEnable) {
++                status = EnableDisableSDIOIrq(pHct, TRUE);
++                if (SDIO_SUCCESS(status) && IS_HCD_BUS_MODE_SPI(pHcd)) {
++                        /* turn on chip select */
++                    ModifyCSForSPIIntDetection(pHct, TRUE);
++                }
++            } else {
++                status = EnableDisableSDIOIrq(pHct, FALSE);
++                if (IS_HCD_BUS_MODE_SPI(pHcd)) {
++                        /* switch CS */
++                   ModifyCSForSPIIntDetection(pHct, FALSE);
++                }
++            }
++            break;
++        case SDCONFIG_SDIO_REARM_INT:
++                /* re-enable IRQ detection */
++            AckSDIOIrq(pHct);
++            break;
++        case SDCONFIG_BUS_MODE_CTRL:
++            SetBusMode(pHct, (PSDCONFIG_BUS_MODE_DATA)(pConfig->pData));
++            break;
++        case SDCONFIG_POWER_CTRL:
++            /* TODO, the slot just connects VCC straight to the slot nothing to adjust here */
++            DBG_PRINT(PXA_TRACE_CONFIG, ("SDIO PXA255 PwrControl: En:%d, VCC:0x%X \n",
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerEnable,
++                      GET_SDCONFIG_CMD_DATA(PSDCONFIG_POWER_CTRL_DATA,pConfig)->SlotPowerVoltageMask));
++            break;
++        default:
++            /* invalid request */
++            DBG_PRINT(SDDBG_ERROR, ("SDIO PXA255 Local HCD: HcdConfig - bad command: 0x%X\n",command));
++            status = SDIO_STATUS_INVALID_PARAMETER;
++    }
++
++    return status;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdInitialize - Initialize MMC controller
++  Input:  pHct - HCD context
++  Output:
++  Return:
++  Notes: I/O resources must be mapped before calling this function
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++SDIO_STATUS HcdInitialize(PSDHCD_DRIVER_CONTEXT pHct)
++{
++        /* turn off clock */
++    ClockStartStop(pHct, CLOCK_OFF);
++        /* init controller */
++    if (pHct->Hcd.Attributes & SDHCD_ATTRIB_BUS_SPI) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO PXA255 Using SPI Mode\n"));
++        /* each HCD request will set up SPI mode with or without CRC protection */
++    }else if (pHct->Hcd.Attributes & SDHCD_ATTRIB_BUS_1BIT) {
++        DBG_PRINT(SDDBG_TRACE, ("SDIO PXA255 Using 1-bit MMC Mode\n"));
++        WRITE_MMC_REG(pHct,
++                      MMC_SPI_REG,
++                      0x00);
++    }
++
++    WRITE_MMC_REG(pHct, MMC_RESTO_REG, SDMMC_RESP_TIMEOUT_CLOCKS);
++    WRITE_MMC_REG(pHct, MMC_RDTO_REG, SDMMC_DATA_TIMEOUT_CLOCKS);
++    MaskMMCIrq(pHct,MMC_MASK_ALL_INTS);
++    return SDIO_STATUS_SUCCESS;
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdDeinitialize - deactivate MMC controller
++  Input:  pHct - HCD context
++  Output:
++  Return:
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++void HcdDeinitialize(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    EnableDisableSDIOIrq(pHct, FALSE);
++    WRITE_MMC_REG(pHct, MMC_I_MASK_REG, MMC_MASK_ALL_INTS);
++    ClockStartStop(pHct, CLOCK_OFF);
++}
++
++/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
++  HcdMMCInterrupt - process MMC controller interrupt
++  Input:  pHct - HCD context
++  Output:
++  Return: TRUE if interrupt was handled
++  Notes:
++
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
++BOOL HcdMMCInterrupt(PSDHCD_DRIVER_CONTEXT pHct)
++{
++    UINT32      ints,errors;
++    PSDREQUEST  pReq;
++    SDIO_STATUS status = SDIO_STATUS_PENDING;
++
++    DBG_PRINT(PXA_TRACE_MMC_INT, ("+SDIO PXA255 IMMC Int handler \n"));
++
++    ints = READ_MMC_REG(pHct, MMC_I_REG_REG);
++
++    if (!ints) {
++        DBG_PRINT(SDDBG_ERROR, ("-SDIO PXA255 False Interrupt! \n"));
++        return FALSE;
++    }
++
++    errors = 0;
++    pReq = GET_CURRENT_REQUEST(&pHct->Hcd);
++
++    while ((ints = READ_MMC_REG(pHct, MMC_I_REG_REG))){
++        DBG_PRINT(PXA_TRACE_MMC_INT, ("SDIO PXA255 Ints:0x%X \n", ints));
++
++            /* read status */
++        errors = READ_MMC_REG(pHct, MMC_STAT_REG);
++
++        if (ints & MMC_INT_END_CMD) {
++                /* mask off end cmd */
++            MaskMMCIrq(pHct, MMC_MASK_END_CMD);
++                /* only care about response errors */
++            errors &= MMC_RESP_ERRORS;
++            status = ProcessCommandDone(pHct,pReq,errors);
++            if (status