org.openembedded.dev: 7fb74a84c8e588098377cef97464620202239202

oe at monotone.openmoko.org oe at monotone.openmoko.org
Fri May 2 21:00:20 CEST 2008


revision:            7fb74a84c8e588098377cef97464620202239202
date:                2008-05-01T13:03:43
author:              oe at openembedded.org
branch:              org.openembedded.dev
changelog:
merge of '212ab031e33707ab289fca4bc893d1f946e6f8e6'
     and 'd935cd87c7c9021470bafc4d24b4faafe4d6c58b'

manifest:
format_version "1"

new_manifest [d6b09f344a23083e7942b658716067942706f7c8]

old_revision [212ab031e33707ab289fca4bc893d1f946e6f8e6]

add_dir "packages/u-boot/u-boot-1.1.4/at32stk1000"

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch"
 content [264148f2ada6a081fe0b2e071b0edc80d5bb26d3]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch"
 content [aacb40f62692f7f12d2594259831635533ea5254]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch"
 content [0dc5903c7cb85cbda2a744d9ded9a86258089d87]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch"
 content [758d34baadad1b76b6ed1ef398709646af1defbf]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch"
 content [0905f155e05eba575a0685462783708b8098af55]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch"
 content [174d54cdd69afafd05d72a0fd0c8751d0976a599]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch"
 content [c9bf5bf83f39696ee9f981ed85f847334f28c2b1]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch"
 content [a1ebfc54a394239909ae56d84e754d7ec80bbac3]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch"
 content [0687dbba73b78ddd353f834a58a26b02ce8f8ef8]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch"
 content [80f5abd078487b50df179cad3b3d1a0f382b56ae]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch"
 content [70b1b5f471490abbf21b2c173a9863794616545c]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch"
 content [055ca79e80417f03df63174afb7a707a2e98e5a6]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch"
 content [87dc7c19ee654a3223802b457bb82c44ff3c515e]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch"
 content [f9cdf2cc1db97cbdcfbb811df1067fb7baec5542]

add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch"
 content [aaf3a5bcf5a60041e4da853c72c9417adca86a12]

patch "packages/u-boot/u-boot_1.1.4.bb"
 from [d038552bd2f9296f6e46ab33c2c4ebb364477fec]
   to [f33798683ca5789d2b3c96f26805a5f148b78370]

old_revision [d935cd87c7c9021470bafc4d24b4faafe4d6c58b]

delete "packages/asterisk/asterisk-1.4.10"

delete "packages/asterisk/asterisk-1.4.10/Makefile.patch"

delete "packages/asterisk/asterisk-1.4.10/init"

delete "packages/asterisk/asterisk-1.4.10/logrotate"

delete "packages/asterisk/asterisk-1.4.10/sounds.xml.patch"

delete "packages/asterisk/asterisk-1.4.10/volatiles"

delete "packages/asterisk/asterisk-1.4.11"

delete "packages/asterisk/asterisk-1.4.11/Makefile.patch"

delete "packages/asterisk/asterisk-1.4.11/init"

delete "packages/asterisk/asterisk-1.4.11/logrotate"

delete "packages/asterisk/asterisk-1.4.11/sounds.xml.patch"

delete "packages/asterisk/asterisk-1.4.11/volatiles"

delete "packages/asterisk/asterisk-1.6.0-beta6"

delete "packages/asterisk/asterisk-1.6.0-beta6/Makefile.patch"

delete "packages/asterisk/asterisk-1.6.0-beta6/init"

delete "packages/asterisk/asterisk-1.6.0-beta6/logrotate"

delete "packages/asterisk/asterisk-1.6.0-beta6/sounds.xml.patch"

delete "packages/asterisk/asterisk-1.6.0-beta6/volatiles"

delete "packages/asterisk/asterisk_1.4.10.bb"

delete "packages/asterisk/asterisk_1.4.11.bb"

delete "packages/asterisk/asterisk_1.6.0-beta6.bb"

delete "packages/madwifi/madwifi-ng_r1844-20061208.bb"

delete "packages/madwifi/madwifi-ng_r2100-20070210.bb"

delete "packages/madwifi/madwifi-ng_r2156-20070225.bb"

delete "packages/madwifi/madwifi-ng_r2182-20070308.bb"

delete "packages/madwifi/madwifi-ng_r2187-20070309.bb"

delete "packages/madwifi/madwifi-ng_r2518-20070626.bb"

delete "packages/madwifi/madwifi-ng_r2702-20070903.bb"

rename "packages/busybox/busybox-1.9.1"
    to "packages/busybox/busybox-1.9.2"

rename "packages/busybox/busybox_1.9.1.bb"
    to "packages/busybox/busybox_1.9.2.bb"

rename "packages/gqview/gqview-2.1.1"
    to "packages/gqview/gqview-2.1.5"

rename "packages/gqview/gqview_2.1.1.bb"
    to "packages/gqview/gqview_2.1.5.bb"

rename "packages/ulxmlrpcpp/ulxmlrpcpp_1.5.2.bb"
    to "packages/ulxmlrpcpp/ulxmlrpcpp_1.7.3.bb"

add_dir "packages/asterisk/asterisk-1.2.28"

add_dir "packages/asterisk/asterisk-1.4.19.1"

add_dir "packages/asterisk/asterisk-1.6.0-beta8"

add_dir "packages/multitap-pad"

add_dir "packages/multitap-pad/files"

add_dir "packages/netbase/netbase/mpc8313e-rdb"

add_dir "packages/u-boot/u-boot-1.3.2"

add_file "conf/distro/include/preferred-om-2008-versions.inc"
 content [1fa5768d601b1fc24f2f64c740c2e5fc96c4fce3]

add_file "conf/machine/d201gly2.conf"
 content [7e34b9738d6c1869f61708e1fec04db2564f9d89]

add_file "conf/machine/include/tune-pentium4c.inc"
 content [6d4588e5e8c363a3883c76fc49befb8c4e75864d]

add_file "packages/asterisk/asterisk-1.2.28/asterisk.patch"
 content [cd980f6cc48c01f2394a731d2cf247809e5c2231]

add_file "packages/asterisk/asterisk-1.2.28/enable-speex.patch"
 content [123420f2bb25f198d687ae8cfad1eef6e90725bb]

add_file "packages/asterisk/asterisk-1.2.28/uclibc-compat-getloadavg.patch"
 content [750cd99592c157b993f2ccb9f63edbe274d9edd1]

add_file "packages/asterisk/asterisk-1.2.28/uclibc-dns.patch"
 content [9dbcc47d6cfeefd0f4c1071f982806f49ffc262d]

add_file "packages/asterisk/asterisk-1.4.19.1/Makefile.patch"
 content [ce55873b5855c020f4d4e987a386223d1a211911]

add_file "packages/asterisk/asterisk-1.4.19.1/init"
 content [66ddc677ff3831fb4be746a9222e69f65a2c6a22]

add_file "packages/asterisk/asterisk-1.4.19.1/logrotate"
 content [d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f]

add_file "packages/asterisk/asterisk-1.4.19.1/sounds.xml.patch"
 content [17999e17bf9a130a9e6e8a7a687092b2231d86c7]

add_file "packages/asterisk/asterisk-1.4.19.1/volatiles"
 content [66814aff0fd07e02c83bf90010a95c0845067557]

add_file "packages/asterisk/asterisk-1.6.0-beta8/Makefile.patch"
 content [83b3bcf804f60d8438696a8b8e54698c9c1dff09]

add_file "packages/asterisk/asterisk-1.6.0-beta8/init"
 content [ab9f4c6af832cc4a94d2a5e256988be381675969]

add_file "packages/asterisk/asterisk-1.6.0-beta8/logrotate"
 content [d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f]

add_file "packages/asterisk/asterisk-1.6.0-beta8/sounds.xml.patch"
 content [17999e17bf9a130a9e6e8a7a687092b2231d86c7]

add_file "packages/asterisk/asterisk-1.6.0-beta8/volatiles"
 content [66814aff0fd07e02c83bf90010a95c0845067557]

add_file "packages/asterisk/asterisk_1.2.28.bb"
 content [59adcd07ce9843da6a5209dbe439320b4e024fbc]

add_file "packages/asterisk/asterisk_1.4.19.1.bb"
 content [04072cabaeacd15aab238077b9b08e107ebec94b]

add_file "packages/asterisk/asterisk_1.6.0-beta8.bb"
 content [8fbf9884c3ab370083c2125640d541c7f0fc0388]

add_file "packages/gpsd/gpsd_2.37.bb"
 content [fcf9fa136398ac80a6cb1c8408ac6df26d0ddeaf]

add_file "packages/linux/linux-omap2-git/beagleboard/usb-timout.patch"
 content [7acb9cec9859f0c448ef4b56bf2ebd12e8b84c2b]

add_file "packages/multitap-pad/files/80multitappad"
 content [b613cc7c89d800c205b89dd7013c4b3ba309b319]

add_file "packages/multitap-pad/multitap-pad_svn.bb"
 content [8f2b626f58690dd52e509cacab5977c5f52270e2]

add_file "packages/netbase/netbase/mpc8313e-rdb/interfaces"
 content [2ece41786062e70093a58ef17e23d35ea084c316]

add_file "packages/openmoko-panel-plugins/openmoko-panel-memory_svn.bb"
 content [8be05efebbb61236f286d5dc98eff6c59fa29561]

add_file "packages/python/python-setuptools-native_0.6c6.bb"
 content [37e35eebe4105610cad978ad7a92f12a2b9095d1]

add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-autoboot.patch"
 content [d10d1edb2510c27cbbfca47e962cfc8da45f0788]

add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-mtdparts.patch"
 content [20746984bb1c6ef2789381da1283a8e06a74b0ac]

add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-nand.patch"
 content [64eee6cc9ba75710f130f074b0632df44049ca14]

add_file "packages/ulxmlrpcpp/files/remove-local-includes.patch"
 content [e7814096279dfa2c12d68522fac5c7bb06f70758]

patch "MAINTAINERS"
 from [5556c9277c3381070987310400058abdd5f4c820]
   to [df1acfac3b7175de3f71ec85623148d285a64116]

patch "classes/kernel.bbclass"
 from [8d92c5a7b6420490dd6b3115e8146b3fc0a0f854]
   to [8ed575119a74e50c5bcb39266997cba3f60792c2]

patch "classes/setuptools.bbclass"
 from [f0a6d602e9af754216e3616efb17302d0116fe3b]
   to [de18f3769a72fd6890b414d5ad97471bd58ce683]

patch "conf/distro/generic-uclibc.conf"
 from [4b6c77936994e0b78819a2d3d1f6a9e68262429f]
   to [86d233ffa29fe7b850743b7e58fde2e37d4d6f5a]

patch "conf/distro/include/moko-autorev.inc"
 from [fcfcab76f058cc1c4d7421859eca5516729b13b7]
   to [30a97196079a97d9c58ada036559086466b640f3]

patch "conf/distro/include/sane-srcdates.inc"
 from [b34ef707dd219480ea6e208db87c67468bcaa33e]
   to [ab98f16a11db3d5648ce60703f88e9417c3562d3]

patch "conf/distro/include/sane-srcrevs.inc"
 from [af1d08078aa8f03db44e8b150bc4f043ad26b938]
   to [3f68781354a48bcde95fae1b91ce841a0f88ae0f]

patch "conf/distro/oplinux-uclibc.conf"
 from [4d4e43572601100e99436c766449cf726eab951e]
   to [ded77d3149a141de656d62e5c1ed7e161f1e500d]

patch "conf/machine/mpc8313e-rdb.conf"
 from [9521bcf148591a9c5c88e316475ce8493488eaf2]
   to [ca05aff54fbbce7e6178f63cd81e0262c9607193]

patch "packages/busybox/busybox-1.9.2/defconfig"
 from [f0e872e8e6f3bc9941075571caf38d1a62657458]
   to [b98a8c0c48f931c7b67cd67b5498aac228e47b29]

patch "packages/busybox/busybox_1.9.2.bb"
 from [4ce3286b8b9f17817880e467425ec28de58ea3f4]
   to [a3a8f0f9c2f172464f5e3746ae507d0845fd473f]

patch "packages/efl1/imlib2_cvs.bb"
 from [90324b9d8bfadfca430da3b72c2b1f9c7089ee52]
   to [5c3c8c06ae6d9a4d18d10a066fc8973ec535e871]

patch "packages/freesmartphone/gsm0710muxd_svn.bb"
 from [b214341ba255007649e5d97e71b3d22c2218c73e]
   to [848b41b51ffadb51a05381fbc015bc38fa1fccb1]

patch "packages/freesmartphone/py-odeviced_svn.bb"
 from [6ef92b7c28dc3f0730750da1b7cfeed1cd7da960]
   to [30b9953c30c87828378bdcea8213290cc498ea8f]

patch "packages/gqview/gqview_2.1.5.bb"
 from [16d9b045dce6b8a8f231b03d2732fb4c4d51fb0b]
   to [c6c051a6d62ff63d3dc2481d6a0fb0df3bbc9df3]

patch "packages/hal/files/20hal"
 from [b5274aeb2afa6b68caa3f9d7883f7b050c1b2df5]
   to [933ee3447781ece335e67a16ff55bc387923db8c]

patch "packages/hal/hal_0.5.9.bb"
 from [2755c957ca6ff6db1080b1a90aec3cd4228e47f2]
   to [58f834120c11860d1ba12c673e98de14842ac1e5]

patch "packages/linux/linux-omap2-git/beagleboard/defconfig"
 from [ffa35a912f2d6c8016f6ea1d0f7ebb27987a9b28]
   to [6defc6fa96f79492acbfbaed1cc6553abe5edc13]

patch "packages/linux/linux-omap2_git.bb"
 from [e84865c7794f8227ce021537e22050f366fe51b3]
   to [d2df9d873b73d322c1d6a7918ef9c8786b091e48]

patch "packages/madwifi/madwifi-ng_r3314-20080131.bb"
 from [aa87cb14b8005f3b927e4701b1ae845bf2099ec2]
   to [24403394f09cfebacade21edca4dbf1c9fe180ba]

patch "packages/meta/slugos-packages.bb"
 from [46c8ac8a7503c5e222ee23a677a92db2e2ea9dcb]
   to [f62c22f94a5ba8a475afc6d43721c4e29386ca2e]

patch "packages/opkg/opkg_svn.bb"
 from [bc27245782ad8e3348db57c3d14c9e75b4f1b404]
   to [e034851c3a5985b17cbde739bc5bb59a8c69d323]

patch "packages/python/python-2.5-manifest.inc"
 from [ce2d4136b474c7f902281410e54cde0b27751287]
   to [e3df18f8f3a8373fd0bccb992c74a16321f20256]

patch "packages/python/python-setuptools_0.6c6.bb"
 from [57994d92ba3eec5b7d6f145f3d08241becb3a6dc]
   to [074cb8e81cb89426c6d897caeb5fd18c68571c9a]

patch "packages/python/python-simplejson_1.7.1.bb"
 from [8890cca59935f213dfae3a402765e7bad90c9a89]
   to [4abda6be3039a1c47c3bdc6c4c287078ff32fbe8]

patch "packages/python/python_2.5.2.bb"
 from [43c9ad955282b5022b3a3db8b5b179589957f666]
   to [3ca57f8a30e412707c0107dff460e0343840d9f1]

patch "packages/u-boot/u-boot_1.3.2.bb"
 from [8cfd5293c0214179a38b2304fbd10c77a3912aff]
   to [33ac513192e4695c4ea43a787d866c98c2a011ef]

patch "packages/ulxmlrpcpp/ulxmlrpcpp_1.7.3.bb"
 from [a12a466db6c83f5d3917dc47f9ddb865083e1cd2]
   to [620ff88b9012aace94f197dadcdfaf0b6b770e62]

patch "packages/xorg-xserver/xserver-kdrive-glamo_1.3.0.0+git.bb"
 from [6d801f6abfc58aaf724ee5f32f75326a83882415]
   to [d9999335a38fb49bae5419528a518ebff7e010b6]
-------------- next part --------------
#
#
# add_dir "packages/u-boot/u-boot-1.1.4/at32stk1000"
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch"
#  content [264148f2ada6a081fe0b2e071b0edc80d5bb26d3]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch"
#  content [aacb40f62692f7f12d2594259831635533ea5254]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch"
#  content [0dc5903c7cb85cbda2a744d9ded9a86258089d87]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch"
#  content [758d34baadad1b76b6ed1ef398709646af1defbf]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch"
#  content [0905f155e05eba575a0685462783708b8098af55]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch"
#  content [174d54cdd69afafd05d72a0fd0c8751d0976a599]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch"
#  content [c9bf5bf83f39696ee9f981ed85f847334f28c2b1]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch"
#  content [a1ebfc54a394239909ae56d84e754d7ec80bbac3]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch"
#  content [0687dbba73b78ddd353f834a58a26b02ce8f8ef8]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch"
#  content [80f5abd078487b50df179cad3b3d1a0f382b56ae]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch"
#  content [70b1b5f471490abbf21b2c173a9863794616545c]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch"
#  content [055ca79e80417f03df63174afb7a707a2e98e5a6]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch"
#  content [87dc7c19ee654a3223802b457bb82c44ff3c515e]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch"
#  content [f9cdf2cc1db97cbdcfbb811df1067fb7baec5542]
# 
# add_file "packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch"
#  content [aaf3a5bcf5a60041e4da853c72c9417adca86a12]
# 
# patch "packages/u-boot/u-boot_1.1.4.bb"
#  from [d038552bd2f9296f6e46ab33c2c4ebb364477fec]
#    to [f33798683ca5789d2b3c96f26805a5f148b78370]
#
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch	264148f2ada6a081fe0b2e071b0edc80d5bb26d3
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/ap7000-add-spi-device-and-lcdc-base-address.patch	264148f2ada6a081fe0b2e071b0edc80d5bb26d3
@@ -0,0 +1,112 @@
+diff -uprN u-boot-orig/cpu/at32ap7xxx/ap7000/devices.c u-boot/cpu/at32ap7xxx/ap7000/devices.c
+--- u-boot-orig/cpu/at32ap7xxx/ap7000/devices.c	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/cpu/at32ap7xxx/ap7000/devices.c	2006-12-22 14:51:26.000000000 +0100
+@@ -223,6 +223,46 @@ static const struct resource macb1_resou
+ 	},
+ };
+ #endif
++#if defined(CFG_SPI0)
++static const struct resource spi0_resource[] = {
++	{
++		.type	= RESOURCE_CLOCK,
++		.u	= {
++			.clock	= { CLOCK_APBA, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 6, DEVICE_PIOA, GPIO_FUNC_A, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 1, DEVICE_PIOA, GPIO_FUNC_B, 20 },
++		},
++	},
++};
++#endif
++#if defined(CFG_SPI1)
++static const struct resource spi1_resource[] = {
++	{
++		.type	= RESOURCE_CLOCK,
++		.u	= {
++			.clock	= { CLOCK_APBA, 1 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 6, DEVICE_PIOB, GPIO_FUNC_B, 0 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio	= { 1, DEVICE_PIOA, GPIO_FUNC_A, 27 },
++		},
++	},
++};
++#endif
+ #if defined(CFG_LCDC)
+ static const struct resource lcdc_resource[] = {
+ 	{
+@@ -230,6 +270,16 @@ static const struct resource lcdc_resour
+ 		.u	= {
+ 			.clock	= { CLOCK_AHB, 7 },
+ 		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio = { 13, DEVICE_PIOC, GPIO_FUNC_A, 19 },
++		},
++	}, {
++		.type	= RESOURCE_GPIO,
++		.u	= {
++			.gpio = { 18, DEVICE_PIOD, GPIO_FUNC_A, 0 },
++		},
+ 	},
+ };
+ #endif
+@@ -390,6 +440,20 @@ const struct device chip_device[] = {
+ 		.resource	= macb0_resource,
+ 	},
+ #endif
++#if defined(CFG_SPI0)
++	[DEVICE_SPI0] = {
++		.regs		= (void *)SPI0_BASE,
++		.nr_resources	= ARRAY_SIZE(spi0_resource),
++		.resource	= spi0_resource,
++	},
++#endif
++#if defined(CFG_SPI1)
++	[DEVICE_SPI1] = {
++		.regs		= (void *)SPI1_BASE,
++		.nr_resources	= ARRAY_SIZE(spi1_resource),
++		.resource	= spi1_resource,
++	},
++#endif
+ #if defined(CFG_MACB1)
+ 	[DEVICE_MACB1] = {
+ 		.regs		= (void *)MACB1_BASE,
+@@ -399,6 +463,7 @@ const struct device chip_device[] = {
+ #endif
+ #if defined(CFG_LCDC)
+ 	[DEVICE_LCDC] = {
++		.regs		= (void *)LCDC_BASE,
+ 		.nr_resources	= ARRAY_SIZE(lcdc_resource),
+ 		.resource	= lcdc_resource,
+ 	},
+diff -uprN u-boot-orig/include/asm-avr32/arch-ap7000/platform.h u-boot/include/asm-avr32/arch-ap7000/platform.h
+--- u-boot-orig/include/asm-avr32/arch-ap7000/platform.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/arch-ap7000/platform.h	2006-12-22 14:20:39.000000000 +0100
+@@ -66,6 +66,12 @@ enum device_id {
+ #if defined(CFG_MACB1)
+ 	DEVICE_MACB1,
+ #endif
++#if defined(CFG_SPI0)
++	DEVICE_SPI0,
++#endif
++#if defined(CFG_SPI1)
++	DEVICE_SPI1,
++#endif
+ #if defined(CFG_LCDC)
+ 	DEVICE_LCDC,
+ #endif
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch	aacb40f62692f7f12d2594259831635533ea5254
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-define-for-sdram-test.patch	aacb40f62692f7f12d2594259831635533ea5254
@@ -0,0 +1,117 @@
+Index: u-boot-1.1.4/cpu/at32ap7xxx/hsdramc.c
+===================================================================
+--- u-boot-1.1.4.orig/cpu/at32ap7xxx/hsdramc.c	2007-01-11 15:28:40.000000000 +0100
++++ u-boot-1.1.4/cpu/at32ap7xxx/hsdramc.c	2007-01-11 15:29:36.000000000 +0100
+@@ -133,6 +133,7 @@
+ 	printf("SDRAM: %u MB at address 0x%08lx\n",
+ 	       sdram_size >> 20, info->phys_addr);
+ 
++#ifdef CONFIG_SDRAM_TEST
+ 	printf("Testing SDRAM...");
+ 	for (i = 0; i < sdram_size / 4; i++)
+ 		sdram[i] = i;
+@@ -148,6 +149,7 @@
+ 	}
+ 
+ 	puts("OK\n");
++#endif
+ 
+ 	return sdram_size;
+ }
+Index: u-boot-1.1.4/include/configs/atngw.h
+===================================================================
+--- u-boot-1.1.4.orig/include/configs/atngw.h	2007-01-11 15:28:40.000000000 +0100
++++ u-boot-1.1.4/include/configs/atngw.h	2007-01-30 16:41:23.000000000 +0100
+@@ -31,6 +31,10 @@
+ 
+ #define CONFIG_NGW_EXT_FLASH		1
+ 
++/* Handy macros for making strings */
++#define xstringify(x) #x
++#define stringify(x) xstringify(x)
++
+ /*
+  * Timer clock frequency. We're using the CPU-internal COUNT register
+  * for this, so this is equivalent to the CPU core clock frequency
+@@ -80,9 +84,9 @@
+ 
+ #define CONFIG_BAUDRATE			115200
+ #define CONFIG_BOOTARGS							\
+-	"console=ttyS0 root=/dev/mmcblk0p1"
++	"console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
+ #define CONFIG_BOOTCOMMAND						\
+-	"mmcinit; ext2load mmc 0:1 0x90400000 /uImage; bootm 0x90400000"
++	"fsload 0x90250000 /uImage; bootm 0x90250000"
+ 
+ #define CONFIG_BOOTDELAY		2
+ #define CONFIG_AUTOBOOT			1
+@@ -105,8 +109,8 @@
+  * generated and assigned to the environment variables "ethaddr" and
+  * "eth1addr".
+  */
+-#define CONFIG_ETHADDR			"6a:87:71:14:cd:cb"
+-#define CONFIG_ETH1ADDR			"ca:f8:15:e6:3e:e6"
++#define CONFIG_ETHADDR			"42:b2:13:36:50:94"
++#define CONFIG_ETH1ADDR			"4e:29:49:7e:5c:b9"
+ #define CONFIG_OVERWRITE_ETHADDR_ONCE	1
+ #define CONFIG_NET_MULTI		1
+ 
+@@ -183,6 +187,7 @@
+ 
+ #define CFG_SDRAM_BASE			0x10000000
+ #define CFG_SDRAM_16BIT			1
++#define CONFIG_SDRAM_TEST		1
+ 
+ #define CFG_ENV_IS_IN_FLASH		1
+ #define CFG_ENV_SIZE			65536
+@@ -202,7 +207,7 @@
+ #define CFG_DMA_ALLOC_END		(CFG_MALLOC_START)
+ #define CFG_DMA_ALLOC_START		(CFG_DMA_ALLOC_END - CFG_DMA_ALLOC_LEN)
+ /* Allow 2MB for the kernel run-time image */
+-#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
++#define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00250000)
+ #define CFG_BOOTPARAMS_LEN		(16 * 1024)
+ 
+ /* Other configuration settings that shouldn't have to change all that often */
+Index: u-boot-1.1.4/include/configs/atstk1002.h
+===================================================================
+--- u-boot-1.1.4.orig/include/configs/atstk1002.h	2007-01-11 15:29:36.000000000 +0100
++++ u-boot-1.1.4/include/configs/atstk1002.h	2007-01-30 16:41:25.000000000 +0100
+@@ -98,7 +98,7 @@
+ #define CFG_CONSOLE_UART_DEV		DEVICE_USART1
+ 
+ /* Define to force consol on serial */
+-/* #define CFG_CONSOLE_ALLWAYS_UART	1 */
++#define CFG_CONSOLE_ALLWAYS_UART	1
+ #ifdef CFG_CONSOLE_ALLWAYS_UART
+ #define CFG_CONSOLE_IS_IN_ENV		1
+ #define CFG_CONSOLE_OVERWRITE_ROUTINE	1
+@@ -123,7 +123,7 @@
+ #endif
+ 
+ #define CONFIG_BOOTCOMMAND						\
+-	"mmcinit; ext2load mmc 0:1 /uImage; bootm"
++	"mmcinit; ext2load mmc 0:1 0x90250000 /uImage; bootm 0x90250000"
+ #define CONFIG_BOOTDELAY		2
+ #define CONFIG_AUTOBOOT			1
+ 
+@@ -145,8 +145,8 @@
+  * generated and assigned to the environment variables "ethaddr" and
+  * "eth1addr".
+  */
+-#define CONFIG_ETHADDR			"6a:87:71:14:cd:cb"
+-#define CONFIG_ETH1ADDR			"ca:f8:15:e6:3e:e6"
++#define CONFIG_ETHADDR			"42:b2:13:36:50:94"
++#define CONFIG_ETH1ADDR			"4e:29:49:7e:5c:b9"
+ #define CONFIG_OVERWRITE_ETHADDR_ONCE	1
+ #define CONFIG_NET_MULTI		1
+ 
+@@ -233,6 +233,8 @@
+ #define CFG_INTRAM_SIZE			0x8000
+ 
+ #define CFG_SDRAM_BASE			0x10000000
++/* Will do SDRAM test if defined */
++#define CONFIG_SDRAM_TEST		1
+ 
+ #define CFG_ENV_IS_IN_FLASH		1
+ #define CFG_ENV_SIZE			65536
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch	0dc5903c7cb85cbda2a744d9ded9a86258089d87
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-framebuffer-address.patch	0dc5903c7cb85cbda2a744d9ded9a86258089d87
@@ -0,0 +1,11 @@
+diff -uprN u-boot-orig/include/asm-avr32/global_data.h u-boot/include/asm-avr32/global_data.h
+--- u-boot-orig/include/asm-avr32/global_data.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/global_data.h	2006-12-19 11:08:14.000000000 +0100
+@@ -44,6 +44,7 @@ typedef	struct	global_data {
+ 	unsigned long	env_addr;	/* Address of env struct */
+ 	unsigned long	env_valid;	/* Checksum of env valid? */
+ 	unsigned long	cpu_hz;		/* TODO: remove */
++	unsigned long	fb_base;	/* Address to framebuffer */
+ 	void		**jt;
+ } gd_t;
+ 
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch	758d34baadad1b76b6ed1ef398709646af1defbf
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-spi-initcalls.patch	758d34baadad1b76b6ed1ef398709646af1defbf
@@ -0,0 +1,16 @@
+diff -uprN u-boot-orig/include/asm-avr32/initcalls.h u-boot/include/asm-avr32/initcalls.h
+--- u-boot-orig/include/asm-avr32/initcalls.h	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/include/asm-avr32/initcalls.h	2007-01-05 13:29:16.000000000 +0100
+@@ -30,6 +30,12 @@ extern void board_init_memories(void);
+ extern void board_init_pio(void);
+ extern void board_init_info(void);
+ 
++#if CONFIG_SPI
++extern void board_init_spi(void);
++#else
++static inline void board_init_spi(void) { }
++#endif
++
+ #if (CONFIG_COMMANDS & CFG_CMD_NET)
+ extern void net_init(void);
+ #else
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch	0905f155e05eba575a0685462783708b8098af55
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/at32ap-add-system-manager-header-file.patch	0905f155e05eba575a0685462783708b8098af55
@@ -0,0 +1,252 @@
+diff -uprN u-boot-orig/include/asm-avr32/arch-ap7000/sm.h u-boot/include/asm-avr32/arch-ap7000/sm.h
+--- u-boot-orig/include/asm-avr32/arch-ap7000/sm.h	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/include/asm-avr32/arch-ap7000/sm.h	2006-12-21 16:28:04.000000000 +0100
+@@ -0,0 +1,248 @@
++/*
++ * Register definitions for SM
++ *
++ * System Manager
++ */
++#ifndef __ASM_AVR32_SM_H__
++#define __ASM_AVR32_SM_H__
++
++/* SM register offsets */
++#define SM_PM_MCCTRL                            0x0000
++#define SM_PM_CKSEL                             0x0004
++#define SM_PM_CPU_MASK                          0x0008
++#define SM_PM_AHB_MASK                          0x000c
++#define SM_PM_APBA_MASK                         0x0010
++#define SM_PM_APBB_MASK                         0x0014
++#define SM_PM_PLL0                              0x0020
++#define SM_PM_PLL1                              0x0024
++#define SM_PM_VCTRL                             0x0030
++#define SM_PM_VMREF                             0x0034
++#define SM_PM_VMV                               0x0038
++#define SM_PM_IER                               0x0040
++#define SM_PM_IDR                               0x0044
++#define SM_PM_IMR                               0x0048
++#define SM_PM_ISR                               0x004c
++#define SM_PM_ICR                               0x0050
++#define SM_PM_GCCTRL                            0x0060
++#define SM_PM_GCCTRL0                           0x0060
++#define SM_PM_GCCTRL1                           0x0064
++#define SM_PM_GCCTRL2                           0x0068
++#define SM_PM_GCCTRL3                           0x006c
++#define SM_PM_GCCTRL4                           0x0070
++#define SM_PM_GCCTRL5                           0x0074
++#define SM_PM_GCCTRL6                           0x0078
++#define SM_PM_GCCTRL7                           0x007c
++#define SM_RTC_CTRL                             0x0080
++#define SM_RTC_VAL                              0x0084
++#define SM_RTC_TOP                              0x0088
++#define SM_RTC_IER                              0x0090
++#define SM_RTC_IDR                              0x0094
++#define SM_RTC_IMR                              0x0098
++#define SM_RTC_ISR                              0x009c
++#define SM_RTC_ICR                              0x00a0
++#define SM_WDT_CTRL                             0x00b0
++#define SM_WDT_CLR                              0x00b4
++#define SM_WDT_EXT                              0x00b8
++#define SM_RC_RCAUSE                            0x00c0
++#define SM_EIM_IER                              0x0100
++#define SM_EIM_IDR                              0x0104
++#define SM_EIM_IMR                              0x0108
++#define SM_EIM_ISR                              0x010c
++#define SM_EIM_ICR                              0x0110
++#define SM_EIM_MODE                             0x0114
++#define SM_EIM_EDGE                             0x0118
++#define SM_EIM_LEVEL                            0x011c
++#define SM_EIM_TEST                             0x0120
++#define SM_EIM_NMIC                             0x0124
++
++/* Bitfields in PM_MCCTRL */
++
++/* Bitfields in PM_CKSEL */
++#define SM_CPUSEL_OFFSET                        0
++#define SM_CPUSEL_SIZE                          3
++#define SM_CPUDIV_OFFSET                        7
++#define SM_CPUDIV_SIZE                          1
++#define SM_AHBSEL_OFFSET                        8
++#define SM_AHBSEL_SIZE                          3
++#define SM_AHBDIV_OFFSET                        15
++#define SM_AHBDIV_SIZE                          1
++#define SM_APBASEL_OFFSET                       16
++#define SM_APBASEL_SIZE                         3
++#define SM_APBADIV_OFFSET                       23
++#define SM_APBADIV_SIZE                         1
++#define SM_APBBSEL_OFFSET                       24
++#define SM_APBBSEL_SIZE                         3
++#define SM_APBBDIV_OFFSET                       31
++#define SM_APBBDIV_SIZE                         1
++
++/* Bitfields in PM_CPU_MASK */
++
++/* Bitfields in PM_AHB_MASK */
++
++/* Bitfields in PM_APBA_MASK */
++
++/* Bitfields in PM_APBB_MASK */
++
++/* Bitfields in PM_PLL0 */
++#define SM_PLLEN_OFFSET                         0
++#define SM_PLLEN_SIZE                           1
++#define SM_PLLOSC_OFFSET                        1
++#define SM_PLLOSC_SIZE                          1
++#define SM_PLLOPT_OFFSET                        2
++#define SM_PLLOPT_SIZE                          3
++#define SM_PLLDIV_OFFSET                        8
++#define SM_PLLDIV_SIZE                          8
++#define SM_PLLMUL_OFFSET                        16
++#define SM_PLLMUL_SIZE                          8
++#define SM_PLLCOUNT_OFFSET                      24
++#define SM_PLLCOUNT_SIZE                        6
++#define SM_PLLTEST_OFFSET                       31
++#define SM_PLLTEST_SIZE                         1
++
++/* Bitfields in PM_PLL1 */
++
++/* Bitfields in PM_VCTRL */
++#define SM_VAUTO_OFFSET                         0
++#define SM_VAUTO_SIZE                           1
++#define SM_PM_VCTRL_VAL_OFFSET                  8
++#define SM_PM_VCTRL_VAL_SIZE                    7
++
++/* Bitfields in PM_VMREF */
++#define SM_REFSEL_OFFSET                        0
++#define SM_REFSEL_SIZE                          4
++
++/* Bitfields in PM_VMV */
++#define SM_PM_VMV_VAL_OFFSET                    0
++#define SM_PM_VMV_VAL_SIZE                      8
++
++/* Bitfields in PM_IER */
++
++/* Bitfields in PM_IDR */
++
++/* Bitfields in PM_IMR */
++
++/* Bitfields in PM_ISR */
++
++/* Bitfields in PM_ICR */
++#define SM_LOCK0_OFFSET                         0
++#define SM_LOCK0_SIZE                           1
++#define SM_LOCK1_OFFSET                         1
++#define SM_LOCK1_SIZE                           1
++#define SM_WAKE_OFFSET                          2
++#define SM_WAKE_SIZE                            1
++#define SM_VOK_OFFSET                           3
++#define SM_VOK_SIZE                             1
++#define SM_VMRDY_OFFSET                         4
++#define SM_VMRDY_SIZE                           1
++#define SM_CKRDY_OFFSET                         5
++#define SM_CKRDY_SIZE                           1
++
++/* Bitfields in PM_GCCTRL */
++#define SM_OSCSEL_OFFSET                        0
++#define SM_OSCSEL_SIZE                          1
++#define SM_PLLSEL_OFFSET                        1
++#define SM_PLLSEL_SIZE                          1
++#define SM_CEN_OFFSET                           2
++#define SM_CEN_SIZE                             1
++#define SM_CPC_OFFSET                           3
++#define SM_CPC_SIZE                             1
++#define SM_DIVEN_OFFSET                         4
++#define SM_DIVEN_SIZE                           1
++#define SM_DIV_OFFSET                           8
++#define SM_DIV_SIZE                             8
++
++/* Bitfields in RTC_CTRL */
++#define SM_PCLR_OFFSET                          1
++#define SM_PCLR_SIZE                            1
++#define SM_TOPEN_OFFSET                         2
++#define SM_TOPEN_SIZE                           1
++#define SM_CLKEN_OFFSET                         3
++#define SM_CLKEN_SIZE                           1
++#define SM_PSEL_OFFSET                          8
++#define SM_PSEL_SIZE                            16
++
++/* Bitfields in RTC_VAL */
++#define SM_RTC_VAL_VAL_OFFSET                   0
++#define SM_RTC_VAL_VAL_SIZE                     31
++
++/* Bitfields in RTC_TOP */
++#define SM_RTC_TOP_VAL_OFFSET                   0
++#define SM_RTC_TOP_VAL_SIZE                     32
++
++/* Bitfields in RTC_IER */
++
++/* Bitfields in RTC_IDR */
++
++/* Bitfields in RTC_IMR */
++
++/* Bitfields in RTC_ISR */
++
++/* Bitfields in RTC_ICR */
++#define SM_TOPI_OFFSET                          0
++#define SM_TOPI_SIZE                            1
++
++/* Bitfields in WDT_CTRL */
++#define SM_KEY_OFFSET                           24
++#define SM_KEY_SIZE                             8
++
++/* Bitfields in WDT_CLR */
++
++/* Bitfields in WDT_EXT */
++
++/* Bitfields in RC_RCAUSE */
++#define SM_POR_OFFSET                           0
++#define SM_POR_SIZE                             1
++#define SM_BOD_OFFSET                           1
++#define SM_BOD_SIZE                             1
++#define SM_EXT_OFFSET                           2
++#define SM_EXT_SIZE                             1
++#define SM_WDT_OFFSET                           3
++#define SM_WDT_SIZE                             1
++#define SM_NTAE_OFFSET                          4
++#define SM_NTAE_SIZE                            1
++#define SM_SERP_OFFSET                          5
++#define SM_SERP_SIZE                            1
++
++/* Bitfields in EIM_IER */
++
++/* Bitfields in EIM_IDR */
++
++/* Bitfields in EIM_IMR */
++
++/* Bitfields in EIM_ISR */
++
++/* Bitfields in EIM_ICR */
++
++/* Bitfields in EIM_MODE */
++
++/* Bitfields in EIM_EDGE */
++#define SM_INT0_OFFSET                          0
++#define SM_INT0_SIZE                            1
++#define SM_INT1_OFFSET                          1
++#define SM_INT1_SIZE                            1
++#define SM_INT2_OFFSET                          2
++#define SM_INT2_SIZE                            1
++#define SM_INT3_OFFSET                          3
++#define SM_INT3_SIZE                            1
++
++/* Bitfields in EIM_LEVEL */
++
++/* Bitfields in EIM_TEST */
++#define SM_TESTEN_OFFSET                        31
++#define SM_TESTEN_SIZE                          1
++
++/* Bitfields in EIM_NMIC */
++#define SM_EN_OFFSET                            0
++#define SM_EN_SIZE                              1
++
++/* Bit manipulation macros */
++#define SM_BIT(name)                            (1 << SM_##name##_OFFSET)
++#define SM_BF(name,value)                       (((value) & ((1 << SM_##name##_SIZE) - 1)) << SM_##name##_OFFSET)
++#define SM_BFEXT(name,value)                    (((value) >> SM_##name##_OFFSET) & ((1 << SM_##name##_SIZE) - 1))
++#define SM_BFINS(name,value,old)                (((old) & ~(((1 << SM_##name##_SIZE) - 1) << SM_##name##_OFFSET)) | SM_BF(name,value))
++
++/* Register access macros */
++#define sm_readl(port,reg)                      readl((port)->regs + SM_##reg)
++#define sm_writel(port,reg,value)               writel((value), (port)->regs + SM_##reg)
++
++#endif /* __ASM_AVR32_SM_H__ */
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch	174d54cdd69afafd05d72a0fd0c8751d0976a599
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-add-lcd-and-spi-to-config.patch	174d54cdd69afafd05d72a0fd0c8751d0976a599
@@ -0,0 +1,124 @@
+Index: u-boot-orig/include/configs/atstk1002.h
+===================================================================
+--- u-boot-orig.orig/include/configs/atstk1002.h	2007-01-05 15:58:53.000000000 +0100
++++ u-boot-orig/include/configs/atstk1002.h	2007-01-05 16:04:50.000000000 +0100
+@@ -32,6 +32,10 @@
+ 
+ #define CONFIG_ATSTK1000_EXT_FLASH	1
+ 
++/* Handy macros for making strings */
++#define xstringify(x) #x
++#define stringify(x) xstringify(x)
++
+ /*
+  * Timer clock frequency. We're using the CPU-internal COUNT register
+  * for this, so this is equivalent to the CPU core clock frequency
+@@ -68,10 +72,39 @@
+ #define CFG_USART1			1
+ #define CFG_MMCI			1
+ #define CFG_MACB0			1
+-#define CFG_MACB1			1
++/* #define CFG_MACB1			1 */
++
++/* Enable SPI support */
++#define CONFIG_SPI			1
++#define CONFIG_ATMEL_SPI		1
++#define CFG_SPI0			1
++
++/* Enable LCD support */
++#define CFG_DMAC			1
++#define CFG_LCDC			1
++#define CONFIG_LCD			1
++#define CONFIG_ATMEL_LCDC		1
++#define CONFIG_DISPLAY_LTV350QV		1
++
++/* Setup LCD */
++#define LCD_BPP				LCD_COLOR24
++/* CFG_SDRAM_BASE + 0x00500000 */
++#define CFG_LCD_BASE			0x10500000
++#define CFG_WHITE_ON_BLACK		1
++#define CONFIG_VIDEO_BMP_GZIP		1
++#define CFG_VIDEO_LOGO_MAX_SIZE		262144 /* > 320 * 240 * 3 */
++/* #define CONFIG_SPLASH_SCREEN		1 */
+ 
+ #define CFG_CONSOLE_UART_DEV		DEVICE_USART1
+ 
++/* Define to force consol on serial */
++/* #define CFG_CONSOLE_ALLWAYS_UART	1 */
++#ifdef CFG_CONSOLE_ALLWAYS_UART
++#define CFG_CONSOLE_IS_IN_ENV		1
++#define CFG_CONSOLE_OVERWRITE_ROUTINE	1
++#define CFG_CONSOLE_ENV_OVERWRITE	1
++#endif
++
+ /* User serviceable stuff */
+ #define CONFIG_CMDLINE_TAG		1
+ #define CONFIG_SETUP_MEMORY_TAGS	1
+@@ -80,11 +113,17 @@
+ #define CONFIG_STACKSIZE		(2048)
+ 
+ #define CONFIG_BAUDRATE			115200
++
++#ifdef CFG_LCD_BASE
+ #define CONFIG_BOOTARGS							\
+-	"console=ttyUS0 root=/dev/mmcblk0p1 fbmem=600k"
+-#define CONFIG_BOOTCOMMAND						\
+-	"mmcinit; ext2load mmc 0:1 0x90400000 /uImage; bootm 0x90400000"
++	"console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k@" stringify(CFG_LCD_BASE)
++#else
++#define CONFIG_BOOTARGS							\
++	"console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k"
++#endif
+ 
++#define CONFIG_BOOTCOMMAND						\
++	"mmcinit; ext2load mmc 0:1 /uImage; bootm"
+ #define CONFIG_BOOTDELAY		2
+ #define CONFIG_AUTOBOOT			1
+ 
+@@ -144,7 +183,7 @@
+ 					 /* | CFG_CMD_DIAG */		\
+ 					 /* | CFG_CMD_HWFLOW */		\
+ 					 /* | CFG_CMD_SAVES */		\
+-					 /* | CFG_CMD_SPI */		\
++					 | CFG_CMD_SPI			\
+ 					 /* | CFG_CMD_PING */		\
+ 					 | CFG_CMD_MMC			\
+ 					 /* | CFG_CMD_FAT */		\
+@@ -152,6 +191,7 @@
+ 					 /* | CFG_CMD_ITEST */		\
+ 					 | CFG_CMD_EXT2			\
+ 					 | CFG_CMD_JFFS2		\
++					 | CFG_CMD_BMP			\
+ 		)
+ 
+ #include <cmd_confdefs.h>
+@@ -201,7 +241,7 @@
+ #define CFG_INIT_SP_ADDR		(CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
+ 
+ #ifdef CONFIG_ATSTK1000
+-# define CFG_MALLOC_LEN			(256*1024)
++# define CFG_MALLOC_LEN			(512*1024)
+ # define CFG_MALLOC_END							\
+ 	({								\
+ 		DECLARE_GLOBAL_DATA_PTR;				\
+@@ -213,7 +253,7 @@
+ # define CFG_DMA_ALLOC_END		(CFG_MALLOC_START)
+ # define CFG_DMA_ALLOC_START		(CFG_DMA_ALLOC_END - CFG_DMA_ALLOC_LEN)
+ /* Allow 2MB for the kernel run-time image */
+-# define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00200000)
++# define CFG_LOAD_ADDR			(CFG_SDRAM_BASE + 0x00250000)
+ # define CFG_BOOTPARAMS_LEN		(16 * 1024)
+ #else
+ # define CFG_MALLOC_LEN			(8*1024)
+Index: u-boot-orig/board/atstk1000/atstk1000.c
+===================================================================
+--- u-boot-orig.orig/board/atstk1000/atstk1000.c	2007-01-05 16:02:33.000000000 +0100
++++ u-boot-orig/board/atstk1000/atstk1000.c	2007-01-05 16:04:00.000000000 +0100
+@@ -52,3 +52,7 @@
+ 	gd->bd->bi_phy_id[0] = 0x10;
+ 	gd->bd->bi_phy_id[1] = 0x11;
+ }
++
++#ifdef CFG_CONSOLE_ALLWAYS_UART
++int overwrite_console(void) { return 1; }
++#endif
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch	c9bf5bf83f39696ee9f981ed85f847334f28c2b1
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-ltv350qv-display-support.patch	c9bf5bf83f39696ee9f981ed85f847334f28c2b1
@@ -0,0 +1,163 @@
+diff -uprN u-boot-orig/board/atstk1000/ltv350qv.c u-boot/board/atstk1000/ltv350qv.c
+--- u-boot-orig/board/atstk1000/ltv350qv.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/atstk1000/ltv350qv.c	2007-01-02 15:17:32.000000000 +0100
+@@ -0,0 +1,147 @@
++/*
++ * Copyright (C) 2005-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#ifdef CONFIG_LCD
++#ifndef CONFIG_SPI
++#error No SPI controller for LCD setup, enable CFG_SPI
++#endif
++
++#include <spi.h>
++
++#ifdef CONFIG_ATMEL_SPI
++#include <atmel_spi.h>
++#endif
++
++static int ltv350qv_write_reg(u8 reg, u16 val)
++{
++	int ret;
++	u8 buffer[3];
++
++	buffer[0] = 0x74;
++	buffer[1] = 0x00;
++	buffer[2] = reg & 0x7f;
++
++	ret = spi_write(&buffer[0], 1, &buffer[1], 2);
++	if (ret != 3) {
++		printf("spi_write returned %d\n", ret);
++		return -1;
++	}
++
++	buffer[0] = 0x76;
++	buffer[1] = val >> 8;
++	buffer[2] = val;
++
++	ret = spi_write(&buffer[0], 1, &buffer[1], 2);
++	if (ret != 3) {
++		printf("spi_write returned %d\n", ret);
++		return -1;
++	}
++
++	return 0;
++}
++
++#define write_reg(reg, val)				\
++	do {						\
++		ret = ltv350qv_write_reg(reg, val);	\
++		if (ret)				\
++			goto out;			\
++	} while (0)
++
++void ltv350qv_power_on(void)
++{
++	int ret;
++
++#ifdef CONFIG_ATMEL_SPI
++	spi_select_chip(1);
++#endif
++
++	debug ("ltv350qv: do power on sequence\n");
++
++	/* write startup procedure */
++	write_reg(9, 0x0000);
++	udelay(15000);
++	write_reg(9, 0x4000);
++	write_reg(10, 0x2000);
++	write_reg(9, 0x4055);
++	udelay(55000);
++	write_reg(1, 0x409d);
++	write_reg(2, 0x0204);
++	write_reg(3, 0x0100);
++	write_reg(4, 0x3000);
++	write_reg(5, 0x4003);
++	write_reg(6, 0x000a);
++	write_reg(7, 0x0021);
++	write_reg(8, 0x0c00);
++	write_reg(10, 0x0103);
++	write_reg(11, 0x0301);
++	write_reg(12, 0x1f0f);
++	write_reg(13, 0x1f0f);
++	write_reg(14, 0x0707);
++	write_reg(15, 0x0307);
++	write_reg(16, 0x0707);
++	write_reg(17, 0x0000);
++	write_reg(18, 0x0004);
++	write_reg(19, 0x0000);
++
++	udelay(20000);
++	write_reg(9, 0x4a55);
++	write_reg(5, 0x5003);
++
++	debug ("ltv350qv: power on sequence done\n");
++out:
++	return;
++}
++
++void ltv350qv_power_off(void)
++{
++	int ret;
++
++#ifdef CONFIG_ATMEL_SPI
++	spi_select_chip(1);
++#endif
++
++	debug ("ltv350qv: do power off sequence\n");
++	/* GON -> 0, POC -> 0 */
++	write_reg(9, 0x4055);
++	/* DSC -> 0 */
++	write_reg(5, 0x4003);
++	/* VCOMG -> 0 */
++	write_reg(10, 0x2103);
++
++	udelay(1000000);
++
++	/* AP[2:0] -> 000 */
++	write_reg(9, 0x4050);
++
++	debug ("ltv350qv: power off sequence done\n");
++out:
++	return;
++}
++
++void ltv350qv_init(void)
++{
++	debug ("ltv350qv: initializing LTV350QV panel\n");
++	ltv350qv_power_on();
++}
++
++#endif
+diff -uprN u-boot-orig/board/atstk1000/Makefile u-boot/board/atstk1000/Makefile
+--- u-boot-orig/board/atstk1000/Makefile	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/board/atstk1000/Makefile	2007-01-01 16:23:12.000000000 +0100
+@@ -30,7 +30,7 @@ endif
+ 
+ LIB		:= lib$(BOARD).a
+ 
+-SRC		:= $(BOARD).c $(DAUGHTERBOARD).c eth.c flash.c
++SRC		:= $(BOARD).c $(DAUGHTERBOARD).c eth.c flash.c ltv350qv.c
+ SRC		+= spi.c
+ OBJS		:= $(addsuffix .o,$(basename $(SRC)))
+ 
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch	a1ebfc54a394239909ae56d84e754d7ec80bbac3
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/atstk1000-spi-support.patch	a1ebfc54a394239909ae56d84e754d7ec80bbac3
@@ -0,0 +1,98 @@
+diff -uprN u-boot-orig/board/atstk1000/spi.c u-boot/board/atstk1000/spi.c
+--- u-boot-orig/board/atstk1000/spi.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/board/atstk1000/spi.c	2007-01-03 08:46:36.000000000 +0100
+@@ -0,0 +1,83 @@
++/*
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#include <spi.h>
++#include <asm/io.h>
++#include <atmel_spi.h>
++
++extern void ltv350qv_init(void);
++
++static struct spi_options_t cs0 = {
++	.reg		= 0,
++	.baudrate	= 200000,
++	.bits		= 8,
++	.spck_delay	= 0,
++	.trans_delay	= 0,
++	.stay_act	= 1,
++	.spi_mode	= 3,
++};
++static struct spi_options_t cs1 = {
++	.reg		= 1,
++	.baudrate	= 1500000,
++	.bits		= 8,
++	.spck_delay	= 0,
++	.trans_delay	= 0,
++	.stay_act	= 1,
++	.spi_mode	= 3,
++};
++
++void spi_chipsel_dac(int cs)
++{
++	if (cs) spi_select_chip(0);
++	else spi_unselect_chip(0);
++}
++
++void spi_chipsel_lcd(int cs)
++{
++	if (cs) spi_select_chip(1);
++	else spi_unselect_chip(1);
++}
++
++spi_chipsel_type spi_chipsel[] = {
++	spi_chipsel_dac,
++	spi_chipsel_lcd,
++};
++int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
++
++void board_init_spi(void)
++{
++	int ret;
++
++	spi_init();
++
++	ret = spi_setup_chip_reg(&cs0, 45000000); /* TODO: get APBA speed */
++	if (ret)
++		return;
++	ret = spi_setup_chip_reg(&cs1, 45000000); /* TODO: get APBA speed */
++	if (ret)
++		return;
++
++	spi_enable();
++
++	ltv350qv_init();
++}
+diff -uprN u-boot-orig/board/atstk1000/Makefile u-boot/board/atstk1000/Makefile
+--- u-boot-orig/board/atstk1000/Makefile	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/board/atstk1000/Makefile	2007-01-01 16:23:12.000000000 +0100
+@@ -31,6 +31,7 @@ endif
+ LIB		:= lib$(BOARD).a
+ 
+ SRC		:= $(BOARD).c $(DAUGHTERBOARD).c eth.c flash.c
++SRC		+= spi.c
+ OBJS		:= $(addsuffix .o,$(basename $(SRC)))
+ 
+ .PHONY: all
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch	0687dbba73b78ddd353f834a58a26b02ce8f8ef8
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/avr32-boards-fix-flash-read.patch	0687dbba73b78ddd353f834a58a26b02ce8f8ef8
@@ -0,0 +1,120 @@
+Index: u-boot-orig/board/atmel/ngw/flash.c
+===================================================================
+--- u-boot-orig.orig/board/atmel/ngw/flash.c	2007-01-03 11:31:44.000000000 +0100
++++ u-boot-orig/board/atmel/ngw/flash.c	2007-01-03 11:33:13.000000000 +0100
+@@ -161,7 +161,7 @@
+ {
+ 	unsigned long flags;
+ 	uint16_t *base, *p, *s, *end;
+-	uint16_t word, status;
++	uint16_t word, status,status1;
+ 	int ret = ERR_OK;
+ 
+ 	if (addr < info->start[0]
+@@ -196,20 +196,36 @@
+ 		sync_write_buffer();
+ 
+ 		/* Wait for completion */
+-		do {
++        status1 = readw(p);
++        do {
+ 			/* TODO: Timeout */
+-			status = readw(p);
+-		} while ((status != word) && !(status & 0x28));
+-
++            status = status1;
++            status1=readw(p);
++        } while ( ((status ^ status1) & 0x40) && // toggle bit has toggled
++                 !(status1 & 0x28) // status is "working"
++                );
++
++        // We'll need to check once again for toggle bit because the toggle bit
++        // may stop toggling as I/O5 changes to "1" (ref at49bv642.pdf p9)
++        status1=readw(p);
++        status=readw(p);
++        if ((status ^ status1) & 0x40)
++        {
++			printf("Flash write error at address 0x%p: 0x%02x != 0x%02x\n",
++			       p, status,word);
++            ret = ERR_PROG_ERROR;
++            writew(0xf0, base);
++            readw(base);
++            break;
++        }
++        // we can now verify status==word if we want to.
++
++        // is this Product ID Exit command really required??
++        // --If configuration is 00 (the default) the device is allready in read mode,
++        // and the instruction is not required!
+ 		writew(0xf0, base);
+ 		readw(base);
+ 
+-		if (status != word) {
+-			printf("Flash write error at address 0x%p: 0x%02x\n",
+-			       p, status);
+-			ret = ERR_PROG_ERROR;
+-			break;
+-		}
+ 	}
+ 
+ 	local_irq_restore(flags);
+Index: u-boot-orig/board/atstk1000/flash.c
+===================================================================
+--- u-boot-orig.orig/board/atstk1000/flash.c	2007-01-03 11:31:44.000000000 +0100
++++ u-boot-orig/board/atstk1000/flash.c	2007-01-03 11:33:13.000000000 +0100
+@@ -160,7 +160,7 @@
+ {
+ 	unsigned long flags;
+ 	uint16_t *base, *p, *s, *end;
+-	uint16_t word, status;
++	uint16_t word, status,status1;
+ 	int ret = ERR_OK;
+ 
+ 	if (addr < info->start[0]
+@@ -195,20 +195,36 @@
+ 		sync_write_buffer();
+ 
+ 		/* Wait for completion */
+-		do {
++        status1 = readw(p);
++        do {
+ 			/* TODO: Timeout */
+-			status = readw(p);
+-		} while ((status != word) && !(status & 0x28));
+-
++            status = status1;
++            status1=readw(p);
++        } while ( ((status ^ status1) & 0x40) && // toggle bit has toggled
++                 !(status1 & 0x28) // status is "working"
++                );
++
++        // We'll need to check once again for toggle bit because the toggle bit
++        // may stop toggling as I/O5 changes to "1" (ref at49bv642.pdf p9)
++        status1=readw(p);
++        status=readw(p);
++        if ((status ^ status1) & 0x40)
++        {
++			printf("Flash write error at address 0x%p: 0x%02x != 0x%02x\n",
++			       p, status,word);
++            ret = ERR_PROG_ERROR;
++            writew(0xf0, base);
++            readw(base);
++            break;
++        }
++        // we can now verify status==word if we want to.
++
++        // is this Product ID Exit command really required??
++        // --If configuration is 00 (the default) the device is allready in read mode,
++        // and the instruction is not required!
+ 		writew(0xf0, base);
+ 		readw(base);
+ 
+-		if (status != word) {
+-			printf("Flash write error at address 0x%p: 0x%02x\n",
+-			       p, status);
+-			ret = ERR_PROG_ERROR;
+-			break;
+-		}
+ 	}
+ 
+ 	local_irq_restore(flags);
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch	80f5abd078487b50df179cad3b3d1a0f382b56ae
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/cmd-bmp-add-gzip-compressed-bmp.patch	80f5abd078487b50df179cad3b3d1a0f382b56ae
@@ -0,0 +1,90 @@
+Index: u-boot-orig/common/cmd_bmp.c
+===================================================================
+--- u-boot-orig.orig/common/cmd_bmp.c	2007-01-05 14:50:55.000000000 +0100
++++ u-boot-orig/common/cmd_bmp.c	2007-01-05 15:59:21.000000000 +0100
+@@ -176,13 +176,83 @@
+  */
+ static int bmp_display(ulong addr, int x, int y)
+ {
++	int ret;
++#ifdef CONFIG_VIDEO_BMP_GZIP
++	bmp_image_t *bmp = (bmp_image_t *)addr;
++	unsigned char *dst = NULL;
++	ulong len;
++
++	if (!((bmp->header.signature[0]=='B') &&
++	      (bmp->header.signature[1]=='M'))) {
++
++		/*
++		 * Decompress bmp image
++		 */
++		len = CFG_VIDEO_LOGO_MAX_SIZE;
++		dst = malloc(CFG_VIDEO_LOGO_MAX_SIZE);
++		if (dst == NULL) {
++			printf("Error: malloc in gunzip failed!\n");
++			return(1);
++		}
++		if (gunzip(dst, CFG_VIDEO_LOGO_MAX_SIZE, (uchar *)addr, &len) != 0) {
++			free(dst);
++			printf("There is no valid bmp file at the given address\n");
++			return(1);
++		}
++		if (len == CFG_VIDEO_LOGO_MAX_SIZE) {
++			printf("Image could be truncated "
++					"(increase CFG_VIDEO_LOGO_MAX_SIZE)!\n");
++		}
++
++		/*
++		 * Set addr to decompressed image
++		 */
++		bmp = (bmp_image_t *)dst;
++
++		/*
++		 * Check for bmp mark 'BM'
++		 */
++		if (!((bmp->header.signature[0] == 'B') &&
++		      (bmp->header.signature[1] == 'M'))) {
++			printf("There is no valid bmp file at the given address\n");
++			free(dst);
++			return(1);
++		}
++	}
++
++	if (dst) {
++		addr = (ulong)dst;
++	}
++#endif /* CONFIG_VIDEO_BMP_GZIP */
++
+ #if defined(CONFIG_LCD)
+ 	extern int lcd_display_bitmap (ulong, int, int);
+ 
+-	return (lcd_display_bitmap (addr, x, y));
++	ret = lcd_display_bitmap (addr, x, y);
++	if (ret) {
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		free(dst);
++#endif
++		return ret;
++	}
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		free(dst);
++#endif
++	return 0;
++
+ #elif defined(CONFIG_VIDEO)
+ 	extern int video_display_bitmap (ulong, int, int);
+-	return (video_display_bitmap (addr, x, y));
++	ret = video_display_bitmap (addr, x, y);
++	if (ret) {
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		free(dst);
++#endif
++		return ret;
++	}
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		free(dst);
++#endif
++	return 0;
+ #else
+ # error bmp_display() requires CONFIG_LCD or CONFIG_VIDEO
+ #endif
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch	70b1b5f471490abbf21b2c173a9863794616545c
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/fix-mmc-data-timeout.patch	70b1b5f471490abbf21b2c173a9863794616545c
@@ -0,0 +1,101 @@
+---
+ cpu/at32ap7xxx/mmc.c |   58 +++++++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+Index: u-boot-1.1.4-avr32/cpu/at32ap7xxx/mmc.c
+===================================================================
+--- u-boot-1.1.4-avr32.orig/cpu/at32ap7xxx/mmc.c	2007-01-30 14:53:33.000000000 +0100
++++ u-boot-1.1.4-avr32/cpu/at32ap7xxx/mmc.c	2007-01-30 15:45:37.000000000 +0100
+@@ -67,6 +67,7 @@ struct mmci {
+ 	unsigned int rca;
+ 	block_dev_desc_t blkdev;
+ 	const struct device *dev;
++	int card_is_sd;
+ };
+ 
+ struct mmci mmci = {
+@@ -391,6 +392,8 @@ static int sd_init_card(struct mmci *mmc
+ 	mmc->rca = resp[0] >> 16;
+ 	if (verbose)
+ 		printf("SD Card detected (RCA %u)\n", mmc->rca);
++	mmc->card_is_sd = 1;
++
+ 	return 0;
+ }
+ 
+@@ -425,6 +428,57 @@ static int mmc_init_card(struct mmci *mm
+ 	return ret;
+ }
+ 
++static void mci_set_data_timeout(struct mmci *mmc, struct mmc_csd *csd)
++{
++	static const unsigned int dtomul_to_shift[] = {
++		0, 4, 7, 8, 10, 12, 16, 20,
++	};
++	static const unsigned int taac_exp[] = {
++		1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
++	};
++	static const unsigned int taac_mant[] = {
++		0,  10, 12, 13, 15, 60, 25, 30,
++		35, 40, 45, 50, 55, 60, 70, 80,
++	};
++	unsigned int timeout_ns, timeout_clks;
++	unsigned int e, m;
++	unsigned int dtocyc, dtomul;
++	u32 dtor;
++
++	e = csd->taac & 0x07;
++	m = (csd->taac >> 3) & 0x0f;
++
++	timeout_ns = (taac_exp[e] * taac_mant[m] + 9) / 10;
++	timeout_clks = csd->nsac * 100;
++
++	timeout_clks += (((timeout_ns + 9) / 10)
++			 * ((CFG_MMC_CLK_PP + 99999) / 100000) + 9999) / 10000;
++	if (!mmc->card_is_sd)
++		timeout_clks *= 10;
++	else
++		timeout_clks *= 100;
++
++	dtocyc = timeout_clks;
++	dtomul = 0;
++	while (dtocyc > 15 && dtomul < 8) {
++		dtomul++;
++		dtocyc = timeout_clks >> dtomul_to_shift[dtomul];
++	}
++
++	if (dtomul >= 8) {
++		dtomul = 7;
++		dtocyc = 15;
++		puts("Warning: Using maximum data timeout\n");
++	}
++
++	dtor = (MMCI_MKBF(MCI_DTOR_DTOMUL, dtomul)
++		| MMCI_MKBF(MCI_DTOR_DTOCYC, dtocyc));
++	mmci_writel(&mmci, MCI_DTOR, dtor);
++
++	printf("mmc: Using %u cycles data timeout (DTOR=0x%x)\n",
++	       dtocyc << dtomul_to_shift[dtomul], dtor);
++}
++
+ int mmc_init(int verbose)
+ {
+ 	struct mmc_cid cid;
+@@ -443,6 +497,8 @@ int mmc_init(int verbose)
+ 	mmci_writel(&mmci, MCI_IDR, ~0UL);
+ 	mci_set_mode(CFG_MMC_CLK_OD, CFG_MMC_BLKLEN);
+ 
++	mmci.card_is_sd = 0;
++
+ 	ret = sd_init_card(&mmci, &cid, verbose);
+ 	if (ret) {
+ 		mmci.rca = MMC_DEFAULT_RCA;
+@@ -458,6 +514,8 @@ int mmc_init(int verbose)
+ 	if (verbose)
+ 		mmc_dump_csd(&csd);
+ 
++	mci_set_data_timeout(&mmci, &csd);
++
+ 	/* Initialize the blockdev structure */
+ 	sprintf(mmci.blkdev.vendor,
+ 		 "Man %02x%04x Snr %08x",
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch	055ca79e80417f03df63174afb7a707a2e98e5a6
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/lcd-add-24-bpp-support-and-atmel-lcdc-support.patch	055ca79e80417f03df63174afb7a707a2e98e5a6
@@ -0,0 +1,670 @@
+Index: u-boot-1.1.4/common/lcd.c
+===================================================================
+--- u-boot-1.1.4.orig/common/lcd.c	2007-01-11 15:25:03.000000000 +0100
++++ u-boot-1.1.4/common/lcd.c	2007-01-11 15:28:54.000000000 +0100
+@@ -34,6 +34,7 @@
+ #include <command.h>
+ #include <version.h>
+ #include <stdarg.h>
++#include <malloc.h>
+ #include <linux/types.h>
+ #include <devices.h>
+ #if defined(CONFIG_POST)
+@@ -81,6 +82,9 @@
+ extern void lcd_enable (void);
+ static void *lcd_logo (void);
+ 
++#ifdef CONFIG_VIDEO_BMP_GZIP
++extern int gunzip(void *, int, unsigned char *, unsigned long *);
++#endif
+ 
+ #if LCD_BPP == LCD_COLOR8
+ extern void lcd_setcolreg (ushort regno,
+@@ -112,9 +116,12 @@
+ #if 1
+ 	/* Copy up rows ignoring the first one */
+ 	memcpy (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE);
+-
+ 	/* Clear the last one */
+ 	memset (CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE);
++#ifdef CONFIG_AVR32
++	/* flush cache */
++	dcache_clean_range(CONSOLE_ROW_FIRST, CONSOLE_SIZE);
++#endif
+ #else
+ 	/*
+ 	 * Poor attempt to optimize speed by moving "long"s.
+@@ -228,10 +235,23 @@
+ static void lcd_drawchars (ushort x, ushort y, uchar *str, int count)
+ {
+ 	uchar *dest;
+-	ushort off, row;
++	ushort off, row, bpp, bytespp;
++#ifdef CONFIG_AVR32
++	uchar *dest_start;
++#endif
+ 
+-	dest = (uchar *)(lcd_base + y * lcd_line_length + x * (1 << LCD_BPP) / 8);
+-	off  = x * (1 << LCD_BPP) % 8;
++#if (LCD_BPP > LCD_COLOR32)
++	bpp = LCD_BPP;
++#else
++	bpp = 1<<LCD_BPP;
++#endif
++	bytespp = (bpp + 7) / 8;
++
++	dest = (uchar *)(lcd_base + y * lcd_line_length + x * bytespp);
++	off  = x * bytespp * 8 % 8;
++#ifdef CONFIG_AVR32
++	dest_start = dest;
++#endif
+ 
+ 	for (row=0;  row < VIDEO_FONT_HEIGHT;  ++row, dest += lcd_line_length)  {
+ 		uchar *s = str;
+@@ -261,7 +281,17 @@
+ 				bits <<= 1;
+ 			}
+ #elif LCD_BPP == LCD_COLOR16
+-			for (c=0; c<16; ++c) {
++			for (c=0; c<8; ++c) {
++				*d++ = (bits & 0x80) ?
++						lcd_color_fg : lcd_color_bg;
++				bits <<= 1;
++			}
++#elif LCD_BPP == LCD_COLOR24
++			for (c=0; c<8; ++c) {
++				*d++ = (bits & 0x80) ?
++						lcd_color_fg : lcd_color_bg;
++				*d++ = (bits & 0x80) ?
++						lcd_color_fg : lcd_color_bg;
+ 				*d++ = (bits & 0x80) ?
+ 						lcd_color_fg : lcd_color_bg;
+ 				bits <<= 1;
+@@ -271,6 +301,10 @@
+ #if LCD_BPP == LCD_MONOCHROME
+ 		*d  = rest | (*d & ((1 << (8-off)) - 1));
+ #endif
++#ifdef CONFIG_AVR32
++		/* flush cache */
++		dcache_clean_range(dest_start, (int)(d - dest_start));
++#endif
+ 	}
+ }
+ 
+@@ -346,7 +380,11 @@
+ 
+ 	lcd_base = (void *)(gd->fb_base);
+ 
+-	lcd_line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
++	if (panel_info.vl_bpix > LCD_COLOR32)
++		lcd_line_length = (panel_info.vl_col * panel_info.vl_bpix) / 8;
++	else
++		lcd_line_length = (panel_info.vl_col
++				* NBITS (panel_info.vl_bpix)) / 8;
+ 
+ 	lcd_init (lcd_base);		/* LCD initialization */
+ 
+@@ -407,6 +445,11 @@
+ 	console_col = 0;
+ 	console_row = 0;
+ 
++#ifdef CONFIG_AVR32
++	/* flush cache */
++	dcache_clean_range(CONSOLE_ROW_FIRST, CONSOLE_SIZE);
++#endif
++
+ 	return (0);
+ }
+ 
+@@ -453,10 +496,17 @@
+ ulong lcd_setmem (ulong addr)
+ {
+ 	ulong size;
+-	int line_length = (panel_info.vl_col * NBITS (panel_info.vl_bpix)) / 8;
++	int bpp;
++	int line_length;
++	if (panel_info.vl_bpix > LCD_COLOR32)
++		bpp = panel_info.vl_bpix;
++	else
++		bpp = NBITS (panel_info.vl_bpix);
++
++	line_length = (panel_info.vl_col * bpp) / 8;
+ 
+ 	debug ("LCD panel info: %d x %d, %d bit/pix\n",
+-		panel_info.vl_col, panel_info.vl_row, NBITS (panel_info.vl_bpix) );
++		panel_info.vl_col, panel_info.vl_row, bpp);
+ 
+ 	size = line_length * panel_info.vl_row;
+ 
+@@ -475,14 +525,22 @@
+ 
+ static void lcd_setfgcolor (int color)
+ {
++#if LCD_BPP <= LCD_COLOR8
+ 	lcd_color_fg = color & 0x0F;
++#else
++	lcd_color_fg = color;
++#endif
+ }
+ 
+ /*----------------------------------------------------------------------*/
+ 
+ static void lcd_setbgcolor (int color)
+ {
++#if LCD_BPP <= LCD_COLOR8
+ 	lcd_color_bg = color & 0x0F;
++#else
++	lcd_color_bg = color;
++#endif
+ }
+ 
+ /*----------------------------------------------------------------------*/
+@@ -509,7 +567,11 @@
+ #ifdef CONFIG_LCD_LOGO
+ void bitmap_plot (int x, int y)
+ {
++#if !defined(CONFIG_ATMEL_LCDC)
+ 	ushort *cmap;
++#else
++	ulong *cmap;
++#endif
+ 	ushort i, j;
+ 	uchar *bmap;
+ 	uchar *fb;
+@@ -519,6 +581,8 @@
+ #elif defined(CONFIG_MPC823)
+ 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ 	volatile cpm8xx_t *cp = &(immr->im_cpm);
++#elif defined(CONFIG_ATMEL_LCDC)
++	struct lcdc_info *cinfo = panel_info.lcdc;
+ #endif
+ 
+ 	debug ("Logo: width %d  height %d  colors %d  cmap %d\n",
+@@ -534,6 +598,8 @@
+ 		cmap = (ushort *)fbi->palette;
+ #elif defined(CONFIG_MPC823)
+ 		cmap = (ushort *)&(cp->lcd_cmap[BMP_LOGO_OFFSET*sizeof(ushort)]);
++#elif defined(CONFIG_ATMEL_LCDC)
++		cmap = (ulong *)(cinfo->palette) + BMP_LOGO_OFFSET;
+ #endif
+ 
+ 		WATCHDOG_RESET();
+@@ -541,10 +607,19 @@
+ 		/* Set color map */
+ 		for (i=0; i<(sizeof(bmp_logo_palette)/(sizeof(ushort))); ++i) {
+ 			ushort colreg = bmp_logo_palette[i];
++#if defined(CONFIG_ATMEL_LCDC)
++			/* convert to match palette registers */
++			uchar red   = (colreg >> 8) & 0x0f;
++			uchar green = (colreg >> 4) & 0x0f;
++			uchar blue  = (colreg >> 0) & 0x0f;
++			colreg  = (blue  << 11);
++			colreg |= (green << 6);
++			colreg |= (red   << 1);
++#endif
+ #ifdef  CFG_INVERT_COLORS
+-			*cmap++ = 0xffff - colreg;
++			*(cmap++) = 0xffff - colreg;
+ #else
+-			*cmap++ = colreg;
++			*(cmap++) = colreg;
+ #endif
+ 		}
+ 
+@@ -579,14 +654,16 @@
+  */
+ int lcd_display_bitmap(ulong bmp_image, int x, int y)
+ {
++#if !defined(CONFIG_ATMEL_LCDC)
+ 	ushort *cmap;
++#endif
+ 	ushort i, j;
+ 	uchar *fb;
+ 	bmp_image_t *bmp=(bmp_image_t *)bmp_image;
+ 	uchar *bmap;
+ 	ushort padded_line;
+ 	unsigned long width, height;
+-	unsigned colors,bpix;
++	unsigned colors,bpix,bpp,bytespp;
+ 	unsigned long compression;
+ #if defined(CONFIG_PXA250)
+ 	struct pxafb_info *fbi = &panel_info.pxa;
+@@ -597,82 +674,126 @@
+ 
+ 	if (!((bmp->header.signature[0]=='B') &&
+ 		(bmp->header.signature[1]=='M'))) {
+-		printf ("Error: no valid bmp image at %lx\n", bmp_image);
++		printf ("[LCD] No valid BMP image at 0x%08lx\n", bmp_image);
+ 		return 1;
+-}
++	}
+ 
+ 	width = le32_to_cpu (bmp->header.width);
+ 	height = le32_to_cpu (bmp->header.height);
++	bpp = le16_to_cpu (bmp->header.bit_count);
+ 	colors = 1<<le16_to_cpu (bmp->header.bit_count);
+ 	compression = le32_to_cpu (bmp->header.compression);
++	bytespp = (panel_info.vl_bpix + 7) / 8;
+ 
+-	bpix = NBITS(panel_info.vl_bpix);
++	if (panel_info.vl_bpix > LCD_COLOR32)
++		bpix = panel_info.vl_bpix;
++	else
++		bpix = NBITS(panel_info.vl_bpix);
+ 
+-	if ((bpix != 1) && (bpix != 8)) {
++	if ((bpix != 1) && (bpix != 8) && (bpix != 24)) {
+ 		printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
+ 			bpix);
+ 		return 1;
+ 	}
+ 
+-	if (bpix != le16_to_cpu(bmp->header.bit_count)) {
++	if (bpix != bpp) {
+ 		printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
+-			bpix,
+-			le16_to_cpu(bmp->header.bit_count));
++			bpix, bpp);
+ 		return 1;
+ 	}
+ 
+-	debug ("Display-bmp: %d x %d  with %d colors\n",
+-		(int)width, (int)height, (int)colors);
++	debug ("Display-bmp: %d x %d with %d colors (%d bpp)\n",
++		(int)width, (int)height, (int)colors, (int)bpp);
+ 
+-	if (bpix==8) {
++	if (bpix == 8) {
+ #if defined(CONFIG_PXA250)
+ 		cmap = (ushort *)fbi->palette;
+ #elif defined(CONFIG_MPC823)
+ 		cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
++#elif defined(CONFIG_ATMEL_LCDC)
++		/* no need to have a palette link, we use lcd_setcolreg */
+ #else
+ # error "Don't know location of color map"
+ #endif
+ 
+ 		/* Set color map */
+ 		for (i=0; i<colors; ++i) {
++#if LCP_BPP <= LCD_COLOR8 /* palette only for 8 bpp and less */
+ 			bmp_color_table_entry_t cte = bmp->color_table[i];
++#endif
++#if !defined(CONFIG_ATMEL_LCDC)
+ 			ushort colreg =
+ 				( ((cte.red)   << 8) & 0xf800) |
+ 				( ((cte.green) << 3) & 0x07e0) |
+ 				( ((cte.blue)  >> 3) & 0x001f) ;
+ #ifdef CFG_INVERT_COLORS
+-			*cmap = 0xffff - colreg;
+-#else
+-			*cmap = colreg;
++			colreg = 0xffff - colreg;
+ #endif
+ #if defined(CONFIG_PXA250)
+-			cmap++;
++			cmap[i] = colreg;
+ #elif defined(CONFIG_MPC823)
+-			cmap--;
++			cmap[colors-i] = colreg;
++#endif
++#else /* CONFIG_ATMEL_LCDC */
++#if LCD_BPP <= LCD_COLOR8
++			lcd_setcolreg(i, cte.red, cte.green, cte.blue);
++#endif
+ #endif
+ 		}
+ 	}
+ 
+-	padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
+-	if ((x + width)>panel_info.vl_col)
++	padded_line = (((width * bpp + 7) / 8) + 3) & ~0x3;
++	if ((x + width) > panel_info.vl_col)
+ 		width = panel_info.vl_col - x;
+-	if ((y + height)>panel_info.vl_row)
++	if ((y + height) > panel_info.vl_row)
+ 		height = panel_info.vl_row - y;
+ 
+ 	bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
+-	fb   = (uchar *) (lcd_base +
+-		(y + height - 1) * lcd_line_length + x);
+-	for (i = 0; i < height; ++i) {
+-		WATCHDOG_RESET();
+-		for (j = 0; j < width ; j++)
++	fb   = (uchar *) (lcd_base + (y + height - 1) * lcd_line_length + x);
++
++	switch (bpp) {
++	case 24:
++		for (i = 0; i < height; ++i) {
++			WATCHDOG_RESET();
++			for (j = 0; j < width; j++) {
+ #if defined(CONFIG_PXA250)
+-			*(fb++)=*(bmap++);
++#error 24 bpp support not added for PXA250
++#elif defined(CONFIG_ATMEL_LCDC)
++				fb[0] = bmap[0];
++				fb[1] = bmap[1];
++				fb[2] = bmap[2];
++				fb += 3;
++				bmap += 3;
+ #elif defined(CONFIG_MPC823)
+-			*(fb++)=255-*(bmap++);
++#error 24 bpp support not added for MPC823
+ #endif
+-		bmap += (width - padded_line);
+-		fb   -= (width + lcd_line_length);
+-	}
++			}
++			bmap += (width * bytespp - padded_line);
++			fb   -= (width * bytespp + lcd_line_length);
++		}
++		break;
++	case 1: /* pass through */
++	case 8:
++		for (i = 0; i < height; ++i) {
++			WATCHDOG_RESET();
++			for (j = 0; j < width; j++) {
++#if defined(CONFIG_PXA250)
++				*(fb++)=*(bmap++);
++#elif defined(CONFIG_ATMEL_LCDC)
++				*(fb++)=*(bmap++);
++#elif defined(CONFIG_MPC823)
++				*(fb++)=255-*(bmap++);
++#endif
++			}
++			bmap += (width * bytespp - padded_line);
++			fb   -= (width * bytespp + lcd_line_length);
++		}
++		break;
++	default:
++		break;
++	};
++
++	/* TODO: flush fb */
+ 
+ 	return (0);
+ }
+@@ -694,12 +815,68 @@
+ 	static int do_splash = 1;
+ 
+ 	if (do_splash && (s = getenv("splashimage")) != NULL) {
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		bmp_image_t *bmp;
++		unsigned char *dst = NULL;
++		ulong len;
++#endif
+ 		addr = simple_strtoul(s, NULL, 16);
+ 		do_splash = 0;
+ 
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		bmp = (bmp_image_t *)addr;
++
++		if (!((bmp->header.signature[0]=='B') &&
++		      (bmp->header.signature[1]=='M'))) {
++			len = CFG_VIDEO_LOGO_MAX_SIZE;
++			dst = malloc(CFG_VIDEO_LOGO_MAX_SIZE);
++			if (dst == NULL) {
++				printf("[LCD] Malloc for gunzip failed!\n");
++				return ((void *)lcd_base);
++			}
++			if (gunzip(dst, CFG_VIDEO_LOGO_MAX_SIZE,
++						(uchar *)addr, &len) != 0) {
++				free(dst);
++				printf("[LCD] No valid BMP image at 0x%08lx\n",
++						addr);
++				return ((void *)lcd_base);
++			}
++			if (len == CFG_VIDEO_LOGO_MAX_SIZE) {
++				printf("[LCD] Image could be truncated (increase "
++						"CFG_VIDEO_LOGO_MAX_SIZE)!\n");
++			}
++
++			/*
++			 * Set addr to decompressed image
++			 */
++			bmp = (bmp_image_t *)dst;
++
++			/*
++			 * Check for bmp mark 'BM'
++			 */
++			if (!((bmp->header.signature[0] == 'B') &&
++			      (bmp->header.signature[1] == 'M'))) {
++				printf("[LCD] No valid BMP image at 0x%08lx\n",
++						addr);
++				free(dst);
++				return ((void *)lcd_base);
++			}
++
++			addr = (ulong)dst;
++		}
++#endif
+ 		if (lcd_display_bitmap (addr, 0, 0) == 0) {
++#ifdef CONFIG_VIDEO_BMP_GZIP
++			if (dst)
++				free(dst);
++#endif
+ 			return ((void *)lcd_base);
+ 		}
++
++#ifdef CONFIG_VIDEO_BMP_GZIP
++		if (dst)
++			free(dst);
++#endif
+ 	}
+ #endif /* CONFIG_SPLASH_SCREEN */
+ 
+Index: u-boot-1.1.4/include/lcd.h
+===================================================================
+--- u-boot-1.1.4.orig/include/lcd.h	2007-01-11 15:25:03.000000000 +0100
++++ u-boot-1.1.4/include/lcd.h	2007-01-11 15:25:38.000000000 +0100
+@@ -148,7 +148,159 @@
+ 
+ extern vidinfo_t panel_info;
+ 
+-#endif /* CONFIG_MPC823 or CONFIG_PXA250 */
++#elif defined CONFIG_ATMEL_LCDC
++struct lcdc_bitfield {
++	u32 offset;	/* beginning of bitfield */
++	u32 length;	/* length of bitfield */
++	u32 msb_right;	/* != 0 : Most significant bit is right */
++};
++
++struct lcdc_var_screeninfo {
++	u32 xres;			/* visible resolution		*/
++	u32 yres;
++	u32 xres_virtual;		/* virtual resolution		*/
++	u32 yres_virtual;
++	u32 xoffset;			/* offset from virtual to visible */
++	u32 yoffset;			/* resolution			*/
++
++	u32 bits_per_pixel;		/* guess what			*/
++	u32 grayscale;			/* != 0 Graylevels instead of colors */
++
++	struct lcdc_bitfield red;	/* bitfield in fb mem if true color, */
++	struct lcdc_bitfield green;	/* else only length is significant */
++	struct lcdc_bitfield blue;
++	struct lcdc_bitfield transp;	/* transparency			*/
++
++	u32 nonstd;			/* != 0 Non standard pixel format */
++
++	u32 activate;			/* see FB_ACTIVATE_*		*/
++
++	u32 height;			/* height of picture in mm    */
++	u32 width;			/* width of picture in mm     */
++
++	u32 accel_flags;		/* (OBSOLETE) see fb_info.flags */
++
++	/* Timing: All values in pixclocks, except pixclock (of course) */
++	u32 pixclock;			/* pixel clock in ps (pico seconds) */
++	u32 left_margin;		/* time from sync to picture	*/
++	u32 right_margin;		/* time from picture to sync	*/
++	u32 upper_margin;		/* time from sync to picture	*/
++	u32 lower_margin;
++	u32 hsync_len;		/* length of horizontal sync	*/
++	u32 vsync_len;		/* length of vertical sync	*/
++	u32 sync;			/* see FB_SYNC_*		*/
++	u32 vmode;			/* see FB_VMODE_*		*/
++	u32 rotate;			/* angle we rotate counter clockwise */
++	u32 reserved[5];		/* Reserved for future compatibility */
++};
++
++/*
++ * Atmel LCDC DMA descriptor
++ */
++struct lcdc_dma_descriptor {
++	u_long	fdadr;		/* Frame descriptor address register */
++	u_long	fsadr;		/* Frame source address register */
++	u_long	fidr;		/* Frame ID register */
++	u_long	ldcmd;		/* Command register */
++};
++
++/*
++ * Atmel LCDC info
++ */
++struct lcdc_info {
++	u_long	reg_lccr3;
++	u_long	reg_lccr2;
++	u_long	reg_lccr1;
++	u_long	reg_lccr0;
++	u_long	fdadr0;
++	u_long	fdadr1;
++
++	void	*regs;
++
++	u_long	guard_time;
++	u_long	xres;
++	u_long	yres;
++	u_long	xres_virtual;
++	u_long	yres_virtual;
++	u_long	bits_per_pixel;
++	u_long	smem_start;
++	u_long	line_length;
++	u_long	visual;
++
++	u_long	pixclock;
++	u_long	left_margin;
++	u_long	right_margin;
++	u_long	upper_margin;
++	u_long	lower_margin;
++	u_long	hsync_len;
++	u_long	vsync_len;
++	u_long	sync;
++	u_long	yoffset;
++	u_long	xoffset;
++
++	struct  lcdc_var_screeninfo var;
++
++	/* DMA descriptors */
++	struct	lcdc_dma_descriptor	*dmadesc_fblow;
++	struct	lcdc_dma_descriptor	*dmadesc_fbhigh;
++	struct	lcdc_dma_descriptor	*dmadesc_palette;
++
++	u_long	screen;		/* physical address of frame buffer */
++	u_long	palette;	/* physical address of palette memory */
++	u_int	palette_size;
++
++	/* Device resource */
++	const struct device *dev;
++};
++
++/*
++ * LCD controller stucture for AVR32 CPU
++ */
++typedef struct vidinfo {
++	ushort	vl_col;		/* Number of columns (i.e. 640) */
++	ushort	vl_row;		/* Number of rows (i.e. 480) */
++	ushort	vl_width;	/* Width of display area in millimeters */
++	ushort	vl_height;	/* Height of display area in millimeters */
++
++	/* LCD configuration register */
++	u_char	vl_clkp;	/* Clock polarity */
++	u_char	vl_oep;		/* Output Enable polarity */
++	u_char	vl_hsp;		/* Horizontal Sync polarity */
++	u_char	vl_vsp;		/* Vertical Sync polarity */
++	u_char	vl_dp;		/* Data polarity */
++	u_char	vl_bpix;	/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
++	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
++	u_char	vl_splt;	/* Split display, 0 = single-scan, 1 = dual-scan */
++	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
++	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
++
++	/* Horizontal control register. Timing from data sheet */
++	ushort	vl_hpw;		/* Horz sync pulse width */
++	u_char	vl_blw;		/* Wait before of line */
++	u_char	vl_elw;		/* Wait end of line */
++
++	/* Vertical control register. */
++	u_char	vl_vpw;		/* Vertical sync pulse width */
++	u_char	vl_bfw;		/* Wait before of frame */
++	u_char	vl_efw;		/* Wait end of frame */
++
++	/* Atmel LCDC controller params */
++	struct	lcdc_info *lcdc;
++	u_long	pixclock;
++	u_long	left_margin;
++	u_long	right_margin;
++	u_long	upper_margin;
++	u_long	lower_margin;
++	u_long	hsync_len;
++	u_long	vsync_len;
++	u_long	sync;
++	u_long	yoffset;
++	u_long	xoffset;
++} vidinfo_t;
++
++extern vidinfo_t panel_info;
++
++#endif /* CONFIG_MPC823 or CONFIG_PXA250 or CONFIG_ATMEL_LCDC */
+ 
+ /* Video functions */
+ 
+@@ -184,6 +336,16 @@
+ #define LCD_COLOR4	2
+ #define LCD_COLOR8	3
+ #define LCD_COLOR16	4
++#define LCD_COLOR32	5
++#define LCD_COLOR15	15
++#define LCD_COLOR24	24
++
++#define FB_VISUAL_MONO01		0	/* Monochr. 1=Black 0=White */
++#define FB_VISUAL_MONO10		1	/* Monochr. 1=White 0=Black */
++#define FB_VISUAL_TRUECOLOR		2	/* True color	*/
++#define FB_VISUAL_PSEUDOCOLOR		3	/* Pseudo color (like atari) */
++#define FB_VISUAL_DIRECTCOLOR		4	/* Direct color */
++#define FB_VISUAL_STATIC_PSEUDOCOLOR	5	/* Pseudo color readonly */
+ 
+ /*----------------------------------------------------------------------*/
+ #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
+@@ -235,7 +397,7 @@
+ # define CONSOLE_COLOR_GREY	14
+ # define CONSOLE_COLOR_WHITE	15	/* Must remain last / highest	*/
+ 
+-#else
++#elif LCD_BPP == LCD_COLOR16
+ 
+ /*
+  * 16bpp color definitions
+@@ -243,6 +405,14 @@
+ # define CONSOLE_COLOR_BLACK	0x0000
+ # define CONSOLE_COLOR_WHITE	0xffff	/* Must remain last / highest	*/
+ 
++#else
++
++/*
++ * 24bpp color definitions
++ */
++# define CONSOLE_COLOR_BLACK	0x000000
++# define CONSOLE_COLOR_WHITE	0xffffff /* Must remain last / highest */
++
+ #endif /* color definitions */
+ 
+ /************************************************************************/
+@@ -274,6 +444,8 @@
+ 				 (c) << 4 | (c) << 5 | (c) << 6 | (c) << 7)
+ #elif LCD_BPP == LCD_COLOR8
+ # define COLOR_MASK(c)		(c)
++#elif LCD_BPP == LCD_COLOR24
++# define COLOR_MASK(c)		(c)
+ #else
+ # error Unsupported LCD BPP.
+ #endif
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch	87dc7c19ee654a3223802b457bb82c44ff3c515e
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/lcdc-driver-for-avr32.patch	87dc7c19ee654a3223802b457bb82c44ff3c515e
@@ -0,0 +1,755 @@
+diff -uprN u-boot-orig/include/atmel_lcdc.h u-boot/include/atmel_lcdc.h
+--- u-boot-orig/include/atmel_lcdc.h	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/include/atmel_lcdc.h	2006-12-21 16:26:10.000000000 +0100
+@@ -0,0 +1,269 @@
++/*
++ * Register definitions for Atmel/SIDSA LCD Controller
++ *
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#ifndef __ATMEL_LCDC_H__
++#define __ATMEL_LCDC_H__
++
++#define LCDC_CONTRAST_CTR                       0x00000840
++# define LCDC_CONTRAST_CTR_ENA_OFFSET           3
++# define LCDC_CONTRAST_CTR_ENA_SIZE             1
++# define LCDC_CONTRAST_CTR_POL_OFFSET           2
++# define LCDC_CONTRAST_CTR_POL_SIZE             1
++# define LCDC_CONTRAST_CTR_PS_OFFSET            0
++# define LCDC_CONTRAST_CTR_PS_SIZE              2
++#define LCDC_CONTRAST_VAL                       0x00000844
++# define LCDC_CONTRAST_VAL_CVAL_OFFSET          0
++# define LCDC_CONTRAST_VAL_CVAL_SIZE            8
++#define LCDC_DMABADDR1                          0x00000000
++# define LCDC_DMABADDR1_BADDR_U_OFFSET          0
++# define LCDC_DMABADDR1_BADDR_U_SIZE            32
++#define LCDC_DMABADDR2                          0x00000004
++# define LCDC_DMABADDR2_BADDR_L_OFFSET          0
++# define LCDC_DMABADDR2_BADDR_L_SIZE            32
++#define LCDC_DMACON                             0x0000001C
++# define LCDC_DMACON_DMABUSY_OFFSET             2
++# define LCDC_DMACON_DMABUSY_SIZE               1
++# define LCDC_DMACON_DMAEN_OFFSET               0
++# define LCDC_DMACON_DMAEN_SIZE                 1
++# define LCDC_DMACON_DMARST_OFFSET              1
++# define LCDC_DMACON_DMARST_SIZE                1
++# define LCDC_DMACON_DMAUPDT_OFFSET             3
++# define LCDC_DMACON_DMAUPDT_SIZE               1
++# define LCDC_DMACON_DMA2DEN_OFFSET             4
++# define LCDC_DMACON_DMA2DEN_SIZE               1
++#define LCDC_DMAFRMADD1                         0x00000010
++# define LCDC_DMAFRMADD1_FRMADD_U_OFFSET        0
++# define LCDC_DMAFRMADD1_FRMADD_U_SIZE          32
++#define LCDC_DMAFRMADD2                         0x00000014
++# define LCDC_DMAFRMADD2_FRMADD_L_OFFSET        0
++# define LCDC_DMAFRMADD2_FRMADD_L_SIZE          32
++#define LCDC_DMAFRMCFG                          0x00000018
++# define LCDC_DMAFRMCFG_BRSTLEN_OFFSET          24
++# define LCDC_DMAFRMCFG_BRSTLEN_SIZE            7
++# define LCDC_DMAFRMCFG_FRMSIZE_OFFSET          0
++# define LCDC_DMAFRMCFG_FRMSIZE_SIZE            23
++#define LCDC_DMAFRMPT1                          0x00000008
++# define LCDC_DMAFRMPT1_FRMPT_U_OFFSET          0
++# define LCDC_DMAFRMPT1_FRMPT_U_SIZE            23
++#define LCDC_DMAFRMPT2                          0x0000000C
++# define LCDC_DMAFRMPT2_FRMPT_L_OFFSET          0
++# define LCDC_DMAFRMPT2_FRMPT_L_SIZE            23
++#define LCDC_DMA2DCFG                           0x00000020
++# define LCDC_DMA2DCFG_ADDRINC_OFFSET           0
++# define LCDC_DMA2DCFG_ADDRINC_SIZE             16
++# define LCDC_DMA2DCFG_PIXELOFF_OFFSET          24
++# define LCDC_DMA2DCFG_PIXELOFF_SIZE            5
++#define LCDC_DP1_2                              0x0000081C
++# define LCDC_DP1_2_DP1_2_OFFSET                0
++# define LCDC_DP1_2_DP1_2_SIZE                  8
++#define LCDC_DP2_3                              0x00000828
++# define LCDC_DP2_3_DP2_3_OFFSET                0
++# define LCDC_DP2_3_DP2_3_SIZE                  12
++#define LCDC_DP3_4                              0x00000830
++# define LCDC_DP3_4_DP3_4_OFFSET                0
++# define LCDC_DP3_4_DP3_4_SIZE                  16
++#define LCDC_DP3_5                              0x00000824
++# define LCDC_DP3_5_DP3_5_OFFSET                0
++# define LCDC_DP3_5_DP3_5_SIZE                  20
++#define LCDC_DP4_5                              0x00000834
++# define LCDC_DP4_5_DP4_5_OFFSET                0
++# define LCDC_DP4_5_DP4_5_SIZE                  20
++#define LCDC_DP4_7                              0x00000820
++# define LCDC_DP4_7_DP4_7_OFFSET                0
++# define LCDC_DP4_7_DP4_7_SIZE                  28
++#define LCDC_DP5_7                              0x0000082C
++# define LCDC_DP5_7_DP5_7_OFFSET                0
++# define LCDC_DP5_7_DP5_7_SIZE                  28
++#define LCDC_DP6_7                              0x00000838
++# define LCDC_DP6_7_DP6_7_OFFSET                0
++# define LCDC_DP6_7_DP6_7_SIZE                  28
++#define LCDC_LCDCON1                            0x00000800
++# define LCDC_LCDCON1_BYPASS_OFFSET             0
++# define LCDC_LCDCON1_BYPASS_SIZE               1
++# define LCDC_LCDCON1_CLKVAL_OFFSET             12
++# define LCDC_LCDCON1_CLKVAL_SIZE               9
++# define LCDC_LCDCON1_LINECNT_OFFSET            21
++# define LCDC_LCDCON1_LINECNT_SIZE              11
++#define LCDC_LCDCON2                            0x00000804
++# define LCDC_LCDCON2_CLKMOD_OFFSET             15
++# define LCDC_LCDCON2_CLKMOD_SIZE               1
++# define LCDC_LCDCON2_DISTYPE_OFFSET            0
++# define LCDC_LCDCON2_DISTYPE_SIZE              2
++# define LCDC_LCDCON2_IFWIDTH_OFFSET            3
++# define LCDC_LCDCON2_IFWIDTH_SIZE              2
++# define LCDC_LCDCON2_INVCLK_OFFSET             11
++# define LCDC_LCDCON2_INVCLK_SIZE               1
++# define LCDC_LCDCON2_INVDVAL_OFFSET            12
++# define LCDC_LCDCON2_INVDVAL_SIZE              1
++# define LCDC_LCDCON2_INVFRAME_OFFSET           9
++# define LCDC_LCDCON2_INVFRAME_SIZE             1
++# define LCDC_LCDCON2_INVLINE_OFFSET            10
++# define LCDC_LCDCON2_INVLINE_SIZE              1
++# define LCDC_LCDCON2_INVVD_OFFSET              8
++# define LCDC_LCDCON2_INVVD_SIZE                1
++# define LCDC_LCDCON2_MEMOR_OFFSET              30
++# define LCDC_LCDCON2_MEMOR_SIZE                2
++# define LCDC_LCDCON2_PIXELSIZE_OFFSET          5
++# define LCDC_LCDCON2_PIXELSIZE_SIZE            3
++# define LCDC_LCDCON2_SCANMOD_OFFSET            2
++# define LCDC_LCDCON2_SCANMOD_SIZE              1
++#define LCDC_LCDFIFO                            0x00000814
++# define LCDC_LCDFIFO_FIFOTH_OFFSET             0
++# define LCDC_LCDFIFO_FIFOTH_SIZE               16
++#define LCDC_LCDFRMCFG                          0x00000810
++# define LCDC_LCDFRMCFG_LINESIZE_OFFSET         21
++# define LCDC_LCDFRMCFG_LINESIZE_SIZE           11
++# define LCDC_LCDFRMCFG_LINEVAL_OFFSET          0
++# define LCDC_LCDFRMCFG_LINEVAL_SIZE            11
++#define LCDC_LCDMVAL                            0x00000818
++# define LCDC_LCDMVAL_MMODE_OFFSET              31
++# define LCDC_LCDMVAL_MMODE_SIZE                1
++# define LCDC_LCDMVAL_MVAL_OFFSET               0
++# define LCDC_LCDMVAL_MVAL_SIZE                 8
++#define LCDC_LCDTIM1                            0x00000808
++# define LCDC_LCDTIM1_VBP_OFFSET                8
++# define LCDC_LCDTIM1_VBP_SIZE                  8
++# define LCDC_LCDTIM1_VFP_OFFSET                0
++# define LCDC_LCDTIM1_VFP_SIZE                  8
++# define LCDC_LCDTIM1_VHDLY_OFFSET              24
++# define LCDC_LCDTIM1_VHDLY_SIZE                4
++# define LCDC_LCDTIM1_VPW_OFFSET                16
++# define LCDC_LCDTIM1_VPW_SIZE                  6
++#define LCDC_LCDTIM2                            0x0000080C
++# define LCDC_LCDTIM2_HBP_OFFSET                0
++# define LCDC_LCDTIM2_HBP_SIZE                  8
++# define LCDC_LCDTIM2_HFP_OFFSET                21
++# define LCDC_LCDTIM2_HFP_SIZE                  11
++# define LCDC_LCDTIM2_HPW_OFFSET                8
++# define LCDC_LCDTIM2_HPW_SIZE                  6
++#define LCDC_LCD_GPR                            0x0000085C
++# define LCDC_LCD_GPR_GPRB0_OFFSET              0
++# define LCDC_LCD_GPR_GPRB0_SIZE                1
++# define LCDC_LCD_GPR_GPRB1_OFFSET              1
++# define LCDC_LCD_GPR_GPRB1_SIZE                1
++# define LCDC_LCD_GPR_GPRB2_OFFSET              2
++# define LCDC_LCD_GPR_GPRB2_SIZE                1
++# define LCDC_LCD_GPR_GPRB3_OFFSET              3
++# define LCDC_LCD_GPR_GPRB3_SIZE                1
++# define LCDC_LCD_GPR_GPRB4_OFFSET              4
++# define LCDC_LCD_GPR_GPRB4_SIZE                1
++# define LCDC_LCD_GPR_GPRB5_OFFSET              5
++# define LCDC_LCD_GPR_GPRB5_SIZE                1
++# define LCDC_LCD_GPR_GPRB6_OFFSET              6
++# define LCDC_LCD_GPR_GPRB6_SIZE                1
++# define LCDC_LCD_GPR_GPRB7_OFFSET              7
++# define LCDC_LCD_GPR_GPRB7_SIZE                1
++#define LCDC_LCD_ICR                            0x00000858
++# define LCDC_LCD_ICR_EOFIC_OFFSET              2
++# define LCDC_LCD_ICR_EOFIC_SIZE                1
++# define LCDC_LCD_ICR_LNIC_OFFSET               0
++# define LCDC_LCD_ICR_LNIC_SIZE                 1
++# define LCDC_LCD_ICR_LSTLNIC_OFFSET            1
++# define LCDC_LCD_ICR_LSTLNIC_SIZE              1
++# define LCDC_LCD_ICR_MERIC_OFFSET              6
++# define LCDC_LCD_ICR_MERIC_SIZE                1
++# define LCDC_LCD_ICR_OWRIC_OFFSET              5
++# define LCDC_LCD_ICR_OWRIC_SIZE                1
++# define LCDC_LCD_ICR_UFLWIC_OFFSET             4
++# define LCDC_LCD_ICR_UFLWIC_SIZE               1
++#define LCDC_LCD_IDR                            0x0000084C
++# define LCDC_LCD_IDR_EOFID_OFFSET              2
++# define LCDC_LCD_IDR_EOFID_SIZE                1
++# define LCDC_LCD_IDR_LNID_OFFSET               0
++# define LCDC_LCD_IDR_LNID_SIZE                 1
++# define LCDC_LCD_IDR_LSTLNID_OFFSET            1
++# define LCDC_LCD_IDR_LSTLNID_SIZE              1
++# define LCDC_LCD_IDR_MERID_OFFSET              6
++# define LCDC_LCD_IDR_MERID_SIZE                1
++# define LCDC_LCD_IDR_OWRID_OFFSET              5
++# define LCDC_LCD_IDR_OWRID_SIZE                1
++# define LCDC_LCD_IDR_UFLWID_OFFSET             4
++# define LCDC_LCD_IDR_UFLWID_SIZE               1
++#define LCDC_LCD_IER                            0x00000848
++# define LCDC_LCD_IER_EOFIE_OFFSET              2
++# define LCDC_LCD_IER_EOFIE_SIZE                1
++# define LCDC_LCD_IER_LNIE_OFFSET               0
++# define LCDC_LCD_IER_LNIE_SIZE                 1
++# define LCDC_LCD_IER_LSTLNIE_OFFSET            1
++# define LCDC_LCD_IER_LSTLNIE_SIZE              1
++# define LCDC_LCD_IER_MERIE_OFFSET              6
++# define LCDC_LCD_IER_MERIE_SIZE                1
++# define LCDC_LCD_IER_OWRIE_OFFSET              5
++# define LCDC_LCD_IER_OWRIE_SIZE                1
++# define LCDC_LCD_IER_UFLWIE_OFFSET             4
++# define LCDC_LCD_IER_UFLWIE_SIZE               1
++#define LCDC_LCD_IMR                            0x00000850
++# define LCDC_LCD_IMR_EOFIM_OFFSET              2
++# define LCDC_LCD_IMR_EOFIM_SIZE                1
++# define LCDC_LCD_IMR_LNIM_OFFSET               0
++# define LCDC_LCD_IMR_LNIM_SIZE                 1
++# define LCDC_LCD_IMR_LSTLNIM_OFFSET            1
++# define LCDC_LCD_IMR_LSTLNIM_SIZE              1
++# define LCDC_LCD_IMR_MERIM_OFFSET              6
++# define LCDC_LCD_IMR_MERIM_SIZE                1
++# define LCDC_LCD_IMR_OWRIM_OFFSET              5
++# define LCDC_LCD_IMR_OWRIM_SIZE                1
++# define LCDC_LCD_IMR_UFLWIM_OFFSET             4
++# define LCDC_LCD_IMR_UFLWIM_SIZE               1
++#define LCDC_LCD_IRR                            0x00000864
++# define LCDC_LCD_IRR_EOFIR_OFFSET              2
++# define LCDC_LCD_IRR_EOFIR_SIZE                1
++# define LCDC_LCD_IRR_LNIR_OFFSET               0
++# define LCDC_LCD_IRR_LNIR_SIZE                 1
++# define LCDC_LCD_IRR_LSTLNIR_OFFSET            1
++# define LCDC_LCD_IRR_LSTLNIR_SIZE              1
++# define LCDC_LCD_IRR_MERIR_OFFSET              6
++# define LCDC_LCD_IRR_MERIR_SIZE                1
++# define LCDC_LCD_IRR_OWRIR_OFFSET              5
++# define LCDC_LCD_IRR_OWRIR_SIZE                1
++# define LCDC_LCD_IRR_UFLWIR_OFFSET             4
++# define LCDC_LCD_IRR_UFLWIR_SIZE               1
++#define LCDC_LCD_ISR                            0x00000854
++# define LCDC_LCD_ISR_EOFIS_OFFSET              2
++# define LCDC_LCD_ISR_EOFIS_SIZE                1
++# define LCDC_LCD_ISR_LNIS_OFFSET               0
++# define LCDC_LCD_ISR_LNIS_SIZE                 1
++# define LCDC_LCD_ISR_LSTLNIS_OFFSET            1
++# define LCDC_LCD_ISR_LSTLNIS_SIZE              1
++# define LCDC_LCD_ISR_MERIS_OFFSET              6
++# define LCDC_LCD_ISR_MERIS_SIZE                1
++# define LCDC_LCD_ISR_OWRIS_OFFSET              5
++# define LCDC_LCD_ISR_OWRIS_SIZE                1
++# define LCDC_LCD_ISR_UFLWIS_OFFSET             4
++# define LCDC_LCD_ISR_UFLWIS_SIZE               1
++#define LCDC_LCD_ITR                            0x00000860
++# define LCDC_LCD_ITR_EOFIT_OFFSET              2
++# define LCDC_LCD_ITR_EOFIT_SIZE                1
++# define LCDC_LCD_ITR_LNIT_OFFSET               0
++# define LCDC_LCD_ITR_LNIT_SIZE                 1
++# define LCDC_LCD_ITR_LSTLNIT_OFFSET            1
++# define LCDC_LCD_ITR_LSTLNIT_SIZE              1
++# define LCDC_LCD_ITR_MERIT_OFFSET              6
++# define LCDC_LCD_ITR_MERIT_SIZE                1
++# define LCDC_LCD_ITR_OWRIT_OFFSET              5
++# define LCDC_LCD_ITR_OWRIT_SIZE                1
++# define LCDC_LCD_ITR_UFLWIT_OFFSET             4
++# define LCDC_LCD_ITR_UFLWIT_SIZE               1
++#define LCDC_PWRCON                             0x0000083C
++# define LCDC_PWRCON_GUARD_TIME_OFFSET          1
++# define LCDC_PWRCON_GUARD_TIME_SIZE            7
++# define LCDC_PWRCON_LCD_BUSY_OFFSET            31
++# define LCDC_PWRCON_LCD_BUSY_SIZE              1
++# define LCDC_PWRCON_LCD_PWR_OFFSET             0
++# define LCDC_PWRCON_LCD_PWR_SIZE               1
++
++#define LCDC_BIT(name)                          (1 << LCDC_##name##_OFFSET)
++#define LCDC_MKBF(name,value)                   (((value) & ((1 << LCDC_##name##_SIZE) - 1)) << LCDC_##name##_OFFSET)
++#define LCDC_GETBF(name,value)                  (((value) >> LCDC_##name##_OFFSET) & ((1 << LCDC_##name##_SIZE) - 1))
++#define LCDC_INSBF(name,value,old)              (((old) & ~(((1 << LCDC_##name##_SIZE) - 1) << LCDC_##name##_OFFSET)) | LCDC_MKBF(name, value))
++
++#define lcdc_readl(port,reg)		readl((port)->regs + LCDC_##reg)
++#define lcdc_writel(port,reg,value)	writel((value), (port)->regs + LCDC_##reg)
++
++#endif /* __ASM_AVR32_PERIPH_LCDC_H__ */
+diff -uprN u-boot-orig/drivers/atmel_lcdc.c u-boot/drivers/atmel_lcdc.c
+--- u-boot-orig/drivers/atmel_lcdc.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/drivers/atmel_lcdc.c	2007-01-05 12:29:24.000000000 +0100
+@@ -0,0 +1,465 @@
++/*
++ * Framebuffer Driver for Atmel/SIDSA LCD Controller
++ *
++ * Copyright (C) 2006 Atmel Corporation
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <common.h>
++
++#if defined(CONFIG_ATMEL_LCDC)
++
++#ifndef LCD_BPP
++# define LCD_BPP	LCD_COLOR24
++#endif
++
++#include <lcd.h>
++#include <malloc.h>
++#include <video_fb.h>
++
++#include <atmel_lcdc.h>
++
++#include <asm/io.h>
++#include <asm/arch/sm.h>
++#include <asm/arch/platform.h>
++
++/* Sync defines */
++#define FB_SYNC_HOR_HIGH_ACT	1	/* horizontal sync high active	*/
++#define FB_SYNC_VERT_HIGH_ACT	2	/* vertical sync high active	*/
++#define FB_SYNC_EXT		4	/* external sync		*/
++#define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active   */
++#define FB_SYNC_BROADCAST	16	/* broadcast video timings      */
++/* vtotal = 144d/288n/576i => PAL  */
++/* vtotal = 121d/242n/484i => NTSC */
++#define FB_SYNC_ON_GREEN	32	/* sync on green */
++#define FB_SYNC_PCLK_RISING	64	/* pixel data sampled on rising pclk */
++
++/* More or less configurable parameters */
++#define LCDC_FIFO_SIZE		512
++#define LCDC_DMA_BURST_LEN	8
++
++/* TODO: These should be autogenerated from part description file */
++#define LCDC_DISTYPE_STN_MONO	0
++#define LCDC_DISTYPE_STN_COLOR	1
++#define LCDC_DISTYPE_TFT	2
++#define LCDC_LUT		0xc00
++
++#ifdef CONFIG_DISPLAY_LTV350QV
++/* 320x240x24 @ 75 Hz */
++vidinfo_t panel_info = {
++		vl_col:		320,		/* Number of columns */
++		vl_row:		240,		/* Number of rows */
++		vl_width:	320,		/* Width in mm */
++		vl_height:	240,		/* Height in mm */
++		vl_clkp:	CFG_HIGH,	/* Clock polarity */
++		vl_oep:		CFG_HIGH,	/* Output enable polarity */
++		vl_hsp:		CFG_HIGH,	/* Horizontal sync polarity */
++		vl_vsp:		CFG_HIGH,	/* Vertical sync polarity */
++		vl_dp:		CFG_HIGH,	/* Data polarity */
++		vl_bpix:	LCD_BPP,	/* Bits per pixel */
++		vl_lbw:		1,		/* LCD bus width */
++		vl_splt:	0,		/* Split display? 0=single, 1=dual */
++		vl_clor:	1,		/* Color? 0 = mono, 1 = color */
++		vl_tft:		1,		/* TFT? 0 = passive, 1 = TFT */
++		vl_hpw:		16,		/* Horizontal sync pulse width */
++		vl_blw:		17,		/* Wait before of line */
++		vl_elw:		33,		/* Wait end of line */
++		vl_vpw:		1,		/* Vertical sync pulse width */
++		vl_bfw:		10,		/* Wait before of frame */
++		vl_efw:		10,		/* Wait end of frame */
++
++		pixclock:	145111,
++		left_margin:	17,
++		right_margin:	33,
++		upper_margin:	10,
++		lower_margin:	10,
++		hsync_len:	16,
++		vsync_len:	1,
++		sync:		FB_SYNC_PCLK_RISING,
++		yoffset:	0,
++		xoffset:	0,
++};
++#else
++#error A display must be defined for the LCD controller
++#endif
++
++void lcd_ctrl_init	(void *lcdbase);
++void lcd_enable	(void);
++
++int lcd_line_length;
++int lcd_color_fg;
++int lcd_color_bg;
++
++void *lcd_base;			/* Start of framebuffer memory	*/
++void *lcd_console_address;	/* Start of console buffer	*/
++
++short console_col;
++short console_row;
++
++static int lcdc_init_mem(void *lcdbase);
++void lcdc_init(void *lcdbase);
++
++static inline u_int chan_to_field(u_int chan, const struct lcdc_bitfield *bf)
++{
++	chan &= 0xffff;
++	chan >>= 16 - bf->length;
++	return chan << bf->offset;
++}
++
++/*
++ * ************************************************************************* *
++ *                        Das U-Boot LCD functions                           *
++ * ************************************************************************* *
++ */
++void lcd_setcolreg (ushort regno, ushort red, ushort green, ushort blue)
++{
++	struct lcdc_info *cinfo = panel_info.lcdc;
++	u_int *palette = (u_int *)cinfo->palette;
++	u_int val;
++
++	if (cinfo->var.grayscale)
++		red = green = blue = (19595 * red + 38470 * green
++				+ 7471 * blue) >> 16;
++
++	switch (cinfo->visual) {
++	case FB_VISUAL_TRUECOLOR:
++		if (regno < 16) {
++			/* TODO: I do not get why we need a palette here
++			palette = cinfo->pseudo_palette;
++			*/
++
++			val  = chan_to_field(red, &cinfo->var.red);
++			val |= chan_to_field(green, &cinfo->var.green);
++			val |= chan_to_field(blue, &cinfo->var.blue);
++
++			palette[regno] = val;
++		}
++		break;
++
++	case FB_VISUAL_PSEUDOCOLOR:
++		if (regno < 256) {
++			val =  ((blue  << 7) & 0x7c00);
++			val |= ((green << 2) & 0x03e0);
++			val |= ((red   >> 3) & 0x001f);
++
++			/*
++			 * TODO: intensity bit. Maybe something like
++			 *   ~(red[10] ^ green[10] ^ blue[10]) & 1
++			 */
++			palette[regno] = val;
++		}
++		break;
++	}
++}
++
++void lcd_ctrl_init (void *lcdbase)
++{
++	lcdc_init_mem(lcdbase);
++	lcdc_init(lcdbase);
++}
++
++
++
++void lcd_enable (void)
++{
++	return;
++}
++
++ulong calc_fbsize (void)
++{
++	ulong size;
++	int line_length;
++	if (panel_info.vl_bpix > LCD_COLOR32)
++		line_length = panel_info.vl_col * panel_info.vl_bpix / 8;
++	else
++		line_length = panel_info.vl_col * NBITS(panel_info.vl_bpix) / 8;
++
++	size = line_length * panel_info.vl_row;
++	size += PAGE_SIZE;
++
++	return size;
++}
++
++/* ************************************************************************* *
++ *                    Architecture specific functions                        *
++ * ************************************************************************* *
++ */
++static int lcdc_init_mem(void *lcdbase)
++{
++	struct lcdc_info *cinfo;
++	const struct device *dev;
++
++	cinfo = malloc(sizeof(struct lcdc_info));
++	if (!cinfo) {
++		printf("lcdc: could not allocate RAM for lcdc_info\n");
++		return -1;
++	}
++
++	dev = get_device(DEVICE_LCDC);
++	if (!dev)
++		printf("lcdc: could not get LCDC\n");
++
++	cinfo->dev = dev;
++	cinfo->regs = dev->regs;
++
++	cinfo->screen = (u_long)lcdbase;
++	cinfo->palette_size = NBITS(panel_info.vl_bpix) == 8 ? 256 : 16;
++	/* palette is stored in LCD controller IO memory */
++	cinfo->palette = (u_long)cinfo->regs + LCDC_LUT;
++
++	panel_info.lcdc = cinfo;
++
++	return 0;
++}
++
++static void lcdc_update_dma()
++{
++	unsigned long dma_addr;
++	unsigned long pixeloff;
++	unsigned long dma2dcfg;
++	struct lcdc_info *cinfo = panel_info.lcdc;
++
++	dma_addr = (cinfo->smem_start + cinfo->yoffset * cinfo->line_length
++			+ cinfo->xoffset * cinfo->bits_per_pixel / 8);
++
++	dma_addr &= ~3UL;
++	pixeloff = LCDC_MKBF(DMA2DCFG_PIXELOFF, cinfo->xoffset * cinfo->bits_per_pixel);
++
++	/* Set framebuffer DMA base address and pixel offset */
++	lcdc_writel(cinfo, DMABADDR1, dma_addr);
++	dma2dcfg = lcdc_readl(cinfo, DMA2DCFG);
++	dma2dcfg = LCDC_INSBF(DMA2DCFG_PIXELOFF, pixeloff, dma2dcfg);
++	lcdc_writel(cinfo, DMA2DCFG, dma2dcfg);
++
++	/* Update configuration */
++	lcdc_writel(cinfo, DMACON, (lcdc_readl(cinfo, DMACON)
++				| LCDC_BIT(DMACON_DMAUPDT)));
++}
++
++static int lcdc_set_var(struct lcdc_info *info)
++{
++	info->var.red.msb_right = info->var.green.msb_right
++		= info->var.blue.msb_right = 0;
++	info->var.transp.offset = info->var.transp.length = 0;
++
++	switch (info->bits_per_pixel) {
++	case 2:
++	case 4:
++	case 8:
++		info->var.red.offset = info->var.green.offset
++			= info->var.blue.offset = 0;
++		info->var.red.length = info->var.green.length
++			= info->var.blue.length = info->var.bits_per_pixel;
++		break;
++	case 15:
++	case 16:
++		/*
++		 * Bit 16 is the "intensity" bit, I think. Not sure
++		 * what we're going to use that for...
++		 */
++		info->var.red.offset = 0;
++		info->var.green.offset = 5;
++		info->var.blue.offset = 10;
++		info->var.red.length = 5;
++		info->var.green.length = 5;
++		info->var.blue.length = 5;
++		break;
++	case 32:
++		info->var.transp.offset = 24;
++		info->var.transp.length = 8;
++		/* fall through */
++	case 24:
++		info->var.red.offset = 16;
++		info->var.green.offset = 8;
++		info->var.blue.offset = 0;
++		info->var.red.length = info->var.green.length
++			= info->var.blue.length = 8;
++		break;
++	default:
++		printf("lcdc: color depth %d not supported\n",
++		       info->var.bits_per_pixel);
++		return -1;
++	}
++
++	info->var.xoffset = info->var.yoffset = 0;
++	info->var.red.msb_right = info->var.green.msb_right
++		= info->var.blue.msb_right = info->var.transp.msb_right = 0;
++
++	return 0;
++}
++
++void lcdc_init(void *lcdbase)
++{
++	unsigned int value;
++	const struct device *sm;
++	struct lcdc_info *cinfo = panel_info.lcdc;
++
++	sm = get_device(DEVICE_SM);
++	if (!sm)
++		printf("lcdc: could not get SM\n");
++
++	cinfo->xres = panel_info.vl_col;
++	cinfo->yres = panel_info.vl_row;
++	cinfo->xres_virtual = panel_info.vl_col;
++	cinfo->yres_virtual = panel_info.vl_row;
++	if (panel_info.vl_bpix > LCD_COLOR32) {
++		cinfo->bits_per_pixel = panel_info.vl_bpix;
++	} else {
++		cinfo->bits_per_pixel = (1<<panel_info.vl_bpix);
++	}
++	/* INFO: if you see weird offset errors when displaying data
++	 * increase the guard_time */
++	cinfo->guard_time = 2;
++
++	cinfo->pixclock = panel_info.pixclock;
++
++	cinfo->left_margin = panel_info.left_margin;
++	cinfo->right_margin = panel_info.right_margin;
++	cinfo->upper_margin = panel_info.upper_margin;
++	cinfo->lower_margin = panel_info.lower_margin;
++
++	cinfo->hsync_len = panel_info.hsync_len;
++	cinfo->vsync_len = panel_info.vsync_len;
++
++	cinfo->sync = panel_info.sync;
++
++	cinfo->smem_start = (u_long)lcdbase;
++	cinfo->yoffset = panel_info.yoffset;
++	cinfo->xoffset = panel_info.xoffset;
++	cinfo->line_length = cinfo->xres;
++
++	panel_info.lcdc = cinfo;
++
++	if (cinfo->bits_per_pixel <= 8) {
++		cinfo->visual = FB_VISUAL_PSEUDOCOLOR;
++	} else {
++		cinfo->visual = FB_VISUAL_TRUECOLOR;
++	}
++
++	/* setup var information */
++	if (lcdc_set_var(cinfo) != 0) {
++		printf("lcdc: could not set var information\n");
++		return;
++	}
++
++	sm_writel(sm, PM_GCCTRL7, SM_BIT(PLLSEL)|SM_BIT(CEN));
++
++	debug("lcdc: resolution: %ux%u %dbpp (%ux%u virtual)\n",
++			cinfo->xres, cinfo->yres, cinfo->bits_per_pixel,
++			cinfo->xres_virtual, cinfo->yres_virtual);
++
++	/* Turn off the LCD controller and the DMA controller */
++	lcdc_writel(cinfo, PWRCON,
++			LCDC_MKBF(PWRCON_GUARD_TIME, cinfo->guard_time));
++	lcdc_writel(cinfo, DMACON, 0);
++
++	cinfo->line_length = (cinfo->xres_virtual
++			* (cinfo->bits_per_pixel / 8));
++
++	/* Re-initialize the DMA engine... */
++	lcdc_update_dma();
++
++	/* ...set frame size and burst length = 8 words (?) */
++	value = LCDC_MKBF(DMAFRMCFG_FRMSIZE,
++			(cinfo->yres * cinfo->line_length + 3) / 4);
++	value |= LCDC_MKBF(DMAFRMCFG_BRSTLEN, (LCDC_DMA_BURST_LEN - 1));
++	lcdc_writel(cinfo, DMAFRMCFG, value);
++
++	/* ...set 2D configuration (necessary for xres_virtual != xres) */
++	value = LCDC_MKBF(DMA2DCFG_ADDRINC,
++			cinfo->xres_virtual - cinfo->xres);
++	lcdc_writel(cinfo, DMA2DCFG, value);
++
++	/* ...wait for DMA engine to become idle... */
++	while (lcdc_readl(cinfo, DMACON) & LCDC_BIT(DMACON_DMABUSY));
++
++	/* ...and enable it with updated configuration */
++	lcdc_writel(cinfo, DMACON, (LCDC_BIT(DMACON_DMAEN)
++				| LCDC_BIT(DMACON_DMAUPDT)
++				| LCDC_BIT(DMACON_DMA2DEN)));
++
++	/* Now, the LCD core... */
++
++	/* Set pixel clock. */
++	value = 140000000 / 100000 * cinfo->pixclock;
++	value /= 10000000;
++	value = (value + 1) / 2;
++	if (value == 0) {
++		lcdc_writel(cinfo, LCDCON1, LCDC_BIT(LCDCON1_BYPASS));
++	} else {
++		lcdc_writel(cinfo, LCDCON1, LCDC_MKBF(LCDCON1_CLKVAL, value - 1));
++	}
++
++	/* Initialize control register 2 */
++	value = (LCDC_BIT(LCDCON2_CLKMOD)
++			| LCDC_MKBF(LCDCON2_DISTYPE, LCDC_DISTYPE_TFT));
++	if (!(cinfo->sync & FB_SYNC_HOR_HIGH_ACT))
++		value |= LCDC_BIT(LCDCON2_INVLINE);
++	if (!(cinfo->sync & FB_SYNC_VERT_HIGH_ACT))
++		value |= LCDC_BIT(LCDCON2_INVFRAME);
++	if (cinfo->sync & FB_SYNC_PCLK_RISING)
++		value |= LCDC_BIT(LCDCON2_INVCLK);
++
++	switch (cinfo->bits_per_pixel) {
++		case 1:	value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 0); break;
++		case 2: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 1); break;
++		case 4: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 2); break;
++		case 8: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 3); break;
++		case 15: /* fall through */
++		case 16: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 4); break;
++		case 24: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 5); break;
++		case 32: value |= LCDC_MKBF(LCDCON2_PIXELSIZE, 6); break;
++		default:
++			 printf("lcdc: %d bits per pixel not supported\n",
++					 cinfo->bits_per_pixel);
++			 return;
++			 break;
++	}
++	lcdc_writel(cinfo, LCDCON2, value);
++
++	/* Vertical timing */
++	value = LCDC_MKBF(LCDTIM1_VPW, cinfo->vsync_len - 1);
++	value |= LCDC_MKBF(LCDTIM1_VBP, cinfo->upper_margin);
++	value |= LCDC_MKBF(LCDTIM1_VFP, cinfo->lower_margin);
++	lcdc_writel(cinfo, LCDTIM1, value);
++
++	/* Horizontal timing */
++	value = LCDC_MKBF(LCDTIM2_HFP, cinfo->right_margin - 1);
++	value |= LCDC_MKBF(LCDTIM2_HPW, cinfo->hsync_len - 1);
++	value |= LCDC_MKBF(LCDTIM2_HBP, cinfo->left_margin - 1);
++	lcdc_writel(cinfo, LCDTIM2, value);
++
++	/* Display size */
++	value = LCDC_MKBF(LCDFRMCFG_LINESIZE, cinfo->xres - 1);
++	value |= LCDC_MKBF(LCDFRMCFG_LINEVAL, cinfo->yres - 1);
++	lcdc_writel(cinfo, LCDFRMCFG, value);
++
++	/* FIFO Threshold: Use formula from data sheet */
++	value = LCDC_FIFO_SIZE - (2 * LCDC_DMA_BURST_LEN + 3);
++	lcdc_writel(cinfo, LCDFIFO, value);
++
++	/* Toggle LCD_MODE every frame */
++	lcdc_writel(cinfo, LCDMVAL, 0);
++
++	/* Disable all interrupts */
++	lcdc_writel(cinfo, LCD_IDR, ~0UL);
++
++	/* Wait for the LCDC core to become idle and enable it */
++	while (lcdc_readl(cinfo, PWRCON) & LCDC_BIT(PWRCON_LCD_BUSY));
++
++	lcdc_writel(cinfo, PWRCON,
++			LCDC_MKBF(PWRCON_GUARD_TIME, cinfo->guard_time)
++			| LCDC_BIT(PWRCON_LCD_PWR));
++
++	debug("lcdc: controller at 0x%08x, framebuffer at 0x%08x\n",
++			cinfo->regs, cinfo->smem_start);
++
++	/* clear 320 x 240 x 24bpp area in framebuffer */
++	memset((void *)cinfo->smem_start, 0, cinfo->xres * cinfo->yres * 3);
++
++	return;
++}
++#endif
+diff -uprN u-boot-orig/drivers/Makefile u-boot/drivers/Makefile
+--- u-boot-orig/drivers/Makefile	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/drivers/Makefile	2007-01-01 16:10:49.000000000 +0100
+@@ -27,7 +27,8 @@ include $(TOPDIR)/config.mk
+ 
+ LIB	= libdrivers.a
+ 
+-OBJS	= 3c589.o 5701rls.o ali512x.o atmel_usart.o \
++OBJS	= 3c589.o 5701rls.o ali512x.o \
++	  atmel_usart.o atmel_lcdc.o \
+ 	  bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
+ 	  cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
+ 	  e1000.o eepro100.o \
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch	f9cdf2cc1db97cbdcfbb811df1067fb7baec5542
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/libavr32-add-spi-and-lcd-board-support.patch	f9cdf2cc1db97cbdcfbb811df1067fb7baec5542
@@ -0,0 +1,61 @@
+diff -uprN u-boot-orig/lib_avr32/board.c u-boot/lib_avr32/board.c
+--- u-boot-orig/lib_avr32/board.c	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/lib_avr32/board.c	2007-01-05 13:29:34.000000000 +0100
+@@ -28,6 +28,7 @@
+ 
+ #include <asm/initcalls.h>
+ #include <asm/sections.h>
++#include <asm/page.h>
+ 
+ #ifndef CONFIG_IDENT_STRING
+ #define CONFIG_IDENT_STRING ""
+@@ -128,6 +129,10 @@ void start_u_boot (void)
+ {
+ 	DECLARE_GLOBAL_DATA_PTR;
+ 	gd_t gd_data;
++#if defined(CONFIG_VFD) || defined(CONFIG_LCD)
++	unsigned long size;
++	unsigned long addr;
++#endif
+ 
+ 	/* Initialize the global data pointer */
+ 	memset(&gd_data, 0, sizeof(gd_data));
+@@ -172,9 +177,38 @@ void start_u_boot (void)
+ 	if (!gd->bd->bi_boot_params)
+ 		puts("WARNING: Cannot allocate space for boot parameters\n");
+ 
++#if CONFIG_SPI
++	board_init_spi();
++#endif
++
++#ifdef CONFIG_VFD
++	/*
++	 * reserve memory for VFD display (always full pages)
++	 */
++	/* bss_end is defined in the board-specific linker script */
++	addr = CFG_LCD_BASE;
++	size = vfd_setmem(addr);
++	gd->fb_base = addr;
++#endif /* CONFIG_VFD */
++
++#ifdef CONFIG_LCD
++	/*
++	 * reserve memory for LCD display (always full pages)
++	 */
++	/* bss_end is defined in the board-specific linker script */
++	addr = CFG_LCD_BASE;
++	size = lcd_setmem(addr);
++	gd->fb_base = addr;
++#endif /* CONFIG_LCD */
++
+ 	/* initialize environment */
+ 	env_relocate();
+ 
++#ifdef CONFIG_VFD
++	/* must do this after the framebuffer is allocated */
++	drv_vfd_init();
++#endif /* CONFIG_VFD */
++
+ 	devices_init();
+ 	jumptable_init();
+ 	console_init_r();
============================================================
--- packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch	aaf3a5bcf5a60041e4da853c72c9417adca86a12
+++ packages/u-boot/u-boot-1.1.4/at32stk1000/spi-driver-for-avr32.patch	aaf3a5bcf5a60041e4da853c72c9417adca86a12
@@ -0,0 +1,1026 @@
+diff -uprN u-boot-orig/include/atmel_spi.h u-boot/include/atmel_spi.h
+--- u-boot-orig/include/atmel_spi.h	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/include/atmel_spi.h	2007-01-01 18:45:27.000000000 +0100
+@@ -0,0 +1,676 @@
++#ifndef __SPI_H_
++#define __SPI_H_
++
++/*! \brief Timeout for spi read and write blocking functions */
++#define SPI_TIMEOUT		10000
++/*! \brief Enable PDC functions for SPI */
++#define SPI_ENABLE_PDC
++
++#define SPI_10_BPT                                   0x00000002
++#define SPI_11_BPT                                   0x00000003
++#define SPI_12_BPT                                   0x00000004
++#define SPI_13_BPT                                   0x00000005
++#define SPI_14_BPT                                   0x00000006
++#define SPI_15_BPT                                   0x00000007
++#define SPI_16_BPT                                   0x00000008
++#define SPI_8_BPT                                    0x00000000
++#define SPI_9_BPT                                    0x00000001
++#define SPI_BITS                                              4
++#define SPI_BITS_10_BPT                              0x00000002
++#define SPI_BITS_11_BPT                              0x00000003
++#define SPI_BITS_12_BPT                              0x00000004
++#define SPI_BITS_13_BPT                              0x00000005
++#define SPI_BITS_14_BPT                              0x00000006
++#define SPI_BITS_15_BPT                              0x00000007
++#define SPI_BITS_16_BPT                              0x00000008
++#define SPI_BITS_8_BPT                               0x00000000
++#define SPI_BITS_9_BPT                               0x00000001
++#define SPI_BITS_MASK                                0x000000f0
++#define SPI_BITS_OFFSET                                       4
++#define SPI_BITS_SIZE                                         4
++#define SPI_CPOL                                              0
++#define SPI_CPOL_MASK                                0x00000001
++#define SPI_CPOL_OFFSET                                       0
++#define SPI_CPOL_SIZE                                         1
++#define SPI_CR                                       0x00000000
++#define SPI_CR_LASTXFER                                      24
++#define SPI_CR_LASTXFER_MASK                         0x01000000
++#define SPI_CR_LASTXFER_OFFSET                               24
++#define SPI_CR_LASTXFER_SIZE                                  1
++#define SPI_CR_SPIDIS                                         1
++#define SPI_CR_SPIDIS_MASK                           0x00000002
++#define SPI_CR_SPIDIS_OFFSET                                  1
++#define SPI_CR_SPIDIS_SIZE                                    1
++#define SPI_CR_SPIEN                                          0
++#define SPI_CR_SPIEN_MASK                            0x00000001
++#define SPI_CR_SPIEN_OFFSET                                   0
++#define SPI_CR_SPIEN_SIZE                                     1
++#define SPI_CR_SWRST                                          7
++#define SPI_CR_SWRST_MASK                            0x00000080
++#define SPI_CR_SWRST_OFFSET                                   7
++#define SPI_CR_SWRST_SIZE                                     1
++#define SPI_CSAAT                                             3
++#define SPI_CSAAT_MASK                               0x00000008
++#define SPI_CSAAT_OFFSET                                      3
++#define SPI_CSAAT_SIZE                                        1
++#define SPI_CSR0                                     0x00000030
++#define SPI_CSR0_BITS                                         4
++#define SPI_CSR0_BITS_10_BPT                         0x00000002
++#define SPI_CSR0_BITS_11_BPT                         0x00000003
++#define SPI_CSR0_BITS_12_BPT                         0x00000004
++#define SPI_CSR0_BITS_13_BPT                         0x00000005
++#define SPI_CSR0_BITS_14_BPT                         0x00000006
++#define SPI_CSR0_BITS_15_BPT                         0x00000007
++#define SPI_CSR0_BITS_16_BPT                         0x00000008
++#define SPI_CSR0_BITS_8_BPT                          0x00000000
++#define SPI_CSR0_BITS_9_BPT                          0x00000001
++#define SPI_CSR0_BITS_MASK                           0x000000f0
++#define SPI_CSR0_BITS_OFFSET                                  4
++#define SPI_CSR0_BITS_SIZE                                    4
++#define SPI_CSR0_CPOL                                         0
++#define SPI_CSR0_CPOL_MASK                           0x00000001
++#define SPI_CSR0_CPOL_OFFSET                                  0
++#define SPI_CSR0_CPOL_SIZE                                    1
++#define SPI_CSR0_CSAAT                                        3
++#define SPI_CSR0_CSAAT_MASK                          0x00000008
++#define SPI_CSR0_CSAAT_OFFSET                                 3
++#define SPI_CSR0_CSAAT_SIZE                                   1
++#define SPI_CSR0_DLYBCT                                      24
++#define SPI_CSR0_DLYBCT_MASK                         0xff000000
++#define SPI_CSR0_DLYBCT_OFFSET                               24
++#define SPI_CSR0_DLYBCT_SIZE                                  8
++#define SPI_CSR0_DLYBS                                       16
++#define SPI_CSR0_DLYBS_MASK                          0x00ff0000
++#define SPI_CSR0_DLYBS_OFFSET                                16
++#define SPI_CSR0_DLYBS_SIZE                                   8
++#define SPI_CSR0_NCPHA                                        1
++#define SPI_CSR0_NCPHA_MASK                          0x00000002
++#define SPI_CSR0_NCPHA_OFFSET                                 1
++#define SPI_CSR0_NCPHA_SIZE                                   1
++#define SPI_CSR0_SCBR                                         8
++#define SPI_CSR0_SCBR_MASK                           0x0000ff00
++#define SPI_CSR0_SCBR_OFFSET                                  8
++#define SPI_CSR0_SCBR_SIZE                                    8
++#define SPI_CSR1                                     0x00000034
++#define SPI_CSR1_BITS                                         4
++#define SPI_CSR1_BITS_10_BPT                         0x00000002
++#define SPI_CSR1_BITS_11_BPT                         0x00000003
++#define SPI_CSR1_BITS_12_BPT                         0x00000004
++#define SPI_CSR1_BITS_13_BPT                         0x00000005
++#define SPI_CSR1_BITS_14_BPT                         0x00000006
++#define SPI_CSR1_BITS_15_BPT                         0x00000007
++#define SPI_CSR1_BITS_16_BPT                         0x00000008
++#define SPI_CSR1_BITS_8_BPT                          0x00000000
++#define SPI_CSR1_BITS_9_BPT                          0x00000001
++#define SPI_CSR1_BITS_MASK                           0x000000f0
++#define SPI_CSR1_BITS_OFFSET                                  4
++#define SPI_CSR1_BITS_SIZE                                    4
++#define SPI_CSR1_CPOL                                         0
++#define SPI_CSR1_CPOL_MASK                           0x00000001
++#define SPI_CSR1_CPOL_OFFSET                                  0
++#define SPI_CSR1_CPOL_SIZE                                    1
++#define SPI_CSR1_CSAAT                                        3
++#define SPI_CSR1_CSAAT_MASK                          0x00000008
++#define SPI_CSR1_CSAAT_OFFSET                                 3
++#define SPI_CSR1_CSAAT_SIZE                                   1
++#define SPI_CSR1_DLYBCT                                      24
++#define SPI_CSR1_DLYBCT_MASK                         0xff000000
++#define SPI_CSR1_DLYBCT_OFFSET                               24
++#define SPI_CSR1_DLYBCT_SIZE                                  8
++#define SPI_CSR1_DLYBS                                       16
++#define SPI_CSR1_DLYBS_MASK                          0x00ff0000
++#define SPI_CSR1_DLYBS_OFFSET                                16
++#define SPI_CSR1_DLYBS_SIZE                                   8
++#define SPI_CSR1_NCPHA                                        1
++#define SPI_CSR1_NCPHA_MASK                          0x00000002
++#define SPI_CSR1_NCPHA_OFFSET                                 1
++#define SPI_CSR1_NCPHA_SIZE                                   1
++#define SPI_CSR1_SCBR                                         8
++#define SPI_CSR1_SCBR_MASK                           0x0000ff00
++#define SPI_CSR1_SCBR_OFFSET                                  8
++#define SPI_CSR1_SCBR_SIZE                                    8
++#define SPI_CSR2                                     0x00000038
++#define SPI_CSR2_BITS                                         4
++#define SPI_CSR2_BITS_10_BPT                         0x00000002
++#define SPI_CSR2_BITS_11_BPT                         0x00000003
++#define SPI_CSR2_BITS_12_BPT                         0x00000004
++#define SPI_CSR2_BITS_13_BPT                         0x00000005
++#define SPI_CSR2_BITS_14_BPT                         0x00000006
++#define SPI_CSR2_BITS_15_BPT                         0x00000007
++#define SPI_CSR2_BITS_16_BPT                         0x00000008
++#define SPI_CSR2_BITS_8_BPT                          0x00000000
++#define SPI_CSR2_BITS_9_BPT                          0x00000001
++#define SPI_CSR2_BITS_MASK                           0x000000f0
++#define SPI_CSR2_BITS_OFFSET                                  4
++#define SPI_CSR2_BITS_SIZE                                    4
++#define SPI_CSR2_CPOL                                         0
++#define SPI_CSR2_CPOL_MASK                           0x00000001
++#define SPI_CSR2_CPOL_OFFSET                                  0
++#define SPI_CSR2_CPOL_SIZE                                    1
++#define SPI_CSR2_CSAAT                                        3
++#define SPI_CSR2_CSAAT_MASK                          0x00000008
++#define SPI_CSR2_CSAAT_OFFSET                                 3
++#define SPI_CSR2_CSAAT_SIZE                                   1
++#define SPI_CSR2_DLYBCT                                      24
++#define SPI_CSR2_DLYBCT_MASK                         0xff000000
++#define SPI_CSR2_DLYBCT_OFFSET                               24
++#define SPI_CSR2_DLYBCT_SIZE                                  8
++#define SPI_CSR2_DLYBS                                       16
++#define SPI_CSR2_DLYBS_MASK                          0x00ff0000
++#define SPI_CSR2_DLYBS_OFFSET                                16
++#define SPI_CSR2_DLYBS_SIZE                                   8
++#define SPI_CSR2_NCPHA                                        1
++#define SPI_CSR2_NCPHA_MASK                          0x00000002
++#define SPI_CSR2_NCPHA_OFFSET                                 1
++#define SPI_CSR2_NCPHA_SIZE                                   1
++#define SPI_CSR2_SCBR                                         8
++#define SPI_CSR2_SCBR_MASK                           0x0000ff00
++#define SPI_CSR2_SCBR_OFFSET                                  8
++#define SPI_CSR2_SCBR_SIZE                                    8
++#define SPI_CSR3                                     0x0000003c
++#define SPI_CSR3_BITS                                         4
++#define SPI_CSR3_BITS_10_BPT                         0x00000002
++#define SPI_CSR3_BITS_11_BPT                         0x00000003
++#define SPI_CSR3_BITS_12_BPT                         0x00000004
++#define SPI_CSR3_BITS_13_BPT                         0x00000005
++#define SPI_CSR3_BITS_14_BPT                         0x00000006
++#define SPI_CSR3_BITS_15_BPT                         0x00000007
++#define SPI_CSR3_BITS_16_BPT                         0x00000008
++#define SPI_CSR3_BITS_8_BPT                          0x00000000
++#define SPI_CSR3_BITS_9_BPT                          0x00000001
++#define SPI_CSR3_BITS_MASK                           0x000000f0
++#define SPI_CSR3_BITS_OFFSET                                  4
++#define SPI_CSR3_BITS_SIZE                                    4
++#define SPI_CSR3_CPOL                                         0
++#define SPI_CSR3_CPOL_MASK                           0x00000001
++#define SPI_CSR3_CPOL_OFFSET                                  0
++#define SPI_CSR3_CPOL_SIZE                                    1
++#define SPI_CSR3_CSAAT                                        3
++#define SPI_CSR3_CSAAT_MASK                          0x00000008
++#define SPI_CSR3_CSAAT_OFFSET                                 3
++#define SPI_CSR3_CSAAT_SIZE                                   1
++#define SPI_CSR3_DLYBCT                                      24
++#define SPI_CSR3_DLYBCT_MASK                         0xff000000
++#define SPI_CSR3_DLYBCT_OFFSET                               24
++#define SPI_CSR3_DLYBCT_SIZE                                  8
++#define SPI_CSR3_DLYBS                                       16
++#define SPI_CSR3_DLYBS_MASK                          0x00ff0000
++#define SPI_CSR3_DLYBS_OFFSET                                16
++#define SPI_CSR3_DLYBS_SIZE                                   8
++#define SPI_CSR3_NCPHA                                        1
++#define SPI_CSR3_NCPHA_MASK                          0x00000002
++#define SPI_CSR3_NCPHA_OFFSET                                 1
++#define SPI_CSR3_NCPHA_SIZE                                   1
++#define SPI_CSR3_SCBR                                         8
++#define SPI_CSR3_SCBR_MASK                           0x0000ff00
++#define SPI_CSR3_SCBR_OFFSET                                  8
++#define SPI_CSR3_SCBR_SIZE                                    8
++#define SPI_DLYBCS                                           24
++#define SPI_DLYBCS_MASK                              0xff000000
++#define SPI_DLYBCS_OFFSET                                    24
++#define SPI_DLYBCS_SIZE                                       8
++#define SPI_DLYBCT                                           24
++#define SPI_DLYBCT_MASK                              0xff000000
++#define SPI_DLYBCT_OFFSET                                    24
++#define SPI_DLYBCT_SIZE                                       8
++#define SPI_DLYBS                                            16
++#define SPI_DLYBS_MASK                               0x00ff0000
++#define SPI_DLYBS_OFFSET                                     16
++#define SPI_DLYBS_SIZE                                        8
++#define SPI_ENDRX                                             4
++#define SPI_ENDRX_MASK                               0x00000010
++#define SPI_ENDRX_OFFSET                                      4
++#define SPI_ENDRX_SIZE                                        1
++#define SPI_ENDTX                                             5
++#define SPI_ENDTX_MASK                               0x00000020
++#define SPI_ENDTX_OFFSET                                      5
++#define SPI_ENDTX_SIZE                                        1
++#define SPI_FDIV                                              3
++#define SPI_FDIV_MASK                                0x00000008
++#define SPI_FDIV_OFFSET                                       3
++#define SPI_FDIV_SIZE                                         1
++#define SPI_IDR                                      0x00000018
++#define SPI_IDR_ENDRX                                         4
++#define SPI_IDR_ENDRX_MASK                           0x00000010
++#define SPI_IDR_ENDRX_OFFSET                                  4
++#define SPI_IDR_ENDRX_SIZE                                    1
++#define SPI_IDR_ENDTX                                         5
++#define SPI_IDR_ENDTX_MASK                           0x00000020
++#define SPI_IDR_ENDTX_OFFSET                                  5
++#define SPI_IDR_ENDTX_SIZE                                    1
++#define SPI_IDR_MODF                                          2
++#define SPI_IDR_MODF_MASK                            0x00000004
++#define SPI_IDR_MODF_OFFSET                                   2
++#define SPI_IDR_MODF_SIZE                                     1
++#define SPI_IDR_NSSR                                          8
++#define SPI_IDR_NSSR_MASK                            0x00000100
++#define SPI_IDR_NSSR_OFFSET                                   8
++#define SPI_IDR_NSSR_SIZE                                     1
++#define SPI_IDR_OVRES                                         3
++#define SPI_IDR_OVRES_MASK                           0x00000008
++#define SPI_IDR_OVRES_OFFSET                                  3
++#define SPI_IDR_OVRES_SIZE                                    1
++#define SPI_IDR_RDRF                                          0
++#define SPI_IDR_RDRF_MASK                            0x00000001
++#define SPI_IDR_RDRF_OFFSET                                   0
++#define SPI_IDR_RDRF_SIZE                                     1
++#define SPI_IDR_RXBUFF                                        6
++#define SPI_IDR_RXBUFF_MASK                          0x00000040
++#define SPI_IDR_RXBUFF_OFFSET                                 6
++#define SPI_IDR_RXBUFF_SIZE                                   1
++#define SPI_IDR_TDRE                                          1
++#define SPI_IDR_TDRE_MASK                            0x00000002
++#define SPI_IDR_TDRE_OFFSET                                   1
++#define SPI_IDR_TDRE_SIZE                                     1
++#define SPI_IDR_TXBUFE                                        7
++#define SPI_IDR_TXBUFE_MASK                          0x00000080
++#define SPI_IDR_TXBUFE_OFFSET                                 7
++#define SPI_IDR_TXBUFE_SIZE                                   1
++#define SPI_IDR_TXEMPTY                                       9
++#define SPI_IDR_TXEMPTY_MASK                         0x00000200
++#define SPI_IDR_TXEMPTY_OFFSET                                9
++#define SPI_IDR_TXEMPTY_SIZE                                  1
++#define SPI_IER                                      0x00000014
++#define SPI_IER_ENDRX                                         4
++#define SPI_IER_ENDRX_MASK                           0x00000010
++#define SPI_IER_ENDRX_OFFSET                                  4
++#define SPI_IER_ENDRX_SIZE                                    1
++#define SPI_IER_ENDTX                                         5
++#define SPI_IER_ENDTX_MASK                           0x00000020
++#define SPI_IER_ENDTX_OFFSET                                  5
++#define SPI_IER_ENDTX_SIZE                                    1
++#define SPI_IER_MODF                                          2
++#define SPI_IER_MODF_MASK                            0x00000004
++#define SPI_IER_MODF_OFFSET                                   2
++#define SPI_IER_MODF_SIZE                                     1
++#define SPI_IER_NSSR                                          8
++#define SPI_IER_NSSR_MASK                            0x00000100
++#define SPI_IER_NSSR_OFFSET                                   8
++#define SPI_IER_NSSR_SIZE                                     1
++#define SPI_IER_OVRES                                         3
++#define SPI_IER_OVRES_MASK                           0x00000008
++#define SPI_IER_OVRES_OFFSET                                  3
++#define SPI_IER_OVRES_SIZE                                    1
++#define SPI_IER_RDRF                                          0
++#define SPI_IER_RDRF_MASK                            0x00000001
++#define SPI_IER_RDRF_OFFSET                                   0
++#define SPI_IER_RDRF_SIZE                                     1
++#define SPI_IER_RXBUFF                                        6
++#define SPI_IER_RXBUFF_MASK                          0x00000040
++#define SPI_IER_RXBUFF_OFFSET                                 6
++#define SPI_IER_RXBUFF_SIZE                                   1
++#define SPI_IER_TDRE                                          1
++#define SPI_IER_TDRE_MASK                            0x00000002
++#define SPI_IER_TDRE_OFFSET                                   1
++#define SPI_IER_TDRE_SIZE                                     1
++#define SPI_IER_TXBUFE                                        7
++#define SPI_IER_TXBUFE_MASK                          0x00000080
++#define SPI_IER_TXBUFE_OFFSET                                 7
++#define SPI_IER_TXBUFE_SIZE                                   1
++#define SPI_IER_TXEMPTY                                       9
++#define SPI_IER_TXEMPTY_MASK                         0x00000200
++#define SPI_IER_TXEMPTY_OFFSET                                9
++#define SPI_IER_TXEMPTY_SIZE                                  1
++#define SPI_IMR                                      0x0000001c
++#define SPI_IMR_ENDRX                                         4
++#define SPI_IMR_ENDRX_MASK                           0x00000010
++#define SPI_IMR_ENDRX_OFFSET                                  4
++#define SPI_IMR_ENDRX_SIZE                                    1
++#define SPI_IMR_ENDTX                                         5
++#define SPI_IMR_ENDTX_MASK                           0x00000020
++#define SPI_IMR_ENDTX_OFFSET                                  5
++#define SPI_IMR_ENDTX_SIZE                                    1
++#define SPI_IMR_MODF                                          2
++#define SPI_IMR_MODF_MASK                            0x00000004
++#define SPI_IMR_MODF_OFFSET                                   2
++#define SPI_IMR_MODF_SIZE                                     1
++#define SPI_IMR_NSSR                                          8
++#define SPI_IMR_NSSR_MASK                            0x00000100
++#define SPI_IMR_NSSR_OFFSET                                   8
++#define SPI_IMR_NSSR_SIZE                                     1
++#define SPI_IMR_OVRES                                         3
++#define SPI_IMR_OVRES_MASK                           0x00000008
++#define SPI_IMR_OVRES_OFFSET                                  3
++#define SPI_IMR_OVRES_SIZE                                    1
++#define SPI_IMR_RDRF                                          0
++#define SPI_IMR_RDRF_MASK                            0x00000001
++#define SPI_IMR_RDRF_OFFSET                                   0
++#define SPI_IMR_RDRF_SIZE                                     1
++#define SPI_IMR_RXBUFF                                        6
++#define SPI_IMR_RXBUFF_MASK                          0x00000040
++#define SPI_IMR_RXBUFF_OFFSET                                 6
++#define SPI_IMR_RXBUFF_SIZE                                   1
++#define SPI_IMR_TDRE                                          1
++#define SPI_IMR_TDRE_MASK                            0x00000002
++#define SPI_IMR_TDRE_OFFSET                                   1
++#define SPI_IMR_TDRE_SIZE                                     1
++#define SPI_IMR_TXBUFE                                        7
++#define SPI_IMR_TXBUFE_MASK                          0x00000080
++#define SPI_IMR_TXBUFE_OFFSET                                 7
++#define SPI_IMR_TXBUFE_SIZE                                   1
++#define SPI_IMR_TXEMPTY                                       9
++#define SPI_IMR_TXEMPTY_MASK                         0x00000200
++#define SPI_IMR_TXEMPTY_OFFSET                                9
++#define SPI_IMR_TXEMPTY_SIZE                                  1
++#define SPI_LASTXFER                                         24
++#define SPI_LASTXFER_MASK                            0x01000000
++#define SPI_LASTXFER_OFFSET                                  24
++#define SPI_LASTXFER_SIZE                                     1
++#define SPI_LLB                                               7
++#define SPI_LLB_MASK                                 0x00000080
++#define SPI_LLB_OFFSET                                        7
++#define SPI_LLB_SIZE                                          1
++#define SPI_MODF                                              2
++#define SPI_MODFDIS                                           4
++#define SPI_MODFDIS_MASK                             0x00000010
++#define SPI_MODFDIS_OFFSET                                    4
++#define SPI_MODFDIS_SIZE                                      1
++#define SPI_MODF_MASK                                0x00000004
++#define SPI_MODF_OFFSET                                       2
++#define SPI_MODF_SIZE                                         1
++#define SPI_MR                                       0x00000004
++#define SPI_MR_DLYBCS                                        24
++#define SPI_MR_DLYBCS_MASK                           0xff000000
++#define SPI_MR_DLYBCS_OFFSET                                 24
++#define SPI_MR_DLYBCS_SIZE                                    8
++#define SPI_MR_FDIV                                           3
++#define SPI_MR_FDIV_MASK                             0x00000008
++#define SPI_MR_FDIV_OFFSET                                    3
++#define SPI_MR_FDIV_SIZE                                      1
++#define SPI_MR_LLB                                            7
++#define SPI_MR_LLB_MASK                              0x00000080
++#define SPI_MR_LLB_OFFSET                                     7
++#define SPI_MR_LLB_SIZE                                       1
++#define SPI_MR_MODFDIS                                        4
++#define SPI_MR_MODFDIS_MASK                          0x00000010
++#define SPI_MR_MODFDIS_OFFSET                                 4
++#define SPI_MR_MODFDIS_SIZE                                   1
++#define SPI_MR_MSTR                                           0
++#define SPI_MR_MSTR_MASK                             0x00000001
++#define SPI_MR_MSTR_OFFSET                                    0
++#define SPI_MR_MSTR_SIZE                                      1
++#define SPI_MR_PCS                                           16
++#define SPI_MR_PCSDEC                                         2
++#define SPI_MR_PCSDEC_MASK                           0x00000004
++#define SPI_MR_PCSDEC_OFFSET                                  2
++#define SPI_MR_PCSDEC_SIZE                                    1
++#define SPI_MR_PCS_MASK                              0x000f0000
++#define SPI_MR_PCS_OFFSET                                    16
++#define SPI_MR_PCS_SIZE                                       4
++#define SPI_MR_PS                                             1
++#define SPI_MR_PS_MASK                               0x00000002
++#define SPI_MR_PS_OFFSET                                      1
++#define SPI_MR_PS_SIZE                                        1
++#define SPI_MSTR                                              0
++#define SPI_MSTR_MASK                                0x00000001
++#define SPI_MSTR_OFFSET                                       0
++#define SPI_MSTR_SIZE                                         1
++#define SPI_NCPHA                                             1
++#define SPI_NCPHA_MASK                               0x00000002
++#define SPI_NCPHA_OFFSET                                      1
++#define SPI_NCPHA_SIZE                                        1
++#define SPI_NSSR                                              8
++#define SPI_NSSR_MASK                                0x00000100
++#define SPI_NSSR_OFFSET                                       8
++#define SPI_NSSR_SIZE                                         1
++#define SPI_OVRES                                             3
++#define SPI_OVRES_MASK                               0x00000008
++#define SPI_OVRES_OFFSET                                      3
++#define SPI_OVRES_SIZE                                        1
++#define SPI_PCS                                              16
++#define SPI_PCSDEC                                            2
++#define SPI_PCSDEC_MASK                              0x00000004
++#define SPI_PCSDEC_OFFSET                                     2
++#define SPI_PCSDEC_SIZE                                       1
++#define SPI_PCS_MASK                                 0x000f0000
++#define SPI_PCS_OFFSET                                       16
++#define SPI_PCS_SIZE                                          4
++#define SPI_PS                                                1
++#define SPI_PS_MASK                                  0x00000002
++#define SPI_PS_OFFSET                                         1
++#define SPI_PS_SIZE                                           1
++#define SPI_PTCR                                     0x00000120
++#define SPI_PTCR_RXTDIS                                       1
++#define SPI_PTCR_RXTDIS_MASK                         0x00000002
++#define SPI_PTCR_RXTDIS_OFFSET                                1
++#define SPI_PTCR_RXTDIS_SIZE                                  1
++#define SPI_PTCR_RXTEN                                        0
++#define SPI_PTCR_RXTEN_MASK                          0x00000001
++#define SPI_PTCR_RXTEN_OFFSET                                 0
++#define SPI_PTCR_RXTEN_SIZE                                   1
++#define SPI_PTCR_TXTDIS                                       9
++#define SPI_PTCR_TXTDIS_MASK                         0x00000200
++#define SPI_PTCR_TXTDIS_OFFSET                                9
++#define SPI_PTCR_TXTDIS_SIZE                                  1
++#define SPI_PTCR_TXTEN                                        8
++#define SPI_PTCR_TXTEN_MASK                          0x00000100
++#define SPI_PTCR_TXTEN_OFFSET                                 8
++#define SPI_PTCR_TXTEN_SIZE                                   1
++#define SPI_PTSR                                     0x00000124
++#define SPI_PTSR_RXTEN                                        0
++#define SPI_PTSR_RXTEN_MASK                          0x00000001
++#define SPI_PTSR_RXTEN_OFFSET                                 0
++#define SPI_PTSR_RXTEN_SIZE                                   1
++#define SPI_PTSR_TXTEN                                        8
++#define SPI_PTSR_TXTEN_MASK                          0x00000100
++#define SPI_PTSR_TXTEN_OFFSET                                 8
++#define SPI_PTSR_TXTEN_SIZE                                   1
++#define SPI_RCR                                      0x00000104
++#define SPI_RCR_RXCTR                                         0
++#define SPI_RCR_RXCTR_MASK                           0x0000ffff
++#define SPI_RCR_RXCTR_OFFSET                                  0
++#define SPI_RCR_RXCTR_SIZE                                   16
++#define SPI_RD                                                0
++#define SPI_RDR                                      0x00000008
++#define SPI_RDRF                                              0
++#define SPI_RDRF_MASK                                0x00000001
++#define SPI_RDRF_OFFSET                                       0
++#define SPI_RDRF_SIZE                                         1
++#define SPI_RDR_PCS                                          16
++#define SPI_RDR_PCS_MASK                             0x000f0000
++#define SPI_RDR_PCS_OFFSET                                   16
++#define SPI_RDR_PCS_SIZE                                      4
++#define SPI_RDR_RD                                            0
++#define SPI_RDR_RD_MASK                              0x0000ffff
++#define SPI_RDR_RD_OFFSET                                     0
++#define SPI_RDR_RD_SIZE                                      16
++#define SPI_RD_MASK                                  0x0000ffff
++#define SPI_RD_OFFSET                                         0
++#define SPI_RD_SIZE                                          16
++#define SPI_RNCR                                     0x00000114
++#define SPI_RNCR_RXNCR                                        0
++#define SPI_RNCR_RXNCR_MASK                          0x0000ffff
++#define SPI_RNCR_RXNCR_OFFSET                                 0
++#define SPI_RNCR_RXNCR_SIZE                                  16
++#define SPI_RNPR                                     0x00000110
++#define SPI_RPR                                      0x00000100
++#define SPI_RXBUFF                                            6
++#define SPI_RXBUFF_MASK                              0x00000040
++#define SPI_RXBUFF_OFFSET                                     6
++#define SPI_RXBUFF_SIZE                                       1
++#define SPI_RXCTR                                             0
++#define SPI_RXCTR_MASK                               0x0000ffff
++#define SPI_RXCTR_OFFSET                                      0
++#define SPI_RXCTR_SIZE                                       16
++#define SPI_RXNCR                                             0
++#define SPI_RXNCR_MASK                               0x0000ffff
++#define SPI_RXNCR_OFFSET                                      0
++#define SPI_RXNCR_SIZE                                       16
++#define SPI_RXTDIS                                            1
++#define SPI_RXTDIS_MASK                              0x00000002
++#define SPI_RXTDIS_OFFSET                                     1
++#define SPI_RXTDIS_SIZE                                       1
++#define SPI_RXTEN                                             0
++#define SPI_RXTEN_MASK                               0x00000001
++#define SPI_RXTEN_OFFSET                                      0
++#define SPI_RXTEN_SIZE                                        1
++#define SPI_SCBR                                              8
++#define SPI_SCBR_MASK                                0x0000ff00
++#define SPI_SCBR_OFFSET                                       8
++#define SPI_SCBR_SIZE                                         8
++#define SPI_SPIDIS                                            1
++#define SPI_SPIDIS_MASK                              0x00000002
++#define SPI_SPIDIS_OFFSET                                     1
++#define SPI_SPIDIS_SIZE                                       1
++#define SPI_SPIEN                                             0
++#define SPI_SPIENS                                           16
++#define SPI_SPIENS_MASK                              0x00010000
++#define SPI_SPIENS_OFFSET                                    16
++#define SPI_SPIENS_SIZE                                       1
++#define SPI_SPIEN_MASK                               0x00000001
++#define SPI_SPIEN_OFFSET                                      0
++#define SPI_SPIEN_SIZE                                        1
++#define SPI_SR                                       0x00000010
++#define SPI_SR_ENDRX                                          4
++#define SPI_SR_ENDRX_MASK                            0x00000010
++#define SPI_SR_ENDRX_OFFSET                                   4
++#define SPI_SR_ENDRX_SIZE                                     1
++#define SPI_SR_ENDTX                                          5
++#define SPI_SR_ENDTX_MASK                            0x00000020
++#define SPI_SR_ENDTX_OFFSET                                   5
++#define SPI_SR_ENDTX_SIZE                                     1
++#define SPI_SR_MODF                                           2
++#define SPI_SR_MODF_MASK                             0x00000004
++#define SPI_SR_MODF_OFFSET                                    2
++#define SPI_SR_MODF_SIZE                                      1
++#define SPI_SR_NSSR                                           8
++#define SPI_SR_NSSR_MASK                             0x00000100
++#define SPI_SR_NSSR_OFFSET                                    8
++#define SPI_SR_NSSR_SIZE                                      1
++#define SPI_SR_OVRES                                          3
++#define SPI_SR_OVRES_MASK                            0x00000008
++#define SPI_SR_OVRES_OFFSET                                   3
++#define SPI_SR_OVRES_SIZE                                     1
++#define SPI_SR_RDRF                                           0
++#define SPI_SR_RDRF_MASK                             0x00000001
++#define SPI_SR_RDRF_OFFSET                                    0
++#define SPI_SR_RDRF_SIZE                                      1
++#define SPI_SR_RXBUFF                                         6
++#define SPI_SR_RXBUFF_MASK                           0x00000040
++#define SPI_SR_RXBUFF_OFFSET                                  6
++#define SPI_SR_RXBUFF_SIZE                                    1
++#define SPI_SR_SPIENS                                        16
++#define SPI_SR_SPIENS_MASK                           0x00010000
++#define SPI_SR_SPIENS_OFFSET                                 16
++#define SPI_SR_SPIENS_SIZE                                    1
++#define SPI_SR_TDRE                                           1
++#define SPI_SR_TDRE_MASK                             0x00000002
++#define SPI_SR_TDRE_OFFSET                                    1
++#define SPI_SR_TDRE_SIZE                                      1
++#define SPI_SR_TXBUFE                                         7
++#define SPI_SR_TXBUFE_MASK                           0x00000080
++#define SPI_SR_TXBUFE_OFFSET                                  7
++#define SPI_SR_TXBUFE_SIZE                                    1
++#define SPI_SR_TXEMPTY                                        9
++#define SPI_SR_TXEMPTY_MASK                          0x00000200
++#define SPI_SR_TXEMPTY_OFFSET                                 9
++#define SPI_SR_TXEMPTY_SIZE                                   1
++#define SPI_SWRST                                             7
++#define SPI_SWRST_MASK                               0x00000080
++#define SPI_SWRST_OFFSET                                      7
++#define SPI_SWRST_SIZE                                        1
++#define SPI_TCR                                      0x0000010c
++#define SPI_TCR_TXCTR                                         0
++#define SPI_TCR_TXCTR_MASK                           0x0000ffff
++#define SPI_TCR_TXCTR_OFFSET                                  0
++#define SPI_TCR_TXCTR_SIZE                                   16
++#define SPI_TD                                                0
++#define SPI_TDR                                      0x0000000c
++#define SPI_TDRE                                              1
++#define SPI_TDRE_MASK                                0x00000002
++#define SPI_TDRE_OFFSET                                       1
++#define SPI_TDRE_SIZE                                         1
++#define SPI_TDR_LASTXFER                                     24
++#define SPI_TDR_LASTXFER_MASK                        0x01000000
++#define SPI_TDR_LASTXFER_OFFSET                              24
++#define SPI_TDR_LASTXFER_SIZE                                 1
++#define SPI_TDR_PCS                                          16
++#define SPI_TDR_PCS_MASK                             0x000f0000
++#define SPI_TDR_PCS_OFFSET                                   16
++#define SPI_TDR_PCS_SIZE                                      4
++#define SPI_TDR_TD                                            0
++#define SPI_TDR_TD_MASK                              0x0000ffff
++#define SPI_TDR_TD_OFFSET                                     0
++#define SPI_TDR_TD_SIZE                                      16
++#define SPI_TD_MASK                                  0x0000ffff
++#define SPI_TD_OFFSET                                         0
++#define SPI_TD_SIZE                                          16
++#define SPI_TNCR                                     0x0000011c
++#define SPI_TNCR_TXNCR                                        0
++#define SPI_TNCR_TXNCR_MASK                          0x0000ffff
++#define SPI_TNCR_TXNCR_OFFSET                                 0
++#define SPI_TNCR_TXNCR_SIZE                                  16
++#define SPI_TNPR                                     0x00000118
++#define SPI_TPR                                      0x00000108
++#define SPI_TXBUFE                                            7
++#define SPI_TXBUFE_MASK                              0x00000080
++#define SPI_TXBUFE_OFFSET                                     7
++#define SPI_TXBUFE_SIZE                                       1
++#define SPI_TXCTR                                             0
++#define SPI_TXCTR_MASK                               0x0000ffff
++#define SPI_TXCTR_OFFSET                                      0
++#define SPI_TXCTR_SIZE                                       16
++#define SPI_TXEMPTY                                           9
++#define SPI_TXEMPTY_MASK                             0x00000200
++#define SPI_TXEMPTY_OFFSET                                    9
++#define SPI_TXEMPTY_SIZE                                      1
++#define SPI_TXNCR                                             0
++#define SPI_TXNCR_MASK                               0x0000ffff
++#define SPI_TXNCR_OFFSET                                      0
++#define SPI_TXNCR_SIZE                                       16
++#define SPI_TXTDIS                                            9
++#define SPI_TXTDIS_MASK                              0x00000200
++#define SPI_TXTDIS_OFFSET                                     9
++#define SPI_TXTDIS_SIZE                                       1
++#define SPI_TXTEN                                             8
++#define SPI_TXTEN_MASK                               0x00000100
++#define SPI_TXTEN_OFFSET                                      8
++#define SPI_TXTEN_SIZE                                        1
++
++enum {
++	SPI_ERROR = -1,
++	SPI_OK = 0,
++	SPI_ERROR_TIMEOUT = 1,
++	SPI_ERROR_ARGUMENT,
++	SPI_ERROR_OVERRUN,
++	SPI_ERROR_MODE_FAULT,
++	SPI_ERROR_OVERRUN_AND_MODE_FAULT
++};
++
++struct spi_options_t {
++	unsigned char reg;
++	unsigned int baudrate;
++	unsigned char bits;
++	unsigned char spck_delay;
++	unsigned char trans_delay;
++	unsigned char stay_act;
++	unsigned char spi_mode;
++};
++
++struct spi_info {
++	void			*regs;
++};
++
++int spi_select_chip(unsigned char chip);
++
++int spi_unselect_chip(unsigned char chip);
++
++int spi_setup_chip_reg(struct spi_options_t *options, unsigned int cpuHz);
++
++void spi_enable(void);
++
++void spi_disable(void);
++
++int spi_write(uchar *addr, int alen, uchar *buffer, int len);
++
++int spi_read(uchar *addr, int alen, uchar *buffer, int len);
++
++#define SPI_BIT(name)                          (1 << SPI_##name##_OFFSET)
++#define SPI_MKBF(name,value)                   (((value) & ((1 << SPI_##name##_SIZE) - 1)) << SPI_##name##_OFFSET)
++#define SPI_GETBF(name,value)                  (((value) >> SPI_##name##_OFFSET) & ((1 << SPI_##name##_SIZE) - 1))
++#define SPI_INSBF(name,value,old)              (((old) & ~(((1 << SPI_##name##_SIZE) - 1) << SPI_##name##_OFFSET)) | SPI_MKBF(name, value))
++
++#define spi_readl(port,reg)		readl((port)->regs + SPI_##reg)
++#define spi_writel(port,reg,value)	writel((value), (port)->regs + SPI_##reg)
++
++#endif /* #ifndef __SPI_H_ */
+diff -uprN u-boot-orig/drivers/atmel_spi.c u-boot/drivers/atmel_spi.c
+--- u-boot-orig/drivers/atmel_spi.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot/drivers/atmel_spi.c	2007-01-03 10:01:26.000000000 +0100
+@@ -0,0 +1,330 @@
++/*
++ * Copyright (C) 2004-2006 Atmel Corporation
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++#include <common.h>
++
++#ifdef CONFIG_ATMEL_SPI
++
++#include <part.h>
++#include <malloc.h>
++#include <spi.h>
++#include <atmel_spi.h>
++
++#include <asm/io.h>
++#include <asm/errno.h>
++#include <asm/byteorder.h>
++
++#include <asm/arch/memory-map.h>
++#include <asm/arch/platform.h>
++
++
++struct spi_info *spi;
++
++void spi_reset(struct spi_info *spi);
++
++int get_baud_div(struct spi_options_t * options, int busHz);
++
++int spi_selection_mode(unsigned char variable_ps,
++		unsigned char pcs_decode,
++		unsigned char delay);
++
++void spi_reset(struct spi_info *spi)
++{
++	spi_writel(spi, CR, SPI_BIT(CR_SWRST));
++}
++
++void spi_init()
++{
++	const struct device *dev;
++
++#ifdef CFG_SPI0
++	dev = get_device(DEVICE_SPI0);
++#elif CFG_SPI1
++	dev = get_device(DEVICE_SPI1);
++#else
++#error No SPI device available
++#endif
++	if (!dev)
++		return;
++
++	spi = malloc(sizeof(struct spi_info));
++	if (!spi)
++		return;
++
++	spi->regs = dev->regs;
++
++	/* Reset */
++	spi_reset(spi);
++
++	/* Master Mode */
++	spi_writel(spi, MR, SPI_BIT(MR_MSTR)
++			|SPI_MR_PCS_MASK
++			|(0<<SPI_MR_FDIV_OFFSET)
++			|(0<<SPI_MR_MODFDIS_OFFSET));
++
++	/* Selection mode:
++	 * no variable peripheral select
++	 * no peripheral chip select decode
++	 * 0 delay cycles after a chip select
++	 */
++	if (!spi_selection_mode(0, 0, 0))
++		return;
++
++	debug("spi: controller at 0x%08x\n", spi->regs);
++}
++
++int spi_selection_mode(unsigned char variable_ps,
++		unsigned char pcs_decode,
++		unsigned char delay)
++{
++	if (variable_ps > 1 || pcs_decode > 1) {
++		return SPI_ERROR_ARGUMENT;
++	}
++
++	/* Unset bitfields */
++	spi_writel(spi, MR, spi_readl(spi, MR) &
++			~(SPI_MR_PS_MASK|SPI_MR_PCSDEC_MASK
++				|SPI_MR_DLYBCS_MASK));
++	/* Set selction bits */
++	spi_writel(spi, MR, spi_readl(spi, MR)
++			|SPI_MKBF(MR_PS, variable_ps)
++			|SPI_MKBF(MR_PCSDEC, pcs_decode)
++			|SPI_MKBF(MR_DLYBCS, delay));
++
++	return SPI_OK;
++}
++
++int spi_select_chip(unsigned char chip)
++{
++	/* Assert all lines; no peripheral is selected */
++	spi_writel(spi, MR_PCS, spi_readl(spi, MR)|SPI_MR_PCS_MASK);
++
++	if (spi_readl(spi, MR) & SPI_MR_PCSDEC_MASK) {
++		ulong status;
++
++		/* The signal is decoded; allow up to 15 chips */
++		if (chip > 14) {
++			return SPI_ERROR_ARGUMENT;
++		}
++
++		status = spi_readl(spi, MR);
++		status &= ~SPI_MR_PCS_MASK;
++		status |= SPI_MKBF(MR_PCS, chip);
++		spi_writel(spi, MR, status);
++	} else {
++		if (chip > 3) {
++			return SPI_ERROR_ARGUMENT;
++		}
++
++		spi_writel(spi, MR, spi_readl(spi, MR) &
++				~(1<<(SPI_MR_PCS_OFFSET + chip)));
++	}
++
++	debug("spi: chip select %d activated\n", chip);
++
++	return SPI_OK;
++}
++
++int spi_unselect_chip(unsigned char chip)
++{
++	/* Assert all lines; no peripheral is selected */
++	spi_writel(spi, MR, spi_readl(spi, MR)|SPI_MR_PCS_MASK);
++
++	/* Last transfer, so deassert the current NPCS if CSAAT is set */
++	spi_writel(spi, CR, spi_readl(spi, MR)|SPI_CR_LASTXFER_MASK);
++
++	debug("spi: chip select %d deactivated\n", chip);
++
++	return SPI_OK;
++}
++
++int spi_setup_chip_reg(struct spi_options_t *options,
++		unsigned int busHz)
++{
++	int baudDiv = -1;
++	unsigned long csr = 0;
++
++	if (options->bits > 16 || options->bits < 8 || options->stay_act > 1) {
++		return SPI_ERROR_ARGUMENT;
++	}
++
++	baudDiv = get_baud_div(options, busHz);
++
++	if (baudDiv < 0) {
++		return -baudDiv;
++	}
++
++	/* Will use CSR0 offsets; these are the same for CSR0 - CSR3 */
++	csr = ((options->bits - 8)<<SPI_CSR0_BITS_OFFSET)|
++		(baudDiv<<SPI_CSR0_SCBR_OFFSET)|
++		(options->spck_delay<<SPI_CSR0_DLYBS_OFFSET)|
++		(options->trans_delay<<SPI_CSR0_DLYBCT_OFFSET)|
++		(options->stay_act<<SPI_CSR0_CSAAT_OFFSET);
++
++	switch (options->spi_mode) {
++		case 0:
++			csr |= (1<<SPI_CSR0_NCPHA_OFFSET); /* pass through */
++		case 1:
++			break;
++		case 2:
++			csr |= (1<<SPI_CSR0_NCPHA_OFFSET); /* pass through */
++		case 3:
++			csr |= (1<<SPI_CSR0_CPOL_OFFSET);
++			break;
++		default: /* Not in legal range */
++			return SPI_ERROR_ARGUMENT;
++	}
++
++	switch (options->reg) {
++		case 0:
++			spi_writel(spi, CSR0, csr);
++			break;
++		case 1:
++			spi_writel(spi, CSR1, csr);
++			break;
++		case 2:
++			spi_writel(spi, CSR2, csr);
++			break;
++		case 3:
++			spi_writel(spi, CSR3, csr);
++			break;
++		default:
++			return SPI_ERROR_ARGUMENT;
++	}
++
++	debug("spi: chip select %d registered\n", options->reg);
++
++	return SPI_OK;
++}
++
++void spi_enable()
++{
++	spi_writel(spi, CR, SPI_BIT(CR_SPIEN));
++}
++
++void spi_disable()
++{
++	spi_writel(spi, CR, SPI_BIT(CR_SPIDIS));
++}
++
++int spi_write(uchar *addr, int alen, uchar *buffer, int len)
++{
++	int sent = 0;
++	uchar *addr_p = addr;
++	uchar *buffer_p = buffer;
++	unsigned int timeout = SPI_TIMEOUT;
++
++	if ((alen + len) <= 0)
++		return -SPI_ERROR_ARGUMENT;
++
++	do {
++		while (!(spi_readl(spi, SR) & SPI_BIT(SR_TXEMPTY)) && --timeout);
++		if (!timeout)
++			return -SPI_ERROR_TIMEOUT;
++		if (len > 0 || alen > 1)
++			spi_writel(spi, TDR, *addr_p++ & 0x0000FFFF);
++		else
++			spi_writel(spi, TDR, (*addr_p++ & 0x0000FFFF)
++					| SPI_BIT(TDR_LASTXFER));
++		sent++;
++	} while (--alen > 0);
++
++	timeout = SPI_TIMEOUT;
++
++	do {
++		while (!(spi_readl(spi, SR) & SPI_BIT(SR_TXEMPTY)) && --timeout);
++		if (!timeout)
++			return -SPI_ERROR_TIMEOUT;
++		if (len > 1)
++			spi_writel(spi, TDR, *buffer_p++ & 0x0000FFFF);
++		else
++			spi_writel(spi, TDR, (*buffer_p++ & 0x0000FFFF)
++					| SPI_BIT(TDR_LASTXFER));
++		sent++;
++	} while (--len > 0);
++
++	return sent;
++}
++
++int spi_read(uchar *addr, int alen, uchar *buffer, int len)
++{
++	int received = 0;
++	uchar *addr_p = addr;
++	uchar *buffer_p = buffer;
++	unsigned int timeout = SPI_TIMEOUT;
++
++	if ((alen + len) <= 0)
++		return SPI_ERROR_ARGUMENT;
++
++	do {
++		while (!(spi_readl(spi, SR) & SPI_BIT(SR_RDRF)) && --timeout);
++		if (!timeout)
++			return -SPI_ERROR_TIMEOUT;
++		*addr_p++ = spi_readl(spi, RDR) & 0x000000FF;
++		--alen;
++		received++;
++	} while (alen > 0);
++
++	timeout = SPI_TIMEOUT;
++
++	do {
++		while (!(spi_readl(spi, SR) & SPI_BIT(SR_RDRF)) && --timeout);
++		if (!timeout)
++			return -SPI_ERROR_TIMEOUT;
++		*buffer_p++ = spi_readl(spi, RDR) & 0x000000FF;
++		--len;
++		received++;
++	} while (len > 0);
++
++	return received;
++}
++
++int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
++{
++	int len = 0;
++	uchar *dout_p = dout;
++	uchar *din_p = din;
++
++	while (--bitlen) {
++		if (spi_write(dout_p++, 1, 0, 0) != 1)
++			break;
++		if (spi_read(din_p++, 1, 0, 0) != 1)
++			break;
++		len++;
++	}
++
++	return len;
++}
++
++int get_baud_div(struct spi_options_t *options, int busHz) {
++	int baudDiv = 0;
++
++	baudDiv = busHz / options->baudrate;
++
++	if (baudDiv > (SPI_CSR0_SCBR_MASK<<SPI_CSR0_SCBR_OFFSET)
++			|| baudDiv <= 0) {
++		return -SPI_ERROR_ARGUMENT;
++	}
++
++	return baudDiv;
++}
++
++#endif /* CONFIG_ATMEL_SPI */
+diff -uprN u-boot-orig/drivers/Makefile u-boot/drivers/Makefile
+--- u-boot-orig/drivers/Makefile	2007-01-01 19:26:46.000000000 +0100
++++ u-boot/drivers/Makefile	2007-01-01 16:10:49.000000000 +0100
+@@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk
+ LIB	= libdrivers.a
+ 
+ OBJS	= 3c589.o 5701rls.o ali512x.o \
+-	  atmel_usart.o atmel_lcdc.o \
++	  atmel_usart.o atmel_lcdc.o atmel_spi.o \
+ 	  bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
+ 	  cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
+ 	  e1000.o eepro100.o \
============================================================
--- packages/u-boot/u-boot_1.1.4.bb	d038552bd2f9296f6e46ab33c2c4ebb364477fec
+++ packages/u-boot/u-boot_1.1.4.bb	f33798683ca5789d2b3c96f26805a5f148b78370
@@ -1,24 +1,27 @@ require u-boot.inc
 require u-boot.inc
 
+PR = "r1"
+
 DEFAULT_PREFERENCE = "-1"
 
 SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 \
           file://u-boot-make381-fix.patch;patch=1"
 
 SRC_URI_append_gumstix = "\
-						  file://u-boot-autoscript.patch;patch=1 \
-						  file://u-boot-base.patch;patch=1 \
-						  file://u-boot-crc-warning-not-so-scary.patch;patch=1 \
-						  file://u-boot-flash-protect-fixup.patch;patch=1 \
-						  file://u-boot-fw_printenv.patch;patch=1 \
-						  file://u-boot-install.patch;patch=1 \
-						  file://u-boot-jerase-cmd.patch;patch=1 \
-						  file://u-boot-jffs2-new-nodetypes.patch;patch=1 \
-						  file://u-boot-loadb-safe.patch;patch=1 \
-						  file://u-boot-mmc-init.patch;patch=1 \
-						  file://u-boot-mmcclk-alternate.patch;patch=1 \
-						  file://u-boot-smc91x-multi.patch;patch=1 \
-						  file://u-boot-zzz-osx.patch;patch=1"
+	file://u-boot-autoscript.patch;patch=1 \
+	file://u-boot-base.patch;patch=1 \
+	file://u-boot-crc-warning-not-so-scary.patch;patch=1 \
+	file://u-boot-flash-protect-fixup.patch;patch=1 \
+	file://u-boot-fw_printenv.patch;patch=1 \
+	file://u-boot-install.patch;patch=1 \
+	file://u-boot-jerase-cmd.patch;patch=1 \
+	file://u-boot-jffs2-new-nodetypes.patch;patch=1 \
+	file://u-boot-loadb-safe.patch;patch=1 \
+	file://u-boot-mmc-init.patch;patch=1 \
+	file://u-boot-mmcclk-alternate.patch;patch=1 \
+	file://u-boot-smc91x-multi.patch;patch=1 \
+	file://u-boot-zzz-osx.patch;patch=1"
+
 SRC_URI_append_amsdelta = "\
 	http://the.earth.li/pub/e3/u-boot-amsdelta-20060519.diff;patch=1"
 
@@ -26,9 +29,24 @@ SRC_URI_append_avr32= "\
         file://u-boot-dht-walnut-df2.patch;patch=1"
 
 SRC_URI_append_avr32= "\
-             http://avr32linux.org/twiki/pub/Main/UbootPatches/u-boot-1.1.4-avr1.patch.bz2;patch=1"
+	http://avr32linux.org/twiki/pub/Main/UbootPatches/u-boot-1.1.4-avr1.patch.bz2;patch=1 \
+	file://avr32-boards-fix-flash-read.patch;patch=1 \
+	file://lcdc-driver-for-avr32.patch;patch=1 \
+	file://spi-driver-for-avr32.patch;patch=1 \
+	file://at32ap-add-framebuffer-address.patch;patch=1 \
+	file://at32ap-add-spi-initcalls.patch;patch=1 \
+	file://at32ap-add-system-manager-header-file.patch;patch=1 \
+	file://ap7000-add-spi-device-and-lcdc-base-address.patch;patch=1 \
+	file://libavr32-add-spi-and-lcd-board-support.patch;patch=1 \
+	file://cmd-bmp-add-gzip-compressed-bmp.patch;patch=1 \
+	file://lcd-add-24-bpp-support-and-atmel-lcdc-support.patch;patch=1 \
+	file://atstk1000-spi-support.patch;patch=1 \
+	file://atstk1000-ltv350qv-display-support.patch;patch=1 \
+	file://atstk1000-add-lcd-and-spi-to-config.patch;patch=1 \
+	file://at32ap-add-define-for-sdram-test.patch;patch=1 \
+	file://fix-mmc-data-timeout.patch;patch=1 \
+"
 
-
 EXTRA_OEMAKE_gumstix = "CROSS_COMPILE=${TARGET_PREFIX} GUMSTIX_400MHZ=${GUMSTIX_400MHZ}"
 TARGET_LDFLAGS = ""
 
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#
#
# delete "packages/asterisk/asterisk-1.4.10"
# 
# delete "packages/asterisk/asterisk-1.4.10/Makefile.patch"
# 
# delete "packages/asterisk/asterisk-1.4.10/init"
# 
# delete "packages/asterisk/asterisk-1.4.10/logrotate"
# 
# delete "packages/asterisk/asterisk-1.4.10/sounds.xml.patch"
# 
# delete "packages/asterisk/asterisk-1.4.10/volatiles"
# 
# delete "packages/asterisk/asterisk-1.4.11"
# 
# delete "packages/asterisk/asterisk-1.4.11/Makefile.patch"
# 
# delete "packages/asterisk/asterisk-1.4.11/init"
# 
# delete "packages/asterisk/asterisk-1.4.11/logrotate"
# 
# delete "packages/asterisk/asterisk-1.4.11/sounds.xml.patch"
# 
# delete "packages/asterisk/asterisk-1.4.11/volatiles"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6/Makefile.patch"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6/init"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6/logrotate"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6/sounds.xml.patch"
# 
# delete "packages/asterisk/asterisk-1.6.0-beta6/volatiles"
# 
# delete "packages/asterisk/asterisk_1.4.10.bb"
# 
# delete "packages/asterisk/asterisk_1.4.11.bb"
# 
# delete "packages/asterisk/asterisk_1.6.0-beta6.bb"
# 
# delete "packages/madwifi/madwifi-ng_r1844-20061208.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2100-20070210.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2156-20070225.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2182-20070308.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2187-20070309.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2518-20070626.bb"
# 
# delete "packages/madwifi/madwifi-ng_r2702-20070903.bb"
# 
# rename "packages/busybox/busybox-1.9.1"
#     to "packages/busybox/busybox-1.9.2"
# 
# rename "packages/busybox/busybox_1.9.1.bb"
#     to "packages/busybox/busybox_1.9.2.bb"
# 
# rename "packages/gqview/gqview-2.1.1"
#     to "packages/gqview/gqview-2.1.5"
# 
# rename "packages/gqview/gqview_2.1.1.bb"
#     to "packages/gqview/gqview_2.1.5.bb"
# 
# rename "packages/ulxmlrpcpp/ulxmlrpcpp_1.5.2.bb"
#     to "packages/ulxmlrpcpp/ulxmlrpcpp_1.7.3.bb"
# 
# add_dir "packages/asterisk/asterisk-1.2.28"
# 
# add_dir "packages/asterisk/asterisk-1.4.19.1"
# 
# add_dir "packages/asterisk/asterisk-1.6.0-beta8"
# 
# add_dir "packages/multitap-pad"
# 
# add_dir "packages/multitap-pad/files"
# 
# add_dir "packages/netbase/netbase/mpc8313e-rdb"
# 
# add_dir "packages/u-boot/u-boot-1.3.2"
# 
# add_file "conf/distro/include/preferred-om-2008-versions.inc"
#  content [1fa5768d601b1fc24f2f64c740c2e5fc96c4fce3]
# 
# add_file "conf/machine/d201gly2.conf"
#  content [7e34b9738d6c1869f61708e1fec04db2564f9d89]
# 
# add_file "conf/machine/include/tune-pentium4c.inc"
#  content [6d4588e5e8c363a3883c76fc49befb8c4e75864d]
# 
# add_file "packages/asterisk/asterisk-1.2.28/asterisk.patch"
#  content [cd980f6cc48c01f2394a731d2cf247809e5c2231]
# 
# add_file "packages/asterisk/asterisk-1.2.28/enable-speex.patch"
#  content [123420f2bb25f198d687ae8cfad1eef6e90725bb]
# 
# add_file "packages/asterisk/asterisk-1.2.28/uclibc-compat-getloadavg.patch"
#  content [750cd99592c157b993f2ccb9f63edbe274d9edd1]
# 
# add_file "packages/asterisk/asterisk-1.2.28/uclibc-dns.patch"
#  content [9dbcc47d6cfeefd0f4c1071f982806f49ffc262d]
# 
# add_file "packages/asterisk/asterisk-1.4.19.1/Makefile.patch"
#  content [ce55873b5855c020f4d4e987a386223d1a211911]
# 
# add_file "packages/asterisk/asterisk-1.4.19.1/init"
#  content [66ddc677ff3831fb4be746a9222e69f65a2c6a22]
# 
# add_file "packages/asterisk/asterisk-1.4.19.1/logrotate"
#  content [d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f]
# 
# add_file "packages/asterisk/asterisk-1.4.19.1/sounds.xml.patch"
#  content [17999e17bf9a130a9e6e8a7a687092b2231d86c7]
# 
# add_file "packages/asterisk/asterisk-1.4.19.1/volatiles"
#  content [66814aff0fd07e02c83bf90010a95c0845067557]
# 
# add_file "packages/asterisk/asterisk-1.6.0-beta8/Makefile.patch"
#  content [83b3bcf804f60d8438696a8b8e54698c9c1dff09]
# 
# add_file "packages/asterisk/asterisk-1.6.0-beta8/init"
#  content [ab9f4c6af832cc4a94d2a5e256988be381675969]
# 
# add_file "packages/asterisk/asterisk-1.6.0-beta8/logrotate"
#  content [d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f]
# 
# add_file "packages/asterisk/asterisk-1.6.0-beta8/sounds.xml.patch"
#  content [17999e17bf9a130a9e6e8a7a687092b2231d86c7]
# 
# add_file "packages/asterisk/asterisk-1.6.0-beta8/volatiles"
#  content [66814aff0fd07e02c83bf90010a95c0845067557]
# 
# add_file "packages/asterisk/asterisk_1.2.28.bb"
#  content [59adcd07ce9843da6a5209dbe439320b4e024fbc]
# 
# add_file "packages/asterisk/asterisk_1.4.19.1.bb"
#  content [04072cabaeacd15aab238077b9b08e107ebec94b]
# 
# add_file "packages/asterisk/asterisk_1.6.0-beta8.bb"
#  content [8fbf9884c3ab370083c2125640d541c7f0fc0388]
# 
# add_file "packages/gpsd/gpsd_2.37.bb"
#  content [fcf9fa136398ac80a6cb1c8408ac6df26d0ddeaf]
# 
# add_file "packages/linux/linux-omap2-git/beagleboard/usb-timout.patch"
#  content [7acb9cec9859f0c448ef4b56bf2ebd12e8b84c2b]
# 
# add_file "packages/multitap-pad/files/80multitappad"
#  content [b613cc7c89d800c205b89dd7013c4b3ba309b319]
# 
# add_file "packages/multitap-pad/multitap-pad_svn.bb"
#  content [8f2b626f58690dd52e509cacab5977c5f52270e2]
# 
# add_file "packages/netbase/netbase/mpc8313e-rdb/interfaces"
#  content [2ece41786062e70093a58ef17e23d35ea084c316]
# 
# add_file "packages/openmoko-panel-plugins/openmoko-panel-memory_svn.bb"
#  content [8be05efebbb61236f286d5dc98eff6c59fa29561]
# 
# add_file "packages/python/python-setuptools-native_0.6c6.bb"
#  content [37e35eebe4105610cad978ad7a92f12a2b9095d1]
# 
# add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-autoboot.patch"
#  content [d10d1edb2510c27cbbfca47e962cfc8da45f0788]
# 
# add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-mtdparts.patch"
#  content [20746984bb1c6ef2789381da1283a8e06a74b0ac]
# 
# add_file "packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-nand.patch"
#  content [64eee6cc9ba75710f130f074b0632df44049ca14]
# 
# add_file "packages/ulxmlrpcpp/files/remove-local-includes.patch"
#  content [e7814096279dfa2c12d68522fac5c7bb06f70758]
# 
# patch "MAINTAINERS"
#  from [5556c9277c3381070987310400058abdd5f4c820]
#    to [df1acfac3b7175de3f71ec85623148d285a64116]
# 
# patch "classes/kernel.bbclass"
#  from [8d92c5a7b6420490dd6b3115e8146b3fc0a0f854]
#    to [8ed575119a74e50c5bcb39266997cba3f60792c2]
# 
# patch "classes/setuptools.bbclass"
#  from [f0a6d602e9af754216e3616efb17302d0116fe3b]
#    to [de18f3769a72fd6890b414d5ad97471bd58ce683]
# 
# patch "conf/distro/generic-uclibc.conf"
#  from [4b6c77936994e0b78819a2d3d1f6a9e68262429f]
#    to [86d233ffa29fe7b850743b7e58fde2e37d4d6f5a]
# 
# patch "conf/distro/include/moko-autorev.inc"
#  from [fcfcab76f058cc1c4d7421859eca5516729b13b7]
#    to [30a97196079a97d9c58ada036559086466b640f3]
# 
# patch "conf/distro/include/sane-srcdates.inc"
#  from [b34ef707dd219480ea6e208db87c67468bcaa33e]
#    to [ab98f16a11db3d5648ce60703f88e9417c3562d3]
# 
# patch "conf/distro/include/sane-srcrevs.inc"
#  from [af1d08078aa8f03db44e8b150bc4f043ad26b938]
#    to [3f68781354a48bcde95fae1b91ce841a0f88ae0f]
# 
# patch "conf/distro/oplinux-uclibc.conf"
#  from [4d4e43572601100e99436c766449cf726eab951e]
#    to [ded77d3149a141de656d62e5c1ed7e161f1e500d]
# 
# patch "conf/machine/mpc8313e-rdb.conf"
#  from [9521bcf148591a9c5c88e316475ce8493488eaf2]
#    to [ca05aff54fbbce7e6178f63cd81e0262c9607193]
# 
# patch "packages/busybox/busybox-1.9.2/defconfig"
#  from [f0e872e8e6f3bc9941075571caf38d1a62657458]
#    to [b98a8c0c48f931c7b67cd67b5498aac228e47b29]
# 
# patch "packages/busybox/busybox_1.9.2.bb"
#  from [4ce3286b8b9f17817880e467425ec28de58ea3f4]
#    to [a3a8f0f9c2f172464f5e3746ae507d0845fd473f]
# 
# patch "packages/efl1/imlib2_cvs.bb"
#  from [90324b9d8bfadfca430da3b72c2b1f9c7089ee52]
#    to [5c3c8c06ae6d9a4d18d10a066fc8973ec535e871]
# 
# patch "packages/freesmartphone/gsm0710muxd_svn.bb"
#  from [b214341ba255007649e5d97e71b3d22c2218c73e]
#    to [848b41b51ffadb51a05381fbc015bc38fa1fccb1]
# 
# patch "packages/freesmartphone/py-odeviced_svn.bb"
#  from [6ef92b7c28dc3f0730750da1b7cfeed1cd7da960]
#    to [30b9953c30c87828378bdcea8213290cc498ea8f]
# 
# patch "packages/gqview/gqview_2.1.5.bb"
#  from [16d9b045dce6b8a8f231b03d2732fb4c4d51fb0b]
#    to [c6c051a6d62ff63d3dc2481d6a0fb0df3bbc9df3]
# 
# patch "packages/hal/files/20hal"
#  from [b5274aeb2afa6b68caa3f9d7883f7b050c1b2df5]
#    to [933ee3447781ece335e67a16ff55bc387923db8c]
# 
# patch "packages/hal/hal_0.5.9.bb"
#  from [2755c957ca6ff6db1080b1a90aec3cd4228e47f2]
#    to [58f834120c11860d1ba12c673e98de14842ac1e5]
# 
# patch "packages/linux/linux-omap2-git/beagleboard/defconfig"
#  from [ffa35a912f2d6c8016f6ea1d0f7ebb27987a9b28]
#    to [6defc6fa96f79492acbfbaed1cc6553abe5edc13]
# 
# patch "packages/linux/linux-omap2_git.bb"
#  from [e84865c7794f8227ce021537e22050f366fe51b3]
#    to [d2df9d873b73d322c1d6a7918ef9c8786b091e48]
# 
# patch "packages/madwifi/madwifi-ng_r3314-20080131.bb"
#  from [aa87cb14b8005f3b927e4701b1ae845bf2099ec2]
#    to [24403394f09cfebacade21edca4dbf1c9fe180ba]
# 
# patch "packages/meta/slugos-packages.bb"
#  from [46c8ac8a7503c5e222ee23a677a92db2e2ea9dcb]
#    to [f62c22f94a5ba8a475afc6d43721c4e29386ca2e]
# 
# patch "packages/opkg/opkg_svn.bb"
#  from [bc27245782ad8e3348db57c3d14c9e75b4f1b404]
#    to [e034851c3a5985b17cbde739bc5bb59a8c69d323]
# 
# patch "packages/python/python-2.5-manifest.inc"
#  from [ce2d4136b474c7f902281410e54cde0b27751287]
#    to [e3df18f8f3a8373fd0bccb992c74a16321f20256]
# 
# patch "packages/python/python-setuptools_0.6c6.bb"
#  from [57994d92ba3eec5b7d6f145f3d08241becb3a6dc]
#    to [074cb8e81cb89426c6d897caeb5fd18c68571c9a]
# 
# patch "packages/python/python-simplejson_1.7.1.bb"
#  from [8890cca59935f213dfae3a402765e7bad90c9a89]
#    to [4abda6be3039a1c47c3bdc6c4c287078ff32fbe8]
# 
# patch "packages/python/python_2.5.2.bb"
#  from [43c9ad955282b5022b3a3db8b5b179589957f666]
#    to [3ca57f8a30e412707c0107dff460e0343840d9f1]
# 
# patch "packages/u-boot/u-boot_1.3.2.bb"
#  from [8cfd5293c0214179a38b2304fbd10c77a3912aff]
#    to [33ac513192e4695c4ea43a787d866c98c2a011ef]
# 
# patch "packages/ulxmlrpcpp/ulxmlrpcpp_1.7.3.bb"
#  from [a12a466db6c83f5d3917dc47f9ddb865083e1cd2]
#    to [620ff88b9012aace94f197dadcdfaf0b6b770e62]
# 
# patch "packages/xorg-xserver/xserver-kdrive-glamo_1.3.0.0+git.bb"
#  from [6d801f6abfc58aaf724ee5f32f75326a83882415]
#    to [d9999335a38fb49bae5419528a518ebff7e010b6]
#
============================================================
--- conf/distro/include/preferred-om-2008-versions.inc	1fa5768d601b1fc24f2f64c740c2e5fc96c4fce3
+++ conf/distro/include/preferred-om-2008-versions.inc	1fa5768d601b1fc24f2f64c740c2e5fc96c4fce3
@@ -0,0 +1,2126 @@
+PREFERRED_VERSION_0xffff ?= "0.2"
+PREFERRED_VERSION_0xffff-native ?= "0.2"
+PREFERRED_VERSION_aalib ?= "1.4rc5"
+PREFERRED_VERSION_abiword ?= "2.5.2"
+PREFERRED_VERSION_abiword-embedded ?= "2.5.2"
+PREFERRED_VERSION_abiword-plugins ?= "2.5.2"
+PREFERRED_VERSION_abuse ?= "0.7.0"
+PREFERRED_VERSION_acpid ?= "1.0.4"
+PREFERRED_VERSION_acx-firmware ?= "1.0"
+PREFERRED_VERSION_addressbook ?= "0.1"
+PREFERRED_VERSION_adns ?= "1.0"
+PREFERRED_VERSION_agg ?= "2.5"
+PREFERRED_VERSION_aircrack ?= "2.41"
+PREFERRED_VERSION_aircrack-ng ?= "0.9.1"
+PREFERRED_VERSION_albumshaper ?= "2.1"
+PREFERRED_VERSION_aliens ?= "1.0.0"
+PREFERRED_VERSION_aliens-qt ?= "1.0.0"
+PREFERRED_VERSION_alsa-lib ?= "1.0.15"
+PREFERRED_VERSION_alsa-oss ?= "1.0.15"
+PREFERRED_VERSION_alsa-plugins ?= "1.0.14"
+PREFERRED_VERSION_alsa-state ?= "0.1.0"
+PREFERRED_VERSION_alsa-utils ?= "1.0.15"
+PREFERRED_VERSION_anthy ?= "7811"
+PREFERRED_VERSION_anthy-native ?= "7811"
+PREFERRED_VERSION_antlr ?= "2.7.5"
+PREFERRED_VERSION_antlr-native ?= "2.7.5"
+PREFERRED_VERSION_apache2 ?= "2.2.3"
+PREFERRED_VERSION_apache2-native ?= "2.2.3"
+PREFERRED_VERSION_apex-env ?= "1.5.8"
+PREFERRED_VERSION_apex-nslu2 ?= "1.5.8"
+PREFERRED_VERSION_apex-nslu2-16mb ?= "1.5.8"
+PREFERRED_VERSION_apmd ?= "3.2.2"
+PREFERRED_VERSION_applewmproto ?= "1.0.3"
+PREFERRED_VERSION_appres ?= "1.0.1"
+PREFERRED_VERSION_appweb ?= "2.0.4"
+PREFERRED_VERSION_apr ?= "1.2.7"
+PREFERRED_VERSION_apr-util ?= "1.2.7"
+PREFERRED_VERSION_apt ?= "0.7.3"
+PREFERRED_VERSION_apt-native ?= "0.7.3"
+PREFERRED_VERSION_argtable ?= "2.7"
+PREFERRED_VERSION_ark3116 ?= "0.4.1"
+PREFERRED_VERSION_arpwatch ?= "2.1a15"
+PREFERRED_VERSION_aspell ?= "0.60.5"
+PREFERRED_VERSION_aspell-native ?= "0.60.5"
+PREFERRED_VERSION_asterisk = "1.4.17"
+PREFERRED_VERSION_asterisk-sounds ?= "1.2.1"
+PREFERRED_VERSION_at ?= "3.1.8"
+PREFERRED_VERSION_atd ?= "0.70"
+PREFERRED_VERSION_atftp ?= "0.7"
+PREFERRED_VERSION_atk ?= "1.20.0"
+PREFERRED_VERSION_atmelwlandriver ?= "3.4.1.0"
+PREFERRED_VERSION_atomic ?= "1.0.1"
+PREFERRED_VERSION_audiofile ?= "0.2.6"
+PREFERRED_VERSION_audioplayer ?= "1.0"
+PREFERRED_VERSION_aumix ?= "2.8"
+PREFERRED_VERSION_autoconf ?= "2.61"
+PREFERRED_VERSION_autoconf-native ?= "2.61"
+PREFERRED_VERSION_autofs ?= "4.1.4"
+PREFERRED_VERSION_automake ?= "1.9.6"
+PREFERRED_VERSION_automake-native ?= "1.9.6"
+PREFERRED_VERSION_avahi ?= "0.6.22"
+PREFERRED_VERSION_avahi-python ?= "0.6.22"
+PREFERRED_VERSION_avahi-ui ?= "0.6.22"
+PREFERRED_VERSION_avetanabt ?= "20060413"
+PREFERRED_VERSION_bacula-client ?= "1.38.11"
+PREFERRED_VERSION_balsa ?= "2.0.17"
+PREFERRED_VERSION_base-files ?= "3.0.14"
+PREFERRED_VERSION_base-passwd ?= "3.5.9"
+PREFERRED_VERSION_bash ?= "3.2"
+PREFERRED_VERSION_bash-completion ?= "20040711"
+PREFERRED_VERSION_bazaar ?= "1.2"
+PREFERRED_VERSION_bb ?= "1.2"
+PREFERRED_VERSION_bc ?= "1.06"
+PREFERRED_VERSION_bdftopcf ?= "1.0.1"
+PREFERRED_VERSION_beecrypt ?= "3.1.0"
+PREFERRED_VERSION_beecrypt-native ?= "3.1.0"
+PREFERRED_VERSION_beep ?= "1.2.2"
+PREFERRED_VERSION_beepmp ?= "0.9.7"
+PREFERRED_VERSION_beforelight ?= "1.0.2"
+PREFERRED_VERSION_benchfft ?= "3.1"
+PREFERRED_VERSION_bigreqsproto ?= "1.0.2"
+PREFERRED_VERSION_bigreqsproto-native ?= "1.0.2"
+PREFERRED_VERSION_billiardz ?= "0.1.4"
+PREFERRED_VERSION_bind ?= "9.3.4-P1"
+PREFERRED_VERSION_bing ?= "1.1.3"
+PREFERRED_VERSION_binutils ?= "2.18"
+PREFERRED_VERSION_binutils-cross ?= "2.18"
+PREFERRED_VERSION_binutils-cross-sdk ?= "2.18"
+PREFERRED_VERSION_bison ?= "2.0"
+PREFERRED_VERSION_bison-native ?= "2.0"
+PREFERRED_VERSION_bitbake ?= "1.8.6"
+PREFERRED_VERSION_bitchx ?= "1.1"
+PREFERRED_VERSION_bluesnarfer ?= "0.1"
+PREFERRED_VERSION_bluez-cups-backend ?= "3.23"
+PREFERRED_VERSION_bluez-dtl1-workaround ?= "1.0"
+PREFERRED_VERSION_bluez-gnome ?= "0.14"
+PREFERRED_VERSION_bluez-gstreamer-plugin ?= "3.23"
+PREFERRED_VERSION_bluez-hcidump ?= "1.38"
+PREFERRED_VERSION_bluez-libs ?= "3.23"
+PREFERRED_VERSION_bluez-utils ?= "3.23"
+PREFERRED_VERSION_bluez-utils-alsa ?= "3.23"
+PREFERRED_VERSION_bmon ?= "2.1.0"
+PREFERRED_VERSION_boa ?= "0.94.13"
+PREFERRED_VERSION_bochs ?= "2.1"
+PREFERRED_VERSION_bogofilter ?= "0.96.0"
+PREFERRED_VERSION_boost ?= "1.33.1"
+PREFERRED_VERSION_boost-asio ?= "0.3.7"
+PREFERRED_VERSION_boost-jam-native ?= "3.1.11"
+PREFERRED_VERSION_bootchart ?= "0.9"
+PREFERRED_VERSION_bootmenu ?= "0.7"
+PREFERRED_VERSION_bootsplash ?= "3.0.7"
+PREFERRED_VERSION_bootsplash-native ?= "3.0.7"
+PREFERRED_VERSION_brickout ?= "2002.06.09"
+PREFERRED_VERSION_brutefir ?= "1.0i"
+PREFERRED_VERSION_bt950-cs ?= "0.1"
+PREFERRED_VERSION_btscanner ?= "2.0"
+PREFERRED_VERSION_btsco ?= "0.42"
+PREFERRED_VERSION_btsco-module ?= "0.42"
+PREFERRED_VERSION_btxml ?= "1.0"
+PREFERRED_VERSION_busybox = "1.9.1"
+PREFERRED_VERSION_busybox-static ?= "1.2.1"
+PREFERRED_VERSION_bvi ?= "1.3.1"
+PREFERRED_VERSION_bwmon ?= "1.3"
+PREFERRED_VERSION_bzflag ?= "1.10.6.20040515"
+PREFERRED_VERSION_bzflag-server ?= "1.10.6.20040515"
+PREFERRED_VERSION_bzip2 ?= "1.0.2"
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+PREFERRED_VERSION_wrt-utils ?= "1.0"
+PREFERRED_VERSION_wv ?= "1.2.0"
+PREFERRED_VERSION_wview-sim ?= "3.1.3"
+PREFERRED_VERSION_wview-sim-mysql ?= "3.1.3"
+PREFERRED_VERSION_wview-vpro ?= "3.1.3"
+PREFERRED_VERSION_wview-vpro-mysql ?= "3.1.3"
+PREFERRED_VERSION_wview-wxt510 ?= "3.1.3"
+PREFERRED_VERSION_wview-wxt510-mysql ?= "3.1.3"
+PREFERRED_VERSION_wxwidgets ?= "2.6.3"
+PREFERRED_VERSION_x11perf ?= "1.4.1"
+PREFERRED_VERSION_x11vnc ?= "0.9.3"
+PREFERRED_VERSION_xaos ?= "3.2.3"
+PREFERRED_VERSION_xauth ?= "1.0.2"
+PREFERRED_VERSION_xawtv ?= "3.93"
+PREFERRED_VERSION_xbacklight ?= "1.1"
+PREFERRED_VERSION_xbase-clients ?= "1.0"
+PREFERRED_VERSION_xbitmaps ?= "1.0.1"
+PREFERRED_VERSION_xcb-demo ?= "0.1"
+PREFERRED_VERSION_xcb-proto ?= "1.0"
+PREFERRED_VERSION_xcb-util ?= "0.2"
+PREFERRED_VERSION_xchat ?= "2.8.4"
+PREFERRED_VERSION_xcmiscproto ?= "1.1.2"
+PREFERRED_VERSION_xcmiscproto-native ?= "1.1.2"
+PREFERRED_VERSION_xcursor-transparent-theme ?= "0.1.1"
+PREFERRED_VERSION_xdbedizzy ?= "1.0.2"
+PREFERRED_VERSION_xdemineur ?= "2.1.1"
+PREFERRED_VERSION_xdm ?= "1.1.6"
+PREFERRED_VERSION_xdpyinfo ?= "1.0.2"
+PREFERRED_VERSION_xerces-c ?= "2.7.0"
+PREFERRED_VERSION_xev ?= "1.0.2"
+PREFERRED_VERSION_xextproto ?= "7.0.2"
+PREFERRED_VERSION_xextproto-native ?= "7.0.2"
+PREFERRED_VERSION_xf86bigfontproto ?= "1.1.2"
+PREFERRED_VERSION_xf86bigfontproto-native ?= "1.1.2"
+PREFERRED_VERSION_xf86dga ?= "1.0.2"
+PREFERRED_VERSION_xf86dgaproto ?= "2.0.3"
+PREFERRED_VERSION_xf86driproto ?= "2.0.3"
+PREFERRED_VERSION_xf86-input-evdev ?= "1.1.5"
+PREFERRED_VERSION_xf86-input-keyboard ?= "1.2.2"
+PREFERRED_VERSION_xf86-input-mouse ?= "1.2.2"
+PREFERRED_VERSION_xf86-input-penmount ?= "1.2.0"
+PREFERRED_VERSION_xf86miscproto ?= "0.9.2"
+PREFERRED_VERSION_xf86rushproto ?= "1.1.2"
+PREFERRED_VERSION_xf86-video-ati ?= "6.6.193"
+PREFERRED_VERSION_xf86-video-fbdev ?= "0.3.1"
+PREFERRED_VERSION_xf86-video-i128 ?= "1.1.0.6"
+PREFERRED_VERSION_xf86-video-i810 ?= "1.6.5"
+PREFERRED_VERSION_xf86-video-newport ?= "0.2.1"
+PREFERRED_VERSION_xf86-video-nsc ?= "2.8.2"
+PREFERRED_VERSION_xf86-video-nv ?= "2.1.3"
+PREFERRED_VERSION_xf86-video-s3 ?= "0.5.0"
+PREFERRED_VERSION_xf86-video-savage ?= "2.1.3"
+PREFERRED_VERSION_xf86-video-siliconmotion ?= "1.5.1"
+PREFERRED_VERSION_xf86-video-sis ?= "0.9.3"
+PREFERRED_VERSION_xf86-video-tdfx ?= "1.3.0"
+PREFERRED_VERSION_xf86-video-trident ?= "1.2.3"
+PREFERRED_VERSION_xf86-video-tseng ?= "1.1.1"
+PREFERRED_VERSION_xf86-video-vesa ?= "1.3.0"
+PREFERRED_VERSION_xf86-video-via ?= "0.2.2"
+PREFERRED_VERSION_xf86-video-vmware ?= "10.14.1"
+PREFERRED_VERSION_xf86-video-voodoo ?= "1.1.1"
+PREFERRED_VERSION_xf86vidmodeproto ?= "2.2.2"
+PREFERRED_VERSION_xfcalendar ?= "4.2.3"
+PREFERRED_VERSION_xfce4-appfinder ?= "4.4.1"
+PREFERRED_VERSION_xfce4-dev-tools ?= "4.4.0"
+PREFERRED_VERSION_xfce4-icon-theme ?= "4.4.1"
+PREFERRED_VERSION_xfce4-mixer ?= "4.4.1"
+PREFERRED_VERSION_xfce4-panel ?= "4.4.1"
+PREFERRED_VERSION_xfce4-session ?= "4.4.1"
+PREFERRED_VERSION_xfce-mcs-manager ?= "4.4.1"
+PREFERRED_VERSION_xfce-mcs-plugins ?= "4.4.1"
+PREFERRED_VERSION_xfce-terminal ?= "0.2.6"
+PREFERRED_VERSION_xfdesktop ?= "4.4.1"
+PREFERRED_VERSION_xffm ?= "4.3.99.2"
+PREFERRED_VERSION_xfonts-xorg ?= "6.8"
+PREFERRED_VERSION_xfprint ?= "4.4.1"
+PREFERRED_VERSION_xfs ?= "1.0.4"
+PREFERRED_VERSION_xfsprogs ?= "2.8.16"
+PREFERRED_VERSION_xfwm4 ?= "4.4.1"
+PREFERRED_VERSION_xfwm4-themes ?= "4.4.1"
+PREFERRED_VERSION_xhost ?= "1.0.2"
+PREFERRED_VERSION_xineramaproto ?= "1.1.2"
+PREFERRED_VERSION_xinetd ?= "2.3.13"
+PREFERRED_VERSION_xinit ?= "1.0.5"
+PREFERRED_VERSION_xkbd ?= "0.8.15"
+PREFERRED_VERSION_xmame ?= "0.100"
+PREFERRED_VERSION_xmame-tiny ?= "0.100"
+PREFERRED_VERSION_xmms ?= "1.2.10"
+PREFERRED_VERSION_xmms-embedded ?= "20040327"
+PREFERRED_VERSION_xmms-mad ?= "0.10"
+PREFERRED_VERSION_xmms-tremor ?= "1.0"
+PREFERRED_VERSION_xmodmap ?= "1.0.3"
+PREFERRED_VERSION_xmonobut ?= "0.4.1"
+PREFERRED_VERSION_xorg-cf-files ?= "1.0.2"
+PREFERRED_VERSION_xorg-headers-native ?= "1.0"
+PREFERRED_VERSION_xorg-sgml-doctools ?= "1.2"
+PREFERRED_VERSION_xoscope ?= "1.12"
+PREFERRED_VERSION_xournal ?= "0.4.0.1"
+PREFERRED_VERSION_xpext ?= "1.0-5"
+PREFERRED_VERSION_xprint ?= "0.9.001"
+PREFERRED_VERSION_xprop ?= "1.0.2"
+PREFERRED_VERSION_xproto ?= "7.0.10"
+PREFERRED_VERSION_xproto-native ?= "7.0.10"
+PREFERRED_VERSION_xproxymanagementprotocol ?= "1.0.2"
+PREFERRED_VERSION_xqt ?= "0.0.9"
+PREFERRED_VERSION_xqt2 ?= "20060509"
+PREFERRED_VERSION_xrandr ?= "1.2.2"
+PREFERRED_VERSION_xrdb ?= "1.0.4"
+PREFERRED_VERSION_xscreensaver ?= "4.22"
+PREFERRED_VERSION_xscrnsaverh ?= "1.0"
+PREFERRED_VERSION_xserver-common ?= "1.18"
+PREFERRED_VERSION_xserver-kdrive    ?= "1.3.0.0"
+PREFERRED_VERSION_xserver-kdrive-common ?= "0.1"
+PREFERRED_VERSION_xserver-nodm-init ?= "1.0"
+PREFERRED_VERSION_xserver-xorg ?= "1.3.0.0"
+PREFERRED_VERSION_xset ?= "1.0.3"
+PREFERRED_VERSION_xsetroot ?= "1.0.2"
+PREFERRED_VERSION_xsp ?= "1.0.0-8"
+PREFERRED_VERSION_xst ?= "0.15"
+PREFERRED_VERSION_xstroke ?= "0.6"
+PREFERRED_VERSION_xterm ?= "207"
+PREFERRED_VERSION_xtrans ?= "1.0.4"
+PREFERRED_VERSION_xtrans-native ?= "1.0.3"
+PREFERRED_VERSION_xtscal ?= "0.6.3"
+PREFERRED_VERSION_xvinfo ?= "1.0.2"
+PREFERRED_VERSION_yeaphone ?= "0.1"
+PREFERRED_VERSION_ypbind-mt ?= "1.19"
+PREFERRED_VERSION_ypserv ?= "2.17"
+PREFERRED_VERSION_yp-tools ?= "2.9"
+PREFERRED_VERSION_zauralign ?= "1.0.2"
+PREFERRED_VERSION_zaurus-tarball-native ?= "1.0"
+PREFERRED_VERSION_zbedic ?= "1.0"
+PREFERRED_VERSION_zbench ?= "2.0"
+PREFERRED_VERSION_zcip ?= "4"
+PREFERRED_VERSION_zd1211-firmware ?= "1.3"
+PREFERRED_VERSION_zd1211 ?= "r85"
+PREFERRED_VERSION_zddice ?= "1.0.0"
+PREFERRED_VERSION_zeroconf ?= "0.9"
+PREFERRED_VERSION_zgscore ?= "1.0.2"
+PREFERRED_VERSION_zile ?= "2.2.15"
+PREFERRED_VERSION_zip ?= "2.32"
+PREFERRED_VERSION_zip-native ?= "2.32"
+PREFERRED_VERSION_zipsc ?= "0.4.3"
+PREFERRED_VERSION_ziq ?= "1.1ern"
+PREFERRED_VERSION_zlapspeed ?= "1.0.0"
+PREFERRED_VERSION_zlib ?= "1.2.3"
+PREFERRED_VERSION_zlib-native ?= "1.2.3"
+PREFERRED_VERSION_zmerlin ?= "0.9.1"
+PREFERRED_VERSION_zope ?= "3.3.1"
+PREFERRED_VERSION_zrally ?= "0.90"
+PREFERRED_VERSION_zrev7 ?= "1.0.1"
+PREFERRED_VERSION_zroadmap ?= "1.1.0"
+PREFERRED_VERSION_zsafe ?= "2.1.3"
+PREFERRED_VERSION_zsh ?= "4.1.1"
+PREFERRED_VERSION_zshopi ?= "0.2"
+PREFERRED_VERSION_zsubhunt ?= "1.0.0ern"
+PREFERRED_VERSION_ztappy ?= "0.9.3ern"
+PREFERRED_VERSION_zten ?= "1.6.2"
+PREFERRED_VERSION_zuc ?= "1.1.2ern"
+PREFERRED_VERSION_zudoku ?= "1.1"
+PREFERRED_VERSION_zziplib ?= "0.10.82"
============================================================
--- conf/machine/d201gly2.conf	7e34b9738d6c1869f61708e1fec04db2564f9d89
+++ conf/machine/d201gly2.conf	7e34b9738d6c1869f61708e1fec04db2564f9d89
@@ -0,0 +1,33 @@
+# Copyright (C) 2007, Stelios Koroneos - Digital OPSiS, All Rights Reserved
+# Released under the MIT license (see packages/COPYING)
+#@TYPE: Machine
+#@NAME: D201GLY2 
+#@DESCRIPTION: Machine configuration for Intel D201GLY2 board
+
+
+TARGET_ARCH = "i686"
+PACKAGE_EXTRA_ARCHS = "x86 i386 i486 i586 i686 i686p4c"
+
+PREFERRED_PROVIDER_virtual/kernel = "linux
+KERNEL_IMAGETYPE = "bzImage"
+OLDEST_KERNEL = "2.6.17"
+
+PREFERRED_PROVIDER_virtual/xserver = "xserver-kdrive"
+XSERVER="xserver-kdrive-sis"
+
+
+GLIBC_ADDONS = "nptl"
+GLIBC_EXTRA_OECONF = "--with-tls"
+
+
+IMAGE_FSTYPES = "ext2.gz"
+
+MACHINE_FEATURES = "kernel26 screen keyboard pci ushbost acpi ext2"
+MACHINE_EXTRA_RRECOMMENDS = " kernel-modules"
+MACHINE_TASK_PROVIDER = "task-base"
+
+udevdir = "/dev"
+
+
+#tune for P4 celeron cpu
+require conf/machine/include/tune-pentium4c.inc
============================================================
--- conf/machine/include/tune-pentium4c.inc	6d4588e5e8c363a3883c76fc49befb8c4e75864d
+++ conf/machine/include/tune-pentium4c.inc	6d4588e5e8c363a3883c76fc49befb8c4e75864d
@@ -0,0 +1,3 @@
+TARGET_CC_ARCH = "-march=prescott"
+PACKAGE_ARCH = "i686p4c"
+
============================================================
--- packages/asterisk/asterisk-1.2.28/asterisk.patch	cd980f6cc48c01f2394a731d2cf247809e5c2231
+++ packages/asterisk/asterisk-1.2.28/asterisk.patch	cd980f6cc48c01f2394a731d2cf247809e5c2231
@@ -0,0 +1,221 @@
+
+#
+# Patch managed by http://www.holgerschurig.de/patcher.html
+#
+
+--- asterisk-1.2.9.1/./Makefile~asterisk
++++ asterisk-1.2.9.1/./Makefile
+@@ -331,7 +331,7 @@
+ ASTCFLAGS+= $(TRACE_FRAMES)
+ ASTCFLAGS+= $(MALLOC_DEBUG)
+ ASTCFLAGS+= $(BUSYDETECT)
+-ASTCFLAGS+= $(OPTIONS)
++#ASTCFLAGS+= $(OPTIONS)
+ ifneq ($(findstring dont-optimize,$(MAKECMDGOALS)),dont-optimize)
+ ASTCFLAGS+= -fomit-frame-pointer 
+ endif
+@@ -347,12 +347,12 @@
+ 	netsock.o slinfactory.o ast_expr2.o ast_expr2f.o \
+ 	cryptostub.o
+ 
+-ifeq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/sys/poll.h),)
++ifeq ($(wildcard $(CROSS_COMPILE_TARGET)/include/sys/poll.h),)
+   OBJS+= poll.o
+   ASTCFLAGS+=-DPOLLCOMPAT
+ endif
+ 
+-ifeq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/dlfcn.h),)
++ifeq ($(wildcard $(CROSS_COMPILE_TARGET)/include/dlfcn.h),)
+   OBJS+= dlfcn.o
+   ASTCFLAGS+=-DDLFCNCOMPAT
+ endif
+@@ -397,7 +397,7 @@
+ endif
+ 
+ ifeq ($(MAKETOPLEVEL),$(MAKELEVEL))
+-  CFLAGS+=$(ASTCFLAGS)
++override CFLAGS+=$(ASTCFLAGS)
+ endif
+ 
+ # This is used when generating the doxygen documentation
+@@ -519,7 +519,7 @@
+ 	fi
+ 	rm -f include/asterisk/build.h.tmp
+ 	$(CC) -c -o buildinfo.o $(CFLAGS) buildinfo.c
+-	$(CC) $(DEBUG) $(ASTOBJ) $(ASTLINK) $(OBJS) buildinfo.o $(LIBEDIT) db1-ast/libdb1.a stdtime/libtime.a $(LIBS)
++	$(CC) $(DEBUG) $(ASTOBJ) $(ASTLINK) $(OBJS) buildinfo.o $(LIBEDIT) db1-ast/libdb1.a stdtime/libtime.a $(LDFLAGS) $(LIBS)
+ 
+ muted: muted.o
+ 	$(CC) $(AUDIO_LIBS) -o muted muted.o
+--- asterisk-1.2.9.1/codecs/gsm/Makefile~asterisk
++++ asterisk-1.2.9.1/codecs/gsm/Makefile
+@@ -51,7 +51,7 @@
+            ifneq (${PROC},ppc)
+             ifneq (${PROC},ppc64)
+              ifneq (${PROC},s390)
+-OPTIMIZE+=-march=$(PROC)
++#OPTIMIZE+=-march=$(PROC)
+              endif
+             endif
+            endif
+@@ -243,7 +243,7 @@
+ ifneq (${PROC},arm)
+ ifneq ($(shell uname -m), parisc)
+ ifneq ($(shell uname -m),s390)
+-GSM_SOURCES+= $(SRC)/k6opt.s
++#GSM_SOURCES+= $(SRC)/k6opt.s
+ endif
+ endif
+ endif
+@@ -309,7 +309,7 @@
+ ifneq ($(shell uname -m), armv4l)
+ ifneq ($(shell uname -m), parisc)
+ ifneq ($(shell uname -m),s390)
+-GSM_OBJECTS+= $(SRC)/k6opt.o
++#GSM_OBJECTS+= $(SRC)/k6opt.o
+ endif
+ endif
+ endif
+--- asterisk-1.2.9.1/res/Makefile~asterisk
++++ asterisk-1.2.9.1/res/Makefile
+@@ -89,7 +89,7 @@
+ 	fi
+ 
+ res_crypto.so: res_crypto.o
+-	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< ${CYGSOLIB} $(CRYPTO_LIBS)
++	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< $(LDFLAGS) ${CYGSOLIB} $(CRYPTO_LIBS)
+ 
+ clean:
+ 	rm -f *.so *.o .depend
+--- asterisk-1.2.9.1/channels/Makefile~asterisk
++++ asterisk-1.2.9.1/channels/Makefile
+@@ -73,7 +73,7 @@
+   SOLINK+=-lrt
+ endif
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/linux/ixjuser.h)$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/include/ixjuser.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/linux/ixjuser.h),)
+   CHANNEL_LIBS+=chan_phone.so
+ endif
+ 
+@@ -88,16 +88,16 @@
+ 
+ CFLAGS+=-Wno-missing-prototypes -Wno-missing-declarations
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/alsa/asoundlib.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/alsa/asoundlib.h),)
+   CHANNEL_LIBS+=chan_alsa.so
+ endif
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/lib/libpri.so.1)$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/lib/libpri.so.1),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/lib/libpri.so.1),)
+   CFLAGS+=-DZAPATA_PRI
+   ZAPPRI=-lpri
+ endif
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/lib/libmfcr2.so.1)$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/lib/libmfcr2.so.1),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/lib/libmfcr2.so.1),)
+   CFLAGS+=-DZAPATA_R2
+   ZAPR2=-lmfcr2
+ endif
+@@ -110,7 +110,7 @@
+ endif
+ 
+ ifndef WITHOUT_ZAPTEL
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/linux/zaptel.h)$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/include/zaptel.h)$(wildcard $(CROSS_COMPILE_TARGET)/usr/pkg/include/zaptel.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/linux/zaptel.h),)
+   ifeq (${OSARCH},NetBSD)
+     SOLINK+=-L$(CROSS_COMPILE_TARGET)/usr/pkg/lib
+   endif
+@@ -122,7 +122,7 @@
+ endif
+ endif # WITHOUT_ZAPTEL
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/vpbapi.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/vpbapi.h),)
+   CHANNEL_LIBS+=chan_vpb.so
+   CFLAGS+=-DLINUX
+ endif
+@@ -137,7 +137,7 @@
+ 
+ ZAPDIR=/usr/lib
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/nbs.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/nbs.h),)
+   CHANNEL_LIBS+=chan_nbs.so
+ endif
+ 
+@@ -158,7 +158,7 @@
+ 	rm -f busy.h ringtone.h gentone gentone-ulaw
+ 
+ %.so : %.o
+-	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< ${CYGSOLIB} ${LIBS}
++	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< $(LDFLAGS) ${CYGSOLIB} ${LIBS}
+ 
+ ifneq ($(wildcard .depend),)
+   include .depend
+@@ -215,7 +215,7 @@
+ chan_alsa.o: $(ALSA_SRC)
+ 
+ chan_alsa.so: chan_alsa.o
+-	$(CC) $(SOLINK) -o $@ $< -lasound -lm -ldl
++	$(CC) $(SOLINK) -o $@ $< -lasound -lm -ldl $(LDFLAGS)
+ 
+ chan_nbs.so: chan_nbs.o
+ 	$(CC) $(SOLINK) -o $@ $< -lnbs
+--- asterisk-1.2.9.1/pbx/Makefile~asterisk
++++ asterisk-1.2.9.1/pbx/Makefile
+@@ -59,7 +59,7 @@
+ 	$(CC) $(SOLINK) -o $@ $(KDE_CONSOLE_OBJS) $(KDE_LIBS)
+ 
+ pbx_dundi.so: dundi-parser.o pbx_dundi.o
+-	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} pbx_dundi.o dundi-parser.o -lz ${CYGSOLIB}
++	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} pbx_dundi.o dundi-parser.o -lz ${CYGSOLIB} $(LDFLAGS)
+ 
+ %.moc : %.h
+ 	$(MOC) $< -o $@
+--- asterisk-1.2.9.1/formats/Makefile~asterisk
++++ asterisk-1.2.9.1/formats/Makefile
+@@ -25,7 +25,7 @@
+ #
+ # OGG/Vorbis format
+ #
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/vorbis/codec.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/vorbis/codec.h),)
+   FORMAT_LIBS+=format_ogg_vorbis.so
+ endif
+ 
+@@ -57,7 +57,7 @@
+ 	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< ${CYGSOLIB} -lm
+ 
+ format_ogg_vorbis.so : format_ogg_vorbis.o
+-	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< ${CYGSOLIB} -logg -lvorbis -lvorbisenc -lm
++	$(CC) $(SOLINK) -o $@ ${CYGSOLINK} $< ${CYGSOLIB} -logg -lvorbis -lvorbisenc -lm $(LDFLAGS)
+ 
+ install: all
+ 	for x in $(FORMAT_LIBS); do $(INSTALL) -m 755 $$x $(DESTDIR)$(MODULES_DIR) ; done
+--- asterisk-1.2.9.1/utils/Makefile~asterisk
++++ asterisk-1.2.9.1/utils/Makefile
+@@ -22,11 +22,11 @@
+ 
+ TARGET=stereorize streamplayer
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/popt.h)$(wildcard -f $(CROSS_COMPILE_TARGET)/usr/local/include/popt.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/popt.h),)
+   TARGET+=smsq
+ endif
+ 
+-ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/usr/include/newt.h)$(wildcard -f $(CROSS_COMPILE_TARGET)/usr/local/include/newt.h),)
++ifneq ($(wildcard $(CROSS_COMPILE_TARGET)/include/newt.h),)
+   TARGET+=astman
+ endif
+ 
+@@ -64,7 +64,7 @@
+ 	$(CC) $(CFLAGS) -o $@ $^
+ 
+ smsq: smsq.o
+-	$(CC) $(CFLAGS) -o smsq ${SOL} smsq.o -lpopt
++	$(CC) $(CFLAGS) -o smsq ${SOL} smsq.o -lpopt $(LDFLAGS)
+ 
+ streamplayer: streamplayer.o
+ 	$(CC) $(CFLAGS) -o streamplayer ${SOL} streamplayer.o ${SOLLIBS}
============================================================
--- packages/asterisk/asterisk-1.2.28/enable-speex.patch	123420f2bb25f198d687ae8cfad1eef6e90725bb
+++ packages/asterisk/asterisk-1.2.28/enable-speex.patch	123420f2bb25f198d687ae8cfad1eef6e90725bb
@@ -0,0 +1,21 @@
+--- /codecs/orig-Makefile	2005-11-29 13:24:39.000000000 -0500
++++ /codecs/Makefile	2007-02-28 09:54:42.000000000 -0500
+@@ -29,7 +29,7 @@
+ endif
+ 
+ UI_SPEEX=$(wildcard $(CROSS_COMPILE_TARGET)/usr/include/speex.h)
+-UIS_SPEEX=$(wildcard $(CROSS_COMPILE_TARGET)/usr/include/speex/speex.h)
++UIS_SPEEX=$(wildcard $(CROSS_COMPILE_TARGET)/include/speex/speex.h)
+ ULI_SPEEX=$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/include/speex.h)
+ ULIS_SPEEX=$(wildcard $(CROSS_COMPILE_TARGET)/usr/local/include/speex/speex.h)
+ ifneq (${UI_SPEEX},)
+@@ -38,7 +38,8 @@
+ endif
+ ifneq (${UIS_SPEEX},)
+   MODSPEEX=codec_speex.so
+-  CFLAGS+=-I$(CROSS_COMPILE_TARGET)/usr/include/speex
++  CFLAGS+=-I$(CROSS_COMPILE_TARGET)/include/speex
++  LIBSPEEX=-L$(CROSS_COMPILE_TARGET)/lib
+   LIBSPEEX+=-lspeex -lm
+ endif
+ ifneq (${ULI_SPEEX},)
============================================================
--- packages/asterisk/asterisk-1.2.28/uclibc-compat-getloadavg.patch	750cd99592c157b993f2ccb9f63edbe274d9edd1
+++ packages/asterisk/asterisk-1.2.28/uclibc-compat-getloadavg.patch	750cd99592c157b993f2ccb9f63edbe274d9edd1
@@ -0,0 +1,13 @@
+diff -ruN asterisk-1.2.0-old/include/asterisk/compat.h asterisk-1.2.0-new/include/asterisk/compat.h
+--- asterisk-1.2.0-old/include/asterisk/compat.h	2005-11-08 05:13:19.000000000 +0100
++++ asterisk-1.2.0-new/include/asterisk/compat.h	2005-12-04 05:32:31.000000000 +0100
+@@ -75,7 +75,9 @@
+ #define HAVE_STRTOQ
+ 
+ #ifdef _BSD_SOURCE
++#ifndef __UCLIBC__
+ #define HAVE_GETLOADAVG
++#endif /* __UCLIBC__ */
+ #endif
+ 
+ #ifdef __linux__
============================================================
--- packages/asterisk/asterisk-1.2.28/uclibc-dns.patch	9dbcc47d6cfeefd0f4c1071f982806f49ffc262d
+++ packages/asterisk/asterisk-1.2.28/uclibc-dns.patch	9dbcc47d6cfeefd0f4c1071f982806f49ffc262d
@@ -0,0 +1,18 @@
+--- /orig-dns.c	2007-07-16 23:46:58.000000000 +0300
++++ /dns.c	2007-07-26 16:29:44.000000000 +0300
+@@ -237,7 +237,14 @@
+ #if defined(res_ndestroy)
+ #define HAS_RES_NDESTROY
+ #endif
+-#else
++#endif
++
++#ifdef __UCLIBC__
++#undef HAS_RES_NINIT
++#undef HAS_RES_NDESTROY
++#endif
++
++#ifndef HAS_RES_NINIT
+ AST_MUTEX_DEFINE_STATIC(res_lock);
+ #if 0
+ #warning "Warning, res_ninit is missing...  Could have reentrancy issues"
============================================================
--- packages/asterisk/asterisk-1.4.19.1/Makefile.patch	ce55873b5855c020f4d4e987a386223d1a211911
+++ packages/asterisk/asterisk-1.4.19.1/Makefile.patch	ce55873b5855c020f4d4e987a386223d1a211911
@@ -0,0 +1,20 @@
+--- asterisk-1.4.5/Makefile	2007-05-24 15:05:08.000000000 -0400
++++ asterisk-1.4.5/Makefile.new	2007-06-17 05:36:44.000000000 -0400
+@@ -115,7 +115,7 @@ else
+   ASTSBINDIR=$(sbindir)
+   ASTSPOOLDIR=$(localstatedir)/spool/asterisk
+   ASTLOGDIR=$(localstatedir)/log/asterisk
+-  ASTVARRUNDIR=$(localstatedir)/run
++  ASTVARRUNDIR=$(localstatedir)/run/asterisk
+   ASTMANDIR=$(mandir)
+ ifeq ($(OSARCH),FreeBSD)
+   ASTVARLIBDIR=$(prefix)/share/asterisk
+@@ -468,7 +468,7 @@ oldmodcheck:
+ 		echo " WARNING WARNING WARNING" ;\
+ 	fi
+ 
+-install: badshell datafiles bininstall $(SUBDIRS_INSTALL)
++install: badshell datafiles bininstall $(SUBDIRS_INSTALL) samples
+ 	@if [ -x /usr/sbin/asterisk-post-install ]; then \
+ 		/usr/sbin/asterisk-post-install $(DESTDIR) . ; \
+ 	fi
============================================================
--- packages/asterisk/asterisk-1.4.19.1/init	66ddc677ff3831fb4be746a9222e69f65a2c6a22
+++ packages/asterisk/asterisk-1.4.19.1/init	66ddc677ff3831fb4be746a9222e69f65a2c6a22
@@ -0,0 +1,77 @@
+#! /bin/sh 
+#
+# This is an init script for openembedded
+# Copy it to /etc/init.d/callweaver and type
+# > update-rc.d asterisk defaults 60
+#
+asterisk=/usr/sbin/asterisk
+pidfile=/var/run/asterisk/asterisk.pid
+asterisk_args="-npqT -U asterisk -G asterisk"
+
+test -x "$asterisk" || exit 0
+
+case "$1" in
+  start)
+    echo -n "Starting Asterisk"
+    start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    echo "."
+    ;;
+  stop)
+    echo -n "Stopping Asterisk"
+    $asterisk -rx "stop gracefully"
+    sleep 4
+    if [ -f $pidfile ]; then
+      start-stop-daemon --stop --quiet --pidfile $pidfile
+    fi
+    echo "."
+    ;;
+  force-stop)
+    echo -n "Stopping Asterisk"
+    $asterisk -rx "stop now"
+    sleep 2
+    if [ -f $pidfile ]; then
+      start-stop-daemon --stop --quiet --pidfile $pidfile
+    fi
+    echo "."
+    ;;
+  restart)
+    echo -n "Restarting Asterisk"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "restart gracefully"
+      sleep 2
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  force-restart)
+    echo -n "Forcibly Restarting Asterisk"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "restart now"
+      sleep 2
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  reload)
+    echo -n "Reloading Asterisk Configuration"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "reload"
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  logger-reload)
+    if [ -f $pidfile ]; then
+      $asterisk -rx "logger reload"
+    fi
+    ;;
+  *)
+    echo "Usage: /etc/init.d/asterisk {start|stop|force-stop|restart|force-restart|reload|logger-reload}"
+    exit 1
+esac
+
+exit 0
+
============================================================
--- packages/asterisk/asterisk-1.4.19.1/logrotate	d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f
+++ packages/asterisk/asterisk-1.4.19.1/logrotate	d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f
@@ -0,0 +1,12 @@
+/var/log/asterisk/cdr-csv/Master.csv /var/log/asterisk/cdr-custom/Master.csv /var/log/asterisk/queue_log /var/log/asterisk/event_log /var/log/asterisk/messages {
+    daily
+    missingok
+    compress
+    delaycompress
+    rotate 30
+    sharedscripts
+    postrotate
+      /etc/init.d/asterisk logger-reload
+    endscript
+}
+
============================================================
--- packages/asterisk/asterisk-1.4.19.1/sounds.xml.patch	17999e17bf9a130a9e6e8a7a687092b2231d86c7
+++ packages/asterisk/asterisk-1.4.19.1/sounds.xml.patch	17999e17bf9a130a9e6e8a7a687092b2231d86c7
@@ -0,0 +1,18 @@
+--- asterisk-1.4.4/sounds/sounds.xml	2007-05-24 17:00:45.000000000 -0400
++++ asterisk-1.4.4/sounds/sounds.xml.new	2007-05-25 13:23:41.000000000 -0400
+@@ -6,7 +6,6 @@
+ 		<member name="CORE-SOUNDS-EN-ALAW" displayname="English, a-Law format">
+ 		</member>
+ 		<member name="CORE-SOUNDS-EN-GSM" displayname="English, GSM format" >
+-			<defaultenabled>yes</defaultenabled>
+ 		</member>
+ 		<member name="CORE-SOUNDS-EN-G729" displayname="English, G.729 format">
+ 		</member>
+@@ -39,7 +38,6 @@
+ 	</category>
+ 	<category name="MENUSELECT_MOH" displayname="Music On Hold File Packages" positive_output="yes">
+ 		<member name="MOH-FREEPLAY-WAV" displayname="FreePlay Music On Hold Files, WAV format" >
+-			<defaultenabled>yes</defaultenabled>
+ 		</member>
+ 		<member name="MOH-FREEPLAY-ULAW" displayname="FreePlay Music On Hold Files, mu-Law format" >
+ 		</member>
============================================================
--- packages/asterisk/asterisk-1.4.19.1/volatiles	66814aff0fd07e02c83bf90010a95c0845067557
+++ packages/asterisk/asterisk-1.4.19.1/volatiles	66814aff0fd07e02c83bf90010a95c0845067557
@@ -0,0 +1,7 @@
+d asterisk asterisk 0775 /var/run/asterisk none
+d asterisk asterisk 0775 /var/lib/asterisk none
+d asterisk asterisk 0775 /var/log/asterisk none
+d asterisk asterisk 0775 /var/log/asterisk/cdr-csv none
+d asterisk asterisk 0775 /var/log/asterisk/cdr-custom none
+d asterisk asterisk 0775 /var/spool/asterisk/outgoing none
+d asterisk asterisk 0775 /var/spool/asterisk/voicemail none
============================================================
--- packages/asterisk/asterisk-1.6.0-beta8/Makefile.patch	83b3bcf804f60d8438696a8b8e54698c9c1dff09
+++ packages/asterisk/asterisk-1.6.0-beta8/Makefile.patch	83b3bcf804f60d8438696a8b8e54698c9c1dff09
@@ -0,0 +1,20 @@
+--- asterisk-1.6.0/Makefile	2008-03-18 11:58:50.000000000 -0400
++++ asterisk-1.6.0.new/Makefile	2008-03-28 12:11:32.137042768 -0400
+@@ -142,7 +142,7 @@ else
+   ASTSBINDIR=$(sbindir)
+   ASTSPOOLDIR=$(localstatedir)/spool/asterisk
+   ASTLOGDIR=$(localstatedir)/log/asterisk
+-  ASTVARRUNDIR=$(localstatedir)/run
++  ASTVARRUNDIR=$(localstatedir)/run/asterisk
+   ASTMANDIR=$(mandir)
+ ifneq ($(findstring BSD,$(OSARCH)),)
+   ASTVARLIBDIR=$(prefix)/share/asterisk
+@@ -571,7 +571,7 @@ ifneq ($(findstring ~,$(DESTDIR)),)
+ 	@exit 1
+ endif
+ 
+-install: badshell datafiles bininstall
++install: badshell datafiles bininstall samples
+ 	@if [ -x /usr/sbin/asterisk-post-install ]; then \
+ 		/usr/sbin/asterisk-post-install $(DESTDIR) . ; \
+ 	fi
============================================================
--- packages/asterisk/asterisk-1.6.0-beta8/init	ab9f4c6af832cc4a94d2a5e256988be381675969
+++ packages/asterisk/asterisk-1.6.0-beta8/init	ab9f4c6af832cc4a94d2a5e256988be381675969
@@ -0,0 +1,77 @@
+#! /bin/sh 
+#
+# This is an init script for openembedded
+# Copy it to /etc/init.d/openpbx and type
+# > update-rc.d asterisk defaults 60
+#
+asterisk=/usr/sbin/asterisk
+pidfile=/var/run/asterisk/asterisk.pid
+asterisk_args="-npqT -U asterisk -G asterisk"
+
+test -x "$asterisk" || exit 0
+
+case "$1" in
+  start)
+    echo -n "Starting Asterisk"
+    start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    echo "."
+    ;;
+  stop)
+    echo -n "Stopping Asterisk"
+    $asterisk -rx "stop gracefully"
+    sleep 4
+    if [ -f $pidfile ]; then
+      start-stop-daemon --stop --quiet --pidfile $pidfile
+    fi
+    echo "."
+    ;;
+  force-stop)
+    echo -n "Stopping Asterisk"
+    $asterisk -rx "stop now"
+    sleep 2
+    if [ -f $pidfile ]; then
+      start-stop-daemon --stop --quiet --pidfile $pidfile
+    fi
+    echo "."
+    ;;
+  restart)
+    echo -n "Restarting Asterisk"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "restart gracefully"
+      sleep 2
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  force-restart)
+    echo -n "Forcibly Restarting Asterisk"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "restart now"
+      sleep 2
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  reload)
+    echo -n "Reloading Asterisk Configuration"
+    if [ -f $pidfile ]; then
+      $asterisk -rx "reload"
+    else
+      start-stop-daemon --start --quiet --exec $asterisk -- $asterisk_args
+    fi
+    echo "."
+    ;;
+  logger-reload)
+    if [ -f $pidfile ]; then
+      $asterisk -rx "logger reload"
+    fi
+    ;;
+  *)
+    echo "Usage: /etc/init.d/asterisk {start|stop|force-stop|restart|force-restart|reload|logger-reload}"
+    exit 1
+esac
+
+exit 0
+
============================================================
--- packages/asterisk/asterisk-1.6.0-beta8/logrotate	d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f
+++ packages/asterisk/asterisk-1.6.0-beta8/logrotate	d1ec36f2b07760a1a2cd1c2b18215fc5e06b2f4f
@@ -0,0 +1,12 @@
+/var/log/asterisk/cdr-csv/Master.csv /var/log/asterisk/cdr-custom/Master.csv /var/log/asterisk/queue_log /var/log/asterisk/event_log /var/log/asterisk/messages {
+    daily
+    missingok
+    compress
+    delaycompress
+    rotate 30
+    sharedscripts
+    postrotate
+      /etc/init.d/asterisk logger-reload
+    endscript
+}
+
============================================================
--- packages/asterisk/asterisk-1.6.0-beta8/sounds.xml.patch	17999e17bf9a130a9e6e8a7a687092b2231d86c7
+++ packages/asterisk/asterisk-1.6.0-beta8/sounds.xml.patch	17999e17bf9a130a9e6e8a7a687092b2231d86c7
@@ -0,0 +1,18 @@
+--- asterisk-1.4.4/sounds/sounds.xml	2007-05-24 17:00:45.000000000 -0400
++++ asterisk-1.4.4/sounds/sounds.xml.new	2007-05-25 13:23:41.000000000 -0400
+@@ -6,7 +6,6 @@
+ 		<member name="CORE-SOUNDS-EN-ALAW" displayname="English, a-Law format">
+ 		</member>
+ 		<member name="CORE-SOUNDS-EN-GSM" displayname="English, GSM format" >
+-			<defaultenabled>yes</defaultenabled>
+ 		</member>
+ 		<member name="CORE-SOUNDS-EN-G729" displayname="English, G.729 format">
+ 		</member>
+@@ -39,7 +38,6 @@
+ 	</category>
+ 	<category name="MENUSELECT_MOH" displayname="Music On Hold File Packages" positive_output="yes">
+ 		<member name="MOH-FREEPLAY-WAV" displayname="FreePlay Music On Hold Files, WAV format" >
+-			<defaultenabled>yes</defaultenabled>
+ 		</member>
+ 		<member name="MOH-FREEPLAY-ULAW" displayname="FreePlay Music On Hold Files, mu-Law format" >
+ 		</member>
============================================================
--- packages/asterisk/asterisk-1.6.0-beta8/volatiles	66814aff0fd07e02c83bf90010a95c0845067557
+++ packages/asterisk/asterisk-1.6.0-beta8/volatiles	66814aff0fd07e02c83bf90010a95c0845067557
@@ -0,0 +1,7 @@
+d asterisk asterisk 0775 /var/run/asterisk none
+d asterisk asterisk 0775 /var/lib/asterisk none
+d asterisk asterisk 0775 /var/log/asterisk none
+d asterisk asterisk 0775 /var/log/asterisk/cdr-csv none
+d asterisk asterisk 0775 /var/log/asterisk/cdr-custom none
+d asterisk asterisk 0775 /var/spool/asterisk/outgoing none
+d asterisk asterisk 0775 /var/spool/asterisk/voicemail none
============================================================
--- packages/asterisk/asterisk_1.2.28.bb	59adcd07ce9843da6a5209dbe439320b4e024fbc
+++ packages/asterisk/asterisk_1.2.28.bb	59adcd07ce9843da6a5209dbe439320b4e024fbc
@@ -0,0 +1,46 @@
+# Copyright (C) 2007-2008, Stelios Koroneos - Digital OPSiS, All Rights Reserved
+# Released under the MIT license (see packages/COPYING)
+DESCRIPTION="The Asterisk open source software PBX"
+HOMEPAGE="www.asterisk.org"
+LICENSE="GPL"
+DEPENDS="ncurses zlib openssl curl alsa-lib libogg libvorbis speex"
+SECTION = "console/telephony"
+PR = "r0"
+
+SRC_URI="http://ftp.digium.com/pub/asterisk/releases/asterisk-${PV}.tar.gz \
+	 file://uclibc-compat-getloadavg.patch;patch=1 \
+	 file://uclibc-dns.patch;patch=1 \
+         file://asterisk.patch;patch=1 \
+         file://enable-speex.patch;patch=1"
+
+S = "${WORKDIR}/asterisk-${PV}"
+
+
+export CROSS_COMPILE="${CCACHE}${HOST_PREFIX}"
+export CROSS_COMPILE_BIN="${STAGING_BINDIR_CROSS}"
+export CROSS_COMPILE_TARGET="${STAGING_DIR_HOST}"
+
+export CROSS_ARCH="Linux"
+export CROSS_PROC="${TARGET_ARCH}"
+
+export MAKECMDGOALS="dont-optimize"
+
+# We will probably have to edit the CFLAG in the Makefile
+
+do_compile() {
+        oe_runmake
+}
+
+do_install() {
+        oe_runmake DESTDIR=${D} install
+}
+
+do_stage () {
+        install -d ${STAGING_INCDIR}/asterisk
+        install -m 0644 ${S}/include/asterisk/*.h ${STAGING_INCDIR}/asterisk/
+}
+
+
+FILES_${PN}-dbg += "${libdir}/asterisk/modules/.debug"
+FILES_${PN}-dbg += "/var/lib/asterisk/agi-bin/.debug"
+
============================================================
--- packages/asterisk/asterisk_1.4.19.1.bb	04072cabaeacd15aab238077b9b08e107ebec94b
+++ packages/asterisk/asterisk_1.4.19.1.bb	04072cabaeacd15aab238077b9b08e107ebec94b
@@ -0,0 +1,170 @@
+# Copyright (C) 2007-2008, Stelios Koroneos - Digital OPSiS, All Rights Reserved
+# Released under the MIT license (see packages/COPYING)
+DESCRIPTION = "The Asterisk open source software PBX"
+HOMEPAGE = "http://www.asterisk.org"
+LICENSE = "GPLv2"
+PRIORITY = "optional"
+SECTION = "console/telephony"
+DEPENDS = "speex readline zlib openssl curl popt gnutls sqlite libogg libvorbis"
+#RRECOMMENDS_${PN} = "logrotate"
+PR = "r0"
+
+
+SRC_URI="http://ftp.digium.com/pub/asterisk/releases/asterisk-${PV}.tar.gz\
+	file://sounds.xml.patch;patch=1\
+	file://Makefile.patch;patch=1\
+	file://logrotate \
+	file://volatiles \
+	file://init"
+
+ARCH_efika="powerpc"
+ARCH_dht-walnut="powerpc"
+ARCH_magicbox="powerpc"
+ARCH_sequoia="powerpc"
+
+
+
+
+INITSCRIPT_NAME = "asterisk"
+INITSCRIPT_PARAMS = "defaults 60"
+
+inherit autotools update-rc.d
+
+EXTRA_OECONF =  "--with-ssl=${STAGING_EXECPREFIXDIR} \
+			--with-z=${STAGING_EXECPREFIXDIR} \
+			--with-curl=${STAGING_EXECPREFIXDIR} \
+			--with-termcap=${STAGING_EXECPREFIXDIR} \
+			--with-ogg=${STAGING_EXECPREFIXDIR} \
+			--with-vorbis=${STAGING_EXECPREFIXDIR} \
+			--with-sqlite=${STAGING_EXECPREFIXDIR} \
+			--with-popt=${STAGING_EXECPREFIXDIR} \
+			--with-gnutls=${STAGING_EXECPREFIXDIR} \
+			--without-curses\
+			--with-ncurses=${STAGING_EXECPREFIXDIR} \
+			--without-imap\
+			--without-netsnmp\
+			--without-odbc\
+			--without-osptk\
+			--without-nbs\
+			--without-pwlib\
+			--without-radius\
+			--without-tds\
+			--without-postgres\
+			--without-zaptel\
+			"
+
+#export NOISY_BUILD=yes
+
+export ASTCFLAGS = "-fsigned-char -I${STAGING_INCDIR} -DPATH_MAX=4096"
+export ASTLDFLAGS="${LDFLAGS} -lpthread -ldl -lresolv "
+export PROC="${ARCH}"
+
+do_configure_prepend () {
+	sed -i 's:/var:${localstatedir}:' ${WORKDIR}/logrotate
+	sed -i 's:/etc/init.d:${sysconfdir}/init.d:' ${WORKDIR}/logrotate
+	sed -i 's:/var:${localstatedir}:' ${WORKDIR}/volatiles
+}
+
+do_configure () {
+	# Looks like rebuilding configure doesn't work, so we are skipping
+	# that and are just using the shipped one
+	gnu-configize
+	libtoolize --force
+	oe_runconf
+}
+
+
+do_compile() {
+        (
+         #make sure that menuselect gets build using host toolchain
+         unset CC LD CXX CCLD CFLAGS CPPFLAGS LDFLAGS CXXFLAGS RANLIB
+         cd menuselect 
+         ./configure
+         oe_runmake
+         cd ../
+        ) || exit 1
+        oe_runmake
+}
+
+
+
+
+do_install_append() {
+        install -d ${D}${sysconfdir}/init.d/
+	install -m 755 ${WORKDIR}/init ${D}${sysconfdir}/init.d/asterisk
+	install -c -D -m 644 ${WORKDIR}/logrotate ${D}${sysconfdir}/logrotate.d/asterisk
+	install -c -D -m 644 ${WORKDIR}/volatiles ${D}${sysconfdir}/default/volatiles/asterisk
+}
+
+pkg_postinst_prepend() {
+	grep -q asterisk  ${sysconfdir}/group || addgroup --system asterisk
+	grep -q asterisk ${sysconfdir}/passwd || adduser --system --home ${localstatedir}/run/asterisk --no-create-home --disabled-password --ingroup asterisk -s ${base_bindir}/false asterisk
+	chown -R asterisk:asterisk ${libdir}/asterisk ${localstatedir}/lib/asterisk ${localstatedir}/spool/asterisk ${localstatedir}/log/asterisk ${localstatedir}/run/asterisk ${sysconfdir}/asterisk
+}
+
+FILES_${PN} += "${libdir}/asterisk/modules/*"
+FILES_${PN}-dbg += "${libdir}/asterisk/modules/.debug \
+                    ${localstatedir}/lib/asterisk/*/.debug"
+
+CONFFILES_${PN} += "${sysconfdir}/asterisk/adsi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/adtranvofr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/agents.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/alarmreceiver.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/alsa.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/amd.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/asterisk.adsi"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/asterisk.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_custom.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_manager.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_pgsql.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_tds.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/codecs.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/dnsmgr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/dundi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/enum.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extconfig.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions.ael"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/features.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/festival.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/followme.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/func_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/gtalk.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/h323.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/http.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/iax.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/iaxprov.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/indications.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/jabber.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/logger.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/manager.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/meetme.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/mgcp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/misdn.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/modules.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/musiconhold.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/muted.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/osp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/oss.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/phone.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/privacy.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/queues.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_snmp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/rpt.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/rtp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/say.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sip.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sip_notify.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/skinny.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sla.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/smdi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/telcordia-1.adsi"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/udptl.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/users.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/voicemail.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/vpb.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/zapata.conf"
+CONFFILES_${PN} += "${sysconfdir}/logrotate.d/asterisk"
============================================================
--- packages/asterisk/asterisk_1.6.0-beta8.bb	8fbf9884c3ab370083c2125640d541c7f0fc0388
+++ packages/asterisk/asterisk_1.6.0-beta8.bb	8fbf9884c3ab370083c2125640d541c7f0fc0388
@@ -0,0 +1,184 @@
+# Copyright (C) 2008, Ovidiu Sas - VoIP Embedded Inc., All Rights Reserved
+# Copyright (C) 2008, Stelios Koroneos - Digital OPSiS, All Rights Reserved
+# Released under the MIT license (see packages/COPYING)
+DESCRIPTION = "The Asterisk open source software PBX"
+HOMEPAGE = "http://www.asterisk.org"
+LICENSE = "GPLv2"
+PRIORITY = "optional"
+SECTION = "console/telephony"
+DEPENDS = "speex readline zlib openssl curl popt gnutls sqlite libogg libvorbis"
+#RRECOMMENDS_${PN} = "logrotate"
+PR = "r0"
+
+DEFAULT_PREFERENCE = "-1"
+
+
+SRC_URI="http://ftp.digium.com/pub/asterisk/releases/asterisk-${PV}.tar.gz\
+	file://sounds.xml.patch;patch=1\
+	file://Makefile.patch;patch=1\
+	file://logrotate \
+	file://volatiles \
+	file://init"
+
+ARCH_efika="powerpc"
+ARCH_dht-walnut="powerpc"
+ARCH_magicbox="powerpc"
+ARCH_sequoia="powerpc"
+
+INITSCRIPT_NAME = "asterisk"
+INITSCRIPT_PARAMS = "defaults 60"
+
+inherit autotools update-rc.d
+
+EXTRA_OECONF =  "--with-ssl=${STAGING_EXECPREFIXDIR}\
+			--with-z=${STAGING_EXECPREFIXDIR}\
+			--with-curl=${STAGING_EXECPREFIXDIR}\
+			--with-termcap=${STAGING_EXECPREFIXDIR}\
+			--with-ogg=${STAGING_EXECPREFIXDIR}\
+			--with-vorbis=${STAGING_EXECPREFIXDIR}\
+			--with-sqlite=${STAGING_EXECPREFIXDIR}\
+			--with-popt=${STAGING_EXECPREFIXDIR}\
+			--with-gnutls=${STAGING_EXECPREFIXDIR}\
+			--without-curses\
+			--with-ncurses=${STAGING_EXECPREFIXDIR}\
+			--without-imap\
+			--without-netsnmp\
+			--without-odbc\
+			--without-osptk\
+			--without-nbs\
+			--without-pwlib\
+			--without-radius\
+			--without-tds\
+			--without-postgres\
+			--without-zaptel\
+			"
+
+#export NOISY_BUILD=yes
+
+export ASTCFLAGS = "-fsigned-char -I${STAGING_INCDIR} -DPATH_MAX=4096"
+export ASTLDFLAGS="${LDFLAGS} -lpthread -ldl -lresolv "
+export PROC="${ARCH}"
+
+do_configure_prepend () {
+	sed -i 's:/var:${localstatedir}:' ${WORKDIR}/logrotate
+	sed -i 's:/etc/init.d:${sysconfdir}/init.d:' ${WORKDIR}/logrotate
+	sed -i 's:/var:${localstatedir}:' ${WORKDIR}/volatiles
+}
+
+do_configure () {
+	# Looks like rebuilding configure doesn't work, so we are skipping
+	# that and are just using the shipped one
+	gnu-configize
+	libtoolize --force
+	oe_runconf
+}
+
+
+do_compile() {
+        (
+         #make sure that menuselect gets build using host toolchain
+         unset CC LD CXX CCLD CFLAGS CPPFLAGS LDFLAGS CXXFLAGS RANLIB
+         cd menuselect 
+         ./configure
+         oe_runmake
+         cd ../
+        ) || exit 1
+        oe_runmake
+}
+
+do_stage() {
+	autotools_stage_includes
+}
+
+do_install_append() {
+        install -d ${D}${sysconfdir}/init.d/
+	install -m 755 ${WORKDIR}/init ${D}${sysconfdir}/init.d/asterisk
+	install -c -D -m 644 ${WORKDIR}/logrotate ${D}${sysconfdir}/logrotate.d/asterisk
+	install -c -D -m 644 ${WORKDIR}/volatiles ${D}${sysconfdir}/default/volatiles/asterisk
+}
+
+pkg_postinst_prepend() {
+	grep -q asterisk  ${sysconfdir}/group || addgroup --system asterisk
+	grep -q asterisk ${sysconfdir}/passwd || adduser --system --home ${localstatedir}/run/asterisk --no-create-home --disabled-password --ingroup asterisk -s ${base_bindir}/false asterisk
+	chown -R asterisk:asterisk ${libdir}/asterisk ${localstatedir}/lib/asterisk ${localstatedir}/spool/asterisk ${localstatedir}/log/asterisk ${localstatedir}/run/asterisk ${sysconfdir}/asterisk
+}
+
+FILES_${PN} += "${libdir}/asterisk/modules/*"
+FILES_${PN}-dbg += "${libdir}/asterisk/modules/.debug \
+                    ${localstatedir}/lib/asterisk/*/.debug"
+
+CONFFILES_${PN} += "${sysconfdir}/asterisk/adsi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/adtranvofr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/agents.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/alarmreceiver.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/alsa.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/amd.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/asterisk.adsi"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/asterisk.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_adaptive_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_custom.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_manager.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_pgsql.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_sqlite3_custom.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cdr_tds.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/cli.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/codecs.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/console.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/dnsmgr.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/dundi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/enum.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extconfig.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions.ael"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions.lua"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/extensions_minivm.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/features.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/festival.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/followme.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/func_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/gtalk.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/h323.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/http.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/iax.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/iaxprov.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/indications.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/jabber.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/jingle.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/logger.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/manager.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/meetme.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/mgcp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/minivm.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/misdn.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/modules.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/musiconhold.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/muted.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/osp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/oss.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/phone.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/phoneprov.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/queuerules.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/queues.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_ldap.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_odbc.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_pgsql.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/res_snmp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/rpt.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/rtp.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/say.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sip.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sip_notify.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/skinny.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/sla.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/smdi.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/telcordia-1.adsi"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/udptl.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/unistim.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/usbradio.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/users.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/voicemail.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/vpb.conf"
+CONFFILES_${PN} += "${sysconfdir}/asterisk/zapata.conf"
+CONFFILES_${PN} += "${sysconfdir}/logrotate.d/asterisk"
============================================================
--- packages/gpsd/gpsd_2.37.bb	fcf9fa136398ac80a6cb1c8408ac6df26d0ddeaf
+++ packages/gpsd/gpsd_2.37.bb	fcf9fa136398ac80a6cb1c8408ac6df26d0ddeaf
@@ -0,0 +1,3 @@
+require gpsd.inc
+
+PR = "r0"
============================================================
--- packages/linux/linux-omap2-git/beagleboard/usb-timout.patch	7acb9cec9859f0c448ef4b56bf2ebd12e8b84c2b
+++ packages/linux/linux-omap2-git/beagleboard/usb-timout.patch	7acb9cec9859f0c448ef4b56bf2ebd12e8b84c2b
@@ -0,0 +1,11 @@
+--- /tmp/ehci-hub.c	2008-04-30 11:41:59.381876290 +0200
++++ git/drivers/usb/host/ehci-hub.c	2008-04-30 11:42:20.522875367 +0200
+@@ -734,7 +734,7 @@
+ 			 * this bit; seems too long to spin routinely...
+ 			 */
+ 			retval = handshake(ehci, status_reg,
+-					PORT_RESET, 0, 750);
++					PORT_RESET, 0, 1250);
+ 			if (retval != 0) {
+ 				ehci_err (ehci, "port %d reset error %d\n",
+ 					wIndex + 1, retval);
============================================================
--- packages/multitap-pad/files/80multitappad	b613cc7c89d800c205b89dd7013c4b3ba309b319
+++ packages/multitap-pad/files/80multitappad	b613cc7c89d800c205b89dd7013c4b3ba309b319
@@ -0,0 +1,20 @@
+#!/bin/sh
+
+CMD=""
+
+if [ "$DISPLAY_CAN_ROTATE" = "1" ]; then
+    if [ "$HAVE_KEYBOARD_PORTRAIT" = "1" -a "$HAVE_KEYBOARD_LANDSCAPE" = "0" ]; then
+        CMD="multitap-pad -d -o landscape"
+    elif [ "$HAVE_KEYBOARD_LANDSCAPE" = "1" -a "$HAVE_KEYBOARD_PORTRAIT" = "0" ]; then
+        CMD="multitap-pad -d -o portrait"
+    fi
+else
+    CMD="multitap-pad -d"
+fi
+
+
+# Delay to make sure the window manager is active
+
+if [ "$CMD" ]; then
+    (sleep 2 && $CMD) &
+fi
============================================================
--- packages/multitap-pad/multitap-pad_svn.bb	8f2b626f58690dd52e509cacab5977c5f52270e2
+++ packages/multitap-pad/multitap-pad_svn.bb	8f2b626f58690dd52e509cacab5977c5f52270e2
@@ -0,0 +1,47 @@
+DESCRIPTION = "Multi-tap input method for GTK"
+LICENSE = "GPL"
+DEPENDS = "libfakekey gtk+ matchbox-panel-2"
+RCONFLICTS = matchbox-keyboard-inputmethod
+SECTION = "x11"
+PV = "0.0+svnr${SRCREV}"
+
+SRC_URI = "svn://svn.o-hand.com/repos/misc/trunk;module=${PN};proto=http \
+	file://80multitappad"
+
+inherit autotools pkgconfig
+
+S = "${WORKDIR}/${PN}"
+
+FILES_${PN} = "${bindir}/* \
+               ${libdir} \
+	       ${sysconfdir} \
+	       ${datadir}"
+
+FILES_${PN}-dbg += " ${libdir}/gtk-2.0/2.10.0/immodules/.debug \
+                     ${libdir}/matchbox-panel/.debug"
+
+FILES_${PN}-dev += " ${libdir}/gtk-2.0/2.10.0/immodules/*.a \
+                     ${libdir}/gtk-2.0/2.10.0/immodules/*.la \
+		     ${libdir}/matchbox-panel/*.a \
+		     ${libdir}/matchbox-panel/*.la"
+
+do_install_append () {
+	install -d ${D}/${sysconfdir}/X11/Xsession.d/
+	install -m 755 ${WORKDIR}/80multitappad ${D}/${sysconfdir}/X11/Xsession.d/
+}
+
+pkg_postinst_multitap-pad () {
+if [ "x$D" != "x" ]; then
+  exit 1
+fi
+
+gtk-query-immodules-2.0 > /etc/gtk-2.0/gtk.immodules
+}
+
+pkg_postrm_multitap-pad () {
+if [ "x$D" != "x" ]; then
+  exit 1
+fi
+
+gtk-query-immodules-2.0 > /etc/gtk-2.0/gtk.immodules
+}
============================================================
--- packages/netbase/netbase/mpc8313e-rdb/interfaces	2ece41786062e70093a58ef17e23d35ea084c316
+++ packages/netbase/netbase/mpc8313e-rdb/interfaces	2ece41786062e70093a58ef17e23d35ea084c316
@@ -0,0 +1,16 @@
+# /etc/network/interfaces -- configuration file for ifup(8), ifdown(8)
+ 
+# The loopback interface
+auto lo
+iface lo inet loopback
+
+# Wired interface
+auto eth1
+iface eth1 inet dhcp
+
+# Wireless interface
+auto ath0
+iface ath0 inet static
+	address 192.168.99.1
+	netmask 255.255.255.0
+
============================================================
--- packages/openmoko-panel-plugins/openmoko-panel-memory_svn.bb	8be05efebbb61236f286d5dc98eff6c59fa29561
+++ packages/openmoko-panel-plugins/openmoko-panel-memory_svn.bb	8be05efebbb61236f286d5dc98eff6c59fa29561
@@ -0,0 +1,7 @@
+DESCRIPTION = "Shows an out-of-memory warning in the Openmoko panel"
+DEPENDS = "libnotify"
+RDEPENDS = "openmoko-dialer2"
+PV = "0.0.0+svn${SVNREV}"
+PR = "r0"
+
+inherit openmoko-panel-plugin
============================================================
--- packages/python/python-setuptools-native_0.6c6.bb	37e35eebe4105610cad978ad7a92f12a2b9095d1
+++ packages/python/python-setuptools-native_0.6c6.bb	37e35eebe4105610cad978ad7a92f12a2b9095d1
@@ -0,0 +1,8 @@
+require python-setuptools_${PV}.bb
+
+DEPENDS = "python-native"
+
+do_stage() {
+    BUILD_SYS=${BUILD_SYS} HOST_SYS=${HOST_SYS} \
+      ${STAGING_BINDIR_NATIVE}/python setup.py install
+}
============================================================
--- packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-autoboot.patch	d10d1edb2510c27cbbfca47e962cfc8da45f0788
+++ packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-autoboot.patch	d10d1edb2510c27cbbfca47e962cfc8da45f0788
@@ -0,0 +1,12 @@
+diff -urN u-boot-1.3.1.orig/include/configs/MPC8313ERDB.h u-boot-1.3.1/include/configs/MPC8313ERDB.h
+--- u-boot-1.3.1.orig/include/configs/MPC8313ERDB.h	2007-12-06 10:21:19.000000000 +0100
++++ u-boot-1.3.1/include/configs/MPC8313ERDB.h	2008-01-31 17:38:10.000000000 +0100
+@@ -522,7 +522,7 @@
+ #define CONFIG_FDTFILE		mpc8313erdb.dtb
+ 
+ #define CONFIG_LOADADDR		200000	/* default location for tftp and bootm */
+-#define CONFIG_BOOTDELAY	-1	/* -1 disables auto-boot */
++#define CONFIG_BOOTDELAY	3	/* autoboot after 3 seconds     */
+ #define CONFIG_BAUDRATE		115200
+ 
+ #define XMK_STR(x)	#x
============================================================
--- packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-mtdparts.patch	20746984bb1c6ef2789381da1283a8e06a74b0ac
+++ packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-mtdparts.patch	20746984bb1c6ef2789381da1283a8e06a74b0ac
@@ -0,0 +1,35 @@
+diff -urN u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h u-boot-1.3.2/include/configs/MPC8313ERDB.h
+--- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h	2008-03-09 16:20:02.000000000 +0100
++++ u-boot-1.3.2/include/configs/MPC8313ERDB.h	2008-04-21 19:20:51.000000000 +0200
+@@ -179,7 +179,7 @@
+ #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+ 
+ /* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */
+-#define CFG_MONITOR_LEN		(256 * 1024)	/* Reserve 256 kB for Mon */
++#define CFG_MONITOR_LEN		(384 * 1024)	/* Reserve 384 kB for Mon */
+ #define CFG_MALLOC_LEN		(512 * 1024)	/* Reserved for malloc */
+ 
+ /*
+@@ -354,6 +354,7 @@
+ #define CONFIG_CMD_PING
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_I2C
++#define CONFIG_CMD_JFFS2
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_PCI
+@@ -365,6 +366,14 @@
+ 
+ #define CONFIG_CMDLINE_EDITING 1
+ 
++/*
++ * JFFS2 partitions (mtdparts command line support)
++ */
++#define CONFIG_JFFS2_CMDLINE
++#define CONFIG_JFFS2_NAND
++#define MTDIDS_DEFAULT		"nor0=physmap-flash.0,nand0=nand0"
++#define MTDPARTS_DEFAULT	"mtdparts=physmap-flash.0:384k(uboot),64k(env)"
++
+ 
+ /*
+  * Miscellaneous configurable options
============================================================
--- packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-nand.patch	64eee6cc9ba75710f130f074b0632df44049ca14
+++ packages/u-boot/u-boot-1.3.2/mpc8313e-rdb-nand.patch	64eee6cc9ba75710f130f074b0632df44049ca14
@@ -0,0 +1,895 @@
+diff -urN u-boot-1.3.1.orig/board/freescale/mpc8313erdb/Makefile u-boot-1.3.1/board/freescale/mpc8313erdb/Makefile
+--- u-boot-1.3.1.orig/board/freescale/mpc8313erdb/Makefile	2007-12-06 10:21:19.000000000 +0100
++++ u-boot-1.3.1/board/freescale/mpc8313erdb/Makefile	2008-01-31 17:35:43.000000000 +0100
+@@ -25,7 +25,7 @@
+ 
+ LIB	= $(obj)lib$(BOARD).a
+ 
+-COBJS	:= $(BOARD).o sdram.o
++COBJS	:= $(BOARD).o sdram.o nand.o
+ 
+ SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+ OBJS	:= $(addprefix $(obj),$(COBJS))
+diff -urN u-boot-1.3.1.orig/board/freescale/mpc8313erdb/nand.c u-boot-1.3.1/board/freescale/mpc8313erdb/nand.c
+--- u-boot-1.3.1.orig/board/freescale/mpc8313erdb/nand.c	1970-01-01 01:00:00.000000000 +0100
++++ u-boot-1.3.1/board/freescale/mpc8313erdb/nand.c	2008-01-31 17:35:26.000000000 +0100
+@@ -0,0 +1,868 @@
++/*
++ * Copyright (C) Freescale Semiconductor, Inc. 2006. 
++ * 
++ * Initialized by Nick.Spence at freescale.com
++ *                Wilson.Lo at freescale.com
++ *
++ * See file CREDITS for list of people who contributed to this
++ * project.
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of
++ * the License, or (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
++ * MA 02111-1307 USA
++ */
++
++#include <common.h>
++
++#if defined(CONFIG_CMD_NAND)
++#if defined(CFG_NAND_LEGACY)
++ #error "U-Boot legacy NAND commands not supported."
++#else
++
++#include <malloc.h>
++#include <asm/errno.h>
++#include <nand.h>
++
++#undef CFG_FCM_DEBUG
++#define CFG_FCM_DEBUG_LVL 1
++#ifdef CFG_FCM_DEBUG
++#define FCM_DEBUG(n, args...)				\
++	do {						\
++		if (n <= (CFG_FCM_DEBUG_LVL + 0))	\
++			printf(args);			\
++	} while(0)
++#else /* CONFIG_FCM_DEBUG */
++#define FCM_DEBUG(n, args...) do { } while(0)
++#endif
++
++#define MIN(x, y)		((x < y) ? x : y)
++
++#define ERR_BYTE 0xFF	/* Value returned for read bytes when read failed */
++
++#define FCM_TIMEOUT_USECS 100000 /* Maximum number of uSecs to wait for FCM */
++
++/* Private structure holding NAND Flash device specific information */
++struct fcm_nand {
++	int		bank;       /* Chip select bank number             */
++	unsigned int	base;       /* Chip select base address            */
++	int		pgs;        /* NAND page size                      */
++	int		oobbuf;     /* Pointer to OOB block                */
++	unsigned int	page;       /* Last page written to / read from    */
++	unsigned int	fmr;        /* FCM Flash Mode Register value       */
++	unsigned int	mdr;        /* UPM/FCM Data Register value         */
++	unsigned int	use_mdr;    /* Non zero if the MDR is to be set    */
++	u_char	       *addr;       /* Address of assigned FCM buffer      */
++	unsigned int	read_bytes; /* Number of bytes read during command */
++	unsigned int	index;      /* Pointer to next byte to 'read'      */
++	unsigned int	req_bytes;  /* Number of bytes read if command ok  */
++	unsigned int	req_index;  /* New read index if command ok        */
++	unsigned int	status;     /* status read from LTESR after last op*/
++};
++
++
++/* These map to the positions used by the FCM hardware ECC generator */
++
++/* Small Page FLASH with FMR[ECCM] = 0 */
++static struct nand_oobinfo fcm_oob_sp_eccm0 = { /* TODO */
++	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 3,
++	.eccpos = {6, 7, 8},
++	.oobfree = { {0, 5}, {9, 7} }
++};
++
++/* Small Page FLASH with FMR[ECCM] = 1 */
++static struct nand_oobinfo fcm_oob_sp_eccm1 = { /* TODO */
++	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 3,
++	.eccpos = {8, 9, 10},
++	.oobfree = { {0, 5}, {6, 2}, {11, 5} }
++};
++
++/* Large Page FLASH with FMR[ECCM] = 0 */
++static struct nand_oobinfo fcm_oob_lp_eccm0 = {
++	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 12,
++	.eccpos = {6, 7, 8, 22, 23, 24, 38, 39, 40, 54, 55, 56},
++	.oobfree = { {1, 5}, {9, 13}, {25, 13}, {41, 13}, {57, 7} }
++};
++
++/* Large Page FLASH with FMR[ECCM] = 1 */
++static struct nand_oobinfo fcm_oob_lp_eccm1 = {
++	.useecc = MTD_NANDECC_AUTOPL_USR, /* MTD_NANDECC_PLACEONLY, */
++	.eccbytes = 12,
++	.eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
++	.oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} }
++};
++
++/*
++ * execute FCM command and wait for it to complete
++ */
++static int fcm_run_command(struct mtd_info *mtd)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	long long end_tick;
++
++	/* Setup the FMR[OP] to execute without write protection */
++	lbc->fmr = fcm->fmr | 3;
++	if (fcm->use_mdr)
++		lbc->mdr = fcm->mdr;
++
++	FCM_DEBUG(5,"fcm_run_command: fmr= %08X fir= %08X fcr= %08X\n",
++		lbc->fmr, lbc->fir, lbc->fcr);
++	FCM_DEBUG(5,"fcm_run_command: fbar=%08X fpar=%08X fbcr=%08X bank=%d\n",
++		lbc->fbar, lbc->fpar, lbc->fbcr, fcm->bank);
++
++	/* clear event registers */
++	lbc->lteatr = 0;
++	lbc->ltesr |= (LTESR_FCT | LTESR_PAR | LTESR_CC);
++
++	/* execute special operation */
++	lbc->lsor = fcm->bank;
++
++	/* wait for FCM complete flag or timeout */
++	fcm->status = 0;
++	end_tick = usec2ticks(FCM_TIMEOUT_USECS) + get_ticks();
++
++	while (end_tick > get_ticks()) {
++		if (lbc->ltesr & LTESR_CC) {
++			fcm->status = lbc->ltesr &
++					(LTESR_FCT | LTESR_PAR | LTESR_CC);
++			break;
++		}
++	}
++
++	/* store mdr value in case it was needed */
++	if (fcm->use_mdr)
++		fcm->mdr = lbc->mdr;
++
++	fcm->use_mdr = 0;
++
++	FCM_DEBUG(5,"fcm_run_command: stat=%08X mdr= %08X fmr= %08X\n",
++		fcm->status, fcm->mdr, lbc->fmr);
++
++	/* if the operation completed ok then set the read buffer pointers */
++	if (fcm->status == LTESR_CC) {
++		fcm->read_bytes = fcm->req_bytes;
++		fcm->index      = fcm->req_index;
++		return 0;
++	}
++
++	return -1;
++}
++
++/*
++ * Set up the FCM hardware block and page address fields, and the fcm
++ * structure addr field to point to the correct FCM buffer in memory
++ */
++static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	int buf_num;
++
++	fcm->page = page_addr;
++
++	lbc->fbar = page_addr >> (this->phys_erase_shift - this->page_shift);
++	if (fcm->pgs) {
++		lbc->fpar = ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) |
++			    ( oob ? FPAR_LP_MS : 0) |
++			      column;
++		buf_num = (page_addr & 1) << 2;
++	} else {
++		lbc->fpar = ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) |
++			    ( oob ? FPAR_SP_MS : 0) |
++			      column;
++		buf_num = page_addr & 7;
++	}
++	fcm->addr = (unsigned char*)(fcm->base + (buf_num * 1024));
++
++	/* for OOB data point to the second half of the buffer */
++	if (oob) {
++		fcm->addr += (fcm->pgs ? 2048 : 512);
++	}
++}
++
++/* not required for FCM */
++static void fcm_hwcontrol(struct mtd_info *mtdinfo, int cmd)
++{
++	return;
++}
++
++
++/*
++ * FCM does not support 16 bit data busses
++ */
++static u16 fcm_read_word(struct mtd_info *mtd)
++{
++	printf("fcm_read_word: UNIMPLEMENTED.\n");
++	return 0;
++}
++static void fcm_write_word(struct mtd_info *mtd, u16 word)
++{
++	printf("fcm_write_word: UNIMPLEMENTED.\n");
++}
++
++/*
++ * Write buf to the FCM Controller Data Buffer
++ */
++static void fcm_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
++{
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++
++	FCM_DEBUG(3,"fcm_write_buf: writing %d bytes starting with 0x%x"
++		    " at %d.\n", len, *((unsigned long*) buf), fcm->index);
++
++	/* If armed catch the address of the OOB buffer so that it can be */
++	/* updated with the real signature after the program comletes */
++	if (!fcm->oobbuf)
++		fcm->oobbuf = (int) buf;
++
++	/* copy the data into the FCM hardware buffer and update the index */
++	memcpy(&(fcm->addr[fcm->index]), buf, len);
++	fcm->index += len;
++	return;
++}
++
++
++/*
++ * FCM does not support individual writes. Instead these are either commands
++ * or data being written, both of which are handled through the cmdfunc
++ * handler.
++ */
++static void fcm_write_byte(struct mtd_info *mtd, u_char byte)
++{
++	printf("fcm_write_byte: UNIMPLEMENTED.\n");
++}
++
++/*
++ * read a byte from either the FCM hardware buffer if it has any data left
++ * otherwise issue a command to read a single byte.
++ */
++static u_char fcm_read_byte(struct mtd_info *mtd)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	unsigned char byte;
++
++	/* If there are still bytes in the FCM then use the next byte */
++	if(fcm->index < fcm->read_bytes) {
++		byte = fcm->addr[(fcm->index)++];
++		FCM_DEBUG(4,"fcm_read_byte: byte %u (%02X): %d of %d.\n",
++			  byte, byte, fcm->index-1, fcm->read_bytes);
++	} else {
++		/* otherwise issue a command to read 1 byte */
++		lbc->fir = (FIR_OP_RSW << FIR_OP0_SHIFT);
++		fcm->use_mdr = 1;
++		fcm->read_bytes = 0;
++		fcm->index = 0;
++		fcm->req_bytes = 0;
++		fcm->req_index = 0;
++		byte = fcm_run_command(mtd) ? ERR_BYTE : fcm->mdr & 0xff;
++		FCM_DEBUG(4,"fcm_read_byte: byte %u (%02X) from bus.\n",
++			  byte, byte);
++	}
++
++	return byte;
++}
++
++
++/*
++ * Read from the FCM Controller Data Buffer
++ */
++static void fcm_read_buf(struct mtd_info *mtd, u_char* buf, int len)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	int i;
++	int rest;
++
++	FCM_DEBUG(3,"fcm_read_buf: reading %d bytes.\n", len);
++
++	/* If last read failed then return error bytes */
++	if (fcm->status != LTESR_CC) {
++		/* just keep copying bytes so that the oob works */
++		memcpy(buf, &(fcm->addr[(fcm->index)]), len);
++		fcm->index += len;
++	}
++	else
++	{
++		/* see how much is still in the FCM buffer */
++		i = min(len, (fcm->read_bytes - fcm->index));
++		rest = i - len;
++		len = i;
++
++		memcpy(buf, &(fcm->addr[(fcm->index)]), len);
++		fcm->index += len;
++
++		/* If more data is needed then issue another block read */
++		if (rest) {
++			FCM_DEBUG(3,"fcm_read_buf: getting %d more bytes.\n",
++				    rest);
++			buf += len;
++			lbc->fir = (FIR_OP_RBW << FIR_OP0_SHIFT);
++			set_addr(mtd, 0, 0, 0);
++			lbc->fbcr = rest;
++			fcm->req_bytes = lbc->fbcr;
++			fcm->req_index = 0;
++			fcm->use_mdr = 0;
++			if (!fcm_run_command(mtd))
++				fcm_read_buf(mtd, buf, rest);
++			else
++				memcpy(buf, fcm->addr, rest);
++		}
++	}
++	return;
++}
++
++
++/*
++ * Verify buffer against the FCM Controller Data Buffer
++ */
++static int fcm_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	int i;
++	int rest;
++
++	FCM_DEBUG(3,"fcm_verify_buf: checking %d bytes starting with 0x%02x.\n",
++		len, *((unsigned long*) buf));
++	/* If last read failed then return error bytes */
++	if (fcm->status != LTESR_CC) {
++		return EFAULT;
++	}
++
++	/* see how much is still in the FCM buffer */
++	i = min(len, (fcm->read_bytes - fcm->index));
++	rest = i - len;
++	len = i;
++
++	if (memcmp(buf,	&(fcm->addr[(fcm->index)]), len)) {
++		return EFAULT;
++	}
++
++	fcm->index += len;
++	if (rest) {
++		FCM_DEBUG(3,"fcm_verify_buf: getting %d more bytes.\n", rest);
++		buf += len;
++		lbc->fir = (FIR_OP_RBW << FIR_OP0_SHIFT);
++		set_addr(mtd, 0, 0, 0);
++		lbc->fbcr = rest;
++		fcm->req_bytes = lbc->fbcr;
++		fcm->req_index = 0;
++		fcm->use_mdr = 0;
++		if (fcm_run_command(mtd))
++			return EFAULT;
++		return fcm_verify_buf(mtd, buf, rest);
++
++	}
++	return 0;
++}
++
++/* this function is called after Program and Erase Operations to
++ * check for success or failure */
++static int fcm_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	struct fcm_nand *fcm = this->priv;
++
++	if (fcm->status != LTESR_CC) {
++		return(0x1); /* Status Read error */
++	}
++
++	/* Use READ_STATUS command, but wait for the device to be ready */
++	fcm->use_mdr = 0;
++	fcm->req_index = 0;
++	fcm->read_bytes = 0;
++	fcm->index = 0;
++	fcm->oobbuf = -1;
++	lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++		   (FIR_OP_RBW << FIR_OP1_SHIFT);
++	lbc->fcr = (NAND_CMD_STATUS << FCR_CMD0_SHIFT);
++	set_addr(mtd, 0, 0, 0);
++	lbc->fbcr = 1;
++	fcm->req_bytes = lbc->fbcr;
++	fcm_run_command(mtd);
++	if (fcm->status != LTESR_CC) {
++		return(0x1); /* Status Read error */
++	}
++	return this->read_byte(mtd);
++}
++
++
++/* cmdfunc send commands to the FCM */
++static void fcm_cmdfunc(struct mtd_info *mtd, unsigned command,
++			int column, int page_addr)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++
++	fcm->use_mdr = 0;
++	fcm->req_index = 0;
++
++	/* clear the read buffer */
++	fcm->read_bytes = 0;
++	if (command != NAND_CMD_PAGEPROG) {
++		fcm->index = 0;
++		fcm->oobbuf = -1;
++	}
++
++	switch (command) {
++	/* READ0 and READ1 read the entire buffer to use hardware ECC */
++	case NAND_CMD_READ1:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_READ1, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		fcm->req_index = column + 256;
++		goto read0;
++	case NAND_CMD_READ0:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_READ0, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		fcm->req_index = column;
++read0:
++		if (fcm->pgs) {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP3_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP4_SHIFT);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP3_SHIFT);
++		}
++		lbc->fcr = (NAND_CMD_READ0     << FCR_CMD0_SHIFT) |
++			   (NAND_CMD_READSTART << FCR_CMD1_SHIFT);
++		lbc->fbcr = 0; /* read entire page to enable ECC */
++		set_addr(mtd, 0, page_addr, 0);
++		fcm->req_bytes = mtd->oobblock + mtd->oobsize;
++		goto write_cmd2;
++	/* READOOB read only the OOB becasue no ECC is performed */
++	case NAND_CMD_READOOB:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_READOOB, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		if (fcm->pgs) {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP3_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP4_SHIFT);
++			lbc->fcr = (NAND_CMD_READ0     << FCR_CMD0_SHIFT) |
++				   (NAND_CMD_READSTART << FCR_CMD1_SHIFT);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_RBW << FIR_OP3_SHIFT);
++			lbc->fcr = (NAND_CMD_READOOB << FCR_CMD0_SHIFT);
++		}
++		lbc->fbcr = mtd->oobsize - column;
++		set_addr(mtd, column, page_addr, 1);
++		goto write_cmd1;
++	/* READID must read all 5 possible bytes while CEB is active */
++	case NAND_CMD_READID:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_READID.\n");
++		lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_UA  << FIR_OP1_SHIFT) |
++			   (FIR_OP_RBW << FIR_OP2_SHIFT);
++		lbc->fcr = (NAND_CMD_READID << FCR_CMD0_SHIFT);
++		lbc->fbcr = 5; /* 5 bytes for manuf, device and exts */
++		fcm->use_mdr = 1;
++		fcm->mdr = 0;
++		goto write_cmd0;
++	/* ERASE1 stores the block and page address */
++	case NAND_CMD_ERASE1:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_ERASE1, page_addr:"
++			    " 0x%x.\n", page_addr);
++		set_addr(mtd, 0, page_addr, 0);
++		goto end;
++	/* ERASE2 uses the block and page address from ERASE1 */
++	case NAND_CMD_ERASE2:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_ERASE2.\n");
++		lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_PA  << FIR_OP1_SHIFT) |
++			   (FIR_OP_CM1 << FIR_OP2_SHIFT);
++		lbc->fcr = (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) |
++			   (NAND_CMD_ERASE2 << FCR_CMD1_SHIFT);
++		lbc->fbcr = 0;
++		goto write_cmd1;
++	/* SEQIN sets up the addr buffer and all registers except the length */
++	case NAND_CMD_SEQIN:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, page_addr:"
++			    " 0x%x, column: 0x%x.\n", page_addr, column);
++		if (column == 0) {
++			lbc->fbcr = 0; /* write entire page to enable ECC */
++		} else {
++			lbc->fbcr = 1; /* mark as partial page so no HW ECC */
++		}
++		if (fcm->pgs) {
++			/* always use READ0 for large page devices */
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP1_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_WB  << FIR_OP3_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP4_SHIFT);
++			lbc->fcr = (NAND_CMD_SEQIN << FCR_CMD0_SHIFT) |
++				   (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT);
++			set_addr(mtd, column, page_addr, 0);
++		} else {
++			lbc->fir = (FIR_OP_CW0 << FIR_OP0_SHIFT) |
++				   (FIR_OP_CM2 << FIR_OP1_SHIFT) |
++				   (FIR_OP_CA  << FIR_OP2_SHIFT) |
++				   (FIR_OP_PA  << FIR_OP3_SHIFT) |
++				   (FIR_OP_WB  << FIR_OP4_SHIFT) |
++				   (FIR_OP_CW1 << FIR_OP5_SHIFT);
++			if (column >= mtd->oobblock) {
++				/* OOB area --> READOOB */
++				column -= mtd->oobblock;
++				lbc->fcr = (NAND_CMD_READOOB << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 1);
++			} else if (column < 256) {
++				/* First 256 bytes --> READ0 */
++				lbc->fcr = (NAND_CMD_READ0 << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 0);
++			} else {
++				/* Second 256 bytes --> READ1 */
++				column -= 256;
++				lbc->fcr = (NAND_CMD_READ1 << FCR_CMD0_SHIFT)
++					 | (NAND_CMD_PAGEPROG<< FCR_CMD1_SHIFT)
++					 | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
++				set_addr(mtd, column, page_addr, 0);
++			}
++		}
++		goto end;
++	/* PAGEPROG reuses all of the setup from SEQIN and adds the length */
++	case NAND_CMD_PAGEPROG:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_PAGEPROG"
++			    " writing %d bytes.\n",fcm->index);
++		/* if the write did not start at 0 or is not a full page */
++		/* then set the exact length, otherwise use a full page  */
++		/* write so the HW generates the ECC. */
++		if (lbc->fbcr ||
++		   (fcm->index != (mtd->oobblock + mtd->oobsize)))
++			lbc->fbcr = fcm->index;
++		fcm->req_bytes = 0;
++		goto write_cmd2;
++	/* CMD_STATUS must read the status byte while CEB is active */
++	/* Note - it does not wait for the ready line */
++	case NAND_CMD_STATUS:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_STATUS.\n");
++		lbc->fir = (FIR_OP_CM0 << FIR_OP0_SHIFT) |
++			   (FIR_OP_RBW << FIR_OP1_SHIFT);
++		lbc->fcr = (NAND_CMD_STATUS << FCR_CMD0_SHIFT);
++		lbc->fbcr = 1;
++		goto write_cmd0;
++	/* RESET without waiting for the ready line */
++	case NAND_CMD_RESET:
++		FCM_DEBUG(2,"fcm_cmdfunc: NAND_CMD_RESET.\n");
++		lbc->fir = (FIR_OP_CM0 << FIR_OP0_SHIFT);
++		lbc->fcr = (NAND_CMD_RESET << FCR_CMD0_SHIFT);
++		lbc->fbcr = 0;
++		goto write_cmd0;
++	default:
++		printk("fcm_cmdfunc: error, unsupported command.\n");
++		goto end;
++	}
++
++	/* Short cuts fall through to save code */
++ write_cmd0:
++	set_addr(mtd, 0, 0, 0);
++ write_cmd1:
++	fcm->req_bytes = lbc->fbcr;
++ write_cmd2:
++	fcm_run_command(mtd);
++
++#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
++	/* if we wrote a page then read back the oob to get the ECC */
++	if ((command == NAND_CMD_PAGEPROG) &&
++	    (this->eccmode > NAND_ECC_SOFT) &&
++	    (lbc->fbcr == 0) &&
++	    (fcm->oobbuf != 0) &&
++	    (fcm->oobbuf != -1)) {
++		int i;
++		uint *oob_config;
++		unsigned char *oob_buf;
++
++		i = fcm->page;
++		oob_buf = (unsigned char*) fcm->oobbuf;
++		oob_config = this->autooob->eccpos;
++
++		/* wait for the write to complete and check it passed */
++		if (!(this->waitfunc(mtd, this, FL_WRITING) & 0x01)) {
++			/* read back the OOB */
++			fcm_cmdfunc(mtd, NAND_CMD_READOOB, 0, i);
++			/* if it succeeded then copy the ECC bytes */
++			if (fcm->status == LTESR_CC) {
++				for (i = 0; i < this->eccbytes; i++) {
++					oob_buf[oob_config[i]] =
++						fcm->addr[oob_config[i]];
++				}
++			}
++		}
++	}
++#endif
++
++ end:
++	return;
++}
++
++/*
++ * fcm_enable_hwecc - start ECC generation
++ */
++static void fcm_enable_hwecc(struct mtd_info *mtd, int mode)
++{
++	return;
++}
++
++/*
++ * fcm_calculate_ecc - Calculate the ECC bytes
++ * This is done by hardware during the write process, so we use this
++ * to arm the oob buf capture on the next write_buf() call. The ECC bytes
++ * only need to be captured if CONFIG_MTD_NAND_VERIFY_WRITE is defined which
++ * reads back the pages and checks they match the data and oob buffers.
++ */
++static int fcm_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
++{
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++
++#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
++	/* arm capture of oob buf ptr on next write_buf */
++	fcm->oobbuf = 0;
++#endif
++	return 0;
++}
++
++/*
++ * fcm_correct_data - Detect and correct bit error(s)
++ * The detection and correction is done automatically by the hardware,
++ * if the complete page was read. If the status code is okay then there
++ * was no error, otherwise we return an error code indicating an uncorrectable
++ * error.
++ */
++static int fcm_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
++{
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++
++	/* No errors */
++	if (fcm->status == LTESR_CC)
++		return 0;
++
++	return -1; /* uncorrectable error */
++}
++
++
++
++/*
++ * Dummy scan_bbt to complete setup of the FMR based on NAND size
++ */
++static int fcm_scan_bbt (struct mtd_info *mtd)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	register struct nand_chip *this = mtd->priv;
++	struct fcm_nand *fcm = this->priv;
++	unsigned int i;
++	unsigned int al;
++
++	if (!fcm) {
++		printk (KERN_ERR "fcm_scan_bbt():" \
++			" Failed to allocate chip specific data structure\n");
++		return -1;
++	}
++
++	/* calculate FMR Address Length field */
++	al = 0;
++	for (i = this->pagemask >> 16; i ; i >>= 8) {
++		al++;
++	}
++
++	/* add to ECCM mode set in fcm_init */
++	fcm->fmr |= 12 << FMR_CWTO_SHIFT |  /* Timeout > 12 mSecs */
++		    al << FMR_AL_SHIFT;
++
++	FCM_DEBUG(1,"fcm_init: nand->options  =   %08X\n", this->options);
++	FCM_DEBUG(1,"fcm_init: nand->numchips = %10d\n", this->numchips);
++	FCM_DEBUG(1,"fcm_init: nand->chipsize = %10d\n", this->chipsize);
++	FCM_DEBUG(1,"fcm_init: nand->pagemask = %10X\n", this->pagemask);
++	FCM_DEBUG(1,"fcm_init: nand->eccmode  = %10d\n", this->eccmode );
++	FCM_DEBUG(1,"fcm_init: nand->eccsize  = %10d\n", this->eccsize );
++	FCM_DEBUG(1,"fcm_init: nand->eccbytes = %10d\n", this->eccbytes);
++	FCM_DEBUG(1,"fcm_init: nand->eccsteps = %10d\n", this->eccsteps);
++	FCM_DEBUG(1,"fcm_init: nand->chip_delay = %8d\n", this->chip_delay);
++	FCM_DEBUG(1,"fcm_init: nand->badblockpos = %7d\n", this->badblockpos);
++	FCM_DEBUG(1,"fcm_init: nand->chip_shift = %8d\n", this->chip_shift);
++	FCM_DEBUG(1,"fcm_init: nand->page_shift = %8d\n", this->page_shift);
++	FCM_DEBUG(1,"fcm_init: nand->phys_erase_shift = %2d\n",
++						      this->phys_erase_shift);
++	FCM_DEBUG(1,"fcm_init: mtd->flags     =   %08X\n", mtd->flags);
++	FCM_DEBUG(1,"fcm_init: mtd->size      = %10d\n", mtd->size);
++	FCM_DEBUG(1,"fcm_init: mtd->erasesize = %10d\n", mtd->erasesize);
++	FCM_DEBUG(1,"fcm_init: mtd->oobblock  = %10d\n", mtd->oobblock);
++	FCM_DEBUG(1,"fcm_init: mtd->oobsize   = %10d\n", mtd->oobsize);
++	FCM_DEBUG(1,"fcm_init: mtd->oobavail  = %10d\n", mtd->oobavail);
++	FCM_DEBUG(1,"fcm_init: mtd->ecctype   = %10d\n", mtd->ecctype);
++	FCM_DEBUG(1,"fcm_init: mtd->eccsize   = %10d\n", mtd->eccsize);
++
++	/* adjust Option Register and ECC to match Flash page size */
++	if (mtd->oobblock == 512)
++		lbc->bank[fcm->bank].or &= ~(OR_FCM_PGS);
++	else if (mtd->oobblock == 2048) {
++		lbc->bank[fcm->bank].or |= OR_FCM_PGS;
++		/* adjust ecc setup if needed */
++		if ( (lbc->bank[fcm->bank].br & BR_DECC) == BR_DECC_CHK_GEN) {
++			mtd->eccsize = 2048;
++			mtd->oobavail -= 9;
++			this->eccmode = NAND_ECC_HW12_2048;
++			this->eccsize = 2048;
++			this->eccbytes += 9;
++			this->eccsteps = 1;
++			this->autooob = (fcm->fmr & FMR_ECCM) ?
++					&fcm_oob_lp_eccm1 : &fcm_oob_lp_eccm0;
++			memcpy(&mtd->oobinfo, this->autooob,
++					sizeof(mtd->oobinfo));
++		}
++	}
++	else {
++		printf("fcm_init: page size %d is not supported\n",
++			mtd->oobblock);
++		return -1;
++	}
++	fcm->pgs = (lbc->bank[fcm->bank].or>>OR_FCM_PGS_SHIFT) & 1;
++
++	if (al > 2) {
++		printf("fcm_init: %d address bytes is not supported\n", al+2);
++		return -1;
++	}
++
++	/* restore default scan_bbt function and call it */
++	this->scan_bbt = nand_default_bbt;
++	return nand_default_bbt(mtd);
++}
++
++/*
++ * Board-specific NAND initialization. The following members of the
++ * argument are board-specific (per include/linux/mtd/nand_new.h):
++ * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
++ * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
++ * - hwcontrol: hardwarespecific function for accesing control-lines
++ * - dev_ready: hardwarespecific function for accesing device ready/busy line
++ * - enable_hwecc: function to enable (reset) hardware ecc generator. Must
++ *   only be provided if a hardware ECC is available
++ * - eccmode: mode of ecc, see defines
++ * - chip_delay: chip dependent delay for transfering data from array to
++ *   read regs (tR)
++ * - options: various chip options. They can partly be set to inform
++ *   nand_scan about special functionality. See the defines for further
++ *   explanation
++ * Members with a "?" were not set in the merged testing-NAND branch,
++ * so they are not set here either.
++ */
++int board_nand_init(struct nand_chip *nand)
++{
++	volatile immap_t *im = (immap_t *) CFG_IMMR;
++	volatile lbus83xx_t *lbc= &im->lbus;
++	struct fcm_nand *fcm;
++	unsigned int bank;
++
++	/* Enable FCM detection of timeouts, ECC errors and completion */
++	lbc->ltedr &= ~(LTESR_FCT | LTESR_PAR | LTESR_CC);
++
++	fcm = kmalloc (sizeof(struct fcm_nand), GFP_KERNEL);
++	if (!fcm) {
++		printk (KERN_ERR "board_nand_init():" \
++			" Cannot allocate read buffer data structure\n");
++		return;
++	}
++
++	/* Find which chip select bank is being used for this device */
++	for (bank=0; bank<8; bank++) {
++		if ( (lbc->bank[bank].br & BR_V) &&
++		   ( (lbc->bank[bank].br & BR_MSEL) == BR_MS_FCM ) &&
++		   ( (lbc->bank[bank].br & BR_BA) ==
++		     (lbc->bank[bank].or & OR_FCM_AM &
++			(unsigned int)(nand->IO_ADDR_R) ) ) ) {
++			fcm->bank = bank;
++// TODO			fcm->fmr = FMR_ECCM; /* rest filled in later */
++			fcm->fmr = 0; /* rest filled in later */
++			fcm->read_bytes = 0;
++			fcm->index = 0;
++			fcm->pgs = (lbc->bank[bank].or>>OR_FCM_PGS_SHIFT) & 1;
++			fcm->base = lbc->bank[bank].br & BR_BA;
++			fcm->addr = (unsigned char*) (fcm->base);
++			nand->priv = fcm;
++			fcm->oobbuf = -1;
++			break;
++		}
++	}
++
++	if (!nand->priv) {
++		printk (KERN_ERR "board_nand_init():" \
++			" Could not find matching Chip Select\n");
++		return -1;
++	}
++
++	/* set up nand options */
++	nand->options = 0;
++	/* set up function call table */
++	nand->hwcontrol = fcm_hwcontrol;
++	nand->waitfunc = fcm_wait;
++	nand->read_byte = fcm_read_byte;
++	nand->write_byte = fcm_write_byte;
++	nand->read_word = fcm_read_word;
++	nand->write_word = fcm_write_word;
++	nand->read_buf = fcm_read_buf;
++	nand->verify_buf = fcm_verify_buf;
++	nand->write_buf = fcm_write_buf;
++	nand->cmdfunc = fcm_cmdfunc;
++	nand->scan_bbt = fcm_scan_bbt;
++
++	/* If CS Base Register selects full hardware ECC then use it */
++	if ( ( (lbc->bank[bank].br & BR_DECC) >> BR_DECC_SHIFT) == 2) {
++		/* put in small page settings and adjust later if needed */
++		nand->eccmode = NAND_ECC_HW3_512;
++		nand->autooob = (fcm->fmr & FMR_ECCM) ?
++				&fcm_oob_sp_eccm1 : &fcm_oob_sp_eccm0;
++		nand->calculate_ecc = fcm_calculate_ecc;
++		nand->correct_data = fcm_correct_data;
++		nand->enable_hwecc = fcm_enable_hwecc;
++	} else {
++		/* otherwise fall back to default software ECC */
++		nand->eccmode = NAND_ECC_SOFT;
++	}
++	return 0;
++}
++
++#endif
++#endif
+diff -urN u-boot-1.3.1.orig/include/configs/MPC8313ERDB.h u-boot-1.3.1/include/configs/MPC8313ERDB.h
+--- u-boot-1.3.1.orig/include/configs/MPC8313ERDB.h	2007-12-06 10:21:19.000000000 +0100
++++ u-boot-1.3.1/include/configs/MPC8313ERDB.h	2008-01-31 17:36:18.000000000 +0100
+@@ -360,6 +360,7 @@
+ #define CONFIG_CMD_MII
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_PCI
++#define CONFIG_CMD_NAND
+ 
+ #if defined(CFG_RAMBOOT)
+     #undef CONFIG_CMD_ENV
============================================================
--- packages/ulxmlrpcpp/files/remove-local-includes.patch	e7814096279dfa2c12d68522fac5c7bb06f70758
+++ packages/ulxmlrpcpp/files/remove-local-includes.patch	e7814096279dfa2c12d68522fac5c7bb06f70758
@@ -0,0 +1,13 @@
+Index: ulxmlrpcpp-1.7.3/configure.in
+===================================================================
+--- ulxmlrpcpp-1.7.3.orig/configure.in
++++ ulxmlrpcpp-1.7.3/configure.in
+@@ -326,8 +326,6 @@ else
+   echo "***  ssl (OpenSSL) found."
+   echo "********************************************************"
+   AC_DEFINE(ULXR_INCLUDE_SSL_STUFF, 1, [Define to compile with ssl support.])
+-  dnl should fix RedHat problem
+-  EA_EXTRA_INC="$EA_EXTRA_INC -I/usr/include/kerberos/"
+   AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[#include <openssl/ssl.h>]], [[unsigned x = SSL_ERROR_WANT_ACCEPT; ]])],[AC_DEFINE(ULXR_HAVE_SSL_ERROR_WANT_ACCEPT, 1, Define if your ssl has SSL_ERROR_WANT_ACCEPT)
+   ],[])
+ fi
============================================================
--- MAINTAINERS	5556c9277c3381070987310400058abdd5f4c820
+++ MAINTAINERS	df1acfac3b7175de3f71ec85623148d285a64116
@@ -97,7 +97,8 @@ Recipes:    libexosip2, python-cheetah, 
 Website:    http://www.jerryweb.org/
 Machines:   mpc8313e-rdb
 Recipes:    libexosip2, python-cheetah, python-django, python-pyopenssl,
-Recipes:    pump, squid, squidview
+Recipes:    pump, squid, squidview, hostap-daemon, wpa-supplicant, linux,
+Recipes:    u-boot
 
 Person:     Joaquim Duran
 Mail:       joaquinduran at adtelecom.es
============================================================
--- classes/kernel.bbclass	8d92c5a7b6420490dd6b3115e8146b3fc0a0f854
+++ classes/kernel.bbclass	8ed575119a74e50c5bcb39266997cba3f60792c2
@@ -471,7 +471,7 @@ do_deploy() {
 	install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGE_BASE_NAME}.bin
 	package_stagefile_shell ${DEPLOY_DIR_IMAGE}/${KERNEL_IMAGE_BASE_NAME}.bin
 
-	if [ -d "${D}lib" ]; then
+	if [ -d "${D}/lib" ]; then
 	tar -cvzf ${DEPLOY_DIR_IMAGE}/modules-${PV}-${PR}-${MACHINE}.tgz -C ${D} lib
 	fi
 
============================================================
--- classes/setuptools.bbclass	f0a6d602e9af754216e3616efb17302d0116fe3b
+++ classes/setuptools.bbclass	de18f3769a72fd6890b414d5ad97471bd58ce683
@@ -1,6 +1,6 @@ inherit distutils
 inherit distutils
 
-DEPENDS += "python-setuptools"
+DEPENDS += "python-setuptools-native"
 
 DISTUTILS_INSTALL_ARGS = "--root=${D} \
     --single-version-externally-managed \
============================================================
--- conf/distro/generic-uclibc.conf	4b6c77936994e0b78819a2d3d1f6a9e68262429f
+++ conf/distro/generic-uclibc.conf	86d233ffa29fe7b850743b7e58fde2e37d4d6f5a
@@ -26,7 +26,7 @@ PREFERRED_PROVIDER_virtual/libiconv = "l
 PREFERRED_PROVIDER_virtual/${TARGET_PREFIX}binutils = "binutils-cross"
 PREFERRED_PROVIDER_linux-libc-headers = "linux-libc-headers"
 PREFERRED_PROVIDER_virtual/libiconv = "libiconv"
-PREFERRED_PROVIDER_virtual/libintl = "libintl"
+PREFERRED_PROVIDER_virtual/libintl = "gettext"
 
 USE_NLS ?= "no"
 USE_NLS_glib-2.0 = "yes"
============================================================
--- conf/distro/include/moko-autorev.inc	fcfcab76f058cc1c4d7421859eca5516729b13b7
+++ conf/distro/include/moko-autorev.inc	30a97196079a97d9c58ada036559086466b640f3
@@ -1,4 +1,3 @@
-EFL_SRCDATE = "${@time.strftime('%Y%m%d', time.gmtime())}"
 SRCREV_pn-assassin ?= "${AUTOREV}"
 SRCREV_pn-dfu-util ?= "${AUTOREV}"
 SRCREV_pn-dfu-util-native ?= "${AUTOREV}"
============================================================
--- conf/distro/include/sane-srcdates.inc	b34ef707dd219480ea6e208db87c67468bcaa33e
+++ conf/distro/include/sane-srcdates.inc	ab98f16a11db3d5648ce60703f88e9417c3562d3
@@ -52,7 +52,7 @@ SRCDATE_gtkhtml2 ?= "20060323"
 # Enlightenment Foundation Libraries
 # Caution: This is not alphabetically, but (roughly) dependency-sorted.
 # Please leave it like that.
-EFL_SRCDATE ?= "20080411"
+EFL_SRCDATE ?= "20080427"
 SRCDATE_edb-native ?= "${EFL_SRCDATE}"
 SRCDATE_edb ?= "${EFL_SRCDATE}"
 SRCDATE_eet-native ?= "${EFL_SRCDATE}"
============================================================
--- conf/distro/include/sane-srcrevs.inc	af1d08078aa8f03db44e8b150bc4f043ad26b938
+++ conf/distro/include/sane-srcrevs.inc	3f68781354a48bcde95fae1b91ce841a0f88ae0f
@@ -37,7 +37,7 @@ SRCREV_pn-gpe-contacts ?= "9312"
 SRCREV_pn-gconf-dbus ?= "641"
 SRCREV_pn-gnuradio ?= "6377"
 SRCREV_pn-gpe-contacts ?= "9312"
-SRCREV_pn-gsm0710muxd ?= "263"
+SRCREV_pn-gsm0710muxd ?= "287"
 SRCREV_pn-gtkhtml2 ?= "1158"
 SRCREV_pn-gypsy ?= "134"
 SRCREV_pn-hildon-1 ?= "14429"
@@ -152,7 +152,7 @@ SRCREV_pn-psplash ?= "249"
 SRCREV_pn-oprofileui ?= "160"
 SRCREV_pn-packagekit ?= "432046796fa420f57ab6c71081f7ba14e9a92574"
 SRCREV_pn-psplash ?= "249"
-SRCREV_pn-py-odeviced ?= "190"
+SRCREV_pn-py-odeviced ?= "283"
 SRCREV_pn-pylgrim ?= "20"
 SRCREV_pn-pyneod ?= "88"
 SRCREV_pn-pyneog ?= "88"
============================================================
--- conf/distro/oplinux-uclibc.conf	4d4e43572601100e99436c766449cf726eab951e
+++ conf/distro/oplinux-uclibc.conf	ded77d3149a141de656d62e5c1ed7e161f1e500d
@@ -30,7 +30,7 @@ PREFERRED_PROVIDER_virtual/libiconv = "l
 #
 TARGET_OS = "linux-uclibc"
 PREFERRED_PROVIDER_virtual/libiconv = "libiconv"
-PREFERRED_PROVIDER_virtual/libintl = "libintl"
+PREFERRED_PROVIDER_virtual/libintl = "gettext"
 
 #
 # Kernel
============================================================
--- conf/machine/mpc8313e-rdb.conf	9521bcf148591a9c5c88e316475ce8493488eaf2
+++ conf/machine/mpc8313e-rdb.conf	ca05aff54fbbce7e6178f63cd81e0262c9607193
@@ -11,7 +11,7 @@ KERNEL_IMAGETYPE = "uImage"
 
 KERNEL_IMAGETYPE = "uImage"
 
-PREFERRED_VERSION_u-boot = "1.3.1"
+PREFERRED_VERSION_u-boot = "1.3.2"
 UBOOT_MACHINE = "MPC8313ERDB_33_config"
 UBOOT_ENTRYPOINT = "0"
 UBOOT_LOADADDRESS = "0"
============================================================
--- packages/busybox/busybox-1.9.2/defconfig	f0e872e8e6f3bc9941075571caf38d1a62657458
+++ packages/busybox/busybox-1.9.2/defconfig	b98a8c0c48f931c7b67cd67b5498aac228e47b29
@@ -619,8 +619,8 @@ CONFIG_NC=y
 # CONFIG_NAMEIF is not set
 # CONFIG_FEATURE_NAMEIF_EXTENDED is not set
 CONFIG_NC=y
-# CONFIG_NC_SERVER is not set
-# CONFIG_NC_EXTRA is not set
+CONFIG_NC_SERVER=y
+CONFIG_NC_EXTRA=y
 CONFIG_NETSTAT=y
 # CONFIG_FEATURE_NETSTAT_WIDE is not set
 CONFIG_NSLOOKUP=y
============================================================
--- packages/busybox/busybox_1.9.1.bb	4ce3286b8b9f17817880e467425ec28de58ea3f4
+++ packages/busybox/busybox_1.9.2.bb	a3a8f0f9c2f172464f5e3746ae507d0845fd473f
@@ -1,8 +1,7 @@ require busybox.inc
 require busybox.inc
-PR = "r4"
+PR = "r0"
 
 SRC_URI = "http://www.busybox.net/downloads/busybox-${PV}.tar.gz \
-           http://busybox.net/downloads/fixes-1.9.1/busybox-1.9.1-lineedit.patch;patch=1 \
            file://udhcpscript.patch;patch=1 \
            file://adduser-longops.patch;patch=1 \
            file://sort-z-nul.patch;patch=1;status=upstream \
============================================================
--- packages/efl1/imlib2_cvs.bb	90324b9d8bfadfca430da3b72c2b1f9c7089ee52
+++ packages/efl1/imlib2_cvs.bb	5c3c8c06ae6d9a4d18d10a066fc8973ec535e871
@@ -3,12 +3,10 @@ PV = "1.4.1.000+cvs${SRCDATE}"
 # can also depend on tiff34, ungif or gif, z, bz2, id3tag
 DEPENDS = "freetype libpng jpeg virtual/libx11 libxext"
 PV = "1.4.1.000+cvs${SRCDATE}"
-PR = "r0"
+PR = "r1"
 
 inherit efl
 
-SRC_URI += "file://remove-local-includes.patch;patch=1"
-
 EXTRA_OECONF = "--with-x"
 
 # TODO: Use more fine granular version
============================================================
--- packages/freesmartphone/gsm0710muxd_svn.bb	b214341ba255007649e5d97e71b3d22c2218c73e
+++ packages/freesmartphone/gsm0710muxd_svn.bb	848b41b51ffadb51a05381fbc015bc38fa1fccb1
@@ -2,32 +2,22 @@ SECTION = "console/network"
 HOMEPAGE = "http://www.freesmartphone.org"
 AUTHOR = "M. Dietrich"
 SECTION = "console/network"
-DEPENDS = "intltool-native dbus dbus-glib"
+DEPENDS = "dbus dbus-glib"
 RDEPENDS = "dbus dbus-glib"
 LICENSE = "GPL"
-PV = "0.9.0+svnr${SRCREV}"
-PR = "r0"
+PV = "0.9.1+svnr${SRCREV}"
+PR = "r1"
 
 SRC_URI = "svn://projects.linuxtogo.org/svn/smartphones/trunk/software;module=gsm0710muxd"
 S = "${WORKDIR}/gsm0710muxd"
 
 inherit autotools
 
+# install init script for people who want to manually
+# start/stop it, but don't add runlevels.
 do_install_append() {
-	# temp hack
-	mv -f ${D}${datadir}/dbus-1/system-services/org.freesmartphone.GSM.MUX.service ${D}${datadir}/dbus-1/system-services/org.mobile.mux.service
+	install -d ${D}${sysconfdir}/init.d
+	install -m 0755 data/gsm0710muxd ${D}${sysconfdir}/init.d/
 }
 
+FILES_${PN} += "${datadir} ${sysconfdir}"
-pkg_postinst_${PN}() {
-	# can't do this offline
-	if [ "x$D" != "x" ]; then
-		exit 1
-	fi
-	# reload dbus configuration files
-	for i in `pidof dbus-daemon`; do
-		kill -SIGHUP $i
-	done
-}
-
-FILES_${PN} += "${datadir}"
-
============================================================
--- packages/freesmartphone/py-odeviced_svn.bb	6ef92b7c28dc3f0730750da1b7cfeed1cd7da960
+++ packages/freesmartphone/py-odeviced_svn.bb	30b9953c30c87828378bdcea8213290cc498ea8f
@@ -21,11 +21,15 @@ do_install_append() {
 	install -d ${D}${sysconfdir}/init.d/
 	install -m 0755 ${WORKDIR}/odeviced ${D}${sysconfdir}/init.d/
 	install -m 0644 ${WORKDIR}/odeviced.conf ${D}${sysconfdir}
+	install -d ${D}${sysconfdir}/dbus-1/system.d/
+	mv -f ${D}${datadir}/etc/dbus-1/system.d/odeviced.conf ${D}${sysconfdir}/dbus-1/system.d/
 }
 
 RDEPENDS_${PN} += "\
   python-dbus \
   python-pygobject \
+  python-pyrtc \
+  python-syslog \
 "
 
 FILES_${PN} += "${sysconfdir}"
============================================================
--- packages/gqview/gqview_2.1.1.bb	16d9b045dce6b8a8f231b03d2732fb4c4d51fb0b
+++ packages/gqview/gqview_2.1.5.bb	c6c051a6d62ff63d3dc2481d6a0fb0df3bbc9df3
@@ -6,8 +6,7 @@ PR = "r1"
 RRECOMMENDS = "gdk-pixbuf-loader-jpeg gdk-pixbuf-loader-png gdk-pixbuf-loader-gif"
 PR = "r1"
 
-SRC_URI = "${SOURCEFORGE_MIRROR}/gqview/gqview-2.1.1.tar.gz \
+SRC_URI = "${SOURCEFORGE_MIRROR}/gqview/gqview-2.1.5.tar.gz \
 	   file://include-path-fix.patch;patch=1"
 
 inherit autotools
-
============================================================
--- packages/hal/files/20hal	b5274aeb2afa6b68caa3f9d7883f7b050c1b2df5
+++ packages/hal/files/20hal	933ee3447781ece335e67a16ff55bc387923db8c
@@ -12,7 +12,7 @@ PIDDIR=/var/run/hald
 PATH=/usr/local/sbin:/usr/local/bin:/sbin:/bin:/usr/sbin:/usr/bin
 DAEMON=/usr/sbin/hald
 PIDDIR=/var/run/hald
-PIDFILE=$PIDDIR/hald.pid
+PIDFILE=$PIDDIR/pid
 NAME=hald
 DAEMONUSER=haldaemon
 DESC="Hardware abstraction layer"
============================================================
--- packages/hal/hal_0.5.9.bb	2755c957ca6ff6db1080b1a90aec3cd4228e47f2
+++ packages/hal/hal_0.5.9.bb	58f834120c11860d1ba12c673e98de14842ac1e5
@@ -5,7 +5,7 @@ RRECOMMENDS = "udev-utils"
 #RDEPENDS_hal-device-manager = "python hal python-pygnome"
 RRECOMMENDS = "udev-utils"
 
-PR = "r5"
+PR = "r6"
 
 SRC_URI += "file://99_hal \
             file://20hal \
============================================================
--- packages/linux/linux-omap2-git/beagleboard/defconfig	ffa35a912f2d6c8016f6ea1d0f7ebb27987a9b28
+++ packages/linux/linux-omap2-git/beagleboard/defconfig	6defc6fa96f79492acbfbaed1cc6553abe5edc13
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
 # Linux kernel version: 2.6.25-omap1
-# Thu Apr 24 21:02:00 2008
+# Wed Apr 30 11:44:55 2008
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -941,9 +941,10 @@ CONFIG_VIDEO_V4L2_COMMON=y
 #
 CONFIG_VIDEO_DEV=y
 CONFIG_VIDEO_V4L2_COMMON=y
-# CONFIG_VIDEO_V4L1 is not set
+CONFIG_VIDEO_ALLOW_V4L1=y
 CONFIG_VIDEO_V4L1_COMPAT=y
 CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEO_V4L1=y
 CONFIG_VIDEO_CAPTURE_DRIVERS=y
 # CONFIG_VIDEO_ADV_DEBUG is not set
 # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
@@ -973,11 +974,21 @@ CONFIG_VIDEO_WM8775=m
 #
 # Video decoders
 #
+# CONFIG_VIDEO_BT819 is not set
+# CONFIG_VIDEO_BT856 is not set
+# CONFIG_VIDEO_BT866 is not set
+# CONFIG_VIDEO_KS0127 is not set
 # CONFIG_VIDEO_OV7670 is not set
 # CONFIG_VIDEO_TCM825X is not set
 # CONFIG_VIDEO_OV9640 is not set
+# CONFIG_VIDEO_SAA7110 is not set
+# CONFIG_VIDEO_SAA7111 is not set
+# CONFIG_VIDEO_SAA7114 is not set
 CONFIG_VIDEO_SAA711X=m
+# CONFIG_VIDEO_SAA717X is not set
+# CONFIG_VIDEO_SAA7191 is not set
 # CONFIG_VIDEO_TVP5150 is not set
+# CONFIG_VIDEO_VPX3220 is not set
 
 #
 # Video and audio decoders
@@ -993,6 +1004,9 @@ CONFIG_VIDEO_CX2341X=m
 # Video encoders
 #
 # CONFIG_VIDEO_SAA7127 is not set
+# CONFIG_VIDEO_SAA7185 is not set
+# CONFIG_VIDEO_ADV7170 is not set
+# CONFIG_VIDEO_ADV7175 is not set
 
 #
 # Video improvement chips
@@ -1000,22 +1014,39 @@ CONFIG_VIDEO_VIVI=m
 # CONFIG_VIDEO_UPD64031A is not set
 # CONFIG_VIDEO_UPD64083 is not set
 CONFIG_VIDEO_VIVI=m
+# CONFIG_VIDEO_CPIA is not set
+# CONFIG_VIDEO_CPIA2 is not set
 CONFIG_VIDEO_SAA5246A=m
 CONFIG_VIDEO_SAA5249=m
+# CONFIG_TUNER_3036 is not set
+# CONFIG_VIDEO_AU0828 is not set
 CONFIG_V4L_USB_DRIVERS=y
 CONFIG_VIDEO_PVRUSB2=m
 CONFIG_VIDEO_PVRUSB2_ONAIR_CREATOR=y
 CONFIG_VIDEO_PVRUSB2_ONAIR_USB2=y
 CONFIG_VIDEO_PVRUSB2_SYSFS=y
+# CONFIG_VIDEO_PVRUSB2_DVB is not set
 # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set
 CONFIG_VIDEO_EM28XX=m
 CONFIG_VIDEO_EM28XX_ALSA=m
+# CONFIG_VIDEO_EM28XX_DVB is not set
 CONFIG_VIDEO_USBVISION=m
+# CONFIG_USB_VICAM is not set
+# CONFIG_USB_IBMCAM is not set
+# CONFIG_USB_KONICAWC is not set
+# CONFIG_USB_QUICKCAM_MESSENGER is not set
 CONFIG_USB_ET61X251=m
+# CONFIG_VIDEO_OVCAMCHIP is not set
+# CONFIG_USB_W9968CF is not set
+# CONFIG_USB_OV511 is not set
+# CONFIG_USB_SE401 is not set
 CONFIG_USB_SN9C102=m
+# CONFIG_USB_STV680 is not set
 CONFIG_USB_ZC0301=m
+# CONFIG_USB_PWC is not set
 CONFIG_USB_ZR364XX=m
 CONFIG_USB_STKWEBCAM=m
+# CONFIG_SOC_CAMERA is not set
 # CONFIG_RADIO_ADAPTERS is not set
 CONFIG_DVB_CORE=m
 CONFIG_DVB_CORE_ATTACH=y
@@ -1094,6 +1125,7 @@ CONFIG_DVB_DIB7000P=m
 CONFIG_DVB_DIB3000MC=m
 CONFIG_DVB_DIB7000M=m
 CONFIG_DVB_DIB7000P=m
+# CONFIG_DVB_TDA10048 is not set
 
 #
 # DVB-C (cable) frontends
@@ -1112,6 +1144,7 @@ CONFIG_DVB_S5H1409=m
 CONFIG_DVB_BCM3510=m
 CONFIG_DVB_LGDT330X=m
 CONFIG_DVB_S5H1409=m
+# CONFIG_DVB_AU8522 is not set
 
 #
 # Tuners/PLL support
@@ -1126,11 +1159,13 @@ CONFIG_DVB_TUNER_XC5000=m
 CONFIG_DVB_TUNER_MT2131=m
 CONFIG_DVB_TUNER_DIB0070=m
 CONFIG_DVB_TUNER_XC5000=m
+# CONFIG_DVB_TUNER_ITD1000 is not set
 
 #
 # Miscellaneous devices
 #
 CONFIG_DVB_LNBP21=m
+# CONFIG_DVB_ISL6405 is not set
 CONFIG_DVB_ISL6421=m
 CONFIG_DVB_TUA6100=m
 CONFIG_VIDEO_TUNER=m
@@ -1263,10 +1298,6 @@ CONFIG_SND_SOC=y
 CONFIG_SND_SOC=y
 
 #
-# SoC Audio support for SuperH
-#
-
-#
 # ALSA SoC audio for Freescale SOCs
 #
 
@@ -1312,7 +1343,7 @@ CONFIG_USB_SUSPEND=y
 #
 # USB Host Controller Drivers
 #
-CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD=m
 CONFIG_OMAP_EHCI_PHY_MODE=y
 # CONFIG_OMAP_EHCI_TLL_MODE is not set
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
@@ -1434,7 +1465,7 @@ CONFIG_USB_LED=m
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
-CONFIG_USB_SISUSBVGA=y
+CONFIG_USB_SISUSBVGA=m
 CONFIG_USB_SISUSBVGA_CON=y
 # CONFIG_USB_LD is not set
 # CONFIG_USB_TRANCEVIBRATOR is not set
@@ -1638,7 +1669,6 @@ CONFIG_NFS_V4=y
 CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 CONFIG_NFS_V4=y
-# CONFIG_NFS_DIRECTIO is not set
 # CONFIG_NFSD is not set
 CONFIG_ROOT_NFS=y
 CONFIG_LOCKD=y
============================================================
--- packages/linux/linux-omap2_git.bb	e84865c7794f8227ce021537e22050f366fe51b3
+++ packages/linux/linux-omap2_git.bb	d2df9d873b73d322c1d6a7918ef9c8786b091e48
@@ -2,16 +2,17 @@ FILESDIR = "${@os.path.dirname(bb.data.g
 
 FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/linux-omap2-git/${MACHINE}"
 
-SRCREV = "4bb9f8b58ed7d14d276750d1792cef9b3aa1e9ec"
+SRCREV = "59586cd959b31f91f29cf96c1d3f8ff52c3c0607"
 
 PV = "2.6.25+git${SRCREV}"
-PR = "r5"
+PR = "r6"
 
 
 SRC_URI = "git://source.mvista.com/git/linux-omap-2.6.git;protocol=git \
-           file://defconfig"
+	   file://defconfig"
 
 SRC_URI_append_beagleboard = " file://no-harry-potter.diff;patch=1 \
+			       file://usb-timout.patch;patch=1 \
 "
 
 COMPATIBLE_MACHINE = "omap2430sdp|omap2420h4|beagleboard"
============================================================
--- packages/madwifi/madwifi-ng_r3314-20080131.bb	aa87cb14b8005f3b927e4701b1ae845bf2099ec2
+++ packages/madwifi/madwifi-ng_r3314-20080131.bb	24403394f09cfebacade21edca4dbf1c9fe180ba
@@ -1,8 +1,5 @@
 # Bitbake recipe for the madwifi-ng driver
 
-DEFAULT_PREFERENCE = "-1"
-DEFAULT_PREFERENCE_ixp4xx = "1"
-
 # Disable stripping of kernel modules, since this action strips too
 # much out, and the resulting module won't load.
 INHIBIT_PACKAGE_STRIP = "1"
============================================================
--- packages/meta/slugos-packages.bb	46c8ac8a7503c5e222ee23a677a92db2e2ea9dcb
+++ packages/meta/slugos-packages.bb	f62c22f94a5ba8a475afc6d43721c4e29386ca2e
@@ -5,7 +5,7 @@ LICENSE = "MIT"
 DESCRIPTION = "Packages that are compatible with the SlugOS firmware"
 HOMEPAGE = "http://www.nslu2-linux.org"
 LICENSE = "MIT"
-PR = "r51"
+PR = "r53"
 CONFLICTS = "db3"
 
 COMPATIBLE_MACHINE = "nslu2|ixp4xx"
@@ -50,6 +50,7 @@ SLUGOS_PACKAGES = "\
 	bluez-utils \
 	bluez-hcidump \
 	bogofilter \
+	bonnie++ \
 	boost \
 	bridge-utils \
 	bzip2 \
@@ -103,6 +104,7 @@ SLUGOS_PACKAGES = "\
 	hdparm \
 	ifupdown \
 	inetutils \
+	iozone3 \
 	iperf \
 	ipkg-utils \
 	iptables \
============================================================
--- packages/opkg/opkg_svn.bb	bc27245782ad8e3348db57c3d14c9e75b4f1b404
+++ packages/opkg/opkg_svn.bb	e034851c3a5985b17cbde739bc5bb59a8c69d323
@@ -1,6 +1,6 @@ require opkg.inc
 require opkg.inc
 
-PR = "r3"
+PR = "r4"
 
 PACKAGES =+ "libopkg-dev libopkg"
 
@@ -12,7 +12,7 @@ OPKG_INIT_POSITION_slugos = "41"
 OPKG_INIT_POSITION = "98"
 OPKG_INIT_POSITION_slugos = "41"
 
-pkg_postinst_opkg () {
+pkg_postinst_${PN} () {
 #!/bin/sh
 if [ "x$D" != "x" ]; then
 	install -d ${IMAGE_ROOTFS}/${sysconfdir}/rcS.d
@@ -26,7 +26,7 @@ update-alternatives --install ${bindir}/
 update-alternatives --install ${bindir}/opkg opkg ${bindir}/opkg-cl 100
 }
 
-pkg_postrm_opkg () {
+pkg_postrm_${PN} () {
 #!/bin/sh
 update-alternatives --remove opkg ${bindir}/opkg-cl
 }
============================================================
--- packages/python/python-2.5-manifest.inc	ce2d4136b474c7f902281410e54cde0b27751287
+++ packages/python/python-2.5-manifest.inc	e3df18f8f3a8373fd0bccb992c74a16321f20256
@@ -1,5 +1,5 @@
 ########################################################################################################################
-### AUTO-GENERATED by '../../contrib/python/generate-manifest-2.5.py' [(C) 2002-2008 Michael 'Mickey' Lauer <mlauer at vanille-media.de>] on Thu Apr 10 16:47:00 2008
+### AUTO-GENERATED by '../../contrib/python/generate-manifest-2.5.py' [(C) 2002-2008 Michael 'Mickey' Lauer <mlauer at vanille-media.de>] on Thu May  1 12:24:55 2008
 ###
 ### Visit THE Python for Embedded Systems Site => http://www.Vanille.de/projects/python.spy
 ###
@@ -68,9 +68,9 @@ DESCRIPTION_python-compression="Python H
 FILES_python-compiler="${libdir}/python2.5/compiler "
 
 DESCRIPTION_python-compression="Python High Level Compression Support"
-PR_python-compression="ml0"
+PR_python-compression="ml1"
 RDEPENDS_python-compression="python-core python-zlib"
-FILES_python-compression="${libdir}/python2.5/gzip.* ${libdir}/python2.5/zipfile.* "
+FILES_python-compression="${libdir}/python2.5/gzip.* ${libdir}/python2.5/zipfile.* ${libdir}/python2.5/tarfile.* "
 
 DESCRIPTION_python-re="Python Regular Expression APIs"
 PR_python-re="ml0"
============================================================
--- packages/python/python-setuptools_0.6c6.bb	57994d92ba3eec5b7d6f145f3d08241becb3a6dc
+++ packages/python/python-setuptools_0.6c6.bb	074cb8e81cb89426c6d897caeb5fd18c68571c9a
@@ -3,7 +3,7 @@ LICENSE = "MIT-like"
 SECTION = "devel/python"
 PRIORITY = "optional"
 LICENSE = "MIT-like"
-RDEPENDS = "python-core python-zlib"
+RDEPENDS = "python-distutils python-compression"
 SRCNAME = "setuptools"
 PR = "ml1"
 
@@ -15,8 +15,3 @@ do_install_prepend() {
 do_install_prepend() {
     install -d ${D}/${libdir}/${PYTHON_DIR}/site-packages
 }
-
-do_stage() {
-    BUILD_SYS=${BUILD_SYS} HOST_SYS=${HOST_SYS} \
-      ${STAGING_BINDIR_NATIVE}/python setup.py install 
-}
============================================================
--- packages/python/python-simplejson_1.7.1.bb	8890cca59935f213dfae3a402765e7bad90c9a89
+++ packages/python/python-simplejson_1.7.1.bb	4abda6be3039a1c47c3bdc6c4c287078ff32fbe8
@@ -3,14 +3,13 @@ LICENSE = "MIT"
 SECTION = "devel/python"
 PRIORITY = "optional"
 LICENSE = "MIT"
-DEPENDS = "python-setuptools"
 # python-netserver is needed for cgi stuff
 # python-zlib is needed to unpack egg created by setuptools
 RDEPENDS = "python-core python-re python-io python-netserver python-zlib"
 SRCNAME = "simplejson"
-PR = "r1"
+PR = "r2"
 
 SRC_URI = "http://cheeseshop.python.org/packages/source/s/simplejson/${SRCNAME}-${PV}.tar.gz"
 S = "${WORKDIR}/${SRCNAME}-${PV}"
 
+inherit setuptools
-inherit distutils
============================================================
--- packages/python/python_2.5.2.bb	43c9ad955282b5022b3a3db8b5b179589957f666
+++ packages/python/python_2.5.2.bb	3ca57f8a30e412707c0107dff460e0343840d9f1
@@ -6,7 +6,7 @@ DEPENDS_sharprom = "python-native readli
 DEPENDS = "python-native readline zlib gdbm openssl sqlite3 tcl tk"
 DEPENDS_sharprom = "python-native readline zlib gdbm openssl"
 # bump this on every change in contrib/python/generate-manifest-2.5.py
-PR = "ml2"
+PR = "ml3"
 
 PYTHON_MAJMIN = "2.5"
 
============================================================
--- packages/u-boot/u-boot_1.3.2.bb	8cfd5293c0214179a38b2304fbd10c77a3912aff
+++ packages/u-boot/u-boot_1.3.2.bb	33ac513192e4695c4ea43a787d866c98c2a011ef
@@ -2,6 +2,11 @@ DEFAULT_PREFERENCE = "-1"
 
 DEFAULT_PREFERENCE = "-1"
 
-SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2"
+PR = "r1"
 
+SRC_URI = "ftp://ftp.denx.de/pub/u-boot/u-boot-${PV}.tar.bz2 \
+           file://mpc8313e-rdb-autoboot.patch;patch=1 \
+           file://mpc8313e-rdb-mtdparts.patch;patch=1 \
+           file://mpc8313e-rdb-nand.patch;patch=1"
+
 PACKAGE_ARCH = "${MACHINE_ARCH}"
============================================================
--- packages/ulxmlrpcpp/ulxmlrpcpp_1.5.2.bb	a12a466db6c83f5d3917dc47f9ddb865083e1cd2
+++ packages/ulxmlrpcpp/ulxmlrpcpp_1.7.3.bb	620ff88b9012aace94f197dadcdfaf0b6b770e62
@@ -3,20 +3,23 @@ DEPENDS = "expat"
 LICENSE = "LGPL"
 SECTION = "libs"
 DEPENDS = "expat"
-PR = "r0"
+PR = "r1"
 
 SRC_URI = "${SOURCEFORGE_MIRROR}/ulxmlrpcpp/ulxmlrpcpp-${PV}-src.tar.bz2 \
-           file://disable-docs.patch;patch=1"
+           file://disable-docs.patch;patch=1 \
+           file://remove-local-includes.patch;patch=1"
 
 inherit autotools
 
-do_configure_prepend() {
-	install -d config
-	touch config/lib-prefix.m4 config/lib-link.m4 config/lib-ld.m4
+do_configure_append() {
+	echo "#define ulxr_snprintf   snprintf" >>ulxmlrpcpp/ulxmlrpcpp.h
 }
 
+do_stage() {
+	autotools_stage_all
+}
+
 LEAD_SONAME = "libulxmlrpcpp.so"
 PACKAGES =+ "${PN}-examples ${PN}-contrib"
+FILES_${PN}-examples = "${bindir}/*"
+FILES_${PN}-contrib = "${libdir}/*contrib.so.*"
-FILES_${PN}-examples = "${bindir}"
-FILES_${PN}-contrib = "${libdir}/*contrib*"
-
============================================================
--- packages/xorg-xserver/xserver-kdrive-glamo_1.3.0.0+git.bb	6d801f6abfc58aaf724ee5f32f75326a83882415
+++ packages/xorg-xserver/xserver-kdrive-glamo_1.3.0.0+git.bb	d9999335a38fb49bae5419528a518ebff7e010b6
@@ -9,9 +9,9 @@ PE = "1"
 RDEPENDS_${PN} = "xserver-kdrive"
 PROVIDES = "virtual/xserver"
 PE = "1"
-PR = "r1"
+PR = "r5"
 
-XGLAMO_GIT_REV = "0d2605edeb50a4b118ac00ae1f00abd085477323"
+XGLAMO_GIT_REV = "a51364e2f23d4b6331c5ed613ce3f7e15f8e540f"
 
 SRC_URI = "git://people.freedesktop.org/~dodji/xglamo;protocol=git;rev=${XGLAMO_GIT_REV} \
         file://kmode.patch;patch=1 \
@@ -35,6 +35,7 @@ SRC_URI = "git://people.freedesktop.org/
         file://w100-fix-offscreen-bmp.patch;patch=1 \
         file://kdrive-1.3-18bpp.patch;patch=1 \
         file://gumstix-kmode.patch;patch=1 \
+        file://fix-picturestr-include-order.patch;patch=1 \
 "
 
 FILESPATH = "${FILE_DIRNAME}/xserver-kdrive-1.3.0.0:${FILE_DIRNAME}/xserver-kdrive:${FILE_DIRNAME}/files"
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