r4954 - developers/werner/gta03/cam/patches

werner at docs.openmoko.org werner at docs.openmoko.org
Mon Mar 9 19:51:25 CET 2009


Author: werner
Date: 2009-03-09 19:51:24 +0100 (Mon, 09 Mar 2009)
New Revision: 4954

Added:
   developers/werner/gta03/cam/patches/NOTES
   developers/werner/gta03/cam/patches/camera-adjust-mclk.patch
   developers/werner/gta03/cam/patches/camera-io-drive.patch
   developers/werner/gta03/cam/patches/cleanup-4xa_sensor.patch
   developers/werner/gta03/cam/patches/cleanup-camera-driver.patch
   developers/werner/gta03/cam/patches/cleanup-camif.patch
   developers/werner/gta03/cam/patches/fix-s3c6400-clock-shift.patch
   developers/werner/gta03/cam/patches/fix-s3c64xx_roundrate_clksrc.patch
Modified:
   developers/werner/gta03/cam/patches/add-64xx-cam-clock.patch
   developers/werner/gta03/cam/patches/series
Log:
Cleanup and clock fixes. First round. (This is just my backup. The real
stuff is on the list.)



Added: developers/werner/gta03/cam/patches/NOTES
===================================================================
--- developers/werner/gta03/cam/patches/NOTES	                        (rev 0)
+++ developers/werner/gta03/cam/patches/NOTES	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,41 @@
+# submit with
+
+quilt mail --mbox foo --prefix PATCH \
+  --from 'Werner Almesberger <werner at openmoko.org>' \
+  --sender werner at openmoko.org \
+  --subject 'Camera driver cleanup' \
+  --to openmoko-kernel at lists.openmoko.org
+
+quilt mail --mbox bar --prefix PATCH \
+  --from 'Werner Almesberger <werner at openmoko.org>' \
+  --sender werner at openmoko.org \
+  --subject 'Camera clock fixes' \
+  --to openmoko-kernel at lists.openmoko.org
+
+DO NOT USE
+# formail -s sendmail -t <foo
+
+-----
+
+Camera driver cleanup
+
+This patch series does some light cleanup on the camera driver.
+Most of the warnings, #ifdef hell, larger-scale redundancy, and
+other gremlins are still there.
+
+- Werner
+
+-----
+
+Camera clock fixes
+
+This patch series should (finally) get the camera clock right.
+
+Ben, patches 2/4 and 3/4 fix more issues in
+arch/arm/plat-s3c64xx/s3c6400-clock.c
+
+Andy, patch 1/4 is a reissue. It seems that you got one of my
+botched mails when applying the first one and the commit is
+thus empty.
+
+- Werner

Modified: developers/werner/gta03/cam/patches/add-64xx-cam-clock.patch
===================================================================
--- developers/werner/gta03/cam/patches/add-64xx-cam-clock.patch	2009-03-06 20:17:20 UTC (rev 4953)
+++ developers/werner/gta03/cam/patches/add-64xx-cam-clock.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -1,5 +1,8 @@
-Add CAMIF clock to S3C6410.
+Add CAMIF clock to S3C6410
 
+[ Resending it. Seems that commit 9e723603e46500e2c9fbf09ac823de210bf05d31
+  used one of the empty mails I got with formail :-( ]
+
 Add camera interface clock to S3C6410.
 
 Signed-off-by: Werner Almesberger <werner at openmoko.org>

Added: developers/werner/gta03/cam/patches/camera-adjust-mclk.patch
===================================================================
--- developers/werner/gta03/cam/patches/camera-adjust-mclk.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/camera-adjust-mclk.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,74 @@
+Adjust MCLK for use with PLL
+
+The PLL converts a 26.6 MHz input clock to 87.8 MHz, which is later
+divided by two and becomes PCLK. (See comments below for details.)
+
+All this looks like a textbook example for platform stuff, but let's
+take it one step a time.
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/drivers/media/video/samsung/4xa_sensor.c
+===================================================================
+--- cam.orig/drivers/media/video/samsung/4xa_sensor.c	2009-03-10 02:28:49.000000000 +0800
++++ cam/drivers/media/video/samsung/4xa_sensor.c	2009-03-10 02:29:37.000000000 +0800
+@@ -29,6 +29,27 @@
+ #include "../s3c_camif.h"
+ #include "4xa_sensor.h"
+ 
++
++/*
++ * Samsung's original code:
++ *	.camclk		= 44000000,	/ * for 20 fps: 44MHz, for 12 fps (more
++ *					   stable): 26MHz * /
++ *
++ * Experimenting with the controls yielded the following:
++ *
++ * PLL_CLK gets divided according to TCMD.Div8_r (1,00h) and then by
++ * SEL_MAIN.Half_PCLK_Enable (5,8Fh) until it finally becomes PCLK.
++ *
++ * Div8_r = 0: 1/4, 1: 1/2 (default)
++ * Half_PCLK_Enable = 0: 1/1 (default), 1: 1/2
++ *
++ * Thus our 26.6 MHz MCLK becomes an 87.78 MHz PLL_CLK and eventually a PCLK
++ * of 43.89 MHz.
++ */
++
++#define	CAMCLK	26600000	/* 26.6 MHz */
++
++
+ static struct i2c_driver sensor_driver;
+ 
+ /* This is an abstract CIS sensor for MSDMA input. */
+@@ -36,8 +57,7 @@
+ camif_cis_t msdma_input = {
+ 	.itu_fmt	= CAMIF_ITU601,
+ 	.order422	= CAMIF_CBYCRY,	/* another case: YCRYCB */
+-	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
+-					   stable): 26MHz */
++	.camclk		= CAMCLK,
+ 	.source_x	= 800,
+ 	.source_y	= 600,
+ 	.win_hor_ofst	= 0,
+@@ -54,8 +74,7 @@
+ camif_cis_t interlace_input = {
+ 	.itu_fmt	= CAMIF_ITU601,
+ 	.order422	= CAMIF_CBYCRY,	/* another case: YCRYCB */
+-	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
+-					   stable): 26MHz */
++	.camclk		= CAMCLK,
+ 	.source_x	= 800,
+ 	.source_y	= 600,
+ 	.win_hor_ofst	= 0,
+@@ -73,8 +92,7 @@
+ static camif_cis_t data = {
+ 	.itu_fmt	= CAMIF_ITU601,
+ 	.order422	= CAMIF_YCBYCR,
+-	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
+-					   stable): 26MHz */
++	.camclk		= CAMCLK,
+ 	.source_x	= 800,
+ 	.source_y	= 600,
+ 	.win_hor_ofst	= 0,

Added: developers/werner/gta03/cam/patches/camera-io-drive.patch
===================================================================
--- developers/werner/gta03/cam/patches/camera-io-drive.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/camera-io-drive.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,34 @@
+Increase camera I/O drive strength from 2 mA to 8 mA
+
+The camera driver reduced all IO drivers from their reset defaults of
+6 mA to only 2 mA, which caused severe signal distortion at higher
+speeds. This patch sets them to 8 mA. 
+
+Note that the correct setting of the I2C pullups still needs to be
+verified.
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/drivers/media/video/samsung/4xa_sensor.h
+===================================================================
+--- cam.orig/drivers/media/video/samsung/4xa_sensor.h	2009-03-07 22:18:38.000000000 +0800
++++ cam/drivers/media/video/samsung/4xa_sensor.h	2009-03-07 22:26:10.000000000 +0800
+@@ -223,14 +223,8 @@
+ 	{0x62,0x0a},	// Mirror Option
+ 
+ 	{0xfc,0x02},
+-	{0x4e,0x00},	// IO current 8mA set
+-	{0x4e,0x00},	// IO current 8mA set
+-	{0x4e,0x00},	// IO current 8mA set
+-	{0x4e,0x00},	// IO current 8mA set
+-	{0x4f,0x0a},	// 2a IO current 48mA set
+-	{0x4f,0x0a},	// IO current 48mA set
+-	{0x4f,0x0a},	// IO current 48mA set
+-	{0x4f,0x0a},	// IO current 48mA set
++	{0x4e,0x1b},	// Enable SDA and SCL pull-up; drive 8 mA
++	{0x4f,0xf0},	// PCLK and YC: 8 mA, AF and ZM (AZ): 2 mA
+ 
+ 	{0xfc,0x01},
+ 	{0x0c,0x03},	// Full YC Enable

Added: developers/werner/gta03/cam/patches/cleanup-4xa_sensor.patch
===================================================================
--- developers/werner/gta03/cam/patches/cleanup-4xa_sensor.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/cleanup-4xa_sensor.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,1532 @@
+Clean up camera sensor driver
+
+This patch does some light cleanup on the S5K4BA driver:
+
+- change structure initializers from  field:  to  .field =  syntax
+- exlicitly name fields in structure initializers
+- added proper error handling to sensor_read
+- use ARRAY_SIZE
+- remove redundant parentheses and braces
+- change // to /* ... */
+- remove non-ASCII characters
+- general whitespace cleanup
+- removed an unused variable warning
+
+(4xa_sensor.h is only partially cleaned up.)
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/drivers/media/video/samsung/4xa_sensor.c
+===================================================================
+--- cam.orig/drivers/media/video/samsung/4xa_sensor.c	2009-03-10 02:01:12.000000000 +0800
++++ cam/drivers/media/video/samsung/4xa_sensor.c	2009-03-10 02:05:34.000000000 +0800
+@@ -34,55 +34,58 @@
+ /* This is an abstract CIS sensor for MSDMA input. */
+ 
+ camif_cis_t msdma_input = {
+-        itu_fmt:       CAMIF_ITU601,
+-	order422:      CAMIF_CBYCRY,	/* another case: YCRYCB */
+-	camclk:        44000000,	/* for 20 fps: 44MHz, for 12 fps(more stable): 26MHz */
+-	source_x:      800,
+-	source_y:      600,
+-	win_hor_ofst:  0,
+-	win_ver_ofst:  0,
+-	win_hor_ofst2: 0,
+-	win_ver_ofst2: 0,
+-	polarity_pclk: 0,
+-	polarity_vsync:1,
+-	polarity_href: 0,
+-	reset_type:CAMIF_EX_RESET_AL,
+-	reset_udelay: 5000,
++	.itu_fmt	= CAMIF_ITU601,
++	.order422	= CAMIF_CBYCRY,	/* another case: YCRYCB */
++	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
++					   stable): 26MHz */
++	.source_x	= 800,
++	.source_y	= 600,
++	.win_hor_ofst	= 0,
++	.win_ver_ofst	= 0,
++	.win_hor_ofst2	= 0,
++	.win_ver_ofst2	= 0,
++	.polarity_pclk	= 0,
++	.polarity_vsync	= 1,
++	.polarity_href	= 0,
++	.reset_type	= CAMIF_EX_RESET_AL,
++	.reset_udelay	= 5000,
+ };
+ 
+ camif_cis_t interlace_input = {
+-        itu_fmt:       CAMIF_ITU601,
+-	order422:      CAMIF_CBYCRY,	/* another case: YCRYCB */
+-	camclk:        44000000,	/* for 20 fps: 44MHz, for 12 fps(more stable): 26MHz */
+-	source_x:      800,
+-	source_y:      600,
+-	win_hor_ofst:  0,
+-	win_ver_ofst:  0,
+-	win_hor_ofst2: 0,
+-	win_ver_ofst2: 0,
+-	polarity_pclk: 0,
+-	polarity_vsync:1,
+-	polarity_href: 0,
+-	reset_type:CAMIF_EX_RESET_AL,
+-	reset_udelay: 5000,
++	.itu_fmt	= CAMIF_ITU601,
++	.order422	= CAMIF_CBYCRY,	/* another case: YCRYCB */
++	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
++					   stable): 26MHz */
++	.source_x	= 800,
++	.source_y	= 600,
++	.win_hor_ofst	= 0,
++	.win_ver_ofst	= 0,
++	.win_hor_ofst2	= 0,
++	.win_ver_ofst2	= 0,
++	.polarity_pclk	= 0,
++	.polarity_vsync	= 1,
++	.polarity_href	= 0,
++	.reset_type	= CAMIF_EX_RESET_AL,
++	.reset_udelay	= 5000,
+ };
+ 
+ #if defined(CONFIG_VIDEO_SAMSUNG_S5K4BA)
+ static camif_cis_t data = {
+-	itu_fmt:       CAMIF_ITU601,
+-	order422:      CAMIF_YCBYCR,
+-	camclk:        44000000,	/* for 20 fps: 44MHz, for 12 fps(more stable): 26MHz */
+-	source_x:      800,
+-	source_y:      600,
+-	win_hor_ofst:  0,
+-	win_ver_ofst:  0,
+-	win_hor_ofst2: 0,
+-	win_ver_ofst2: 0,
+-	polarity_pclk: 0,
+-	polarity_vsync:1,
+-	polarity_href: 0,
+-	reset_type:CAMIF_EX_RESET_AL,
+-	reset_udelay: 5000,
++	.itu_fmt	= CAMIF_ITU601,
++	.order422	= CAMIF_YCBYCR,
++	.camclk		= 44000000,	/* for 20 fps: 44MHz, for 12 fps (more
++					   stable): 26MHz */
++	.source_x	= 800,
++	.source_y	= 600,
++	.win_hor_ofst	= 0,
++	.win_ver_ofst	= 0,
++	.win_hor_ofst2	= 0,
++	.win_ver_ofst2	= 0,
++	.polarity_pclk	= 0,
++	.polarity_vsync	= 1,
++	.polarity_href	= 0,
++	.reset_type	= CAMIF_EX_RESET_AL,
++	.reset_udelay	= 5000,
+ };
+ 
+ s5k4xa_t s5k4ba_regs_mirror[S5K4BA_REGS];
+@@ -101,34 +104,40 @@
+ #define CAM_ID 0x5a
+ 
+ static unsigned short ignore[] = { I2C_CLIENT_END };
+-static unsigned short normal_addr[] = { (CAM_ID >> 1), I2C_CLIENT_END };
++static unsigned short normal_addr[] = { CAM_ID >> 1, I2C_CLIENT_END };
+ static const unsigned short *forces[] = { NULL };
+ 
+ static struct i2c_client_address_data addr_data = {
+-      .normal_i2c	= normal_addr,
+-      .probe		= ignore,
+-      .ignore		= ignore,
+-      .forces		= forces,
++	.normal_i2c	= normal_addr,
++	.probe		= ignore,
++	.ignore		= ignore,
++	.forces		= forces,
+ };
+ 
+ 
+-unsigned char sensor_read(struct i2c_client *client, unsigned char subaddr)
++static unsigned char sensor_read(struct i2c_client *client,
++    unsigned char subaddr)
+ {
+-	int ret;
+-	unsigned char buf[1];
+-	struct i2c_msg msg = { client->addr, 0, 1, buf };
+-	buf[0] = subaddr;
++	unsigned char buf = subaddr;
++	struct i2c_msg msg = {
++		.addr	= client->addr,
++		.flags	= 0,
++		.len	= 1,
++		.buf	= &buf,
++	};
+ 
+-	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
+-	if (ret == -EIO) {
+-		printk(" I2C write Error \n");
++	if (i2c_transfer(client->adapter, &msg, 1) != 1) {
++		printk(" I2C write Error\n");
+ 		return -EIO;
+ 	}
+ 
+ 	msg.flags = I2C_M_RD;
+-	ret = i2c_transfer(client->adapter, &msg, 1) == 1 ? 0 : -EIO;
++	if (i2c_transfer(client->adapter, &msg, 1) != 1) {
++		printk(" I2C read Error\n");
++		return -EIO;
++	}
+ 
+-	return buf[0];
++	return buf;
+ }
+ 
+ static int
+@@ -136,7 +145,12 @@
+ 	     unsigned char subaddr, unsigned char val)
+ {
+ 	unsigned char buf[2];
+-	struct i2c_msg msg = { client->addr, 0, 2, buf };
++	struct i2c_msg msg = {
++		.addr	= client->addr,
++		.flags	= 0,
++		.len	= 2,
++		.buf	= buf,
++	};
+ 
+ 	buf[0] = subaddr;
+ 	buf[1] = val;
+@@ -149,11 +163,10 @@
+ {
+ 	int i;
+ 
+-	i = (sizeof(s5k4ba_reg)/sizeof(s5k4ba_reg[0]));
+-	for (i = 0; i < S5K4BA_INIT_REGS; i++) {
++	i = ARRAY_SIZE(s5k4ba_reg);
++	for (i = 0; i < S5K4BA_INIT_REGS; i++)
+ 		sensor_write(sam_client,
+ 			     s5k4ba_reg[i].subaddr, s5k4ba_reg[i].value);
+-	}
+ }
+ #else
+ #error No samsung CIS moudule !
+@@ -195,9 +208,11 @@
+ 	return 0;
+ }
+ 
+-/* Purpose:
+-    This fucntion only for SVGA Camera : 4BA
+-*/
++/*
++ * Purpose:
++ * This function only for SVGA Camera : 4BA
++ */
++
+ static int change_sensor_size(struct i2c_client *client, int size)
+ {
+ 	int i;
+@@ -205,23 +220,21 @@
+ 	switch (size) {
+ #if defined(CONFIG_VIDEO_SAMSUNG_S5K4BA)
+ 	case SENSOR_QSVGA:
+-		for (i = 0; i < S5K4BA_QSVGA_REGS; i++) {
++		for (i = 0; i < S5K4BA_QSVGA_REGS; i++)
+ 			sensor_write(client, s5k4ba_reg_qsvga[i].subaddr,
+ 				     s5k4ba_reg_qsvga[i].value);
+-		}
+ 		break;
+ 
+ 	case SENSOR_SVGA:
+- 		for (i = 0; i < S5K4BA_SVGA_REGS; i++) {
++		for (i = 0; i < S5K4BA_SVGA_REGS; i++)
+ 			sensor_write(client, s5k4ba_reg_svga[i].subaddr,
+ 				     s5k4ba_reg_svga[i].value);
+-		}
+ 		break;
+ #else
+ #error No samsung CIS moudule !
+ #endif
+ 	default:
+-		panic("4xa_sensor.c: unexpect value \n");
++		panic("4xa_sensor.c: unexpect value\n");
+ 	}
+ 
+ 	return 0;
+@@ -229,39 +242,39 @@
+ 
+ static int change_sensor_wb(struct i2c_client *client, int type)
+ {
+-       printk("[ *** Page 0, 4XA Sensor White Balance Mode ***]\n");
++	printk("[ *** Page 0, 4XA Sensor White Balance Mode ***]\n");
+ 
+ #if defined(CONFIG_VIDEO_SAMSUNG_S5K4BA)
+-       sensor_write(client, 0xFC, 0x0);
+-       sensor_write(client, 0x30, type);
++	sensor_write(client, 0xFC, 0x0);
++	sensor_write(client, 0x30, type);
+ #endif
+ 
+-       switch(type){
+-           case 0:
+-           default:
+-                printk(" -> AWB auto mode ]\n");
+-                break;
+-           case 1:
+-                printk(" -> Indoor 3100 mode ]\n");
+-                break;
+-           case 2:
+-                printk(" -> Outdoor 5100 mode ]\n");
+-                break;
+-           case 3:
+-                printk(" -> Indoor 2000 mode ]\n");
+-                break;
+-           case 4:
+-                printk(" -> AE/AWB halt ]\n");
+-                break;
+-           case 5:
+-                printk(" -> Cloudy(6000) mode ]\n");
+-                break;
+-           case 6:
+-                printk(" -> Sunny(8000) mode ]\n");
+-                break;
+-       }
++	switch(type){
++	case 0:
++	default:
++		printk(" -> AWB auto mode ]\n");
++		break;
++	case 1:
++		printk(" -> Indoor 3100 mode ]\n");
++		break;
++	case 2:
++		printk(" -> Outdoor 5100 mode ]\n");
++		break;
++	case 3:
++		printk(" -> Indoor 2000 mode ]\n");
++		break;
++	case 4:
++		printk(" -> AE/AWB halt ]\n");
++		break;
++	case 5:
++		printk(" -> Cloudy(6000) mode ]\n");
++		break;
++	case 6:
++		printk(" -> Sunny(8000) mode ]\n");
++		break;
++	}
+ 
+-       return 0;
++	return 0;
+ }
+ 
+ static int
+@@ -304,12 +317,12 @@
+ 		break;
+ */
+ 	case SENSOR_WB:
+-        	printk("[ *** 4XA Sensor White Balance , No mode ***]\n");
+-        	change_sensor_wb(client, (int) arg);
+-        	break;
++		printk("[ *** 4XA Sensor White Balance , No mode ***]\n");
++		change_sensor_wb(client, (int) arg);
++		break;
+ 
+ 	default:
+-		panic("4xa_sensor.c : Unexpect Sensor Command \n");
++		panic("4xa_sensor.c: Unexpected Sensor Command\n");
+ 		break;
+ 	}
+ 
+@@ -320,10 +333,10 @@
+ 	.driver = {
+ 		.name = "s5k4xa",
+ 	},
+-      .id = I2C_DRIVERID_S5K_4XA,
+-      .attach_adapter = sensor_attach_adapter,
+-      .detach_client = sensor_detach,
+-      .command = sensor_command
++	.id = I2C_DRIVERID_S5K_4XA,
++	.attach_adapter = sensor_attach_adapter,
++	.detach_client = sensor_detach,
++	.command = sensor_command
+ };
+ 
+ static __init int camif_sensor_init(void)
+Index: cam/drivers/media/video/samsung/4xa_sensor.h
+===================================================================
+--- cam.orig/drivers/media/video/samsung/4xa_sensor.h	2009-03-10 02:01:12.000000000 +0800
++++ cam/drivers/media/video/samsung/4xa_sensor.h	2009-03-10 02:01:26.000000000 +0800
+@@ -1,32 +1,33 @@
+-
+ #ifndef _SAMSUNG_SXGA_H_
+ #define _SAMSUNG_SXGA_H_
+ 
+-/*******************************************************************************************
+- #  Display resolution standards #
+-
+-	QCIF: 176 x 144
+-	CIF: 352 x 288
+-	QVGA: 320 x 240
+-	VGA: 640 x 480
+-	SVGA: 800 x 600
+-	XGA: 1024 x 768
+-	WXGA: 1280 x 800
+-	QVGA: 1280 x 960
+-	SXGA: 1280 x 1024
+-	SXGA+: 1400 x 1050
+-	WSXGA+: 1680 x 1050
+-	UXGA: 1600 x 1200
+-	WUXGA: 1920 x 1200
+-	QXGA: 2048 x 1536
+-********************************************************************************************/
++/******************************************************************************
++ *  Display resolution standards
++ *
++ *	QCIF: 176 x 144
++ *	CIF: 352 x 288
++ *	QVGA: 320 x 240
++ *	VGA: 640 x 480
++ *	SVGA: 800 x 600
++ *	XGA: 1024 x 768
++ *	WXGA: 1280 x 800
++ *	QVGA: 1280 x 960
++ *	SXGA: 1280 x 1024
++ *	SXGA+: 1400 x 1050
++ *	WSXGA+: 1680 x 1050
++ *	UXGA: 1600 x 1200
++ *	WUXGA: 1920 x 1200
++ *	QXGA: 2048 x 1536
++ *****************************************************************************/
+ 
+ //#include "../bits.h"
+ 
+-/* Camera information
++/*
++ * Camera information
+  * FPC Label : Samsung MEGA Pixel Camera : V4220 REV06
+  * Modified by charles -Initial function of '3AA' test routine
+- * Modified and tested by YongHwui.Kim <yonghwui.kim at samsung.com> for S5K3AAEX Camera
++ * Modified and tested by YongHwui.Kim <yonghwui.kim at samsung.com> for S5K3AAEX
++ * Camera
+  */
+ 
+ #define CHIP_DELAY 0xFF
+@@ -41,78 +42,82 @@
+ #define TRY_HIGH_CLOCK 1
+ #endif
+ 
+-				//***************************************************
+-				//  name: 	S5K3AAEX EVT2 setfile
+-				//  ver:		v2.61
+-				//  history:
+-				//	v0.0	start from 040908 setfile
+-				//	v1.0	arange register
+-				//	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
+-				//	v2.0	adjust register setting for 3AA EVT2
+-				//		- color correction, RGB shding off, hsync start position, Mirror, fps
+-				//		- Color Tuning, YGRPDLY
+-				//	v2.1	change Frame rate(7.5fps) and Total gain to x4
+-				//		(because of reducing visual noise at low illumination)
+-				//		- change BPRM AGC Max and FrameAE start
+-				//		improve AE speed
+-				//	v2.2	modify AWB G gain and solve 50hz flicker detection fail in 25MHz 7.5fps
+-				//	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
+-				//		White Balance B control, Y gain On, Digital Clamp On
+-				//		lower AWB G gain
+-				//	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR Max Thres.
+-				// 	v2.41	Adjust AE/AWB window and AWB internal window boundary to decrease skin color tracking
+-				// 	v2.411	special version for PSCDS
+-				// 	v2.412	RGB shading off
+-				//	v2.5	Lens change STW to Sekonix
+-				//		adjust White point and Y shading Coef (RGB shading off)
+-				//	v2.6	New Tuning because of Full YC off and YCbCr Coef change
+-				//		Gamma, Dark Slice, color matrix (not use), Color suppress
+-				//		R Gain and DBPR agc MIN/MAX
+-				//	v2.61	VCK inversion(data rising)
+-				//***************************************************
+-				///////////////////////////////////////////////////
++/***************************************************
++ *  name: 	S5K3AAEX EVT2 setfile
++ *  ver:		v2.61
++ *  history:
++ *	v0.0	start from 040908 setfile
++ *	v1.0	arange register
++ *	v1.01	change MCLK(25Mhz) and Frame rate(7fps)
++ *	v2.0	adjust register setting for 3AA EVT2
++ *		- color correction, RGB shading off, hsync start position,
++ *		   Mirror, fps
++ *		- Color Tuning, YGRPDLY
++ *	v2.1	change Frame rate(7.5fps) and Total gain to x4
++ *		(because of reducing visual noise at low illumination)
++ *		- change BPRM AGC Max and FrameAE start
++ *		improve AE speed
++ *	v2.2	modify AWB G gain and solve 50hz flicker detection fail in
++ *		25MHz 7.5fps
++ *	v2.3	Adjust gamma, Dark Slice, white point, Hue gain,
++ *		White Balance B control, Y gain On, Digital Clamp On
++ *		lower AWB G gain
++ *	v2.4	Adjust AE window weight, Y Gamma, WhitePoint, Shading and BPR
++ *		Max Thres.
++ * 	v2.41	Adjust AE/AWB window and AWB internal window boundary to
++ *		decrease skin color tracking
++ * 	v2.411	special version for PSCDS
++ * 	v2.412	RGB shading off
++ *	v2.5	Lens change STW to Sekonix
++ *		adjust White point and Y shading Coef (RGB shading off)
++ *	v2.6	New Tuning because of Full YC off and YCbCr Coef change
++ *		Gamma, Dark Slice, color matrix (not use), Color suppress
++ *		R Gain and DBPR agc MIN/MAX
++ *	v2.61	VCK inversion(data rising)
++ ****************************************************/
+ 
+ #if defined(CONFIG_VIDEO_SAMSUNG_S5K4BA)
+ 
+-// For SVGA (800 x 600)
+-#if 1 // from han
++/* For SVGA (800 x 600) */
++#if 1 /* from han */
+ s5k4xa_t s5k4ba_reg[] =
+ {
+ 	{0xfc,0x07},
+-	{0x66,0x01},    // Watch Dog Time On
++	{0x66,0x01},    /* Watch Dog Time On */
+ 	{0xfc,0x00},
+-	{0x00,0xAA},	// For EDS Check
+-	{0x21,0x03},	// peter0223 Ãß°¡
++	{0x00,0xAA},	/* For EDS Check */
++	{0x21,0x03},	/* peter */
+ 	{0xfc,0x01},
+-	{0x04,0x01},	// ARM Clock Divider
++	{0x04,0x01},	/* ARM Clock Divider */
+ 
+ 	{0xfc,0x02},
+-	{0x30,0x90},	// Analog offset
+-	{0x37,0x0d}, 	// Global Gain
+-	{0x2d,0x48},	// Double Shutter
+-	{0x60,0x00},	// Blank_Adrs
++	{0x30,0x90},	/* Analog offset */
++	{0x37,0x0d}, 	/* Global Gain */
++	{0x2d,0x48},	/* Double Shutter */
++	{0x60,0x00},	/* Blank_Adrs */
+ 
+-	{0x45,0x1e},	//0e// CDS Timing for Average Sub_Sampling
++	{0x45,0x1e},	/* 0e -  CDS Timing for Average Sub_Sampling */
+ 	{0x47,0x2f},
+-	{0x02,0x0e},	// ADC Resolution
+-	{0x3d,0x06},	// Frame ADLC
+-	{0x4d,0x08},	// Doubler Volatage
+-	{0x54,0x02},	// Double Shutter
+-	{0x55,0x1e},	// Line ADLC
+-	{0x56,0x30},	//
+-	{0x59,0x00},	// LineADLC offset
+-	{0x5b,0x08},	// R_Ref_Ctrl
+-	{0x44,0x63},	// CLP_EN
+-	{0x4A,0x10},	// Clamp Control
+-	{0x42,0x02},	//
+-	{0x43,0xef},	//
++	{0x02,0x0e},	/* ADC Resolution */
++	{0x3d,0x06},	/* Frame ADLC */
++	{0x4d,0x08},	/* Doubler Volatage */
++	{0x54,0x02},	/* Double Shutter */
++	{0x55,0x1e},	/* Line ADLC */
++	{0x56,0x30},
++	{0x59,0x00},	/* LineADLC offset */
++	{0x5b,0x08},	/* R_Ref_Ctrl */
++	{0x44,0x63},	/* CLP_EN */
++	{0x4A,0x10},	/* Clamp Control */
++	{0x42,0x02},
++	{0x43,0xef},
++
++	/*
++	 * Table Set for Sub-Sampling
++	 */
+ 
+-	//==========================================================
+-	//	Table Set for Sub-Sampling
+-	//==========================================================
+ 	{0xfc,0x03},
+-	{0x2c,0x00},	// crcb_sel for Sub-Sampling Table
+-	{0x05,0x46},	// Output Image Size Set for Capture
++	{0x2c,0x00},	/* crcb_sel for Sub-Sampling Table */
++	{0x05,0x46},	/* Output Image Size Set for Capture */
+ 	{0x07,0xb6},
+ 	{0x0e,0x04},
+ 	{0x12,0x03},
+@@ -122,12 +127,12 @@
+ 	{0x33,0xbc},
+ 
+ 	{0xfc,0x04},
+-	{0xc5,0x26},	// Output Image Size Set for Preview
++	{0xc5,0x26},	/* Output Image Size Set for Preview */
+ 	{0xc7,0x5e},
+ 	{0xce,0x04},
+ 	{0xd2,0x04},
+ 
+-	{0xec,0x06},	//CrCb sel = YCBYCR(0x06) by jsgood
++	{0xec,0x06},	/* CrCb sel = YCBYCR(0x06) by jsgood */
+ 	{0xc0,0x06},
+ 	{0xc1,0x70},
+ 	{0xc2,0x02},
+@@ -148,7 +153,7 @@
+ 	{0xfc,0x00},
+ 	{0x70,0x02},
+ 
+-	// Jeongyun added still shot cbcr_sel
++	/* Jeongyun added still shot cbcr_sel */
+ 	{0xfc,0x03},
+ 	{0x2c,0x00},
+ 	{0x5c,0x00},
+@@ -157,87 +162,88 @@
+ 	{0xfc,0x04},
+ 	{0x5c,0x00},
+ 
++	/*
++	 * COMMAND SET
++	 */
+ 
+-	//==========================================================
+-	//	COMMAND SET
+-	//==========================================================
+ 	{0xfc,0x00},
+-	{0x73,0x21},	// Frmae AE Enable peter
+-	{0x20,0x02},	// Change AWB Mode
++	{0x73,0x21},	/* Frame AE Enable peter */
++	{0x20,0x02},	/* Change AWB Mode */
+ 
+ 	{0xfc,0x00},
+-	{0x6c,0xb0},	// AE target
++	{0x6c,0xb0},	/* AE target */
+ 	{0x6d,0x00},
+ 
+ 	{0xfc,0x20},
+-	{0x16,0x5a},	// for Prevating AE Hunting
++	{0x16,0x5a},	/* for Prevating AE Hunting */
+ 
+ 	{0xfc,0x00},
+-	{0x78,0x6a},	// AGC Max
++	{0x78,0x6a},	/* AGC Max */
+ 	{0xfc,0x20},
+-	{0x16,0x60},	// Frame AE Start
++	{0x16,0x60},	/* Frame AE Start */
+ 
+ 	{0xfc,0x20},
+-	{0x57,0x18},	// Stable_Frame_AE
+-	{0x2C,0x30},	// For Forbidden Area
+-	{0x2E,0x00},	// For Forbidden Area
++	{0x57,0x18},	/* Stable_Frame_AE */
++	{0x2C,0x30},	/* For Forbidden Area */
++	{0x2E,0x00},	/* For Forbidden Area */
+ 	{0x14,0x70},
+-	{0x01,0x00},	// Stepless_Off
++	{0x01,0x00},	/* Stepless_Off */
+ 
+ 	{0xfc,0x07},
+-	{0x11,0x02},	// AWB G Gain offset
++	{0x11,0x02},	/* AWB G Gain offset */
+ 
+ 	{0xfc,0x07},
+-	{0x3e,0x0a},	// AWB Cut R max
++	{0x3e,0x0a},	/* AWB Cut R max */
+ 
+ 	{0xfc,0x01},
+-	{0xc8,0xd0},	// AWB Y Max e0  Y°ªÀÌ ¾î´À ÀÌ»óÀ϶§ ±× ÀÌ»ó°ªÀ» ©¶ó³»´Â ¼¼Æðª
++	{0xc8,0xd0},	/* AWB Y Max */
+ 	{0xfc,0x00},
+-	{0x3e,0x20},	//30 AWB Y_min
+-	{0x3d,0x10},	// AWB Y_min Low
++	{0x3e,0x20},	/* 30 - AWB Y_min */
++	{0x3d,0x10},	/* AWB Y_min Low */
+ 	{0xfc,0x22},
+-	{0x8c,0x04},	// AWB Min Y Weight AWB ÇÒ¶§ Y½ÅÈ£¸¦ ±âÁØÀ¸·Î Çϴµ¥ °¡ÁßÄ¡¸¦ ¹Ù²Ù´Â °Í.
+-	{0x8d,0x16},	// AWB Max Y Weight
++	{0x8c,0x04},	/* AWB Min Y Weight AWB */
++	{0x8d,0x16},	/* AWB Max Y Weight */
+ 
+ 	{0xfc,0x00},
+-	{0x32,0x04},	// AWB moving average 8 frame
+-	{0x81,0x10},	// AWB G gain suppress Disable
++	{0x32,0x04},	/* AWB moving average 8 frame */
++	{0x81,0x10},	/* AWB G gain suppress Disable */
+ 	{0xbc,0xf0},
+ 
+-	{0x29,0x04},	// Y level H
+-	{0x2a,0x00},	// Y level L
+-	{0x2b,0x03},	// color level H
+-	{0x2c,0xc8},	// color level L
++	{0x29,0x04},	/* Y level H */
++	{0x2a,0x00},	/* Y level L */
++	{0x2b,0x03},	/* color level H */
++	{0x2c,0xc8},	/* color level L */
+ 
+ 	{0xfc,0x07},
+-	{0x37,0x00},	// Flicker Add for 32Mhz
++	{0x37,0x00},	/* Flicker Add for 32 MHz */
+ 	{0xfc,0x00},
+-	{0x72,0xa0},	// Flicker for 32MHz
+-	{0x74,0x08},	// flicker 60Hz Fix
++	{0x72,0xa0},	/* Flicker for 32 MHz */
++	{0x74,0x08},	/* flicker 60 Hz Fix */
+ 
+ 	{0xfc,0x20},
+-	{0x02,0x02},	// Flicker Dgain Mode
++	{0x02,0x02},	/* Flicker Dgain Mode */
+ 
+ 	{0xfc,0x00},
+-	//{0x23,0x40},  // Mirror Option
+-	{0x62,0x0a},	// Mirror Option
++	//{0x23,0x40},  /* Mirror Option */
++	{0x62,0x0a},	/* Mirror Option */
+ 
+ 	{0xfc,0x02},
+-	{0x4e,0x1b},	// Enable SDA and SCL pull-up; drive 8 mA
+-	{0x4f,0xf0},	// PCLK and YC: 8 mA, AF and ZM (AZ): 2 mA
++	{0x4e,0x1b},	/* Enable SDA and SCL pull-up; drive 8 mA */
++	{0x4f,0xf0},	/* PCLK and YC: 8 mA, AF and ZM (AZ): 2 mA */
+ 
+ 	{0xfc,0x01},
+-	{0x0c,0x03},	// Full YC Enable
+-	//{0x0c,03},	// Full YC Enable
+-	//{0x02,02},	// crcb_sel
+-	//{0x02,02},	// crcb_sel  peter0222 Ãß°¡
+-	//{0x01,01},	// pclk      peter0222 Ãß°¡
++	{0x0c,0x03},	/* Full YC Enable */
++	//{0x0c,03},	/* Full YC Enable */
++	//{0x02,02},	/* crcb_sel */
++	//{0x02,02},	/* crcb_sel  peter */
++	//{0x01,01},	/* pclk      peter */
+ 	//{0x01,01},
+ 
+-	//==========================================================
+-	//	COLOR MATRIX
+-	//==========================================================
+-	{0xfc,0x01},	// color matrix
++	/*
++	 * COLOR MATRIX
++	 */
++
++	{0xfc,0x01},	/* color matrix */
+ 	{0x51,0x0A},
+ 	{0x52,0x42},
+ 	{0x53,0xF9},
+@@ -259,40 +265,42 @@
+ 	{0x61,0x07},
+ 	{0x62,0xFA},
+ 
+-	//==========================================================
+-	//	EDGE ENHANCEMENT
+-	//==========================================================
++	/*
++	 * EDGE ENHANCEMENT
++	 */
++
+ 	{0xfc,0x00},
+-	{0x89,0x03},	// Edge Suppress On
++	{0x89,0x03},	/* Edge Suppress On */
+ 	{0xfc,0x0b},
+-	{0x42,0x50},	// Edge AGC MIN
+-	{0x43,0x60},	// Edge AGC MAX
+-	{0x45,0x18},	// positive gain AGC MIN
+-	{0x49,0x0a},	// positive gain AGC MAX
+-	{0x4d,0x18},	// negative gain AGC MIN
+-	{0x51,0x0a},	// negative gain AGC MAX
++	{0x42,0x50},	/* Edge AGC MIN */
++	{0x43,0x60},	/* Edge AGC MAX */
++	{0x45,0x18},	/* positive gain AGC MIN */
++	{0x49,0x0a},	/* positive gain AGC MAX */
++	{0x4d,0x18},	/* negative gain AGC MIN */
++	{0x51,0x0a},	/* negative gain AGC MAX */
+ 
+ 	{0xfc,0x05},
+-	{0x34,0x20},	// APTCLP
+-	{0x35,0x09},	// APTSC
+-	{0x36,0x0b},	// ENHANCE
+-	{0x3f,0x00},	// NON-LIN
+-	{0x42,0x10},	// EGFALL
+-	{0x43,0x00},	// HLFALL
+-	{0x45,0xa0},	// EGREF
+-	{0x46,0x7a},	// HLREF
+-	{0x47,0x40},	// LLREF
++	{0x34,0x20},	/* APTCLP */
++	{0x35,0x09},	/* APTSC */
++	{0x36,0x0b},	/* ENHANCE */
++	{0x3f,0x00},	/* NON-LIN */
++	{0x42,0x10},	/* EGFALL */
++	{0x43,0x00},	/* HLFALL */
++	{0x45,0xa0},	/* EGREF */
++	{0x46,0x7a},	/* HLREF */
++	{0x47,0x40},	/* LLREF */
+ 	{0x48,0x0c},
+-	{0x49,0x31},	// CSSEL  EGSEL  CS_DLY
++	{0x49,0x31},	/* CSSEL  EGSEL  CS_DLY */
+ 
+-	{0x40,0x41},	// Y delay
++	{0x40,0x41},	/* Y delay */
++
++	/*
++	 * GAMMA
++	 */
+ 
+-	//==========================================================
+-	//	GAMMA
+-	//==========================================================                                                                                                                                         -
+ 	{0xfc,0x01},
+ 
+-	{0x6F,0x0A},	// R
++	{0x6F,0x0A},	/* R */
+ 	{0x70,0x1A},
+ 	{0x71,0x7A},
+ 	{0x72,0xF8},
+@@ -321,7 +329,7 @@
+ 	{0x85,0xDA},
+ 	{0x86,0xFC},
+ 
+-	{0x87,0x08},	//G
++	{0x87,0x08},	/* G */
+ 	{0x88,0x12},
+ 	{0x89,0x42},
+ 	{0x8A,0xBA},
+@@ -350,7 +358,7 @@
+ 	{0x9D,0xD5},
+ 	{0x9E,0xFC},
+ 
+-	{0x9F,0x05},	//B
++	{0x9F,0x05},	/* B */
+ 	{0xA0,0x18},
+ 	{0xA1,0x42},
+ 	{0xA2,0xd7},
+@@ -379,11 +387,12 @@
+ 	{0xB5,0xDA},
+ 	{0xB6,0xFC},
+ 
+-	//==========================================================
+-	//	HUE CONTROL
+-	//==========================================================
++	/*
++	 * HUE CONTROL
++	 */
++
+ 	{0xfc,0x00},
+-	{0x48,0x34},	// 2000K
++	{0x48,0x34},	/* 2000K */
+ 	{0x49,0x34},
+ 	{0x4a,0xf4},
+ 	{0x4b,0x00},
+@@ -392,7 +401,7 @@
+ 	{0x4e,0xf0},
+ 	{0x4f,0x0c},
+ 
+-	{0x50,0x34},	// 3000K
++	{0x50,0x34},	/* 3000K */
+ 	{0x51,0x34},
+ 	{0x52,0xf4},
+ 	{0x53,0x00},
+@@ -401,7 +410,7 @@
+ 	{0x56,0xf0},
+ 	{0x57,0x0c},
+ 
+-	{0x58,0x34},	// 5100K
++	{0x58,0x34},	/* 5100K */
+ 	{0x59,0x30},
+ 	{0x5a,0x00},
+ 	{0x5b,0x04},
+@@ -409,117 +418,125 @@
+ 	{0x5d,0x2c},
+ 	{0x5e,0xfc},
+ 	{0x5f,0x04},
+-	//==========================================================
+-	//	UPPRE0x0x FUNCTION
+-	//==========================================================
++
++	/*
++	 * UPPRE0x0x FUNCTION
++	 */
++
+ 	{0xfc,0x00},
+ 	{0x7e,0xf4},
+ 
+-	//==========================================================
+-	//	BPR
+-	//==========================================================
++	/*
++	 * BPR
++	 */
++
+ 	{0xfc,0x01},
+ 	{0x3d,0x10},
+ 
+ 	{0xfc,0x0b},
+-	{0x0b,0x00},	// ISP BPR On start
+-	{0x0c,0x20},	// Th13 AGC Min
+-	{0x0d,0x40},	// Th13 AGC Max
+-	{0x0e,0x00},	// Th1 Max H for AGCMIN
+-	{0x0f,0x20},	// Th1 Max L for AGCMIN
+-	{0x10,0x00},	// Th1 Min H for AGCMAX
+-	{0x11,0x10},	// Th1 Min L for AGCMAX
+-	{0x12,0x00},	// Th3 Max H for AGCMIN
+-	{0x13,0x00},	// Th3 Max L for AGCMIN
+-	{0x14,0xff},	// Th3 Min H for AGCMAX
+-	{0x15,0xff},	// Th3 Min L for AGCMAX
+-	{0x16,0x20},	// Th57 AGC Min
+-	{0x17,0x40},	// Th57 AGC Max
+-	{0x18,0x00},	// Th5 Max H for AGCMIN
+-	{0x19,0x00},	// Th5 Max L for AGCMIN
+-	{0x1a,0x00},	// Th5 Min H for AGCMAX
+-	{0x1b,0x20},	// Th5 Min L for AGCMAX
+-	{0x1c,0x00},	// Th7 Max H for AGCMIN
+-	{0x1d,0x00},	// Th7 Max L for AGCMIN
+-	{0x1e,0x00},	// Th7 Min H for AGCMAX
+-	{0x1f,0x20},	// Th7 Min L for AGCMAX
++	{0x0b,0x00},	/* ISP BPR On start */
++	{0x0c,0x20},	/* Th13 AGC Min */
++	{0x0d,0x40},	/* Th13 AGC Max */
++	{0x0e,0x00},	/* Th1 Max H for AGCMIN */
++	{0x0f,0x20},	/* Th1 Max L for AGCMIN */
++	{0x10,0x00},	/* Th1 Min H for AGCMAX */
++	{0x11,0x10},	/* Th1 Min L for AGCMAX */
++	{0x12,0x00},	/* Th3 Max H for AGCMIN */
++	{0x13,0x00},	/* Th3 Max L for AGCMIN */
++	{0x14,0xff},	/* Th3 Min H for AGCMAX */
++	{0x15,0xff},	/* Th3 Min L for AGCMAX */
++	{0x16,0x20},	/* Th57 AGC Min */
++	{0x17,0x40},	/* Th57 AGC Max */
++	{0x18,0x00},	/* Th5 Max H for AGCMIN */
++	{0x19,0x00},	/* Th5 Max L for AGCMIN */
++	{0x1a,0x00},	/* Th5 Min H for AGCMAX */
++	{0x1b,0x20},	/* Th5 Min L for AGCMAX */
++	{0x1c,0x00},	/* Th7 Max H for AGCMIN */
++	{0x1d,0x00},	/* Th7 Max L for AGCMIN */
++	{0x1e,0x00},	/* Th7 Min H for AGCMAX */
++	{0x1f,0x20},	/* Th7 Min L for AGCMAX */
++
++	/*
++	 * GR/GB CORRECTION
++	 */
+ 
+-	//==========================================================
+-	//	GR/GB CORRECTION
+-	//==========================================================
+ 	{0xfc,0x01},
+ 	{0x45,0x0c},
+ 
+ 	{0xfc,0x0b},
+-	{0x21,0x00},	// start AGC
+-	{0x22,0x18},	// AGCMIN
+-	{0x23,0x58},	// AGCMAX
+-	{0x24,0x0d}, 	// G Th AGCMIN
+-	{0x25,0x30}, 	// G Th AGCMAX
+-	{0x26,0x0d}, 	// RB Th AGCMIN
+-	{0x27,0x30}, 	// RB Th AGCMAX
++	{0x21,0x00},	/* start AGC */
++	{0x22,0x18},	/* AGCMIN */
++	{0x23,0x58},	/* AGCMAX */
++	{0x24,0x0d}, 	/* G Th AGCMIN */
++	{0x25,0x30}, 	/* G Th AGCMAX */
++	{0x26,0x0d}, 	/* RB Th AGCMIN */
++	{0x27,0x30}, 	/* RB Th AGCMAX */
++
++	/*
++	 * NR
++	 */
+ 
+-	//==========================================================
+-	//	NR
+-	//==========================================================
+ 	{0xfc,0x01},
+-	{0x4C,0x01},	// NR Enable
+-	{0x49,0x15},	// Sig_Th Mult
+-	{0x4B,0x0A},	// Pre_Th Mult
++	{0x4C,0x01},	/* NR Enable */
++	{0x49,0x15},	/* Sig_Th Mult */
++	{0x4B,0x0A},	/* Pre_Th Mult */
+ 
+ 	{0xfc,0x0b},
+-	{0x28,0x00},	// NR start AGC
+-	{0x29,0x00},	// SIG Th AGCMIN H
+-	{0x2a,0x14},	// SIG Th AGCMIN L
+-	{0x2b,0x00},	// SIG Th AGCMAX H
+-	{0x2c,0x14},	// SIG Th AGCMAX L
+-	{0x2d,0x00},	// PRE Th AGCMIN H
+-	{0x2e,0x90},	// PRE Th AGCMIN L
+-	{0x2f,0x01},	// PRE Th AGCMAX H
+-	{0x30,0x00},	// PRE Th AGCMAX L
+-	{0x31,0x00},	// POST Th AGCMIN H
+-	{0x32,0xa0},	// POST Th AGCMIN L
+-	{0x33,0x01},	// POST Th AGCMAX H
+-	{0x34,0x10},	// POST Th AGCMAX L
++	{0x28,0x00},	/* NR start AGC */
++	{0x29,0x00},	/* SIG Th AGCMIN H */
++	{0x2a,0x14},	/* SIG Th AGCMIN L */
++	{0x2b,0x00},	/* SIG Th AGCMAX H */
++	{0x2c,0x14},	/* SIG Th AGCMAX L */
++	{0x2d,0x00},	/* PRE Th AGCMIN H */
++	{0x2e,0x90},	/* PRE Th AGCMIN L */
++	{0x2f,0x01},	/* PRE Th AGCMAX H */
++	{0x30,0x00},	/* PRE Th AGCMAX L */
++	{0x31,0x00},	/* POST Th AGCMIN H */
++	{0x32,0xa0},	/* POST Th AGCMIN L */
++	{0x33,0x01},	/* POST Th AGCMAX H */
++	{0x34,0x10},	/* POST Th AGCMAX L */
++
++	/*
++	 * 1D-Y/C-SIGMA-LPF
++	 */
+ 
+-	//==========================================================
+-	//	1D-Y/C-SIGMA-LPF
+-	//==========================================================
+ 	{0xfc,0x01},
+ 	{0x05,0xc0},
+ 
+ 	{0xfc,0x0b},
+-	{0x35,0x00},	// YLPF start AGC
+-	{0x36,0x40},	// YLPF01 AGCMIN
+-	{0x37,0x60},	// YLPF01 AGCMAX
+-	{0x38,0x00},	// YLPF SIG01 Th AGCMINH
+-	{0x39,0x18},	// YLPF SIG01 Th AGCMINL
+-	{0x3a,0x00},	// YLPF SIG01 Th AGCMAXH
+-	{0x3b,0x40},	// YLPF SIG01 Th AGCMAXH
+-	{0x3c,0x50},	// YLPF02 AGCMIN
+-	{0x3d,0x60},	// YLPF02 AGCMAX
+-	{0x3e,0x00},	// YLPF SIG02 Th AGCMINH
+-	{0x3f,0x30},	// YLPF SIG02 Th AGCMINL
+-	{0x40,0x00},	// YLPF SIG02 Th AGCMAXH
+-	{0x41,0x40},	// YLPF SIG02 Th AGCMAXH
+-	{0xd4,0x40},	// CLPF AGCMIN
+-	{0xd5,0x60},	// CLPF AGCMAX
+-	{0xd6,0xb0},	// CLPF SIG01 Th AGCMIN
+-	{0xd7,0xf0},	// CLPF SIG01 Th AGCMAX
+-	{0xd8,0xb0},	// CLPF SIG02 Th AGCMIN
+-	{0xd9,0xf0},	// CLPF SIG02 Th AGCMAX
++	{0x35,0x00},	/* YLPF start AGC */
++	{0x36,0x40},	/* YLPF01 AGCMIN */
++	{0x37,0x60},	/* YLPF01 AGCMAX */
++	{0x38,0x00},	/* YLPF SIG01 Th AGCMINH */
++	{0x39,0x18},	/* YLPF SIG01 Th AGCMINL */
++	{0x3a,0x00},	/* YLPF SIG01 Th AGCMAXH */
++	{0x3b,0x40},	/* YLPF SIG01 Th AGCMAXH */
++	{0x3c,0x50},	/* YLPF02 AGCMIN */
++	{0x3d,0x60},	/* YLPF02 AGCMAX */
++	{0x3e,0x00},	/* YLPF SIG02 Th AGCMINH */
++	{0x3f,0x30},	/* YLPF SIG02 Th AGCMINL */
++	{0x40,0x00},	/* YLPF SIG02 Th AGCMAXH */
++	{0x41,0x40},	/* YLPF SIG02 Th AGCMAXH */
++	{0xd4,0x40},	/* CLPF AGCMIN */
++	{0xd5,0x60},	/* CLPF AGCMAX */
++	{0xd6,0xb0},	/* CLPF SIG01 Th AGCMIN */
++	{0xd7,0xf0},	/* CLPF SIG01 Th AGCMAX */
++	{0xd8,0xb0},	/* CLPF SIG02 Th AGCMIN */
++	{0xd9,0xf0},	/* CLPF SIG02 Th AGCMAX */
++
++	/*
++	 * COLOR SUPPRESS
++	 */
+ 
+-	//==========================================================
+-	//	COLOR SUPPRESS
+-	//==========================================================
+ 	{0xfc,0x0b},
+-	{0x08,0x58},	// Color suppress AGC MIN
+-	{0x09,0x03},	// Color suppress MIN H
+-	{0x0a,0x80},	// Color suppress MIN L
++	{0x08,0x58},	/* Color suppress AGC MIN */
++	{0x09,0x03},	/* Color suppress MIN H */
++	{0x0a,0x80},	/* Color suppress MIN L */
++
++	/*
++	 * SHADING
++	 */
+ 
+-	//==========================================================
+-	//	SHADING
+-	//==========================================================
+ 	{0xfc,0x09},
+ 	 //Shading file for 3BAFX
+ 	//s90000// shading off
+@@ -734,7 +751,7 @@
+ 	{0xCC,0x11},
+ 	{0xCD,0xCC},
+ 
+-	{0x00,0x02},  // {0xhading on
++	{0x00,0x02},  // Shading on
+ 
+ 	//==========================================================
+ 	//	X-SHADING
+@@ -1096,7 +1113,7 @@
+ 	{0x35,0xb0},
+ 
+ 	{0xfc,0x00},
+-	{0x73,0x21},	// Frmae AE Enable}, peter0223 À§Ä¡ º¯°æ
++	{0x73,0x21},	// Frame AE Enable, peter
+ 
+ 	{0xfc,0x04},
+ 	{0xc0,0x06},
+@@ -1354,9 +1371,10 @@
+ 
+ 	{0x85, 0x01},
+ 
+-//==========================================================
+-//	GAMMA
+-//==========================================================
++/*
++ * GAMMA
++ */
++
+ 	{0xfc, 0x1d},
+ 	{0x00, 0x0b},
+ 	{0x01, 0x18},
+@@ -1488,11 +1506,12 @@
+ 	{0x7f, 0xf5},
+ 	{0x80, 0xf0},
+ 
+-//==========================================================
+-//	HUE CONTROL
+-//==========================================================
++/*
++ * HUE CONTROL
++ */
++
+ 	{0xfc, 0x00},
+-	{0x48, 0x40},// 2000K
++	{0x48, 0x40},		/* 2000K */
+ 	{0x49, 0x30},
+ 	{0x4a, 0x00},
+ 	{0x4b, 0x00},
+@@ -1501,7 +1520,7 @@
+ 	{0x4e, 0x00},
+ 	{0x4f, 0x00},
+ 
+-	{0x50, 0x40},// 3000K
++	{0x50, 0x40},		/* 3000K */
+ 	{0x51, 0x30},
+ 	{0x52, 0x00},
+ 	{0x53, 0x00},
+@@ -1510,24 +1529,26 @@
+ 	{0x56, 0x00},
+ 	{0x57, 0x00},
+ 
+-	{0x58, 0x3c},//40	              // 5100K
+-	{0x59, 0x30},//4a                   //40
+-	{0x5a, 0x00},//0c                   //00
+-	{0x5b, 0x00},//00
+-	{0x5c, 0x30},//4a
+-	{0x5d, 0x38},//40
+-	{0x5e, 0x00},//f6                   //15
+-	{0x5f, 0xfc},//00
++	{0x58, 0x3c},		/* 40 - 5100K */
++	{0x59, 0x30},		/* 4a, 40 */
++	{0x5a, 0x00},		/* 0c, 00 */
++	{0x5b, 0x00},		/* 00 */
++	{0x5c, 0x30},		/* 4a */
++	{0x5d, 0x38},		/* 40 */
++	{0x5e, 0x00},		/* f6, 15 */
++	{0x5f, 0xfc},		/* 00 */
++
++/*
++ * SUPPRESS FUNCTION
++ */
+ 
+-//==========================================================
+-//	SUPPRESS FUNCTION
+-//==========================================================
+ 	{0xfc, 0x00},
+ 	{0x7e, 0xf4},
+ 
+-//==========================================================
+-//	BPR
+-//==========================================================
++/*
++ * BPR
++ */
++
+ 	{0xfc, 0x0b},
+ 	{0x3d, 0x10},
+ 
+@@ -1554,9 +1575,10 @@
+ 	{0x1e, 0x00},
+ 	{0x1f, 0x20},
+ 
+-//==========================================================
+-//	GR/GB CORRECTION
+-//==========================================================
++/*
++ * GR/GB CORRECTION
++ */
++
+ 	{0xfc, 0x01},
+ 	{0x45, 0x0c},
+ 	{0xfc, 0x0b},
+@@ -1568,9 +1590,10 @@
+ 	{0x26, 0x0d},
+ 	{0x27, 0x20},
+ 
+-//==========================================================
+-//	NR
+-//==========================================================
++/*
++ * NR
++ */
++
+ 	{0xfc, 0x01},
+ 	{0x4c, 0x01},
+ 	{0x49, 0x15},
+@@ -1591,9 +1614,10 @@
+ 	{0x33, 0x00},
+ 	{0x34, 0xe0},
+ 
+-//==========================================================
+-//	1D-Y/C-SIGMA-LPF
+-//==========================================================
++/*
++ * 1D-Y/C-SIGMA-LPF
++ */
++
+ 	{0xfc, 0x01},
+ 	{0x05, 0xC0},
+ 
+@@ -1618,17 +1642,19 @@
+ 	{0xd8, 0xb0},
+ 	{0xd9, 0xf0},
+ 
+-//==========================================================
+-//	COLOR SUPPRESS
+-//==========================================================
++/*
++ * COLOR SUPPRESS
++ */
++
+ 	{0xfc, 0x0b},
+ 	{0x08, 0x58},
+ 	{0x09, 0x03},
+ 	{0x0a, 0x00},
+ 
+-//==========================================================
+-//	SHADING
+-//==========================================================
++/*
++ * SHADING
++ */
++
+ 	{0xfc, 0x09},
+ 
+ 	{0x01, 0x06},
+@@ -1841,11 +1867,12 @@
+ 	{0xCC, 0x15},
+ 	{0xCD, 0xBA},
+ 
+-	{0x00, 0x02},// shading on
++	{0x00, 0x02},	/* shading on */
++
++/*
++ * X-SHADING
++ */
+ 
+-//==========================================================
+-//	X-SHADING
+-//==========================================================
+ 	{0xfc, 0x1B},
+ 	{0x80, 0x01},
+ 	{0x81, 0x00},
+@@ -1937,9 +1964,10 @@
+ 	{0xfc, 0x1b},
+ 	{0x80, 0x01},
+ 
+-//==========================================================
+-//	AE WINDOW WEIGHT
+-//==========================================================
++/*
++ * AE WINDOW WEIGHT
++ */
++
+ 	{0xfc, 0x00},
+ 	{0x03, 0x4b},
+ 	{0xfc, 0x06},
+@@ -1978,9 +2006,10 @@
+ 	{0x76, 0x33},
+ 	{0x77, 0x33},
+ 
+-//==========================================================
+-//	SAIT AWB
+-//==========================================================
++/*
++ * SAIT AWB
++ */
++
+ 	{0xfc, 0x00},
+ 	{0x7b, 0x00},
+ 
+@@ -2008,9 +2037,10 @@
+ 	{0xfc, 0x07},
+ 	{0x97, 0x00},
+ 
+-//=================================
+-// White Point
+-//=================================
++/*
++ * White Point
++ */
++
+ 	{0xfc, 0x22},
+ 	{0x01, 0xD8},
+ 	{0x03, 0xA1},
+@@ -2027,9 +2057,10 @@
+ 	{0x16, 0x01},
+ 	{0x17, 0x10},
+ 
+-//=================================
+-// Basic Setting
+-//=================================
++/*
++ * Basic Setting
++ */
++
+ 	{0xfc, 0x22},
+ 	{0xA8, 0xFF},
+ 
+@@ -2072,9 +2103,10 @@
+ 	{0xfc, 0x00},
+ 	{0x8a, 0x02},
+ 
+-//=================================
+-// Pixel Filter Setting
+-//=================================
++/*
++ * Pixel Filter Setting
++ */
++
+ 	{0xFC, 0x07},
+ 	{0x95, 0xCF},
+ 
+@@ -2105,11 +2137,11 @@
+ 	{0xea, 0x1c},
+ 	{0xeb, 0x00},
+ 
+-//=================================
+-// Polygon AWB Region Tune
+-//=================================
++/*
++ * Polygon AWB Region Tune
++ */
+ 
+-	// AWB3 - Polygon Region
++	/* AWB3 - Polygon Region */
+ 	{0xfc, 0x22},
+ 	{0x18, 0x00},
+ 	{0x19, 0x4b},
+@@ -2154,15 +2186,17 @@
+ 	{0x40, 0x00},
+ 	{0x41, 0x00},
+ 
+-//=================================
+-// Moving Equation Weight
+-//=================================
++/*
++ * Moving Equation Weight
++ */
++
+ 	{0xfc, 0x22},
+ 	{0x98, 0x07},
+ 
+-//=================================
+-// EIT Threshold
+-//=================================
++/*
++ * EIT Threshold
++ */
++
+ 	{0xfc, 0x22},
+ 	{0xb1, 0x00},
+ 	{0xb2, 0x02},
+@@ -2179,9 +2213,10 @@
+ 	{0xd9, 0x20},
+ 	{0xda, 0x81},
+ 
+-//=================================
+-// Gain Offset
+-//=================================
++/*
++ * Gain Offset
++ */
++
+ 	{0xfc, 0x00},
+ 	{0x79, 0xf8},
+ 	{0x7a, 0x08},
+@@ -2206,9 +2241,10 @@
+ 	{0xde, 0x00},
+ 	{0xf0, 0x6a},
+ 
+-//=================================
+-// Green Stablity Enhance
+-//=================================
++/*
++ * Green Stablity Enhance
++ */
++
+ 	{0xfc, 0x22},
+ 	{0xb9, 0x00},
+ 	{0xba, 0x00},
+@@ -2218,9 +2254,10 @@
+ 	{0xe6, 0xff},
+ 	{0xbd, 0x8c},
+ 
+-//==========================================================
+-//	Special Effect
+-//==========================================================
++/*
++ * Special Effect
++ */
++
+ 	{0xfc, 0x07},
+ 	{0x30, 0xc0},
+ 	{0x31, 0x20},
+@@ -2229,9 +2266,11 @@
+ 	{0x34, 0x00},
+ 	{0x35, 0xb0},
+ #endif
+-//==========================================================
+-//	ETC
+-//==========================================================
++
++/*
++ * ETC
++ */
++
+ 	{0xfc, 0x01},
+ 	{0x01, 0x01},
+ 	{0x00, 0x90},
+@@ -2254,13 +2293,15 @@
+ #endif
+ 
+ 
+-// For VGA ( 640 x 480) on 4BA module
++/* For VGA ( 640 x 480) on 4BA module */
++
+ s5k4xa_t s5k4ba_reg_vga[] =
+ {
+ 	// To do.
+ };
+ 
+-// For SVGA ( 800 x 600) on 4BA module
++/* For SVGA ( 800 x 600) on 4BA module */
++
+ s5k4xa_t s5k4ba_reg_svga[] =
+ {
+ 	{0xfc,0x02},
+@@ -2273,25 +2314,25 @@
+ 	{0x14,0x70},
+ 
+ 	{0xfc,0x00},
+-	{0x03,0x4b},		// AE/AWB On
+-	{0x7e,0xf4},		// Suppress On
+-	{0x89,0x03},		// Edge Suppress On
++	{0x03,0x4b},		/* AE/AWB On */
++	{0x7e,0xf4},		/* Suppress On */
++	{0x89,0x03},		/* Edge Suppress On */
+ 
+ 	{0xfc,0x02},
+-	{0x02,0x0e},//sensor BPRoff
++	{0x02,0x0e},		/* sensor BPRoff */
+ 
+ 	{0xfc,0x20},
+-	{0x16,0x60},		// Frame AE Start
++	{0x16,0x60},		/* Frame AE Start */
+ 
+ 	{0xfc,0x02},
+-	{0x30,0x90},		// Analog offset
+-	{0x37,0x0d},		// Global Gain
+-	{0x60,0x00},		// Blank_Adrs
+-	{0x45,0x0e},		// CDS Timing for Average Sub_Sampling
++	{0x30,0x90},		/* Analog offset */
++	{0x37,0x0d},		/* Global Gain */
++	{0x60,0x00},		/* Blank_Adrs */
++	{0x45,0x0e},		/* CDS Timing for Average Sub_Sampling */
+ 	{0x47,0x2f},
+ 
+ 	{0xfc,0x01},
+-	{0x9F,0x05},		//B
++	{0x9F,0x05},		/* B */
+ 	{0xA0,0x18},
+ 	{0xA1,0x42},
+ 	{0xA2,0xd7},
+@@ -2304,58 +2345,60 @@
+ 	{0xA8,0x6A},
+ 
+ 	{0xfc,0x05},
+-	{0x34,0x20},	// APTCLP
+-	{0x35,0x08},	//9 //APTSC
++	{0x34,0x20},		/* APTCLP */
++	{0x35,0x08},		/* 9 - APTSC */
+ 
+-	{0xfc,0x00},  // flash 0821
+-	{0x32,0x04},  // AWB moving average 8 frame
++	{0xfc,0x00},  		/* flash 0821 */
++	{0x32,0x04},  		/* AWB moving average 8 frame */
+ 
+ 	{0xfc,0x01},
+-	{0x01,0x01}, // Pclk inversion
++	{0x01,0x01}, 		/* Pclk inversion */
+ 
+ 	{0xfc,0x00},
+-	{0x02,0x09},		// 800 x 600
++	{0x02,0x09},		/* 800 x 600 */
+ 
+ 
+-	{0xFF,0xFF} // REGISTER END
++	{0xFF,0xFF} /* REGISTER END */
+ };
+ 
+-// For SXGA (1280 x 1024 = 1.3M) on 4BA module
++/* For SXGA (1280 x 1024 = 1.3M) on 4BA module */
++
+ s5k4xa_t s5k4ba_reg_sxga[] =
+ {
+ 	// To do.
+ };
+ 
+ 
+-// For UXGA (1600 x 1200 = 2M) on 4BA module
++/* For UXGA (1600 x 1200 = 2M) on 4BA module */
++
+ s5k4xa_t s5k4ba_reg_uxga[] =
+ {
+ 	// To do.
+ };
+ 
+ 
+-// For SQVGA on 4BA module
++/* For SQVGA on 4BA module */
++
+ s5k4xa_t s5k4ba_reg_qsvga[] =
+ {
+-	// Pclk inversion
++	/* Pclk inversion */
+ 	{0xfc,0x01},
+ 	{0x01,0x01},
+ 
+-	// To setting CbCr selection on Table 14h
++	/* To setting CbCr selection on Table 14h */
+ 	{0xfc, 0x14},
+ 	{0x5c, 0x00},
+ 
+-	// To load table_11 H4V4
++	/* To load table_11 H4V4 */
+ 	{0xfc, 0x00},
+ 	{0x02, 0x0B}
+ };
+ 
+-#define S5K4BA_INIT_REGS (sizeof(s5k4ba_reg)/sizeof(s5k4ba_reg[0]))
+-#define S5K4BA_UXGA_REGS (sizeof(s5k4ba_reg_uxga)/sizeof(s5k4ba_reg_uxga[0]))
+-#define S5K4BA_SVGA_REGS (sizeof(s5k4ba_reg_svga)/sizeof(s5k4ba_reg_svga[0]))
+-#define S5K4BA_VGA_REGS (sizeof(s5k4ba_reg_vga)/sizeof(s5k4ba_reg_vga[0]))
+-#define S5K4BA_QSVGA_REGS (sizeof(s5k4ba_reg_qsvga)/sizeof(s5k4ba_reg_qsvga[0]))
+-
++#define S5K4BA_INIT_REGS	ARRAY_SIZE(s5k4ba_reg)
++#define S5K4BA_UXGA_REGS	ARRAY_SIZE(s5k4ba_reg_uxga)
++#define S5K4BA_SVGA_REGS	ARRAY_SIZE(s5k4ba_reg_svga)
++#define S5K4BA_VGA_REGS		ARRAY_SIZE(s5k4ba_reg_vga)
++#define S5K4BA_QSVGA_REGS	ARRAY_SIZE(s5k4ba_reg_qsvga)
+ 
+ 
+ #define S5K4BA_RISC_REGS 0xEB
+@@ -2366,5 +2409,4 @@
+ #define S5K4BA_REGS (0x1000)
+ 
+ 
+-
+ #endif

Added: developers/werner/gta03/cam/patches/cleanup-camera-driver.patch
===================================================================
--- developers/werner/gta03/cam/patches/cleanup-camera-driver.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/cleanup-camera-driver.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,1022 @@
+Clean up camera driver
+
+This patch does some light cleanup on the camera driver:
+
+- removed unused return values or unused initializations
+- remove backslashes at regular line ends (Python-style ?)
+- removed redundant casts
+- remove redundant parentheses
+- wrapped long lines
+- general whitespace cleanup
+- fixed broken logic in s3c_camif_v4l2_g_input and s3c_camif_v4l2_g_output
+- let mutex that really really wants to be a semaphore have its way
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/drivers/media/video/s3c_camera_driver.c
+===================================================================
+--- cam.orig/drivers/media/video/s3c_camera_driver.c	2009-03-09 12:02:38.000000000 +0800
++++ cam/drivers/media/video/s3c_camera_driver.c	2009-03-09 13:00:50.000000000 +0800
+@@ -85,7 +85,7 @@
+ {
+ 	int ret = 0;
+ 
+-        if (down_interruptible((struct semaphore *) &cfg->cis->lock))
++	if (down_interruptible(&cfg->cis->lock))
+ 		return -ERESTARTSYS;
+ 
+ 	if (cfg->cis->status & CWANT2START) {
+@@ -93,13 +93,13 @@
+ 		cfg->auto_restart = 1;
+ 		ret = 1;
+ 	} else {
+-	        ret = 0; 		/* There is no codec */
+-		cfg->auto_restart = 0; 	/* Duplicated ..Dummy */
++	        ret = 0;		/* There is no codec */
++		cfg->auto_restart = 0;	/* Duplicated ..Dummy */
+ 	}
+ 
+-	up((struct semaphore *) &cfg->cis->lock);
++	up(&cfg->cis->lock);
+ 
+-        return ret;
++	return ret;
+ }
+ #endif
+ 
+@@ -149,7 +149,8 @@
+ 		break;
+ 	}
+ 
+-	if (fmtptr) *fmtptr = fmt;
++	if (fmtptr)
++		*fmtptr = fmt;
+ 
+ 	return depth;
+ }
+@@ -162,7 +163,8 @@
+ 	cfg->v2.frmbuf.fmt.field = V4L2_FIELD_NONE;
+ 	cfg->v2.frmbuf.fmt.pixelformat = fourcc;
+ 	cfg->v2.frmbuf.fmt.bytesperline = cfg->v2.frmbuf.fmt.width * depth >> 3;
+-	cfg->v2.frmbuf.fmt.sizeimage = cfg->v2.frmbuf.fmt.height * cfg->v2.frmbuf.fmt.bytesperline;
++	cfg->v2.frmbuf.fmt.sizeimage =
++	    cfg->v2.frmbuf.fmt.height * cfg->v2.frmbuf.fmt.bytesperline;
+ 
+ 	return 0;
+ }
+@@ -170,6 +172,7 @@
+ static int s3c_camif_convert_type(camif_cfg_t *cfg, int f)
+ {
+ 	int pixfmt;
++
+ 	cfg->target_x = cfg->v2.frmbuf.fmt.width;
+ 	cfg->target_y = cfg->v2.frmbuf.fmt.height;
+ 
+@@ -193,7 +196,8 @@
+ 
+ 	cfg->status = CAMIF_STARTED;
+ 
+-	if (!(cfg->fsm == CAMIF_SET_LAST_INT || cfg->fsm == CAMIF_CONTINUOUS_INT)) {
++	if (!(cfg->fsm == CAMIF_SET_LAST_INT ||
++	    cfg->fsm == CAMIF_CONTINUOUS_INT)) {
+ 		cfg->fsm = CAMIF_DUMMY_INT;
+ 		cfg->perf.frames = 0;
+ 	}
+@@ -256,7 +260,7 @@
+ #if defined(FSM_ON_PREVIEW)
+ static void s3c_camif_start_preview_with_codec(camif_cfg_t *cfg)
+ {
+-	camif_cfg_t *other = (camif_cfg_t *)cfg->other;
++	camif_cfg_t *other = cfg->other;
+ 
+ 	/* Preview Stop */
+ 	cfg->capture_enable = CAMIF_DMA_OFF;
+@@ -321,28 +325,32 @@
+ 
+ 	switch (res) {
+ 	case SENSOR_SXGA:
+-		printk(KERN_INFO "Resolution changed into SXGA (1280x1024) mode -> 1.3M\n");
++		printk(KERN_INFO
++		    "Resolution changed into SXGA (1280x1024) mode -> 1.3M\n");
+ 		cis->sensor->driver->command(cis->sensor, SENSOR_SXGA, NULL);
+ 		cis->source_x = 1280;
+ 		cis->source_y = 1024;
+ 		break;
+ 
+ 	case SENSOR_UXGA:
+-		printk(KERN_INFO "Resolution changed into UXGA (1600x1200) mode -> 2.0M\n");
++		printk(KERN_INFO
++		    "Resolution changed into UXGA (1600x1200) mode -> 2.0M\n");
+ 		cis->sensor->driver->command(cis->sensor, SENSOR_UXGA, NULL);
+ 		cis->source_x = 1600;
+ 		cis->source_y = 1200;
+ 		break;
+ 
+ 	case SENSOR_SVGA:
+-		printk(KERN_INFO "Resolution changed back to SVGA (800x600) mode\n");
++		printk(KERN_INFO
++		    "Resolution changed back to SVGA (800x600) mode\n");
+ 		cis->sensor->driver->command(cis->sensor, SENSOR_SVGA, NULL);
+ 		cis->source_x = 800;
+ 		cis->source_y = 600;
+ 		break;
+ 
+ 	case SENSOR_VGA:
+-		printk(KERN_INFO "Resolution changed back to VGA (640x480) mode (default)\n");
++		printk(KERN_INFO "Resolution changed back to VGA (640x480) "
++		    "mode (default)\n");
+ 		cis->sensor->driver->command(cis->sensor, SENSOR_VGA, NULL);
+ 		cis->source_x = 640;
+ 		cis->source_y = 480;
+@@ -359,10 +367,12 @@
+ {
+ 	switch (type) {
+ 	case V4L2_CID_ZOOMIN:
+-		if (((cfg->sc.modified_src_x - (cfg->cis->win_hor_ofst + \
+-			ZOOM_AT_A_TIME_IN_PIXELS + cfg->cis->win_hor_ofst2 + \
+-			ZOOM_AT_A_TIME_IN_PIXELS)) / cfg->sc.prehratio) > ZOOM_IN_MAX) {
+-	                printk(KERN_INFO "Invalid Zoom-in: this zoom-in on preview scaler already comes to the maximum\n");
++		if (((cfg->sc.modified_src_x - (cfg->cis->win_hor_ofst +
++		    ZOOM_AT_A_TIME_IN_PIXELS + cfg->cis->win_hor_ofst2 +
++		    ZOOM_AT_A_TIME_IN_PIXELS)) / cfg->sc.prehratio) >
++		    ZOOM_IN_MAX) {
++	                printk(KERN_INFO "Invalid Zoom-in: this zoom-in on "
++			    "preview scaler already comes to the maximum\n");
+ 			return 0;
+ 		}
+ 
+@@ -372,9 +382,9 @@
+ 	case V4L2_CID_ZOOMOUT:
+ 		if (cfg->sc.zoom_in_cnt > 0) {
+ 			cfg->sc.zoom_in_cnt--;
+-			break;
+ 		} else {
+-	                printk(KERN_INFO "Invalid Zoom-out: this zoom-out on preview scaler already comes to the minimum\n");
++	                printk(KERN_INFO "Invalid Zoom-out: this zoom-out on "
++			    "preview scaler already comes to the minimum\n");
+ 			return 0;
+ 		}
+ 
+@@ -403,7 +413,8 @@
+ 	return ret;
+ }
+ 
+-static int s3c_camif_send_sensor_command(camif_cfg_t *cfg, unsigned int cmd, int arg)
++static int s3c_camif_send_sensor_command(camif_cfg_t *cfg, unsigned int cmd,
++    int arg)
+ {
+ 	cfg->cis->sensor->driver->command(cfg->cis->sensor, cmd, (void *) arg);
+ 
+@@ -422,7 +433,8 @@
+ 	sprintf(cap->bus_info, "FIMC AHB Bus");
+ 
+ 	cap->version = 0;
+-	cap->capabilities = V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
++	cap->capabilities = V4L2_CAP_VIDEO_OVERLAY | V4L2_CAP_VIDEO_CAPTURE |
++	    V4L2_CAP_STREAMING;
+ 
+ 	return 0;
+ }
+@@ -463,7 +475,8 @@
+ 	cfg->target_x = fb->fmt.width;
+ 	cfg->target_y = fb->fmt.height;
+ 
+-	depth = s3c_camif_convert_format(fb->fmt.pixelformat, (int *) &(cfg->dst_fmt));
++	depth = s3c_camif_convert_format(fb->fmt.pixelformat,
++	    (int *) &cfg->dst_fmt);
+ 	s3c_camif_set_fb_info(cfg, depth, fb->fmt.pixelformat);
+ 
+ 	return s3c_camif_control_fimc(cfg);
+@@ -471,7 +484,7 @@
+ 
+ static int s3c_camif_v4l2_g_fmt(camif_cfg_t *cfg, void *arg)
+ {
+-	struct v4l2_format *f = (struct v4l2_format *) arg;
++	struct v4l2_format *f = arg;
+ 	int size = sizeof(struct v4l2_pix_format);
+ 	int ret = -1;
+ 
+@@ -491,14 +504,14 @@
+ 
+ static int s3c_camif_v4l2_s_fmt(camif_cfg_t *cfg, void *arg)
+ {
+-	struct v4l2_format *f = (struct v4l2_format *) arg;
++	struct v4l2_format *f = arg;
+ 	int ret = -1;
+ 
+ 	switch (f->type) {
+ 	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
+-		cfg->v2.frmbuf.fmt   = f->fmt.pix;
+-		cfg->v2.status       |= CAMIF_v4L2_DIRTY;
+-		cfg->v2.status      &= ~CAMIF_v4L2_DIRTY; /* dummy ? */
++		cfg->v2.frmbuf.fmt = f->fmt.pix;
++		cfg->v2.status |= CAMIF_v4L2_DIRTY;
++		cfg->v2.status &= ~CAMIF_v4L2_DIRTY; /* dummy ? */
+ 
+ 		s3c_camif_convert_type(cfg, 1);
+ 		s3c_camif_control_fimc(cfg);
+@@ -537,15 +550,12 @@
+ 
+ static int s3c_camif_v4l2_overlay(camif_cfg_t *cfg, void *arg)
+ {
+-	int on = *((int *) arg);
+-	int ret;
++	int on = *(int *) arg;
+ 
+-	if (on != 0)
+-		ret = s3c_camif_start_preview(cfg);
++	if (on)
++		return s3c_camif_start_preview(cfg);
+ 	else
+-		ret = s3c_camif_stop_preview(cfg);
+-
+-	return ret;
++		return s3c_camif_stop_preview(cfg);
+ }
+ 
+ static int s3c_camif_v4l2_g_ctrl(camif_cfg_t *cfg, void *arg)
+@@ -555,7 +565,7 @@
+ 
+ static int s3c_camif_v4l2_s_ctrl(camif_cfg_t *cfg, void *arg)
+ {
+-	struct v4l2_control *ctrl = (struct v4l2_control *) arg;
++	struct v4l2_control *ctrl = arg;
+ 
+ 	switch (ctrl->id) {
+ 		case V4L2_CID_ORIGINAL:
+@@ -601,32 +611,33 @@
+ 			break;
+ 
+ 		case V4L2_CID_ZOOMIN:
+-			if (s3c_camif_check_zoom_range(cfg, ctrl->id)) {
+-				cfg->cis->win_hor_ofst += ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_ver_ofst += ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_hor_ofst2 += ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_ver_ofst2 += ZOOM_AT_A_TIME_IN_PIXELS;
++			if (!s3c_camif_check_zoom_range(cfg, ctrl->id))
++				break;
++			cfg->cis->win_hor_ofst += ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_ver_ofst += ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_hor_ofst2 += ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_ver_ofst2 += ZOOM_AT_A_TIME_IN_PIXELS;
+ 
+-				s3c_camif_restart_preview(cfg);
+-			}
++			s3c_camif_restart_preview(cfg);
+ 
+ 			break;
+ 
+ 		case V4L2_CID_ZOOMOUT:
+-			if (s3c_camif_check_zoom_range(cfg, ctrl->id)) {
+-				cfg->cis->win_hor_ofst -= ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_ver_ofst -= ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_hor_ofst2 -= ZOOM_AT_A_TIME_IN_PIXELS;
+-				cfg->cis->win_ver_ofst2 -= ZOOM_AT_A_TIME_IN_PIXELS;
++			if (!s3c_camif_check_zoom_range(cfg, ctrl->id))
++				break;
++			cfg->cis->win_hor_ofst -= ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_ver_ofst -= ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_hor_ofst2 -= ZOOM_AT_A_TIME_IN_PIXELS;
++			cfg->cis->win_ver_ofst2 -= ZOOM_AT_A_TIME_IN_PIXELS;
+ 
+-				s3c_camif_restart_preview(cfg);
+-			}
++			s3c_camif_restart_preview(cfg);
+ 
+ 			break;
+ 
+ 		case V4L2_CID_CONTRAST:
+ 		case V4L2_CID_AUTO_WHITE_BALANCE:
+-			s3c_camif_send_sensor_command(cfg, SENSOR_WB, ctrl->value);
++			s3c_camif_send_sensor_command(cfg, SENSOR_WB,
++			    ctrl->value);
+ 			break;
+ 
+ 		default:
+@@ -639,29 +650,23 @@
+ 
+ static int s3c_camif_v4l2_streamon(camif_cfg_t *cfg, void *arg)
+ {
+-	int ret = 0;
+-
+-	ret = s3c_camif_start_capture(cfg);
+-
+-	return ret;
++	return s3c_camif_start_capture(cfg);
+ }
+ 
+ static int s3c_camif_v4l2_streamoff(camif_cfg_t *cfg, void *arg)
+ {
+-	int ret = 0;
+-
+ 	cfg->cis->status &= ~C_WORKING;
+ 
+ 	s3c_camif_stop_capture(cfg);
+ 
+-	return ret;
++	return 0;
+ }
+ 
+ static int s3c_camif_v4l2_g_input(camif_cfg_t *cfg, void *arg)
+ {
+-	unsigned int index = *((int *) arg);
++	unsigned int *index = arg;
+ 
+-	index = cfg->v2.input->index;
++	*index = cfg->v2.input->index;
+ 
+ 	return 0;
+ }
+@@ -694,9 +699,9 @@
+ 
+ static int s3c_camif_v4l2_g_output(camif_cfg_t *cfg, void *arg)
+ {
+-	unsigned int index = *((int *) arg);
++	unsigned int *index = arg;
+ 
+-	index = cfg->v2.output->index;
++	*index = cfg->v2.output->index;
+ 
+ 	return 0;
+ }
+@@ -727,7 +732,7 @@
+ {
+ 	struct v4l2_output *i = arg;
+ 
+-	if ((i->index) >= NUMBER_OF_OUTPUTS)
++	if (i->index >= NUMBER_OF_OUTPUTS)
+ 		return -EINVAL;
+ 
+ 	memcpy(i, &fimc_outputs[i->index], sizeof(struct v4l2_output));
+@@ -759,7 +764,8 @@
+ {
+ 	struct v4l2_buffer *buf = arg;
+ 
+-	if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && buf->memory != V4L2_MEMORY_MMAP)
++	if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE &&
++	    buf->memory != V4L2_MEMORY_MMAP)
+ 		return -1;
+ 
+ 	buf->length = cfg->buffer_size;
+@@ -788,11 +794,12 @@
+ static int s3c_camif_v4l2_s_msdma(camif_cfg_t *cfg, void *arg)
+ {
+ 	struct v4l2_msdma_format *f = arg;
+-	int ret = -1;
++	int ret;
+ 
+ 	switch(f->input_path) {
+ 	case V4L2_MSDMA_PREVIEW:
+-		cfg->cis->user--;   /* CIS will be replaced with a CIS for MSDMA */
++		cfg->cis->user--;
++		    /* CIS will be replaced with a CIS for MSDMA */
+ 
+ 		cfg->cis = &msdma_input;
+ 		cfg->cis->user++;
+@@ -800,7 +807,8 @@
+ 		break;
+ 
+ 	case V4L2_MSDMA_CODEC:
+-		cfg->cis->user--;   /* CIS will be replaced with a CIS for MSDMA */
++		cfg->cis->user--;
++		    /* CIS will be replaced with a CIS for MSDMA */
+ 
+ 		cfg->cis = &msdma_input;
+ 		cfg->cis->user++;
+@@ -900,8 +908,10 @@
+ 	cfg->v2.crop_bounds.height = cfg->cis->source_y;
+ 
+ 	/* crop default values */
+-	cfg->v2.crop_defrect.left = (cfg->cis->source_x - CROP_DEFAULT_WIDTH) / 2;
+-	cfg->v2.crop_defrect.top = (cfg->cis->source_y - CROP_DEFAULT_HEIGHT) / 2;
++	cfg->v2.crop_defrect.left =
++	    (cfg->cis->source_x - CROP_DEFAULT_WIDTH) / 2;
++	cfg->v2.crop_defrect.top =
++	    (cfg->cis->source_y - CROP_DEFAULT_HEIGHT) / 2;
+ 	cfg->v2.crop_defrect.width = CROP_DEFAULT_WIDTH;
+ 	cfg->v2.crop_defrect.height = CROP_DEFAULT_HEIGHT;
+ 
+@@ -938,7 +948,7 @@
+ 	if (crop->c.width < 0)
+ 		return -EINVAL;
+ 
+-	if ((crop->c.left + crop->c.width > cfg->cis->source_x) || \
++	if ((crop->c.left + crop->c.width > cfg->cis->source_x) ||
+ 		(crop->c.top + crop->c.height > cfg->cis->source_y))
+ 		return -EINVAL;
+ 
+@@ -979,11 +989,10 @@
+ #if defined(FSM_ON_CODEC) && !defined(USE_LAST_IRQ)
+ int s3c_camif_do_fsm_codec(camif_cfg_t *cfg)
+ {
+-	int ret;
+-
+ 	cfg->perf.frames++;
+ 
+-	if ((cfg->fsm == CAMIF_DUMMY_INT) && (cfg->perf.frames > CAMIF_CAPTURE_SKIP_FRAMES))
++	if (cfg->fsm == CAMIF_DUMMY_INT &&
++	    cfg->perf.frames > CAMIF_CAPTURE_SKIP_FRAMES)
+ 		cfg->fsm = CAMIF_NORMAL_INT;
+ 
+ 	switch (cfg->fsm) {
+@@ -991,41 +1000,35 @@
+ 		DPRINTK(KERN_INFO "CAMIF_DUMMY_INT: %d\n", cfg->perf.frames);
+ 		cfg->status = CAMIF_STARTED;
+ 		cfg->fsm = CAMIF_DUMMY_INT;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	case CAMIF_NORMAL_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_NORMAL_INT: %d\n", cfg->perf.frames);
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		cfg->fsm = CAMIF_CONTINUOUS_INT;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	case CAMIF_CONTINUOUS_INT:
+-		DPRINTK(KERN_INFO "CAMIF_CONTINUOS_INT: %d\n", cfg->perf.frames);
++		DPRINTK(KERN_INFO "CAMIF_CONTINUOS_INT: %d\n",
++		    cfg->perf.frames);
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		cfg->fsm = CAMIF_CONTINUOUS_INT;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	default:
+ 		printk(KERN_INFO "Unexpect INT: %d\n", cfg->fsm);
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 	}
+-
+-	return ret;
+ }
+ #endif
+ 
+ #if defined(FSM_ON_CODEC) && defined(USE_LAST_IRQ)
+ int s3c_camif_do_fsm_codec_lastirq(camif_cfg_t *cfg)
+ {
+-	int ret;
+-
+ 	cfg->perf.frames++;
+ 
+-	if ((cfg->fsm == CAMIF_DUMMY_INT) && (cfg->perf.frames > (CAMIF_CAPTURE_SKIP_FRAMES - 2)))
++	if (cfg->fsm == CAMIF_DUMMY_INT &&
++	    cfg->perf.frames > CAMIF_CAPTURE_SKIP_FRAMES - 2)
+ 		cfg->fsm = CAMIF_SET_LAST_INT;
+ 
+ 	switch (cfg->fsm) {
+@@ -1033,8 +1036,7 @@
+ 		DPRINTK(KERN_INFO "CAMIF_DUMMY_INT: %d\n", cfg->perf.frames);
+ 		cfg->status = CAMIF_STARTED;
+ 		cfg->fsm = CAMIF_DUMMY_INT;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	case CAMIF_SET_LAST_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_SET_LAST_INT: %d\n", cfg->perf.frames);
+@@ -1046,70 +1048,56 @@
+ #endif
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		cfg->fsm = CAMIF_STOP_CAPTURE;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	case CAMIF_STOP_CAPTURE:
+ 		DPRINTK(KERN_INFO "CAMIF_STOP_CAPTURE: %d\n", cfg->perf.frames);
+ 		cfg->capture_enable = CAMIF_DMA_OFF;
+ 		s3c_camif_stop_dma(cfg);
+ 		cfg->fsm = CAMIF_LAST_IRQ;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	case CAMIF_LAST_IRQ:
+ 		DPRINTK(KERN_INFO "CAMIF_LAST_IRQ: %d\n", cfg->perf.frames);
+ 		cfg->fsm = CAMIF_SET_LAST_INT;
+ 		cfg->status = CAMIF_INT_HAPPEN;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	default:
+ 		printk(KERN_INFO "Unexpect INT: %d\n", cfg->fsm);
+-		ret = INSTANT_SKIP;
+-		break;
++		return = INSTANT_SKIP;
+ 	}
+-
+-	return ret;
+ }
+ #endif
+ 
+ #if defined(FSM_ON_PREVIEW)
+ static int s3c_camif_do_lastirq_preview(camif_cfg_t *cfg)
+ {
+-	int ret = 0;
+-
+ 	cfg->perf.frames++;
+ 
+-	if (cfg->fsm == CAMIF_NORMAL_INT) {
++	if (cfg->fsm == CAMIF_NORMAL_INT)
+ 		if (cfg->perf.frames % CHECK_FREQ == 0)
+-			ret = s3c_camif_check_global_status(cfg);
+-	}
+-
+-	if (ret > 0)
+-		cfg->fsm = CAMIF_Xth_INT;
++			if (s3c_camif_check_global_status(cfg) > 0)
++				cfg->fsm = CAMIF_Xth_INT;
+ 
+ 	switch (cfg->fsm) {
+ 	case CAMIF_1st_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_1st_INT INT\n");
+ 		cfg->fsm = CAMIF_NORMAL_INT;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	case CAMIF_NORMAL_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_NORMAL_INT\n");
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		cfg->fsm = CAMIF_NORMAL_INT;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	case CAMIF_Xth_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_Xth_INT\n");
+ 		s3c_camif_enable_lastirq(cfg);
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		cfg->fsm = CAMIF_Yth_INT;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	case CAMIF_Yth_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_Yth_INT\n");
+@@ -1118,30 +1106,24 @@
+ 		cfg->status = CAMIF_INT_HAPPEN;
+ 		s3c_camif_stop_dma(cfg);
+ 		cfg->fsm = CAMIF_Zth_INT;
+-		ret = INSTANT_GO;
+-		break;
++		return INSTANT_GO;
+ 
+ 	case CAMIF_Zth_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_Zth_INT\n");
+ 		cfg->fsm = CAMIF_DUMMY_INT;
+ 		cfg->status = CAMIF_INT_HAPPEN;
+-		ret = INSTANT_GO;
+ 		s3c_camif_auto_restart(cfg);
+-		break;
++		return INSTANT_GO;
+ 
+-        case CAMIF_DUMMY_INT:
++	case CAMIF_DUMMY_INT:
+ 		DPRINTK(KERN_INFO "CAMIF_DUMMY_INT\n");
+ 		cfg->status = CAMIF_STOPPED;
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 
+ 	default:
+ 		printk(KERN_INFO "Unexpected INT %d\n", cfg->fsm);
+-		ret = INSTANT_SKIP;
+-		break;
++		return INSTANT_SKIP;
+ 	}
+-
+-	return ret;
+ }
+ #endif
+ 
+@@ -1199,20 +1181,26 @@
+ 
+ static int s3c_camif_request_irq(camif_cfg_t * cfg)
+ {
+-	int ret = 0;
++	int ret;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		if ((ret = request_irq(cfg->irq, s3c_camif_do_irq_codec, IRQF_SHARED, cfg->shortname, cfg)))
++		ret = request_irq(cfg->irq, s3c_camif_do_irq_codec,
++		    IRQF_SHARED, cfg->shortname, cfg);
++		if (ret)
+ 			printk(KERN_ERR "Request irq (CAM_C) failed\n");
+ 		else
+-			printk(KERN_INFO "Request irq %d for codec\n", cfg->irq);
++			printk(KERN_INFO "Request irq %d for codec\n",
++			    cfg->irq);
+ 	}
+ 
+ 	if (cfg->dma_type & CAMIF_PREVIEW) {
+-		if ((ret = request_irq(cfg->irq, s3c_camif_do_irq_preview, IRQF_SHARED, cfg->shortname, cfg)))
++		ret = request_irq(cfg->irq, s3c_camif_do_irq_preview,
++		    IRQF_SHARED, cfg->shortname, cfg);
++		if (ret)
+ 			printk("Request_irq (CAM_P) failed\n");
+ 		else
+-			printk(KERN_INFO "Request irq %d for preview\n", cfg->irq);
++			printk(KERN_INFO "Request irq %d for preview\n",
++			    cfg->irq);
+ 	}
+ 
+ 	return 0;
+@@ -1224,136 +1212,103 @@
+ long s3c_camif_ioctl(struct file *file, unsigned int cmd, unsigned long _arg)
+ {
+ 	camif_cfg_t *cfg = file->private_data;
+-	int ret = -1;
+ 	void *arg = (void *) _arg; /* @@@ - WA */
+ 
+ 	switch (cmd) {
+-        case VIDIOC_QUERYCAP:
+-		ret = s3c_camif_v4l2_querycap(cfg, arg);
+-		break;
++	case VIDIOC_QUERYCAP:
++		return s3c_camif_v4l2_querycap(cfg, arg);
+ 
+ 	case VIDIOC_G_FBUF:
+-		ret = s3c_camif_v4l2_g_fbuf(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_fbuf(cfg, arg);
+ 
+ 	case VIDIOC_S_FBUF:
+-		ret = s3c_camif_v4l2_s_fbuf(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_fbuf(cfg, arg);
+ 
+ 	case VIDIOC_G_FMT:
+-		ret = s3c_camif_v4l2_g_fmt(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_fmt(cfg, arg);
+ 
+ 	case VIDIOC_S_FMT:
+-		ret = s3c_camif_v4l2_s_fmt(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_fmt(cfg, arg);
+ 
+ 	case VIDIOC_ENUM_FMT:
+-		ret = s3c_camif_v4l2_enum_fmt(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_enum_fmt(cfg, arg);
+ 
+ 	case VIDIOC_OVERLAY:
+-		ret = s3c_camif_v4l2_overlay(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_overlay(cfg, arg);
+ 
+ 	case VIDIOC_S_CTRL:
+-		ret = s3c_camif_v4l2_s_ctrl(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_ctrl(cfg, arg);
+ 
+ 	case VIDIOC_G_CTRL:
+-		ret = s3c_camif_v4l2_g_ctrl(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_ctrl(cfg, arg);
+ 
+ 	case VIDIOC_STREAMON:
+-		ret = s3c_camif_v4l2_streamon(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_streamon(cfg, arg);
+ 
+ 	case VIDIOC_STREAMOFF:
+-		ret = s3c_camif_v4l2_streamoff(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_streamoff(cfg, arg);
+ 
+ 	case VIDIOC_G_INPUT:
+-		ret = s3c_camif_v4l2_g_input(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_input(cfg, arg);
+ 
+ 	case VIDIOC_S_INPUT:
+-		ret = s3c_camif_v4l2_s_input(cfg, *((int *) arg));
+-		break;
++		return s3c_camif_v4l2_s_input(cfg, *((int *) arg));
+ 
+ 	case VIDIOC_G_OUTPUT:
+-		ret = s3c_camif_v4l2_g_output(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_output(cfg, arg);
+ 
+ 	case VIDIOC_S_OUTPUT:
+-		ret = s3c_camif_v4l2_s_output(cfg, *((int *) arg));
+-		break;
++		return s3c_camif_v4l2_s_output(cfg, *((int *) arg));
+ 
+ 	case VIDIOC_ENUMINPUT:
+-		ret = s3c_camif_v4l2_enum_input(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_enum_input(cfg, arg);
+ 
+ 	case VIDIOC_ENUMOUTPUT:
+-		ret = s3c_camif_v4l2_enum_output(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_enum_output(cfg, arg);
+ 
+ 	case VIDIOC_REQBUFS:
+-		ret = s3c_camif_v4l2_reqbufs(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_reqbufs(cfg, arg);
+ 
+ 	case VIDIOC_QUERYBUF:
+-		ret = s3c_camif_v4l2_querybuf(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_querybuf(cfg, arg);
+ 
+ 	case VIDIOC_QBUF:
+-		ret = s3c_camif_v4l2_qbuf(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_qbuf(cfg, arg);
+ 
+ 	case VIDIOC_DQBUF:
+-		ret = s3c_camif_v4l2_dqbuf(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_dqbuf(cfg, arg);
+ 
+ 	case VIDIOC_S_MSDMA:
+-		ret = s3c_camif_v4l2_s_msdma(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_msdma(cfg, arg);
+ 
+ 	case VIDIOC_MSDMA_START:
+-		ret = s3c_camif_v4l2_msdma_start(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_msdma_start(cfg, arg);
+ 
+ 	case VIDIOC_MSDMA_STOP:
+-		ret = s3c_camif_v4l2_msdma_stop(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_msdma_stop(cfg, arg);
+ 
+ 	case VIDIOC_S_CAMERA_START:
+-		ret = s3c_camif_v4l2_camera_start(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_camera_start(cfg, arg);
+ 
+ 	case VIDIOC_S_CAMERA_STOP:
+-		ret = s3c_camif_v4l2_camera_stop(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_camera_stop(cfg, arg);
+ 
+ 	case VIDIOC_CROPCAP:
+-		ret = s3c_camif_v4l2_cropcap(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_cropcap(cfg, arg);
+ 
+ 	case VIDIOC_G_CROP:
+-		ret = s3c_camif_v4l2_g_crop(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_g_crop(cfg, arg);
+ 
+ 	case VIDIOC_S_CROP:
+-		ret = s3c_camif_v4l2_s_crop(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_crop(cfg, arg);
+ 
+ 	case VIDIOC_S_PARM:
+-		ret = s3c_camif_v4l2_s_parm(cfg, arg);
+-		break;
++		return s3c_camif_v4l2_s_parm(cfg, arg);
+ 
+ 	default:	/* For v4l compatability */
+-		ret = v4l_compat_translate_ioctl(file, cmd, arg, s3c_camif_ioctl);
+-		break;
+-	} /* End of Switch  */
+-
+-	return ret;
++		return
++		    v4l_compat_translate_ioctl(file, cmd, arg, s3c_camif_ioctl);
++	}
+ }
+ 
+ /* @@@ - WA */
+@@ -1363,15 +1318,17 @@
+ int s3c_camif_open(struct file *file)
+ {
+ 	int err;
+-	camif_cfg_t *cfg = s3c_camif_get_fimc_object(MINOR(file->f_dentry->d_inode->i_rdev));
++	camif_cfg_t *cfg =
++	    s3c_camif_get_fimc_object(MINOR(file->f_dentry->d_inode->i_rdev));
+ 
+ 	if (!cfg->cis) {
+ 		printk(KERN_ERR "An object for a CIS is missing\n");
+-		printk(KERN_ERR "Using msdma_input as a default CIS data structure\n");
++		printk(KERN_ERR
++		    "Using msdma_input as a default CIS data structure\n");
+ 		cfg->cis = &msdma_input;
+ 
+ 		/* global lock for both Codec and Preview */
+-		sema_init((struct semaphore *) &cfg->cis->lock, 1);
++		sema_init(&cfg->cis->lock, 1);
+ 		cfg->cis->status |= P_NOT_WORKING;
+ 	}
+ 
+@@ -1379,7 +1336,7 @@
+ 		if (cfg->dma_type & CAMIF_PREVIEW)
+ 			cfg->cis->status &= ~P_NOT_WORKING;
+ 
+-		up((struct semaphore *) &cfg->cis->lock);
++		up(&cfg->cis->lock);
+ 	}
+ 
+ 	err = s3c_camif_exclusive_open(inode, file);
+@@ -1403,13 +1360,14 @@
+ 
+ int s3c_camif_release(struct file *file)
+ {
+-	camif_cfg_t *cfg = s3c_camif_get_fimc_object(MINOR(file->f_dentry->d_inode->i_rdev));
++	camif_cfg_t *cfg =
++	    s3c_camif_get_fimc_object(MINOR(file->f_dentry->d_inode->i_rdev));
+ 
+ 	if (cfg->dma_type & CAMIF_PREVIEW) {
+ 		cfg->cis->status &= ~PWANT2START;
+ 		cfg->cis->status |= P_NOT_WORKING;
+ 		s3c_camif_stop_preview(cfg);
+-		up((struct semaphore *) &cfg->cis->lock);
++		up(&cfg->cis->lock);
+ 	} else {
+ 		cfg->cis->status &= ~CWANT2START;
+ 		s3c_camif_stop_capture(cfg);
+@@ -1420,7 +1378,8 @@
+ 	if (cfg->cis->sensor == NULL)
+ 		DPRINTK("A CIS sensor for MSDMA has been used\n");
+ 	else
+-		cfg->cis->sensor->driver->command(cfg->cis->sensor, USER_EXIT, NULL);
++		cfg->cis->sensor->driver->command(cfg->cis->sensor, USER_EXIT,
++		    NULL);
+ 
+ 	cfg->cis->user--;
+ 	cfg->status = CAMIF_STOPPED;
+@@ -1428,7 +1387,8 @@
+ 	return 0;
+ }
+ 
+-ssize_t s3c_camif_read(struct file * file, char *buf, size_t count, loff_t * pos)
++ssize_t s3c_camif_read(struct file * file, char *buf, size_t count,
++    loff_t *pos)
+ {
+ 	camif_cfg_t *cfg = NULL;
+ 	size_t end;
+@@ -1437,7 +1397,8 @@
+ 
+ #if defined(FSM_ON_PREVIEW)
+ 	if (cfg->dma_type == CAMIF_PREVIEW) {
+-		if (wait_event_interruptible(cfg->waitq, cfg->status == CAMIF_INT_HAPPEN))
++		if (wait_event_interruptible(cfg->waitq,
++		    cfg->status == CAMIF_INT_HAPPEN))
+ 			return -ERESTARTSYS;
+ 
+ 		cfg->status = CAMIF_STOPPED;
+@@ -1446,7 +1407,8 @@
+ 
+ #if defined(FSM_ON_CODEC)
+ 	if (cfg->dma_type == CAMIF_CODEC) {
+-		if (wait_event_interruptible(cfg->waitq, cfg->status == CAMIF_INT_HAPPEN))
++		if (wait_event_interruptible(cfg->waitq,
++		    cfg->status == CAMIF_INT_HAPPEN))
+ 			return -ERESTARTSYS;
+ 
+ 		cfg->status = CAMIF_STOPPED;
+@@ -1460,7 +1422,8 @@
+ 	return end;
+ }
+ 
+-ssize_t s3c_camif_write(struct file * f, const char *b, size_t c, loff_t * offset)
++ssize_t s3c_camif_write(struct file * f, const char *b, size_t c,
++    loff_t *offset)
+ {
+ 	camif_cfg_t *cfg;
+ 	int ret = 0;
+@@ -1501,7 +1464,8 @@
+ 			return -EFAULT;
+ #endif
+ 	default:
+-		panic("s3c_camera_driver.c: s3c_camif_write() - Unexpected Parameter\n");
++		panic("s3c_camera_driver.c: s3c_camif_write() - "
++		    "Unexpected Parameter\n");
+ 	}
+ 
+ 	return ret;
+@@ -1520,7 +1484,10 @@
+ 	else
+ 		total_size = YUV_MEM;
+ 
+-	/* page frame number of the address for a source RGB frame to be stored at. */
++	/*
++	 * page frame number of the address for a source RGB frame to be stored
++	 * at.
++	 */
+ 	pageFrameNo = __phys_to_pfn(cfg->pp_phys_buf);
+ 
+ 	if (size > total_size) {
+@@ -1533,7 +1500,8 @@
+ 		return -EINVAL;
+ 	}
+ 
+-	if (remap_pfn_range(vma, vma->vm_start, pageFrameNo + vma->vm_pgoff, size, vma->vm_page_prot))
++	if (remap_pfn_range(vma, vma->vm_start, pageFrameNo + vma->vm_pgoff,
++	    size, vma->vm_page_prot))
+ 		return -EINVAL;
+ 
+ 	return 0;
+@@ -1701,7 +1669,6 @@
+ {
+ 	struct resource *res;
+ 	camif_cfg_t *codec, *preview;
+-	int ret = 0;
+ 
+ 	/* Initialize fimc objects */
+ 	codec = s3c_camif_get_fimc_object(CODEC_MINOR);
+@@ -1723,7 +1690,8 @@
+ 	}
+ 
+ 	/* request mem region */
+-	res = request_mem_region(res->start, res->end - res->start + 1, pdev->name);
++	res = request_mem_region(res->start, res->end - res->start + 1,
++	    pdev->name);
+ 
+ 	if (!res) {
+ 		printk("Failed to request io memory region.\n");
+@@ -1731,7 +1699,8 @@
+ 	}
+ 
+ 	/* ioremap for register block */
+-	codec->regs = preview->regs = ioremap(res->start, res->end - res->start + 1);
++	codec->regs = preview->regs =
++	    ioremap(res->start, res->end - res->start + 1);
+ 
+ 	if (codec->regs == NULL) {
+ 		printk(KERN_ERR "Failed to remap register block\n");
+@@ -1742,7 +1711,8 @@
+ 	codec->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVED_MEM);
+ 	codec->pp_virt_buf = ioremap_nocache(codec->pp_phys_buf, YUV_MEM);
+ 
+-	preview->pp_phys_buf = PHYS_OFFSET + (MEM_SIZE - RESERVED_MEM) + YUV_MEM;
++	preview->pp_phys_buf =
++	    PHYS_OFFSET + (MEM_SIZE - RESERVED_MEM) + YUV_MEM;
+ 	preview->pp_virt_buf = ioremap_nocache(preview->pp_phys_buf, RGB_MEM);
+ 
+ 	/* Device init */
+@@ -1758,12 +1728,14 @@
+ 	s3c_camif_request_irq(preview);
+ 
+ 	/* Register to video device */
+-	if (video_register_device(codec->v, VFL_TYPE_GRABBER, CODEC_MINOR) != 0) {
++	if (video_register_device(codec->v, VFL_TYPE_GRABBER, CODEC_MINOR) !=
++	    0) {
+ 		printk(KERN_ERR "Couldn't register this codec driver\n");
+ 		return -1;
+ 	}
+ 
+-	if (video_register_device(preview->v, VFL_TYPE_GRABBER, PREVIEW_MINOR) != 0) {
++	if (video_register_device(preview->v, VFL_TYPE_GRABBER, PREVIEW_MINOR)
++	    != 0) {
+ 		printk(KERN_ERR "Couldn't register this preview driver\n");
+ 		return -1;
+ 	}
+@@ -1820,8 +1792,8 @@
+ 
+ static struct platform_driver s3c_camif_driver =
+ {
+-        .probe          = s3c_camif_probe,
+-        .remove         = s3c_camif_remove,
++	.probe          = s3c_camif_probe,
++	.remove         = s3c_camif_remove,
+ 	.driver		= {
+ 		.name	= "s3c-camif",
+ 		.owner	= THIS_MODULE,
+@@ -1856,8 +1828,8 @@
+ 
+ 	codec->cis = preview->cis = cis;
+ 
+-	sema_init((struct semaphore *) &codec->cis->lock, 1);
+-	sema_init((struct semaphore *) &preview->cis->lock, 1);
++	sema_init(&codec->cis->lock, 1);
++	sema_init(&preview->cis->lock, 1);
+ 
+ 	preview->cis->status |= P_NOT_WORKING;	/* Default Value */
+ 
+Index: cam/drivers/media/video/s3c_camif.h
+===================================================================
+--- cam.orig/drivers/media/video/s3c_camif.h	2009-03-09 13:00:59.000000000 +0800
++++ cam/drivers/media/video/s3c_camif.h	2009-03-09 13:01:07.000000000 +0800
+@@ -268,7 +268,7 @@
+ };
+ 
+ typedef struct {
+-	struct mutex		lock;
++	struct semaphore	lock;
+ 	enum camif_itu_fmt	itu_fmt;
+ 	enum camif_order422	order422;
+ 	struct i2c_client	*sensor;

Added: developers/werner/gta03/cam/patches/cleanup-camif.patch
===================================================================
--- developers/werner/gta03/cam/patches/cleanup-camif.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/cleanup-camif.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,1408 @@
+Clean up camera interface driver
+
+This patch does some cleanup on the camera interface driver:
+
+- remove backslashes at regular line ends (Python-style ?)
+- removed unused return values or unused initializations
+- combined duplicated or otherwise highly redundant code
+- remove redundant parentheses
+- wrapped long lines
+- general whitespace cleanup
+- s3c_camif_input_msdma_codec, s3c_camif_input_msdma_preview,
+  s3c_camif_set_target_format: fixed clearing of old register values
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/drivers/media/video/s3c_camif.c
+===================================================================
+--- cam.orig/drivers/media/video/s3c_camif.c	2009-03-09 13:11:37.000000000 +0800
++++ cam/drivers/media/video/s3c_camif.c	2009-03-09 15:30:07.000000000 +0800
+@@ -30,7 +30,6 @@
+ #include <linux/wait.h>
+ #include <linux/videodev.h>
+ #include <asm/io.h>
+-#include <linux/semaphore.h>
+ #include <mach/hardware.h>
+ #include <asm/uaccess.h>
+ #include <mach/map.h>
+@@ -80,7 +79,8 @@
+ 		ret = cfg->img_buf[cnt].virt_rgb;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		if ((cfg->dst_fmt & CAMIF_RGB16) || (cfg->dst_fmt & CAMIF_RGB24))
++		if ((cfg->dst_fmt & CAMIF_RGB16) ||
++		    (cfg->dst_fmt & CAMIF_RGB24))
+ 			ret = cfg->img_buf[cnt].virt_rgb;
+ 		else
+ 			ret = cfg->img_buf[cnt].virt_y;
+@@ -94,17 +94,21 @@
+ 	unsigned int reg, val, flag;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		flag = S3C_CICOSTATUS_OVFIY_CO | S3C_CICOSTATUS_OVFICB_CO | S3C_CICOSTATUS_OVFICR_CO;
++		flag = S3C_CICOSTATUS_OVFIY_CO | S3C_CICOSTATUS_OVFICB_CO |
++		    S3C_CICOSTATUS_OVFICR_CO;
+ 		reg = readl(cfg->regs + S3C_CICOSTATUS);
+ 
+ 		if (reg & flag) {
+ 			/* FIFO Error Count ++  */
+ 			val = readl(cfg->regs + S3C_CIWDOFST);
+-			val |= (S3C_CIWDOFST_CLROVCOFIY | S3C_CIWDOFST_CLROVCOFICB | S3C_CIWDOFST_CLROVCOFICR);
++			val |= S3C_CIWDOFST_CLROVCOFIY |
++			    S3C_CIWDOFST_CLROVCOFICB | S3C_CIWDOFST_CLROVCOFICR;
+ 			writel(val, cfg->regs + S3C_CIWDOFST);
+ 
+ 			val = readl(cfg->regs + S3C_CIWDOFST);
+-			val &= ~(S3C_CIWDOFST_CLROVCOFIY | S3C_CIWDOFST_CLROVCOFICB | S3C_CIWDOFST_CLROVCOFICR);
++			val &= ~(S3C_CIWDOFST_CLROVCOFIY |
++			    S3C_CIWDOFST_CLROVCOFICB |
++			    S3C_CIWDOFST_CLROVCOFICR);
+ 			writel(val, cfg->regs + S3C_CIWDOFST);
+ 
+ 			return 1; /* Error */
+@@ -116,11 +120,14 @@
+ 		if (reg & flag) {
+ 			/* FIFO Error Count ++  */
+ 			val = readl(cfg->regs + S3C_CIWDOFST);
+-			val |= (S3C_CIWDOFST_CLROVPRFICB | S3C_CIWDOFST_CLROVPRFICR);
++			val |= S3C_CIWDOFST_CLROVPRFICB |
++			    S3C_CIWDOFST_CLROVPRFICR;
+ 			writel(val, cfg->regs + S3C_CIWDOFST);
+ 
+ 			val = readl(cfg->regs + S3C_CIWDOFST);
+-			val &= ~(S3C_CIWDOFST_CLROVPRFIY | S3C_CIWDOFST_CLROVPRFICB | S3C_CIWDOFST_CLROVPRFICR);
++			val &= ~(S3C_CIWDOFST_CLROVPRFIY |
++			    S3C_CIWDOFST_CLROVPRFICB |
++			    S3C_CIWDOFST_CLROVPRFICR);
+ 			writel(val, cfg->regs + S3C_CIWDOFST);
+ 
+ 			return 1; /* Error */
+@@ -165,53 +172,45 @@
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+ 		if (cfg->dst_fmt & CAMIF_YCBCR420)
+-			t_size = (area * 3 / 2);	/* CAMIF_YCBCR420 */
+-		else if (cfg->dst_fmt & CAMIF_YCBCR422 || cfg->dst_fmt & CAMIF_YCBCR422I)
+-			t_size = (area * 2);		/* CAMIF_YCBCR422 */
++			t_size = area * 3 / 2;		/* CAMIF_YCBCR420 */
++		else if (cfg->dst_fmt & CAMIF_YCBCR422 ||
++			 cfg->dst_fmt & CAMIF_YCBCR422I)
++			t_size = area * 2;		/* CAMIF_YCBCR422 */
+ 		else if (cfg->dst_fmt & CAMIF_RGB16)
+-			t_size = (area * 2);		/* 2 bytes per one pixel */
++			t_size = area * 2;		/* 2 bytes per pixel */
+ 		else if (cfg->dst_fmt & CAMIF_RGB24)
+-			t_size = (area * 4);		/* 4 bytes per one pixel */
++			t_size = area * 4;		/* 4 bytes per pixel */
+ 		else
+ 			printk(KERN_INFO "Invalid target format\n");
+-
+-		if ((t_size % PAGE_SIZE) != 0) {
+-			i = t_size / PAGE_SIZE;
+-			t_size = (i + 1) * PAGE_SIZE;
+-		}
+-
+-		t_size = t_size * cfg->pp_num;
+-		cfg->pp_totalsize = t_size;
+-
+-		printk(KERN_INFO "Codec memory required: 0x%08X bytes\n", t_size);
+-
+-		return 0;
+-	}else if (cfg->dma_type & CAMIF_PREVIEW) {
++	} else if (cfg->dma_type & CAMIF_PREVIEW) {
+ 
+ 		if (cfg->dst_fmt & CAMIF_RGB16)
+-			t_size = (area * 2);		/*  2 bytes per two pixel*/
++			t_size = area * 2;		/* 2 bytes per pixel */
+ 		else if (cfg->dst_fmt & CAMIF_RGB24)
+-			t_size = (area * 4);		/* 4 bytes per one pixel */
++			t_size = area * 4;		/* 4 bytes per pixel */
+ 		else
+ 			printk(KERN_ERR "Invalid target format\n");
+ 
+-		if ((t_size % PAGE_SIZE) != 0) {
+-			i = t_size / PAGE_SIZE;
+-			t_size = (i + 1) * PAGE_SIZE;
+-		}
++	} else {
++		return 0;
++	}
+ 
+-		t_size = t_size * cfg->pp_num;
+-		cfg->pp_totalsize = t_size;
++	if (t_size % PAGE_SIZE != 0) {
++		i = t_size / PAGE_SIZE;
++		t_size = (i + 1) * PAGE_SIZE;
++	}
+ 
+-		printk(KERN_INFO "Preview memory required: 0x%08X bytes\n", t_size);
++	t_size = t_size * cfg->pp_num;
++	cfg->pp_totalsize = t_size;
+ 
+-		return 0;
+-	}
++	printk(KERN_INFO "%s memory required: 0x%08X bytes\n",
++	    cfg->dma_type & CAMIF_CODEC ? "Codec" : "Preview", t_size);
+ 
+ 	return 0;
+ }
+ 
+-static void s3c_camif_calc_burst_length_yuv422i(unsigned int hsize, unsigned int *mburst, unsigned int *rburst)
++static void s3c_camif_calc_burst_length_yuv422i(unsigned int hsize,
++    unsigned int *mburst, unsigned int *rburst)
+ {
+ 	unsigned int tmp, wanted;
+ 
+@@ -239,7 +238,8 @@
+ 	*rburst = wanted / 2;
+ }
+ 
+-static void s3c_camif_calc_burst_length(unsigned int hsize, unsigned int *mburst, unsigned int *rburst)
++static void s3c_camif_calc_burst_length(unsigned int hsize,
++    unsigned int *mburst, unsigned int *rburst)
+ {
+ 	unsigned int tmp;
+ 
+@@ -273,7 +273,7 @@
+ 		} else {
+ 			tmp = (hsize / 4) % 4;
+ 			*mburst = 4;
+-			*rburst = (tmp) ? tmp : 4;
++			*rburst = tmp ? tmp : 4;
+ 		}
+ 
+ 		break;
+@@ -286,28 +286,33 @@
+ 	unsigned int val, yburst_m, yburst_r, cburst_m, cburst_r;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		if ((cfg->dst_fmt == CAMIF_RGB16) || (cfg->dst_fmt == CAMIF_RGB24)) {
++		if (cfg->dst_fmt == CAMIF_RGB16 ||
++		    cfg->dst_fmt == CAMIF_RGB24) {
+ 			if (cfg->dst_fmt == CAMIF_RGB24) {
+ 				if (width % 2 != 0)
+ 					return BURST_ERR;
+ 
+-				s3c_camif_calc_burst_length(width * 4, &yburst_m, &yburst_r);
++				s3c_camif_calc_burst_length(width * 4,
++				    &yburst_m, &yburst_r);
+ 			} else {
+ 				if ((width / 2) % 2 != 0)
+ 					return BURST_ERR;
+ 
+-				s3c_camif_calc_burst_length(width * 2, &yburst_m, &yburst_r);
++				s3c_camif_calc_burst_length(width * 2,
++				    &yburst_m, &yburst_r);
+ 			}
+ 
+ 			val = readl(cfg->regs + S3C_CICOCTRL);
+ 			val &= ~(0xfffff << 4);
+ 
+ 			if (cfg->dst_fmt == CAMIF_RGB24) {
+-				val = S3C_CICOCTRL_YBURST1_CO(yburst_m / 2) | \
+-				S3C_CICOCTRL_YBURST2_CO(yburst_r / 4) | (4 << 9) | (2 << 4);
++				val = S3C_CICOCTRL_YBURST1_CO(yburst_m / 2) |
++				    S3C_CICOCTRL_YBURST2_CO(yburst_r / 4) |
++				    (4 << 9) | (2 << 4);
+ 			} else {
+-				val = S3C_CICOCTRL_YBURST1_CO(yburst_m / 2) | \
+-					S3C_CICOCTRL_YBURST2_CO(yburst_r / 2) | (4 << 9) | (2 << 4);
++				val = S3C_CICOCTRL_YBURST1_CO(yburst_m / 2) |
++				    S3C_CICOCTRL_YBURST2_CO(yburst_r / 2) |
++				    (4 << 9) | (2 << 4);
+ 			}
+ 
+ 			writel(val, cfg->regs + S3C_CICOCTRL);
+@@ -317,18 +322,23 @@
+ 				return BURST_ERR;
+ 
+ 			if (cfg->dst_fmt == CAMIF_YCBCR422I) {
+-				s3c_camif_calc_burst_length_yuv422i(width, &yburst_m, &yburst_r);
++				s3c_camif_calc_burst_length_yuv422i(width,
++				    &yburst_m, &yburst_r);
+ 				cburst_m = yburst_m / 2;
+ 				cburst_r = yburst_r / 2;
+ 			} else {
+-				s3c_camif_calc_burst_length(width, &yburst_m, &yburst_r);
+-				s3c_camif_calc_burst_length(width / 2, &cburst_m, &cburst_r);
++				s3c_camif_calc_burst_length(width, &yburst_m,
++				    &yburst_r);
++				s3c_camif_calc_burst_length(width / 2,
++				    &cburst_m, &cburst_r);
+ 			}
+ 
+ 			val = readl(cfg->regs + S3C_CICOCTRL);
+ 			val &= ~(0xfffff << 4);
+-			val |= (S3C_CICOCTRL_YBURST1_CO(yburst_m) | S3C_CICOCTRL_CBURST1_CO(cburst_m) | \
+-				S3C_CICOCTRL_YBURST2_CO(yburst_r) | S3C_CICOCTRL_CBURST2_CO(cburst_r));
++			val |= S3C_CICOCTRL_YBURST1_CO(yburst_m) |
++			    S3C_CICOCTRL_CBURST1_CO(cburst_m) |
++			    S3C_CICOCTRL_YBURST2_CO(yburst_r) |
++			    S3C_CICOCTRL_CBURST2_CO(cburst_r);
+ 			writel(val, cfg->regs + S3C_CICOCTRL);
+ 		}
+ 	} else if (cfg->dma_type & CAMIF_PREVIEW) {
+@@ -336,17 +346,20 @@
+ 			if (width % 2 != 0)
+ 				return BURST_ERR;
+ 
+-			s3c_camif_calc_burst_length(width * 4, &yburst_m, &yburst_r);
++			s3c_camif_calc_burst_length(width * 4, &yburst_m,
++			    &yburst_r);
+ 		} else {
+ 			if ((width / 2) % 2 != 0)
+ 				return BURST_ERR;
+ 
+-			s3c_camif_calc_burst_length(width * 2, &yburst_m, &yburst_r);
++			s3c_camif_calc_burst_length(width * 2, &yburst_m,
++			    &yburst_r);
+ 		}
+ 
+ 		val = readl(cfg->regs + S3C_CIPRCTRL);
+ 		val &= ~(0x3ff << 14);
+-		val |= (S3C_CICOCTRL_YBURST1_CO(yburst_m) | S3C_CICOCTRL_YBURST2_CO(yburst_r));
++		val |= S3C_CICOCTRL_YBURST1_CO(yburst_m) |
++		    S3C_CICOCTRL_YBURST2_CO(yburst_r);
+ 		writel(val, cfg->regs + S3C_CIPRCTRL);
+ 	}
+ 
+@@ -362,35 +375,27 @@
+ #if defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2450) || defined(CONFIG_CPU_S3C2416)
+ int s3c_camif_input_msdma_preview(camif_cfg_t * cfg)
+ {
+-	int ret = 0;
+-	unsigned int addr_start_Y = 0, addr_start_CB = 0, addr_start_CR = 0;
+-	unsigned int addr_end_Y = 0, addr_end_CB = 0, addr_end_CR = 0;
++	unsigned int addr_start_Y, addr_start_CB, addr_start_CR;
++	unsigned int addr_end_Y, addr_end_CB, addr_end_CR;
+ 	unsigned int val, val_width;
++	unsigned area, div;
+ 
+ 	val = readl(cfg->regs + S3C_CIMSCTRL);
+ 	val &= ~(1 << 2);
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+ 	val = readl(cfg->regs + S3C_CIMSCTRL);
+-	val |= (1 << 2);
++	val |= 1 << 2;
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-	if (cfg->src_fmt != CAMIF_YCBCR420 && cfg->src_fmt != CAMIF_YCBCR422 && cfg->src_fmt != CAMIF_YCBCR422I)
+-		cfg->src_fmt = CAMIF_YCBCR420;
+-
+ 	switch(cfg->src_fmt) {
+ 	case CAMIF_YCBCR420:
++	default:
+ 		val = readl(cfg->regs + S3C_CIMSCTRL);
+-		val = (val & ~(0x1 << 1)) | (0x1 << 1);
++		val |= 0x1 << 1;
+ 		writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-		addr_start_Y = readl(cfg->regs + S3C_CIMSYSA);
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 4);
++		div = 4;
+ 		break;
+ 
+ 	case CAMIF_YCBCR422:
+@@ -401,19 +406,20 @@
+ 		val &= ~(0x3 << 3);			/* YCbYCr */
+ 		writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-		addr_start_Y = readl(cfg->regs + S3C_CIMSYSA);
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		break;
+-
+-	default:
++		div = 2;
+ 		break;
+ 	}
+ 
++	area = cfg->cis->source_x * cfg->cis->source_y;
++
++	addr_start_Y = readl(cfg->regs + S3C_CIMSYSA);
++	addr_start_CB = addr_start_Y + area;
++	addr_start_CR = addr_start_CB + area / div;
++
++	addr_end_Y = addr_start_Y + area;
++	addr_end_CB = addr_start_CB + area / div;
++	addr_end_CR = addr_start_CR + area / div;
++
+ 	/* MSDMA memory */
+ 	writel(addr_start_Y, cfg->regs + S3C_CIMSYSA);
+ 	writel(addr_start_CB, cfg->regs + S3C_CIMSCBSA);
+@@ -429,14 +435,10 @@
+ 	writel(0, cfg->regs + S3C_CIMSCROFF);
+ 
+ 	/* MSDMA for codec source image width */
+-	val_width = readl(cfg->regs + S3C_CIMSWIDTH);
+-	val_width = (val_width & ~(0x1 << 31));		/* AutoLoadDisable */
+-	val_width |= (cfg->cis->source_y << 16);	/* MSCOHEIGHT */
+-	val_width |= cfg->cis->source_x;		/* MSCOWIDTH */
+-	val_width = cfg->cis->source_x;
++	val_width = cfg->cis->source_x;		/* MSCOWIDTH */
+ 	writel(val_width, cfg->regs + S3C_CIMSWIDTH);
+ 
+-	return ret;
++	return 0;
+ }
+ 
+ static int s3c_camif_input_msdma(camif_cfg_t *cfg)
+@@ -453,10 +455,10 @@
+ #elif defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
+ int s3c_camif_input_msdma_codec(camif_cfg_t * cfg)
+ {
+-	int ret = 0;
+-	u32 addr_start_Y = 0, addr_start_CB = 0, addr_start_CR = 0;
+-	u32 addr_end_Y = 0, addr_end_CB = 0, addr_end_CR = 0;
++	u32 addr_start_Y, addr_start_CB, addr_start_CR;
++	u32 addr_end_Y, addr_end_CB, addr_end_CR;
+ 	u32 val, val_width;
++	unsigned area, div;
+ 
+ 	/* Codec path input data selection */
+ 	val = readl(cfg->regs + S3C_MSCOCTRL);
+@@ -464,46 +466,39 @@
+ 	writel(val, cfg->regs + S3C_MSCOCTRL);
+ 
+ 	val = readl(cfg->regs + S3C_MSCOCTRL);
+-	val |= (1 << 3);
++	val |= 1 << 3;
+ 	writel(val, cfg->regs + S3C_MSCOCTRL);
+ 
+-	if (cfg->src_fmt != CAMIF_YCBCR420 && cfg->src_fmt != CAMIF_YCBCR422 && cfg->src_fmt != CAMIF_YCBCR422I)
+-		cfg->src_fmt = CAMIF_YCBCR420;
+-
+ 	switch(cfg->src_fmt) {
+ 	case CAMIF_YCBCR420:
++	default:
+ 		val = readl(cfg->regs + S3C_MSCOCTRL);
+ 		val &= ~(0x3 << 1);
+ 		writel(val, cfg->regs + S3C_MSCOCTRL);
+ 
+-		addr_start_Y = cfg->pp_phys_buf;
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 4);
++		div = 4;
+ 		break;
+ 
+ 	case CAMIF_YCBCR422:
+ 	case CAMIF_YCBCR422I:
+ 		val = readl(cfg->regs + S3C_MSCOCTRL);
+-		val = (val & ~(0x3 << 1)) |(0x2 << 1);
++		val = (val & ~(0x3 << 1)) | (0x2 << 1);
+ 		writel(val, cfg->regs + S3C_MSCOCTRL);
+ 
+-		addr_start_Y = cfg->pp_phys_buf;
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		break;
+-
+-	default:
++		div = 2;
+ 		break;
+ 	}
+ 
++	area = cfg->cis->source_x * cfg->cis->source_y;
++
++	addr_start_Y = cfg->pp_phys_buf;
++	addr_start_CB = addr_start_Y + area;
++	addr_start_CR = addr_start_CB + area / div;
++
++	addr_end_Y = addr_start_Y + area;
++	addr_end_CB = addr_start_CB + area / div;
++	addr_end_CR = addr_start_CR + area / div;
++
+ 	/* MSDMA memory */
+ 	writel(addr_start_Y, cfg->regs + S3C_MSCOY0SA);
+ 	writel(addr_start_CB, cfg->regs + S3C_MSCOCB0SA);
+@@ -520,45 +515,39 @@
+ 
+ 	/* MSDMA for codec source image width */
+ 	val_width = readl(cfg->regs + S3C_MSCOWIDTH);
+-	val_width = (val_width & ~(0x1 << 31))|(0x1 << 31);	/* AutoLoadEnable */
+-	val_width |= (cfg->cis->source_y << 16);		/* MSCOHEIGHT */
+-	val_width |= cfg->cis->source_x;			/* MSCOWIDTH */
++	val_width &= ~0x0fffffff;
++	val_width |= 0x1 << 31;				/* AutoLoadEnable */
++	val_width |= cfg->cis->source_y << 16;		/* MSCOHEIGHT */
++	val_width |= cfg->cis->source_x;		/* MSCOWIDTH */
+ 	writel(val_width, cfg->regs + S3C_MSCOWIDTH);
+ 
+-	return ret;
++	return 0;
+ }
+ 
+ int s3c_camif_input_msdma_preview(camif_cfg_t * cfg)
+ {
+ 	int ret = 0;
+-	unsigned int addr_start_Y = 0, addr_start_CB = 0, addr_start_CR = 0;
+-	unsigned int addr_end_Y = 0, addr_end_CB = 0, addr_end_CR = 0;
++	unsigned int addr_start_Y, addr_start_CB, addr_start_CR;
++	unsigned int addr_end_Y, addr_end_CB, addr_end_CR;
+ 	unsigned int val, val_width;
++	unsigned area, div;
+ 
+ 	val = readl(cfg->regs + S3C_CIMSCTRL);
+ 	val &= ~(0x1 << 3);
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+ 	val = readl(cfg->regs + S3C_CIMSCTRL);
+-	val |= (0x1 << 3);
++	val |= 0x1 << 3;
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-	if (cfg->src_fmt != CAMIF_YCBCR420 && cfg->src_fmt != CAMIF_YCBCR422 && cfg->src_fmt != CAMIF_YCBCR422I)
+-		cfg->src_fmt = CAMIF_YCBCR420;
+-
+ 	switch(cfg->src_fmt) {
+ 	case CAMIF_YCBCR420:
++	default:
+ 		val = readl(cfg->regs + S3C_CIMSCTRL);
+ 		val &= ~(0x3 << 1);
+ 		writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-		addr_start_Y = readl(cfg->regs + S3C_MSPRY0SA);
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 4);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 4);
++		div = 4;
+ 		break;
+ 
+ 	case CAMIF_YCBCR422:
+@@ -568,19 +557,20 @@
+ 		val = (val & ~(0x3 << 4)) | (0x3 << 4);	/* YCbYCr */
+ 		writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-		addr_start_Y = readl(cfg->regs + S3C_MSPRY0SA);
+-		addr_start_CB = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_start_CR = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-
+-		addr_end_Y = addr_start_Y + (cfg->cis->source_x * cfg->cis->source_y);
+-		addr_end_CB = addr_start_CB + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		addr_end_CR = addr_start_CR + (cfg->cis->source_x * cfg->cis->source_y / 2);
+-		break;
+-
+-	default:
++		div = 2;
+ 		break;
+ 	}
+ 
++	area = cfg->cis->source_x * cfg->cis->source_y;
++
++	addr_start_Y = readl(cfg->regs + S3C_MSPRY0SA);
++	addr_start_CB = addr_start_Y + area;
++	addr_start_CR = addr_start_CB + area / div;
++
++	addr_end_Y = addr_start_Y + area;
++	addr_end_CB = addr_start_CB + area / div;
++	addr_end_CR = addr_start_CR + area / div;
++
+ 	/* MSDMA memory */
+ 	writel(addr_start_Y, cfg->regs + S3C_MSPRY0SA);
+ 	writel(addr_start_CB, cfg->regs + S3C_MSPRCB0SA);
+@@ -597,8 +587,9 @@
+ 
+ 	/* MSDMA for codec source image width */
+ 	val_width = readl(cfg->regs + S3C_MSPRWIDTH);
+-	val_width = (val_width & ~(0x1 << 31));		/* AutoLoadEnable */
+-	val_width |= (cfg->cis->source_y << 16);	/* MSCOHEIGHT */
++	val_width &= ~(0x1 << 31);			/* AutoLoadEnable */
++	val_width &= ~0x0fffffff;
++	val_width |= cfg->cis->source_y << 16;		/* MSCOHEIGHT */
+ 	val_width |= cfg->cis->source_x;		/* MSCOWIDTH */
+ 	writel(val_width, cfg->regs + S3C_MSPRWIDTH);
+ 
+@@ -691,37 +682,41 @@
+ 			for (i = 0; i < 4; i++) {
+ 				cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
+ 				cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CICOYSA(i));
++				writel(cfg->img_buf[i].phys_rgb,
++				    cfg->regs + S3C_CICOYSA(i));
+ 			}
+ 
+ 			break;
+ 
+ 		case 2:
+ 			for (i = 0; i < 4; i++) {
+-				if (i == 0 || i == 2) {
+-					cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
+-					cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
+-				} else {
+-					cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + area;
+-					cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + area;
++				cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
++				cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
++				if (i & 1) {
++					cfg->img_buf[i].virt_rgb += area;
++					cfg->img_buf[i].phys_rgb += area;
+ 				}
+-
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CICOYSA(i));
++				writel(cfg->img_buf[i].phys_rgb,
++				    cfg->regs + S3C_CICOYSA(i));
+ 			}
+ 
+ 			break;
+ 
+ 		case 4:
+ 			for (i = 0; i < 4; i++) {
+-				cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * area;
+-				cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * area;
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CICOYSA(i));
++				cfg->img_buf[i].virt_rgb =
++				    cfg->pp_virt_buf + i * area;
++				cfg->img_buf[i].phys_rgb =
++				    cfg->pp_phys_buf + i * area;
++				writel(cfg->img_buf[i].phys_rgb,
++				    cfg->regs + S3C_CICOYSA(i));
+ 			}
+ 
+ 			break;
+ 
+ 		default:
+-			printk(KERN_ERR "Invalid pingpong number %d\n", cfg->pp_num);
++			printk(KERN_ERR "Invalid pingpong number %d\n",
++			    cfg->pp_num);
+ 			panic("s3c camif halt\n");
+ 		}
+ 	}
+@@ -739,7 +734,8 @@
+ 
+ 	if (cfg->dst_fmt & CAMIF_YCBCR420)
+ 		cbcr_size = area / 4;
+-	else if (cfg->dst_fmt & CAMIF_YCBCR422 || cfg->dst_fmt & CAMIF_YCBCR422I)
++	else if (cfg->dst_fmt & CAMIF_YCBCR422 ||
++		 cfg->dst_fmt & CAMIF_YCBCR422I)
+ 		cbcr_size = area / 2;
+ 	else if ((cfg->dst_fmt & CAMIF_RGB16) || (cfg->dst_fmt & CAMIF_RGB24)) {
+ 		s3c_camif_output_pp_codec_rgb(cfg);
+@@ -747,7 +743,7 @@
+ 	} else
+ 		printk(KERN_ERR "Invalid target format %d\n", cfg->dst_fmt);
+ 
+-	one_p_size = area + (2 * cbcr_size);
++	one_p_size = area + 2 * cbcr_size;
+ 
+ 	if ((one_p_size % PAGE_SIZE) != 0) {
+ 		i = one_p_size / PAGE_SIZE;
+@@ -757,63 +753,77 @@
+ 	cfg->buffer_size = one_p_size;
+ 
+ 	switch (cfg->pp_num) {
+-		case 1 :
+-			for (i = 0; i < 4; i++) {
+-				cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
+-				cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
+-				cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area;
+-				cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area;
+-				cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + area + cbcr_size;
+-				cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + area + cbcr_size;
+-				writel(cfg->img_buf[i].phys_y, cfg->regs + S3C_CICOYSA(i));
+-				writel(cfg->img_buf[i].phys_cb, cfg->regs + S3C_CICOCBSA(i));
+-				writel(cfg->img_buf[i].phys_cr, cfg->regs + S3C_CICOCRSA(i));
+-			}
+-
+-			break;
++	case 1 :
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
++			cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
++			cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area;
++			cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area;
++			cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + area + cbcr_size;
++			cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + area + cbcr_size;
++			writel(cfg->img_buf[i].phys_y, cfg->regs + S3C_CICOYSA(i));
++			writel(cfg->img_buf[i].phys_cb, cfg->regs + S3C_CICOCBSA(i));
++			writel(cfg->img_buf[i].phys_cr, cfg->regs + S3C_CICOCRSA(i));
++		}
+ 
+-		case 2:
+-			for (i = 0; i < 4; i++) {
+-				if (i == 0 || i == 2) {
+-					cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
+-					cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
+-					cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area;
+-					cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area;
+-					cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + area + cbcr_size;
+-					cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + area + cbcr_size;
+-				} else {
+-					cfg->img_buf[i].virt_y = cfg->pp_virt_buf + one_p_size;
+-					cfg->img_buf[i].phys_y = cfg->pp_phys_buf + one_p_size;
+-					cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area + one_p_size;
+-					cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area + one_p_size;
+-					cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + area + cbcr_size + one_p_size;
+-					cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + area + cbcr_size + one_p_size;
+-				}
++		break;
+ 
+-				writel(cfg->img_buf[i].phys_y, cfg->regs + S3C_CICOYSA(i));
+-				writel(cfg->img_buf[i].phys_cb, cfg->regs + S3C_CICOCBSA(i));
+-				writel(cfg->img_buf[i].phys_cr, cfg->regs + S3C_CICOCRSA(i));
++	case 2:
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_y = cfg->pp_virt_buf;
++			cfg->img_buf[i].phys_y = cfg->pp_phys_buf;
++			cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area;
++			cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area;
++			cfg->img_buf[i].virt_cr =
++			    cfg->pp_virt_buf + area + cbcr_size;
++			cfg->img_buf[i].phys_cr =
++			    cfg->pp_phys_buf + area + cbcr_size;
++
++			if (i & 1) {
++				cfg->img_buf[i].virt_y += one_p_size;
++				cfg->img_buf[i].phys_y += one_p_size;
++				cfg->img_buf[i].virt_cb += one_p_size;
++				cfg->img_buf[i].phys_cb += one_p_size;
++				cfg->img_buf[i].virt_cr += one_p_size;
++				cfg->img_buf[i].phys_cr += one_p_size;
+ 			}
+ 
+-			break;
++			writel(cfg->img_buf[i].phys_y,
++			    cfg->regs + S3C_CICOYSA(i));
++			writel(cfg->img_buf[i].phys_cb,
++			    cfg->regs + S3C_CICOCBSA(i));
++			writel(cfg->img_buf[i].phys_cr,
++			    cfg->regs + S3C_CICOCRSA(i));
++		}
+ 
+-		case 4:
+-			for (i = 0; i < 4; i++) {
+-				cfg->img_buf[i].virt_y = cfg->pp_virt_buf + i * one_p_size;
+-				cfg->img_buf[i].phys_y = cfg->pp_phys_buf + i * one_p_size;
+-				cfg->img_buf[i].virt_cb = cfg->pp_virt_buf + area + i * one_p_size;
+-				cfg->img_buf[i].phys_cb = cfg->pp_phys_buf + area + i * one_p_size;
+-				cfg->img_buf[i].virt_cr = cfg->pp_virt_buf + area + cbcr_size + i * one_p_size;
+-				cfg->img_buf[i].phys_cr = cfg->pp_phys_buf + area + cbcr_size + i * one_p_size;
+-				writel(cfg->img_buf[i].phys_y, cfg->regs + S3C_CICOYSA(i));
+-				writel(cfg->img_buf[i].phys_cb, cfg->regs + S3C_CICOCBSA(i));
+-				writel(cfg->img_buf[i].phys_cr, cfg->regs + S3C_CICOCRSA(i));
+-			}
++		break;
+ 
+-			break;
++	case 4:
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_y =
++			    cfg->pp_virt_buf + i * one_p_size;
++			cfg->img_buf[i].phys_y =
++			    cfg->pp_phys_buf + i * one_p_size;
++			cfg->img_buf[i].virt_cb =
++			    cfg->pp_virt_buf + area + i * one_p_size;
++			cfg->img_buf[i].phys_cb =
++			    cfg->pp_phys_buf + area + i * one_p_size;
++			cfg->img_buf[i].virt_cr = cfg->pp_virt_buf +
++			    area + cbcr_size + i * one_p_size;
++			cfg->img_buf[i].phys_cr = cfg->pp_phys_buf +
++			    area + cbcr_size + i * one_p_size;
++			writel(cfg->img_buf[i].phys_y,
++			    cfg->regs + S3C_CICOYSA(i));
++			writel(cfg->img_buf[i].phys_cb,
++			    cfg->regs + S3C_CICOCBSA(i));
++			writel(cfg->img_buf[i].phys_cr,
++			    cfg->regs + S3C_CICOCRSA(i));
++		}
+ 
+-		default:
+-			printk(KERN_ERR "Invalid pingpong number %d\n", cfg->pp_num);
++		break;
++
++	default:
++		printk(KERN_ERR "Invalid pingpong number %d\n", cfg->pp_num);
+ 	}
+ 
+ 	return 0;
+@@ -890,7 +900,8 @@
+ 		cfg->img_buf[0].phys_cb = cfg->pp_phys_buf + area;
+ 		cfg->img_buf[0].virt_cr = cfg->pp_virt_buf + area + cbcr_size;
+ 		cfg->img_buf[0].phys_cr = cfg->pp_phys_buf + area + cbcr_size;
+-	} else if (cfg->src_fmt & CAMIF_YCBCR422 || cfg->dst_fmt & CAMIF_YCBCR422I){
++	} else if (cfg->src_fmt & CAMIF_YCBCR422 ||
++		   cfg->dst_fmt & CAMIF_YCBCR422I) {
+ 		area = area * 2;
+ 		cfg->img_buf[0].virt_cb = 0;
+ 		cfg->img_buf[0].phys_cb = 0;
+@@ -911,8 +922,8 @@
+ 	writel(cfg->img_buf[0].phys_cr + cbcr_size, cfg->regs + S3C_MSPRCR0END);
+ 
+ 	val = readl(cfg->regs + S3C_MSCOWIDTH);
+-	val = (val & ~(0x1 << 31)) | (0x1 << 31);
+-	val |= (cfg->cis->source_y << 16);
++	val |= 0x1 << 31;
++	val |= cfg->cis->source_y << 16;
+ 	val |= cfg->cis->source_x;
+ 	writel(val, cfg->regs + S3C_MSPRWIDTH);
+ 
+@@ -933,7 +944,8 @@
+ 
+ 	if (cfg->dst_fmt & CAMIF_YCBCR420)
+ 		cbcr_size = area / 4;
+-	else if (cfg->dst_fmt & CAMIF_YCBCR422 || cfg->dst_fmt & CAMIF_YCBCR422I)
++	else if (cfg->dst_fmt & CAMIF_YCBCR422 ||
++		 cfg->dst_fmt & CAMIF_YCBCR422I)
+ 		cbcr_size = area / 2;
+ 	else if (cfg->dst_fmt & CAMIF_RGB24)
+ 		area = area * 4;
+@@ -950,41 +962,43 @@
+ 	cfg->buffer_size = area;
+ 
+ 	switch (cfg->pp_num) {
+-		case 1:
+-			for (i = 0; i < 4; i++) {
+-				cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
+-				cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CIPRYSA(i));
+-			}
+-
+-			break;
++	case 1:
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
++			cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
++			writel(cfg->img_buf[i].phys_rgb,
++			    cfg->regs + S3C_CIPRYSA(i));
++		}
+ 
+-		case 2:
+-			for (i = 0; i < 4; i++) {
+-				if (i == 0 || i == 2) {
+-					cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
+-					cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
+-				} else {
+-					cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + area;
+-					cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + area;
+-				}
++		break;
+ 
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CIPRYSA(i));
++	case 2:
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf;
++			cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf;
++			if (i & 1) {
++				cfg->img_buf[i].virt_rgb += area;
++				cfg->img_buf[i].phys_rgb += area;
+ 			}
+ 
+-			break;
++			writel(cfg->img_buf[i].phys_rgb,
++			    cfg->regs + S3C_CIPRYSA(i));
++		}
+ 
+-		case 4:
+-			for (i = 0; i < 4; i++) {
+-				cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * area;
+-				cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * area;
+-				writel(cfg->img_buf[i].phys_rgb, cfg->regs + S3C_CIPRYSA(i));
+-			}
++		break;
+ 
+-			break;
++	case 4:
++		for (i = 0; i < 4; i++) {
++			cfg->img_buf[i].virt_rgb = cfg->pp_virt_buf + i * area;
++			cfg->img_buf[i].phys_rgb = cfg->pp_phys_buf + i * area;
++			writel(cfg->img_buf[i].phys_rgb,
++			    cfg->regs + S3C_CIPRYSA(i));
++		}
+ 
+-		default:
+-			printk(KERN_ERR "Invalid pingpong number %d\n", cfg->pp_num);
++		break;
++
++	default:
++		printk(KERN_ERR "Invalid pingpong number %d\n", cfg->pp_num);
+ 	}
+ 
+ 	return 0;
+@@ -994,7 +1008,7 @@
+ {
+ 	if (cfg->dma_type & CAMIF_CODEC)
+ 		s3c_camif_output_pp_codec(cfg);
+-	else if ( cfg->dma_type & CAMIF_PREVIEW)
++	else if (cfg->dma_type & CAMIF_PREVIEW)
+ 		s3c_camif_output_pp_preview(cfg);
+ 
+ 	return 0;
+@@ -1034,16 +1048,19 @@
+ #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
+ static inline int s3c_camif_set_ratio(camif_cfg_t *cfg)
+ {
+-	unsigned int cmd = (S3C_CICOSCCTRL_CSCR2Y_WIDE | S3C_CICOSCCTRL_CSCY2R_WIDE);
++	unsigned int cmd =
++	    S3C_CICOSCCTRL_CSCR2Y_WIDE | S3C_CICOSCCTRL_CSCY2R_WIDE;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+ 
+-		writel(S3C_CICOSCPRERATIO_SHFACTOR_CO(cfg->sc.shfactor) | \
+-			S3C_CICOSCPRERATIO_PREHORRATIO_CO(cfg->sc.prehratio) | \
+-			S3C_CICOSCPRERATIO_PREVERRATIO_CO(cfg->sc.prevratio), cfg->regs + S3C_CICOSCPRERATIO);
+-
+-		writel(S3C_CICOSCPREDST_PREDSTWIDTH_CO(cfg->sc.predst_x) | \
+-			S3C_CICOSCPREDST_PREDSTHEIGHT_CO(cfg->sc.predst_y), cfg->regs + S3C_CICOSCPREDST);
++		writel(S3C_CICOSCPRERATIO_SHFACTOR_CO(cfg->sc.shfactor) |
++		    S3C_CICOSCPRERATIO_PREHORRATIO_CO(cfg->sc.prehratio) |
++		    S3C_CICOSCPRERATIO_PREVERRATIO_CO(cfg->sc.prevratio),
++		    cfg->regs + S3C_CICOSCPRERATIO);
++
++		writel(S3C_CICOSCPREDST_PREDSTWIDTH_CO(cfg->sc.predst_x) |
++		    S3C_CICOSCPREDST_PREDSTHEIGHT_CO(cfg->sc.predst_y),
++		    cfg->regs + S3C_CICOSCPREDST);
+ 
+ 		/* Differ from Preview */
+ 		if (cfg->sc.scalerbypass)
+@@ -1056,19 +1073,23 @@
+ 			cmd |= S3C_CICOSCCTRL_OUTRGB_FMT_RGB565;
+ 
+ 		if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
+-			cmd |= (S3C_CICOSCCTRL_SCALEUP_H | S3C_CICOSCCTRL_SCALEUP_V);
++			cmd |=
++			    S3C_CICOSCCTRL_SCALEUP_H | S3C_CICOSCCTRL_SCALEUP_V;
+ 
+-		writel(cmd | S3C_CICOSCCTRL_MAINHORRATIO_CO(cfg->sc.mainhratio) | \
+-			S3C_CICOSCCTRL_MAINVERRATIO_CO(cfg->sc.mainvratio), cfg->regs + S3C_CICOSCCTRL);
++		writel(cmd |
++		    S3C_CICOSCCTRL_MAINHORRATIO_CO(cfg->sc.mainhratio) |
++		    S3C_CICOSCCTRL_MAINVERRATIO_CO(cfg->sc.mainvratio),
++		    cfg->regs + S3C_CICOSCCTRL);
+ 
+ 	} else if (cfg->dma_type & CAMIF_PREVIEW) {
+-
+-		writel(S3C_CIPRSCPRERATIO_SHFACTOR_PR(cfg->sc.shfactor) | \
+-			S3C_CIPRSCPRERATIO_PREHORRATIO_PR(cfg->sc.prehratio) | \
+-			S3C_CIPRSCPRERATIO_PREVERRATIO_PR(cfg->sc.prevratio), cfg->regs + S3C_CIPRSCPRERATIO);
+-
+-		writel(S3C_CIPRSCPREDST_PREDSTWIDTH_PR(cfg->sc.predst_x) | \
+-			S3C_CIPRSCPREDST_PREDSTHEIGHT_PR(cfg->sc.predst_y), cfg->regs + S3C_CIPRSCPREDST);
++		writel(S3C_CIPRSCPRERATIO_SHFACTOR_PR(cfg->sc.shfactor) |
++		    S3C_CIPRSCPRERATIO_PREHORRATIO_PR(cfg->sc.prehratio) |
++		    S3C_CIPRSCPRERATIO_PREVERRATIO_PR(cfg->sc.prevratio),
++		    cfg->regs + S3C_CIPRSCPRERATIO);
++
++		writel(S3C_CIPRSCPREDST_PREDSTWIDTH_PR(cfg->sc.predst_x) |
++		    S3C_CIPRSCPREDST_PREDSTHEIGHT_PR(cfg->sc.predst_y),
++		    cfg->regs + S3C_CIPRSCPREDST);
+ 
+ 		if (cfg->dst_fmt & CAMIF_RGB24)
+ 			cmd |= S3C_CIPRSCCTRL_OUTRGB_FMT_PR_RGB888;
+@@ -1076,10 +1097,12 @@
+ 			cmd |= S3C_CIPRSCCTRL_OUTRGB_FMT_PR_RGB565;
+ 
+ 		if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
+-			cmd |= ((1 << 30) | (1 << 29));
++			cmd |= (1 << 30) | (1 << 29);
+ 
+-		writel(cmd | S3C_CIPRSCCTRL_MAINHORRATIO_PR(cfg->sc.mainhratio) | \
+-			S3C_CIPRSCCTRL_MAINVERRATIO_PR(cfg->sc.mainvratio), cfg->regs + S3C_CIPRSCCTRL);
++		writel(cmd |
++		    S3C_CIPRSCCTRL_MAINHORRATIO_PR(cfg->sc.mainhratio) |
++		    S3C_CIPRSCCTRL_MAINVERRATIO_PR(cfg->sc.mainvratio),
++		    cfg->regs + S3C_CIPRSCCTRL);
+ 
+ 	} else
+ 		printk(KERN_ERR "Invalid DMA type\n");
+@@ -1093,41 +1116,50 @@
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+ 
+-		writel(S3C_CICOSCPRERATIO_SHFACTOR_CO(cfg->sc.shfactor) | \
+-			S3C_CICOSCPRERATIO_PREHORRATIO_CO(cfg->sc.prehratio) | \
+-			S3C_CICOSCPRERATIO_PREVERRATIO_CO(cfg->sc.prevratio), cfg->regs + S3C_CICOSCPRERATIO);
+-
+-		writel(S3C_CICOSCPREDST_PREDSTWIDTH_CO(cfg->sc.predst_x) | \
+-			S3C_CICOSCPREDST_PREDSTHEIGHT_CO(cfg->sc.predst_y), cfg->regs + S3C_CICOSCPREDST);
++		writel(S3C_CICOSCPRERATIO_SHFACTOR_CO(cfg->sc.shfactor) |
++		    S3C_CICOSCPRERATIO_PREHORRATIO_CO(cfg->sc.prehratio) |
++		    S3C_CICOSCPRERATIO_PREVERRATIO_CO(cfg->sc.prevratio),
++		    cfg->regs + S3C_CICOSCPRERATIO);
++
++		writel(S3C_CICOSCPREDST_PREDSTWIDTH_CO(cfg->sc.predst_x) |
++		    S3C_CICOSCPREDST_PREDSTHEIGHT_CO(cfg->sc.predst_y),
++		    cfg->regs + S3C_CICOSCPREDST);
+ 
+ 		if (cfg->sc.scalerbypass)
+ 			cmd |= S3C_CICOSCCTRL_SCALERBYPASS_CO;
+ 
+ 		if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
+-			cmd |= (S3C_CICOSCCTRL_SCALEUP_H | S3C_CICOSCCTRL_SCALEUP_V);
++			cmd |=
++			    S3C_CICOSCCTRL_SCALEUP_H | S3C_CICOSCCTRL_SCALEUP_V;
+ 
+-		writel(cmd | S3C_CICOSCCTRL_MAINHORRATIO_CO(cfg->sc.mainhratio) | \
+-			S3C_CICOSCCTRL_MAINVERRATIO_CO(cfg->sc.mainvratio), cfg->regs + S3C_CICOSCCTRL);
++		writel(cmd |
++		    S3C_CICOSCCTRL_MAINHORRATIO_CO(cfg->sc.mainhratio) |
++		    S3C_CICOSCCTRL_MAINVERRATIO_CO(cfg->sc.mainvratio),
++		    cfg->regs + S3C_CICOSCCTRL);
+ 
+ 	} else if (cfg->dma_type & CAMIF_PREVIEW) {
+ 
+ 		cmd |= S3C_CIPRSCCTRL_SAMPLE_PR;
+ 
+-		writel(S3C_CIPRSCPRERATIO_SHFACTOR_PR(cfg->sc.shfactor) | \
+-			S3C_CIPRSCPRERATIO_PREHORRATIO_PR(cfg->sc.prehratio) | \
+-			S3C_CIPRSCPRERATIO_PREVERRATIO_PR(cfg->sc.prevratio), cfg->regs + S3C_CIPRSCPRERATIO);
+-
+-		writel(S3C_CIPRSCPREDST_PREDSTWIDTH_PR(cfg->sc.predst_x) | \
+-			S3C_CIPRSCPREDST_PREDSTHEIGHT_PR(cfg->sc.predst_y), cfg->regs + S3C_CIPRSCPREDST);
++		writel(S3C_CIPRSCPRERATIO_SHFACTOR_PR(cfg->sc.shfactor) |
++		    S3C_CIPRSCPRERATIO_PREHORRATIO_PR(cfg->sc.prehratio) |
++		    S3C_CIPRSCPRERATIO_PREVERRATIO_PR(cfg->sc.prevratio),
++		    cfg->regs + S3C_CIPRSCPRERATIO);
++
++		writel(S3C_CIPRSCPREDST_PREDSTWIDTH_PR(cfg->sc.predst_x) |
++		    S3C_CIPRSCPREDST_PREDSTHEIGHT_PR(cfg->sc.predst_y),
++		    cfg->regs + S3C_CIPRSCPREDST);
+ 
+ 		if (cfg->dst_fmt & CAMIF_RGB24)
+ 			cmd |= S3C_CIPRSCCTRL_RGBFORMAT_24;
+ 
+ 		if (cfg->sc.scaleup_h & cfg->sc.scaleup_v)
+-			cmd |= ((1 << 29) | (1 << 28));
++			cmd |= (1 << 29) | (1 << 28);
+ 
+-		writel(cmd | S3C_CIPRSCCTRL_MAINHORRATIO_PR(cfg->sc.mainhratio) | \
+-			S3C_CIPRSCCTRL_MAINVERRATIO_PR(cfg->sc.mainvratio), cfg->regs + S3C_CIPRSCCTRL);
++		writel(cmd |
++		    S3C_CIPRSCCTRL_MAINHORRATIO_PR(cfg->sc.mainhratio) |
++		    S3C_CIPRSCCTRL_MAINVERRATIO_PR(cfg->sc.mainvratio),
++		    cfg->regs + S3C_CIPRSCCTRL);
+ 
+ 	} else
+ 		printk(KERN_ERR "Invalid DMA type\n");
+@@ -1136,37 +1168,37 @@
+ }
+ #endif
+ 
+-static int s3c_camif_calc_ratio(unsigned int src_width, unsigned int dst_width, unsigned int *ratio, unsigned int *shift)
++static int s3c_camif_calc_ratio(unsigned int src_width, unsigned int dst_width,
++    unsigned int *ratio, unsigned int *shift)
+ {
+ 	if (src_width >= 64 * dst_width) {
+-		printk(KERN_ERR "Out of pre-scaler range: src_width / dst_width = %d (< 64)\n", src_width / dst_width);
++		printk(KERN_ERR "Out of pre-scaler range: "
++		    "src_width / dst_width = %d (< 64)\n",
++		    src_width / dst_width);
+ 		return 1;
+-	} else if (src_width >= 32 * dst_width) {
+-		*ratio = 32;
++	}
++	if (src_width >= 32 * dst_width) {
+ 		*shift = 5;
+ 	} else if (src_width >= 16 * dst_width) {
+-		*ratio = 16;
+ 		*shift = 4;
+ 	} else if (src_width >= 8 * dst_width) {
+-		*ratio = 8;
+ 		*shift = 3;
+ 	} else if (src_width >= 4 * dst_width) {
+-		*ratio = 4;
+ 		*shift = 2;
+ 	} else if (src_width >= 2 * dst_width) {
+-		*ratio = 2;
+ 		*shift = 1;
+ 	} else {
+-		*ratio = 1;
+ 		*shift = 0;
+ 	}
+ 
++	*ratio = 1 << *shift;
++
+ 	return 0;
+ }
+ 
+ static int s3c_camif_setup_scaler(camif_cfg_t *cfg)
+ {
+-	int tx = cfg->target_x, ty=cfg->target_y;
++	int tx = cfg->target_x, ty = cfg->target_y;
+ 	int sx, sy;
+ 
+ 	if (tx <= 0 || ty <= 0) {
+@@ -1174,8 +1206,10 @@
+ 		return -1;
+ 	}
+ 
+-	sx = cfg->cis->source_x - (cfg->cis->win_hor_ofst + cfg->cis->win_hor_ofst2);
+-	sy = cfg->cis->source_y - (cfg->cis->win_ver_ofst + cfg->cis->win_hor_ofst2);
++	sx = cfg->cis->source_x -
++	    (cfg->cis->win_hor_ofst + cfg->cis->win_hor_ofst2);
++	sy = cfg->cis->source_y -
++	    (cfg->cis->win_ver_ofst + cfg->cis->win_hor_ofst2);
+ 
+ 	if (sx <= 0 || sy <= 0)	{
+ 		printk(KERN_ERR "Invalid source size\n");
+@@ -1190,9 +1224,11 @@
+ 	s3c_camif_calc_ratio(sy, ty, &cfg->sc.prevratio, &cfg->sc.vfactor);
+ 
+ 	if (cfg->dma_type & CAMIF_PREVIEW) {
+-		if ((sx / cfg->sc.prehratio) > 640) {
+-			printk(KERN_INFO "Internal preview line buffer length is 640 pixels\n");
+-			printk(KERN_INFO "Decrease the resolution or adjust window offset values appropriately\n");
++		if (sx / cfg->sc.prehratio > 640) {
++			printk(KERN_INFO "Internal preview line buffer length "
++			    "is 640 pixels\n");
++			printk(KERN_INFO "Decrease the resolution or adjust "
++			    "window offset values appropriately\n");
+ 		}
+ 	}
+ 
+@@ -1206,8 +1242,8 @@
+ 	cfg->sc.mainhratio = (sx << 8) / (tx << cfg->sc.hfactor);
+ 	cfg->sc.mainvratio = (sy << 8) / (ty << cfg->sc.vfactor);
+ 
+-	cfg->sc.scaleup_h  = (sx <= tx) ? 1 : 0;
+-	cfg->sc.scaleup_v  = (sy <= ty) ? 1 : 0;
++	cfg->sc.scaleup_h = sx <= tx;
++	cfg->sc.scaleup_v = sy <= ty;
+ 
+ 	s3c_camif_set_ratio(cfg);
+ 	s3c_camif_set_target_area(cfg);
+@@ -1231,15 +1267,17 @@
+ 		cmd = CAMIF_ITU656;
+ 	}
+ 
+-	cmd |= (S3C_CISRCFMT_SOURCEHSIZE(cis->source_x) | S3C_CISRCFMT_SOURCEVSIZE(cis->source_y));
++	cmd |= S3C_CISRCFMT_SOURCEHSIZE(cis->source_x) |
++	    S3C_CISRCFMT_SOURCEVSIZE(cis->source_y);
+ 
+ 	/* Order422 */
+ 	cmd |= cis->order422;
+ 	writel(cmd, cfg->regs + S3C_CISRCFMT);
+ 
+ #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
+-	cmd = (cis->order422 >> 14);
+-	writel((readl(cfg->regs + S3C_CICOCTRL) & ~(0x3 << 0)) | cmd, cfg->regs + S3C_CICOCTRL);
++	cmd = cis->order422 >> 14;
++	writel((readl(cfg->regs + S3C_CICOCTRL) & ~(0x3 << 0)) | cmd,
++	    cfg->regs + S3C_CICOCTRL);
+ #endif
+ 
+ 	return 0;
+@@ -1251,25 +1289,30 @@
+ 	unsigned int cmd = 0;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		cmd |= S3C_CICOTRGFMT_TARGETHSIZE_CO(cfg->target_x) | S3C_CICOTRGFMT_TARGETVSIZE_CO(cfg->target_y);
++		cmd |= S3C_CICOTRGFMT_TARGETHSIZE_CO(cfg->target_x) |
++		    S3C_CICOTRGFMT_TARGETVSIZE_CO(cfg->target_y);
+ 
+-		if (cfg->dst_fmt & CAMIF_YCBCR420) {
+-			cmd |= (S3C_CICOTRGFMT_OUT422_420 | S3C_CICOTRGFMT_IN422_422);
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else if (cfg->dst_fmt & CAMIF_YCBCR422) {
+-			cmd |= (S3C_CICOTRGFMT_OUT422_422 | S3C_CICOTRGFMT_IN422_422);
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else if ((cfg->dst_fmt & CAMIF_RGB24) || (cfg->dst_fmt & CAMIF_RGB16)) {
+-			cmd |= (S3C_CICOTRGFMT_OUT422_422 | S3C_CICOTRGFMT_IN422_422);
+-			writel(cmd | (1 << 29), cfg->regs + S3C_CICOTRGFMT);
+-		} else
++		if (cfg->dst_fmt & CAMIF_YCBCR420)
++			cmd |= S3C_CICOTRGFMT_OUT422_420 |
++			    S3C_CICOTRGFMT_IN422_422;
++		else if (cfg->dst_fmt & CAMIF_YCBCR422)
++			cmd |= (S3C_CICOTRGFMT_OUT422_422 |
++			    S3C_CICOTRGFMT_IN422_422);
++		else if ((cfg->dst_fmt & CAMIF_RGB24) ||
++			   (cfg->dst_fmt & CAMIF_RGB16))
++			cmd |= (S3C_CICOTRGFMT_OUT422_422 |
++			    S3C_CICOTRGFMT_IN422_422) | (1 << 29);
++		else
+ 			printk(KERN_ERR "Invalid target format\n");
++		writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+ 	} else {
+ 		assert(cfg->dma_type & CAMIF_PREVIEW);
+ 
+ 		cmd = readl(cfg->regs + S3C_CIPRTRGFMT);
+-		cmd &= (S3C_CIPRTRGFMT_TARGETHSIZE_PR(0) | S3C_CIPRTRGFMT_TARGETVSIZE_PR(0));
+-		cmd |= (S3C_CIPRTRGFMT_TARGETHSIZE_PR(cfg->target_x) | S3C_CIPRTRGFMT_TARGETVSIZE_PR(cfg->target_y));
++		cmd &= ~(S3C_CIPRTRGFMT_TARGETHSIZE_PR(0x1fff) |
++		    S3C_CIPRTRGFMT_TARGETVSIZE_PR(0x1fff));
++		cmd |= S3C_CIPRTRGFMT_TARGETHSIZE_PR(cfg->target_x) |
++		    S3C_CIPRTRGFMT_TARGETVSIZE_PR(cfg->target_y);
+ 
+ 		writel(cmd | (2 << 30), cfg->regs + S3C_CIPRTRGFMT);
+ 	}
+@@ -1282,28 +1325,29 @@
+ 	unsigned int cmd = 0;
+ 
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+-		cmd |= (S3C_CICOTRGFMT_TARGETHSIZE_CO(cfg->target_x) | S3C_CICOTRGFMT_TARGETVSIZE_CO(cfg->target_y));
++		cmd |= S3C_CICOTRGFMT_TARGETHSIZE_CO(cfg->target_x) |
++		    S3C_CICOTRGFMT_TARGETVSIZE_CO(cfg->target_y);
+ 
+-		if (cfg->dst_fmt & CAMIF_YCBCR420) {
++		if (cfg->dst_fmt & CAMIF_YCBCR420)
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR420OUT;
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else if (cfg->dst_fmt & CAMIF_YCBCR422) {
++		else if (cfg->dst_fmt & CAMIF_YCBCR422)
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR422OUT;
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else if (cfg->dst_fmt & CAMIF_YCBCR422I) {
++		else if (cfg->dst_fmt & CAMIF_YCBCR422I)
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR422OUTINTERLEAVE;
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else if ((cfg->dst_fmt & CAMIF_RGB24) || (cfg->dst_fmt & CAMIF_RGB16)) {
++		else if ((cfg->dst_fmt & CAMIF_RGB24) ||
++			   (cfg->dst_fmt & CAMIF_RGB16))
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_RGBOUT;
+-			writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+-		} else
++		else
+ 			printk(KERN_ERR "Invalid target format\n");
++		writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+ 	} else {
+ 		assert(cfg->dma_type & CAMIF_PREVIEW);
+ 
+ 		cmd = readl(cfg->regs + S3C_CIPRTRGFMT);
+-		cmd &= (S3C_CIPRTRGFMT_TARGETHSIZE_PR(0) | S3C_CIPRTRGFMT_TARGETVSIZE_PR(0));
+-		cmd |= (S3C_CIPRTRGFMT_TARGETHSIZE_PR(cfg->target_x) | S3C_CIPRTRGFMT_TARGETVSIZE_PR(cfg->target_y));
++		cmd &= ~(S3C_CIPRTRGFMT_TARGETHSIZE_PR(0x1fff) |
++		    S3C_CIPRTRGFMT_TARGETVSIZE_PR(0x1fff));
++		cmd |= S3C_CIPRTRGFMT_TARGETHSIZE_PR(cfg->target_x) |
++		    S3C_CIPRTRGFMT_TARGETVSIZE_PR(cfg->target_y);
+ 
+ 		if (cfg->dst_fmt & CAMIF_YCBCR420)
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR420OUT;
+@@ -1311,7 +1355,8 @@
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR422OUT;
+ 		else if (cfg->dst_fmt & CAMIF_YCBCR422I)
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_YCBCR422OUTINTERLEAVE;
+-		else if ((cfg->dst_fmt & CAMIF_RGB24) || (cfg->dst_fmt & CAMIF_RGB16))
++		else if ((cfg->dst_fmt & CAMIF_RGB24) ||
++			 (cfg->dst_fmt & CAMIF_RGB16))
+ 			cmd |= S3C_CICOTRGFMT_OUTFORMAT_RGBOUT;
+ 		else
+ 			printk(KERN_ERR "Invalid target format\n");
+@@ -1329,14 +1374,16 @@
+ int s3c_camif_control_fimc(camif_cfg_t *cfg)
+ {
+ 	if (s3c_camif_request_memory(cfg)) {
+-		printk(KERN_ERR "Instead of using consistent_alloc(). Let me use dedicated mem for DMA\n");
++		printk(KERN_ERR "Instead of using consistent_alloc(). "
++		    "Let me use dedicated mem for DMA\n");
+ 		return -1;
+ 	}
+ 
+ 	s3c_camif_setup_input_path(cfg);
+ 
+ 	if (s3c_camif_setup_scaler(cfg)) {
+-		printk(KERN_ERR "Preview scaler fault: change WinHorOfset or target size\n");
++		printk(KERN_ERR "Preview scaler fault: "
++		    "change WinHorOfset or target size\n");
+ 		return 1;
+ 	}
+ 
+@@ -1371,7 +1418,8 @@
+ 		val |= S3C_CIPRSCCTRL_START;
+ 		writel(val, cfg->regs + S3C_CIPRSCCTRL);
+ 
+-		n_cmd |= S3C_CIIMGCPT_IMGCPTEN_COSC | S3C_CIIMGCPT_IMGCPTEN_PRSC;
++		n_cmd |=
++		    S3C_CIIMGCPT_IMGCPTEN_COSC | S3C_CIIMGCPT_IMGCPTEN_PRSC;
+ 		break;
+ 
+ 	case CAMIF_DMA_ON:
+@@ -1398,7 +1446,8 @@
+ 		/* First settting, to wait VSYNC fall  */
+ 		/* By VESA spec,in 640x480 @60Hz
+ 		   MAX Delay Time is around 64us which "while" has.*/
+-		while (S3C_CICOSTATUS_VSYNC & readl(cfg->regs + S3C_CICOSTATUS));
++		while (S3C_CICOSTATUS_VSYNC &
++		    readl(cfg->regs + S3C_CICOSTATUS));
+ 		break;
+ 
+ 	default:
+@@ -1408,11 +1457,11 @@
+ #if defined(CONFIG_CPU_S3C2443)
+ 	if (cfg->dma_type & CAMIF_CODEC) {
+ 		if (cfg->dst_fmt & CAMIF_RGB24)
+-			n_cmd |= (3 << 25);
++			n_cmd |= 3 << 25;
+ 		else if (cfg->dst_fmt & CAMIF_RGB16)
+-			n_cmd |= (1 << 25);
++			n_cmd |= 1 << 25;
+ 		else if (cfg->dst_fmt & CAMIF_YCBCR420)
+-			n_cmd |= (2 << 25);
++			n_cmd |= 2 << 25;
+ 	}
+ #endif
+ 
+@@ -1517,7 +1566,7 @@
+ 	val |= (1 << 0);
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-	while((readl(cfg->regs + S3C_CIMSCTRL) & (1 << 6)) == 0);
++	while(!readl(cfg->regs + S3C_CIMSCTRL) & (1 << 6));
+ 
+ 	return ret;
+ }
+@@ -1533,10 +1582,12 @@
+ 		writel(cmd, cfg->regs + S3C_CICOTRGFMT);
+ 	} else {
+ 		/* if ROT90_Pr == 1, dma burst length must be 4 */
+-		if (cfg->flip == CAMIF_ROTATE_90 || cfg->flip == CAMIF_FLIP_ROTATE_270) {
++		if (cfg->flip == CAMIF_ROTATE_90 ||
++		    cfg->flip == CAMIF_FLIP_ROTATE_270) {
+ 			cmd = readl(cfg->regs + S3C_CIPRCTRL);
+ 			cmd &= ~(0x3ff << 14);
+-			cmd |= (S3C_CICOCTRL_YBURST1_CO(4) | S3C_CICOCTRL_YBURST2_CO(4));
++			cmd |= (S3C_CICOCTRL_YBURST1_CO(4) |
++			    S3C_CICOCTRL_YBURST2_CO(4));
+ 			writel(cmd, cfg->regs + S3C_CIPRCTRL);
+ 		}
+ 
+@@ -1550,6 +1601,7 @@
+ void s3c_camif_change_effect(camif_cfg_t *cfg)
+ {
+ 	unsigned int val = readl(cfg->regs + S3C_CIIMGEFF);
++
+ 	val &= ~((1 << 28) | (1 << 27) | (1 << 26));
+ 
+ #if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410)
+@@ -1587,22 +1639,22 @@
+ 
+ int s3c_camif_do_postprocess(camif_cfg_t *cfg)
+ {
+-	unsigned int val= readl(cfg->regs + S3C_CIMSCTRL);
++	unsigned int val = readl(cfg->regs + S3C_CIMSCTRL);
+ 
+ 	if (cfg->dst_fmt & CAMIF_YCBCR420)
+-		val |= (1 << 1);
++		val |= 1 << 1;
+ 	else
+ 		val &= ~(1 << 1);
+ 
+ 	val &= ~(1 << 0);
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+-	val |= (1 << 0);
++	val |= 1 << 0;
+ 	writel(val, cfg->regs + S3C_CIMSCTRL);
+ 
+ 	printk(KERN_INFO "Postprocessing started\n");
+ 
+-	while((readl(cfg->regs + S3C_CIMSCTRL) & (1 << 6)) == 0);
++	while(!readl(cfg->regs + S3C_CIMSCTRL) & (1 << 6));
+ 
+ 	printk(KERN_INFO "Postprocessing finished\n");
+ 
+@@ -1618,9 +1670,9 @@
+ 	unsigned int v2 = cis->win_ver_ofst2;	/* Camera input offset ONLY */
+ 
+ 	/*Clear Overflow */
+-	writel(S3C_CIWDOFST_CLROVCOFIY | S3C_CIWDOFST_CLROVCOFICB | \
+-		S3C_CIWDOFST_CLROVCOFICR | S3C_CIWDOFST_CLROVPRFICB | \
+-		S3C_CIWDOFST_CLROVPRFICR, cfg->regs + S3C_CIWDOFST);
++	writel(S3C_CIWDOFST_CLROVCOFIY | S3C_CIWDOFST_CLROVCOFICB |
++	    S3C_CIWDOFST_CLROVCOFICR | S3C_CIWDOFST_CLROVPRFICB |
++	    S3C_CIWDOFST_CLROVPRFICR, cfg->regs + S3C_CIWDOFST);
+ 
+ 	writel(0, cfg->regs + S3C_CIWDOFST);
+ 
+@@ -1630,9 +1682,12 @@
+ 		return 0;
+ 	}
+ 
+-	writel(S3C_CIWDOFST_WINOFSEN | S3C_CIWDOFST_WINHOROFST(h) | S3C_CIWDOFST_WINVEROFST(v), cfg->regs + S3C_CIWDOFST);
+-	writel(S3C_CIDOWSFT2_WINHOROFST2(h) | S3C_CIDOWSFT2_WINVEROFST2(v), cfg->regs + S3C_CIDOWSFT2);
+-	writel(S3C_CIDOWSFT2_WINHOROFST2(h2) | S3C_CIDOWSFT2_WINVEROFST2(v2), cfg->regs + S3C_CIDOWSFT2);
++	writel(S3C_CIWDOFST_WINOFSEN | S3C_CIWDOFST_WINHOROFST(h) |
++	    S3C_CIWDOFST_WINVEROFST(v), cfg->regs + S3C_CIWDOFST);
++	writel(S3C_CIDOWSFT2_WINHOROFST2(h) | S3C_CIDOWSFT2_WINVEROFST2(v),
++	    cfg->regs + S3C_CIDOWSFT2);
++	writel(S3C_CIDOWSFT2_WINHOROFST2(h2) | S3C_CIDOWSFT2_WINVEROFST2(v2),
++	    cfg->regs + S3C_CIDOWSFT2);
+ 
+ 	return 0;
+ }
+@@ -1665,24 +1720,18 @@
+ {
+ 	unsigned int val;
+ 
+-	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON) {
++	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON ||
++	    (cfg->dma_type & CAMIF_CODEC)) {
+ 		val = readl(cfg->regs + S3C_CICOCTRL);
+ 		val |= S3C_CICOCTRL_LASTIRQEN;
+ 		writel(val, cfg->regs + S3C_CICOCTRL);
++	}
+ 
++	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON ||
++	    !(cfg->dma_type & CAMIF_CODEC)) {
+ 		val = readl(cfg->regs + S3C_CIPRCTRL);
+ 		val |= S3C_CIPRCTRL_LASTIRQEN_ENABLE;
+ 		writel(val, cfg->regs + S3C_CIPRCTRL);
+-	} else {
+-		if (cfg->dma_type & CAMIF_CODEC) {
+-			val = readl(cfg->regs + S3C_CICOCTRL);
+-			val |= S3C_CICOCTRL_LASTIRQEN;
+-			writel(val, cfg->regs + S3C_CICOCTRL);
+-		} else {
+-			val = readl(cfg->regs + S3C_CIPRCTRL);
+-			val |= S3C_CIPRCTRL_LASTIRQEN_ENABLE;
+-			writel(val, cfg->regs + S3C_CIPRCTRL);
+-		}
+ 	}
+ }
+ 
+@@ -1690,24 +1739,18 @@
+ {
+ 	unsigned int val;
+ 
+-	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON) {
++	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON ||
++	    (cfg->dma_type & CAMIF_CODEC)) {
+ 		val = readl(cfg->regs + S3C_CICOCTRL);
+ 		val &= ~S3C_CICOCTRL_LASTIRQEN;
+ 		writel(val, cfg->regs + S3C_CICOCTRL);
++	}
+ 
++	if (cfg->capture_enable == CAMIF_BOTH_DMA_ON ||
++	    !(cfg->dma_type & CAMIF_CODEC)) {
+ 		val = readl(cfg->regs + S3C_CIPRCTRL);
+ 		val &= ~S3C_CIPRCTRL_LASTIRQEN_ENABLE;
+ 		writel(val, cfg->regs + S3C_CIPRCTRL);
+-	} else {
+-		if (cfg->dma_type & CAMIF_CODEC) {
+-			val = readl(cfg->regs + S3C_CICOCTRL);
+-			val &= ~S3C_CICOCTRL_LASTIRQEN;
+-			writel(val, cfg->regs + S3C_CICOCTRL);
+-		} else {
+-			val = readl(cfg->regs + S3C_CIPRCTRL);
+-			val &= ~S3C_CIPRCTRL_LASTIRQEN_ENABLE;
+-			writel(val, cfg->regs + S3C_CIPRCTRL);
+-		}
+ 	}
+ }
+ 
+@@ -1871,4 +1914,3 @@
+ 	s3c_camif_reset(CAMIF_RESET, 0);
+ 	s3c_camif_set_gpio();
+ }
+-

Added: developers/werner/gta03/cam/patches/fix-s3c6400-clock-shift.patch
===================================================================
--- developers/werner/gta03/cam/patches/fix-s3c6400-clock-shift.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/fix-s3c6400-clock-shift.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,24 @@
+Fix clock shift in s3c64xx_setrate_clksrc
+
+s3c64xx_setrate_clksrc used the clock selection shift sclk->shift instead
+of the divider shift sclk->divider_shift, causing clocks to be clobbered.
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/arch/arm/plat-s3c64xx/s3c6400-clock.c
+===================================================================
+--- cam.orig/arch/arm/plat-s3c64xx/s3c6400-clock.c	2009-03-09 20:10:23.000000000 +0800
++++ cam/arch/arm/plat-s3c64xx/s3c6400-clock.c	2009-03-09 20:10:56.000000000 +0800
+@@ -243,8 +243,8 @@
+ 		return -EINVAL;
+ 
+ 	val = __raw_readl(reg);
+-	val &= ~(0xf << sclk->shift);
+-	val |= (div - 1) << sclk->shift;
++	val &= ~(0xf << sclk->divider_shift);
++	val |= (div - 1) << sclk->divider_shift;
+ 	__raw_writel(val, reg);
+ 
+ 	return 0;

Added: developers/werner/gta03/cam/patches/fix-s3c64xx_roundrate_clksrc.patch
===================================================================
--- developers/werner/gta03/cam/patches/fix-s3c64xx_roundrate_clksrc.patch	                        (rev 0)
+++ developers/werner/gta03/cam/patches/fix-s3c64xx_roundrate_clksrc.patch	2009-03-09 18:51:24 UTC (rev 4954)
@@ -0,0 +1,21 @@
+Fix division in s3c64xx_roundrate_clksrc
+
+s3c64xx_roundrate_clksrc got the rate vs. parent order wrong.
+
+Signed-off-by: Werner Almesberger <werner at openmoko.org>
+
+---
+
+Index: cam/arch/arm/plat-s3c64xx/s3c6400-clock.c
+===================================================================
+--- cam.orig/arch/arm/plat-s3c64xx/s3c6400-clock.c	2009-03-09 20:04:25.000000000 +0800
++++ cam/arch/arm/plat-s3c64xx/s3c6400-clock.c	2009-03-09 20:09:12.000000000 +0800
+@@ -284,7 +284,7 @@
+ 	if (rate > parent_rate)
+ 		rate = parent_rate;
+ 	else {
+-		div = rate / parent_rate;
++		div = parent_rate / rate;
+ 
+ 		if (div == 0)
+ 			div = 1;

Modified: developers/werner/gta03/cam/patches/series
===================================================================
--- developers/werner/gta03/cam/patches/series	2009-03-06 20:17:20 UTC (rev 4953)
+++ developers/werner/gta03/cam/patches/series	2009-03-09 18:51:24 UTC (rev 4954)
@@ -1 +1,14 @@
+# cleanup
+cleanup-camera-driver.patch
+cleanup-camif.patch
 cleanup-4xa_sensor.patch
+
+# reissue
+#add-64xx-cam-clock.patch
+
+# for Ben
+#fix-s3c64xx_roundrate_clksrc.patch
+#fix-s3c6400-clock-shift.patch
+
+#fix-camera-clock.patch
+#camera-adjust-mclk.patch




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