FPGA

Leonardo Etcheverry legumbre at adinet.com.uy
Fri Dec 8 21:14:22 CET 2006


Jeremy wrote:
> AFAIK from my VERY limited exposure to FPGAs, you actually have a 
> couple options.  There is SRAM storage which requires re-program at 
> power cycle.  But you also have Fuse/Anti-Fuse FPGAs which are one 
> time programmed; and EPROM, EEPROM, and flash which don't require you 
> to reprogram at power cycle.
>
> Again, that's what I remember from the small amount of time I spent 
> looking at them as a solution for a previous project.
>
> Jeremy Crosen
Jeremy,
You're absolutely right, you do have all those options. It's all just a 
matter of terminology.
Just found this pdf at xiliinx.com, maybe it could be useful to anoyone 
who seeks more info on the subject : 
http://www.xilinx.com/publications/products/cpld/logic_handbook.pdf

Leonardo Etcheverry.

>
> ----- Original Message ----
> From: Leonardo Etcheverry <legumbre at adinet.com.uy>
> To: community at lists.openmoko.org
> Sent: Friday, December 8, 2006 9:06:35 AM
> Subject: Re: FPGA
>
> Tim Newsom wrote:
> > Bah!  I meant to copy the list on that question.
> >
> > Thanks for the answer though.  Maybe someone else can also help
> > clarify?  I thought fpga were basically PLDs and that they worked
> > exactly the same.  I didn't know they lose config without power and
> > need to be reprogrammed.
> Nowadays the line that separates FPGAs from CPLDs is blurry and even
> different vendors have different sayings about it. Initially, PLDs were
> devices, which could hold a rather limited amount of logic, yet they
> kept their configuration after being power cycled. Then FPGAs came
> along, which could hold a much larger amount of logic, but they lose
> their configuration whenever power is lost. So FPGAs need to be
> programmed each time the power is cycled (It's interesting to note that
> a FPGA is actually based on SRAM and LUTs.)
> Also, note that FPGAs can work in either 'passive' or 'active' mode.
> When in 'passive', someone needs to externally initiate the programming
> of the device, tipically a JTAG chain. When in 'active' mode, the FPGA
> will try to fetch its own configuration from a (small) ROM connected to
> it, this allows for easy configuration in standalone devices.
>
> Then came along CPLDs which offered more density than the CPLDs, though
> not as a much as a FPGA, but they kept configuration even without power.
> FPGAs however, are the most popular devices today, they have the
> greatest density and allow to hold complex designs such as video codecs,
> DSP blocks and even whole processors.
> (As of these days, I'm working on a design consisting of a FPGA holding
> an entire processor along with 'custom' hardware in order to speed up a
> voice codec algorithm).
>
> To sum up:
>
>    * FPGA : the device with the greatest density, they tipically lose
> configuration when power cycled (note that Xilinx offers OTP (one time
> programmable) FPGAs, which keep their configuration, but that's a whole
> different story....let's stick to the everyday jargon :-) )
>    * CPLDs : devices less dense than FPGAs, but they keep their
> configuration even after losing power.
>
> I hope this mail wasn't THAT much confusing... :-)
>
> By the way, keep up the good work, I think the OpenMoko initiative is a
> terrific idea, and if it turns out as half as good as the ideas I've
> seen in this list, it will sure turn out to be a great product!
>
> Regards, Leonardo Etcheverry
>
>
>
> >
> > --Tim
> > On Fri, 8 Dec 2006 5:51, Ole Tange wrote:
> >> As far as I understand it is like RAM: It looses state if it looses
> >> power. So it will have to read its config from some storage to start
> >> working.
> >>
> >> From http://en.wikipedia.org/wiki/CPLD:
> >>
> >> Non-volatile configuration memory. Unlike many FPGAs, an external
> >> configuration ROM isn't required, and the CPLD can function
> >> immediately on system start-up.
> >>
> >>
> >> /Ole
> >>
> >> On 12/7/06, Tim Newsom <cephdon at gmail.com> wrote:
> >>> Ok... So how many times can you reprogram it before it wears out?
> >>>
> >>> Like flash has a max number of times it can be written and eprom and
> >>> eeproms did... What's that number for FPGAs?
> >>>
> >>> On Thu, 7 Dec 2006 15:40, Ole Tange wrote:
> >>>>  You cannot use them simultaneously, but you can change set in 10 ms.
> >>>>
> >>>>
> >>>>  /Ole
> >>>>
> >>>>  _______________________________________________
> >>>>  OpenMoko community mailing list
> >>>>  community at lists.openmoko.org
> >>>>  http://lists.openmoko.org/cgi-bin/mailman/listinfo/community
> >>> --Tim
> >>>
> >
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