WSOD (ticket #1841) (unofficial) survey question

Andy Green andy at
Thu Nov 13 10:03:53 CET 2008

Hash: SHA1

Somebody in the thread at some point said:

|> I think the powersaving WSOD isn't realy the problem - it isn't
|> temperature-dependent, it will always be there.
|> But the other one _only_ occurs below some temperatur level.

They can reflect the same underlying issue, GPIO control of Glamo pins
that talk to the ASIC in the LCM is broken somehow / sometimes.

| That "level shifter" is definitely evil, if you pop the can and touch it
| with a scope probe it hard resets the Glamo, as you would expect with
| such high source impedence.  Other things seem to be able to make spikes
| on it too somehow.  But to be fair to it I never saw it make a failure
| in normal operation, only during suspend / resume time.
|> I am creating/programm for years yC based designs and not long ago
I've seen
|> some similar thing.
|> The schematic worked perfect and sometimes only partly.  I thought little
|> gremlins must be in there - but the result was only two resistors wich
|> drives some parts to close to their specifications.

Yes as I say it is "definitely evil".  But I think we can work around it
since we never see it reset in normal operation -->

| In stable-tracking we work around this by always hard resetting the
| Glamo on resume ourselves on the basis there can have been an
| uncontrolled reset in the meanwhile.

- -Andy
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