<html><head><style type="text/css"><!-- DIV {margin:0px;} --></style></head><body><div style="font-family:times new roman, new york, times, serif;font-size:12pt"><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;">AFAIK from my VERY limited exposure to FPGAs, you actually have a couple options. There is SRAM storage which requires re-program at power cycle. But you also have Fuse/Anti-Fuse FPGAs which are one time programmed; and EPROM, EEPROM, and flash which don't require you to reprogram at power cycle.<br><br>Again, that's what I remember from the small amount of time I spent looking at them as a solution for a previous project.<br><br>Jeremy Crosen<br><br><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;">----- Original Message ----<br>From: Leonardo Etcheverry <legumbre@adinet.com.uy><br>To: community@lists.openmoko.org<br>Sent: Friday, December 8, 2006 9:06:35 AM<br>Subject: Re:
FPGA<br><br><div>Tim Newsom wrote:<br>> Bah! I meant to copy the list on that question.<br>><br>> Thanks for the answer though. Maybe someone else can also help <br>> clarify? I thought fpga were basically PLDs and that they worked <br>> exactly the same. I didn't know they lose config without power and <br>> need to be reprogrammed.<br>Nowadays the line that separates FPGAs from CPLDs is blurry and even <br>different vendors have different sayings about it. Initially, PLDs were <br>devices, which could hold a rather limited amount of logic, yet they <br>kept their configuration after being power cycled. Then FPGAs came <br>along, which could hold a much larger amount of logic, but they lose <br>their configuration whenever power is lost. So FPGAs need to be <br>programmed each time the power is cycled (It's interesting to note that <br>a FPGA is actually based on SRAM and LUTs.)<br>Also, note that FPGAs can
work in either 'passive' or 'active' mode. <br>When in 'passive', someone needs to externally initiate the programming <br>of the device, tipically a JTAG chain. When in 'active' mode, the FPGA <br>will try to fetch its own configuration from a (small) ROM connected to <br>it, this allows for easy configuration in standalone devices.<br><br>Then came along CPLDs which offered more density than the CPLDs, though <br>not as a much as a FPGA, but they kept configuration even without power.<br>FPGAs however, are the most popular devices today, they have the <br>greatest density and allow to hold complex designs such as video codecs, <br>DSP blocks and even whole processors.<br>(As of these days, I'm working on a design consisting of a FPGA holding <br>an entire processor along with 'custom' hardware in order to speed up a <br>voice codec algorithm).<br><br>To sum up:<br><br> * FPGA : the device with the greatest density, they tipically lose <br>configuration when
power cycled (note that Xilinx offers OTP (one time <br>programmable) FPGAs, which keep their configuration, but that's a whole <br>different story....let's stick to the everyday jargon :-) )<br> * CPLDs : devices less dense than FPGAs, but they keep their <br>configuration even after losing power.<br><br>I hope this mail wasn't THAT much confusing... :-)<br><br>By the way, keep up the good work, I think the OpenMoko initiative is a <br>terrific idea, and if it turns out as half as good as the ideas I've <br>seen in this list, it will sure turn out to be a great product!<br><br>Regards, Leonardo Etcheverry<br><br><br><br>><br>> --Tim<br>> On Fri, 8 Dec 2006 5:51, Ole Tange wrote:<br>>> As far as I understand it is like RAM: It looses state if it looses<br>>> power. So it will have to read its config from some storage to start<br>>> working.<br>>><br>>> From <a target="_blank"
href="http://en.wikipedia.org/wiki/CPLD">http://en.wikipedia.org/wiki/CPLD</a>:<br>>><br>>> Non-volatile configuration memory. Unlike many FPGAs, an external<br>>> configuration ROM isn't required, and the CPLD can function<br>>> immediately on system start-up.<br>>><br>>><br>>> /Ole<br>>><br>>> On 12/7/06, Tim Newsom <cephdon@gmail.com> wrote:<br>>>> Ok... So how many times can you reprogram it before it wears out?<br>>>><br>>>> Like flash has a max number of times it can be written and eprom and<br>>>> eeproms did... What's that number for FPGAs?<br>>>><br>>>> On Thu, 7 Dec 2006 15:40, Ole Tange wrote:<br>>>>> You cannot use them simultaneously, but you can change set in 10
ms.<br>>>>><br>>>>><br>>>>> /Ole<br>>>>><br>>>>> _______________________________________________<br>>>>> OpenMoko community mailing list<br>>>>> community@lists.openmoko.org<br>>>>> <a target="_blank" href="http://lists.openmoko.org/cgi-bin/mailman/listinfo/community">http://lists.openmoko.org/cgi-bin/mailman/listinfo/community</a><br>>>> --Tim<br>>>><br>><br>> _______________________________________________<br>> OpenMoko community mailing list<br>> community@lists.openmoko.org<br>> <a target="_blank" href="http://lists.openmoko.org/cgi-bin/mailman/listinfo/community">http://lists.openmoko.org/cgi-bin/mailman/listinfo/community</a><br>><br><br><br>_______________________________________________<br>OpenMoko community mailing list<br>community@lists.openmoko.org<br><a target="_blank"
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