[gta02-core] PCF50633 footprint and footprints in general

[Dave Ball]

Werner Almesberger wrote:
> NXP's AN10365 [1] has a few useful advices on pages 14 and 15:
Ahh - great.

> the footprint's SLx/SLy should be 4.8 and 4.3 mm as well.
> (You used the upper bounds 4.95 and 4.45 mm.)
>   
fixed

> Using c), since 4.8 and 4.3 mm are a bit smaller than 5.1 mm, we
> should probably also have a 3 x 3 array - like HVQFN48 - instead
> of a 4 x 4 array.
>   
fixed

> Your pattern has an overall size SPxTot/SPyTot of 3 mm squared.
> 9 mm^2 are 43.6% of 20.64 mm^2 (40% of 22.0275 mm^2), which is
> a bit larger than the 35% recommended in b). 2.65 mm (34.0%) or
> 2.7 mm (35.3%) would be closer.
>   
Now using 2.7mm

> Taking into account the change to 9 pads, we could use
> 0.65 mm (18.4 %) or 0.7 mm (21.4 %).
>   
Now using 0.7mm

> Ah, and please keep the silk on copper issue in mind.
>   
What's the best way to deal with this?  The silk rectangle I added is 
the chips actual outline, but the pads extend outside this.  I'm 
assuming the silk gets used for placement so needs accurate corners?  
Also, this symbol doesn't have any orientation information - is there a 
prefered way of adding that?

> By the way, in the last few days, I made several usability
> improvements in fped's GUI. E.g., there are now tooltips on
> almost all items, and quirks such as false drags when clicking
> (but not dragging) a draggable point are gone
Ahh. Cool.  The one that keeps throwing me are all the landing points 
for measurements; many of them when you click to drag a measurement all 
of the other points disappear.  It takes a bit of trial and error to 
find points that I can use to get the measurement I want.  Am I doing 
something wrong?

Dave