next-generation PMU discussion / Memory 1.8V

Werner Almesberger werner at
Mon Apr 21 12:17:28 CEST 2008

joerg at wrote:
> I'd say it's NOT recommended to operate the device at minimum Vcc, 

4.15 MHz would be quite slow anyway. It's still ~4 MIPS, but we're
leaving the comfort zone. At 3.0V (for 3.2V battery cut-off, 100mV
for the LDO, 100mV tolerance), we should be able to run at 6 MHz if
the internal clock generator supports this.

By the way, we should really involve Milosch in this discussion.
I think he's the only one in our team who has actually worked with
those chips. uCs are full of quirks and surprises, which you only
find out about when trying to use them.

> Wahtever this SVS-hyst may be...

Page 34 of

> I think it's absolutely worthless to think about the powerconsumption in MPU 
> active state,

Well, not entirely worthless, but if we can agree that the normal state
of the MPU will be suspend, then there's indeed little to worry about.

So, does anyone envision a mode of operation where the MPU would be kept
running for extended periods of time or periodically with a high duty
cycle ?

- Werner

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