WLAN from SDIO to SPI: battle plan

Werner Almesberger werner at openmoko.org
Mon Aug 18 19:38:35 CEST 2008

I wrote:
> Here's a quick update on how I think we can make WLAN work with SPI
> instead of SDIO without too much pain:

A quick update: I have most of the "glue" between the Atheros SDIO
stack and the MMC-SPI driver (for the mainline SDIO stack) written,
but it's still completely untested. Haven't even tried compiling it
yet :-)

Now I'm testing the basic (SPI-level) communication with the WLAN
card by just using the MMC-SPI driver with the mainline SDIO stack.

So far, this looks quirky: there are a few glitches in the MISO
signal and CS isn't handled properly either (the latter may be my
fault, though).


The signals from top to bottom:
D6 = MOSI, D5 with the blue analog channel overlaid = CLK,
D4 = IRQ, D3 with yellow = MISO, D1 = CS, D0 is a "known to be
good" 1MHz reference from a function generator. (Helps me find
sampling rate problems.)

There are two glitches on MISO: one in the 2nd division from the
left and one in the 3rd division from the right. It's a also a
bit strange that MISO changes several times on both edges of the
clock. Maybe the chip is just confused.

Funny chip select timing:

If you count the clock pulses, there's 8+8+6 of them before CS

Could be that s3c24xx_spi is acting up. If I don't find what's
happening, then I'll switch to s3c24xx_spi_gpio (which is of
course the driver we most emphatically don't want to use in the

To be continued ...

- Werner

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