PLL & clock settings on GTA02: u-boot vs. qi

Andy Green andy at
Thu Feb 5 16:34:04 CET 2009

Hash: SHA1

Somebody in the thread at some point said:
| Hey Andy, hey Werner!!
| thanks a lot for these information.
| I already assumed that there are some higher level mechanism.
| Anyway it's good to know, at which base clock the AHB and APB
components are
| running.
| Maybe SDRAM get's unstable at 133MHz because of the external chip
| attached.... and of course it's the upper limit of the MSP.
| Seems that there are also no other values one could try (e.g. 120MHz)
| without changing FCLK.
| As long as all the peripherals on the AHB (NAND-controller, NOR,
GLAMO, ...)
| are setup by waitstates this would also require to look into tons of
| diagrams and testing.
| Nevertheless, i'm really interested in this part of code, especially the
| steppingstone mechanism.
| So i should digg a bit deeper through the bootloader code, to get better
| understanding.

Qi code is WAY simpler to understand in this regard.

It sounds great if you want to meddle with this.  One hidden possibility
you might not be aware of is that the CPU is actually 500MHz-capable
according to the datasheet, I think the part codes claim 533MHz.

It eats more power that way, but you have more options for divider for
MCLK for example.

Back in the day Willie Chen looked at it in Taipei and didn't find a
divider ratio that led to memory workable at near 100MHz.  So what you
gained in CPU clock you then lost in memory bandwidth, it was down to
70MHz or so IIRC.

But it's certainly worth examining again.

- -Andy
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