[PATCH] qi: initialize / canonical PMU state effects vs Qi init

Andy Green andy at openmoko.com
Sun Jan 25 17:36:50 CET 2009 

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Somebody in the thread at some point said:
| Andy Green wrote:
|> For example mass GPIO resetting in
|> kernel idea is incompatible with this path.
|
| The worst that can happen is that we unnecessarily reset a GPIO to
| its reset state. Any real changes this would cause to be made are
| divergences between boot loader and kernel.
|
|> (only: the other reset state for some regs is PMU standby which we
|> know we entered)...
|
| No rule without exception: if we do a reboot or a debug board reset,
| we don't enter PMU.Suspend.

We still have been through a PMU suspend at some point and not NOPOWER
since then.  Because there are many registers we never write in PMU,
that's less worrying than it sounds.

See the analysis attached.

| It's great if the boot loader fixes things. All I'm saying is that
| the kernel shouldn't count on it. The kernel is the last thing
| that runs, so it should be the one who determines the system state.

Right, hence the bit about drivers should be responsible to assert state
of the thing they're driving when they start.

| Otherwise, you get the kind of obscure dependency about which this
| thread started. And this is already the second such critter we
| found in a week or so.

That's telling us something different, changing the bootloader to init
less exposed something else that did need init.  It doesn't mean we're
on the wrong path.





Here is a complete list and analysis of impact of PMU NOPOWER and
suspend modes compared with Qi init for GTA02:


Effect of NOPOWER
=================

OOCSHDN:
~  go_stby  <- 0  (no impact)
~  totrst   <- 0  (no impact)
~  coldboot <- 1  (no impact but informational)

OOCWAKE:
~  All wake from PMU suspend sources enabled

OCTIM1
~  All wake from PMU suspend sources set to 14ms debounce

OOCMODE:
~  ONKEY and EXTON modes all reset to variant default
~  (this is stuff like hold for 8 seconds)
~  [Variant: all set falling edge only]

OCCTL:
~  reset timing, 32kHz out, standby holdoff on bat low, keepact mode
~  all reset to varaiant default
~  [Variant: reset in phase 4, enable 32kHz, disable keepact heartbeat
requirement, disable USBBATCHK, disable 32kHz in PMU standby]

INT 1 - 5:
~  all reset to 0 (no real impact)

INTMASK 1 - 5:
~  all unmasked (no real impact)

GPIOCTL:
~  gpio 1 and 2 to input (gpio 3 is reset to input on PMU standby)
~  actual reset level determined by variant
~  [Variant: Gpio 1 - 3 all INPUT]

GPIO 1 - 3 CFG:
~  determined by variant by not meaningful since only sets output mode
~  [ Variant: all output 0 ]

SVMCTL:
~  svm debounce enabled
~  Vth(sysok) <- variant default
~  [Variant: 3.0V]

BVMCTL:
~  bvmlvl Vth(batok) <- variant default
~  [Variant: 3.1V]

STBYCTL1 - 2:
~  LDO1-6, HCLDO, MEMLDO status during PMU standby reset to variant
~  default
~  [Variant: all OFF in PMU standby]

DEBPF1 - 3:
~  power fail debounce times all reset to 100ms

DCDCPFM:
~  Auto, Down 1 and 2 not forced to PFM mode

MBCC1 - 8:
~  Set to variant default
~  [ Variant
~    MBCC1: disable charger, disable auto charge termination, auto charge
resume, 60 min precharge, 6 hour max charge
~    MBCC2: 2.85V Vbatcond, 4.2V Vmax, 64s debounce
~    MBCC3: 0mA precharge current
~    MBCC4: 0mA Fast Charge
~    MBCC5: 0mA Fast Charge 2
~    MBCC6: 0mA Battery cutoff current
~    MBCC7: battery temp impacts state machine, 2.2A BAT-SYS limit
~    MBCC8: 1.15V temp sensor low limit (not used), USB-System path OFF
in PMU suspend]

ADCC1 - 3, S1 -2: (no impact on function)
~  Reset to 0

RTC regs: (no impact on function)
~  Reset to 0

MEMBYTE 0 -7: (no impact on function)
~  Reset to 0



Effect of PMU Standby
=====================

Note that you have to go through PMU standby as part of coming out of
NOPOWER, so these are in addition to NOPOWER


OOCTIM2: onkey debounce 14ms, activation phase duration 10ms, delay
before reset 13ms, ambient light monitor disabled

GPIOCTL: GPIO3DIR only is set to variant default
~         [Variant: input]


All voltage regulators reset to variant default

AUTO:   ON,  3.3V, Phase 3, 400mA current limit startup only
~                            Auto up-down, auto PFM-PWM selection
DOWN1:  ON,  1.2V, Phase 3, 390mA current limit startup only
DOWN2:  ON,  1.8V, Phase 3, 390mA current limit startup only
MEMLDO: ON,  1.8V, LDO mode, Phase 3
LDO1:   ON,  2.8V, Phase 3
LDO2:   OFF, 1.8V, Phase 3
LDO3:   OFF, 3.3V, Phase 4
LDO4:   ON,  2.8V, Phase 4
LDO5:   OFF, 3.3V, Phase 3
LDO6:   ON,  3.0V, Phase 3
HCLO:   OFF, 3.3V, Phase 3
LED:    OFF

MBCC7: 500mA USB current limit
BBCCTL: backup battery charger OFF



Qi GTA02 Reg init
=================

	{ PCF50633_REG_OOCWAKE,		0xd3 }, /* wake from ONKEY,EXTON!,RTC,USB,ADP */
	{ PCF50633_REG_OOCTIM1,		0xaa },	/* debounce 14ms everything */
	{ PCF50633_REG_OOCTIM2,		0x4a },
	{ PCF50633_REG_OOCMODE,		0x55 },
	{ PCF50633_REG_OOCCTL,		0x47 },

	{ PCF50633_REG_SVMCTL,		0x08 },	/* 3.10V SYS vth, 62ms filter */
	{ PCF50633_REG_BVMCTL,		0x02 },	/* 2.80V BAT vth, 62ms filter */

	{ PCF50633_REG_AUTOENA,		0x01 },	/* always on */

	{ PCF50633_REG_DOWN1OUT,	0x1b }, /* 1.3V (0x1b * .025V + 0.625V) */
	{ PCF50633_REG_DOWN1ENA,	0x02 }, /* enabled if GPIO1 = HIGH */
	{ PCF50633_REG_HCLDOOUT,	21 },	/* 3.0V (21 * 0.1V + 0.9V) */
	{ PCF50633_REG_HCLDOENA,	0x01 }, /* ON by default*/

	{ PCF50633_REG_DOWN1OUT,	0x1b }, /* 1.3V (0x1b * .025V + 0.625V) */
	{ PCF50633_REG_DOWN1ENA,	0x02 }, /* enabled if GPIO1 = HIGH */

	{ PCF50633_REG_INT1M,		0x00 },
	{ PCF50633_REG_INT2M,		0x00 },
	{ PCF50633_REG_INT3M,		0x00 },
	{ PCF50633_REG_INT4M,		0x00 },
	{ PCF50633_REG_INT5M,		0x00 },

	{ PCF50633_REG_MBCC2,		0x28 },	/* Vbatconid=2.7V, Vmax=4.20V */
	{ PCF50633_REG_MBCC3,		0x19 },	/* 25/255 == 98mA pre-charge */
	{ PCF50633_REG_MBCC4,		0xff }, /* 255/255 == 1A adapter fast */
	{ PCF50633_REG_MBCC5,		0xff },	/* 255/255 == 1A usb fast */
	{ PCF50633_REG_MBCC6,		0x00 }, /* cutoff current 1/32 * Ichg */
	{ PCF50633_REG_MBCC7,		0x00 },	/* 1.6A max bat curr, USB 100mA */
	{ PCF50633_REG_MBCC8,		0x00 },
	{ PCF50633_REG_MBCC1,		0xff }, /* chgena */

	{ PCF50633_REG_LDO1ENA,		2 }, /* accel enabled if GPIO1 = H */
	{ PCF50633_REG_LDO2ENA,		2 }, /* codec enabled if GPIO1 = H */
	{ PCF50633_REG_LDO4ENA,		0 }, /* bt off */
	{ PCF50633_REG_LDO5ENA,		0 }, /* gps off */
	{ PCF50633_REG_LDO6ENA,		2 }, /* lcm enabled if GPIO1 = H */

	{ PCF50633_REG_BBCCTL,		0x19 },	/* 3V, 200uA, on */
	{ PCF50633_REG_OOCSHDWN,	0x04 },  /* defeat 8s death from lowsys on A5 */



NOPOWER PMU registers not forced by Qi init
===========================================

GPIOCTL (subject of the pending patch)


PMU Standby registers not forced by Qi init
===========================================

GPIOCTL for GPIO 3 state (GPIO3 is NC on GTA02 anyway)
LDO3ENA (LDO3 is NC on GTA02)
LDO1 - 6OUT: defaults are safe and if last session levels are inherited
they are also safe.


- -Andy
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