cpufreq: gps && rxerr: port=1 ch=0x24, rxs=0x00000001

Nils Faerber nils.faerber at kernelconcepts.de
Tue Jun 16 10:38:19 CEST 2009

Timo Juhani Lindfors schrieb:
> Timo Juhani Lindfors <timo.lindfors at iki.fi> writes:
>> This is a great improvement for GPS logging! Thank you very much.
> After a few more tests kernel printed
> [ 4782.350000] rxerr: port=1 ch=0x24, rxs=0x00000001
> [ 4966.170000] rxerr: port=1 ch=0x47, rxs=0x00000001
> and gpsd printed
> gpsd: bad checksum in NMEA packet.
> Is the kernel too slow to read data from the serial port and some FIFO
> gets too full?

Is this "sporadic", i.e. does this error occur sometimes and after the
error it works again?
It could also be that if there is traffic on the serial line in the very
same moment when the frequency change occurs the UART looses its clock
during the character reception. After the successful clock transition it
could be OK again and until the next clock change occurs while receiving
But I am guessing here... my reasoning behind it is that in SOC like the
S3C many clocks are derived from the core clock so if the core clock
changes that have to adjust as well. And if you do that while a clock is
used as a timing source to sample bits from the serial port it can lead
to data corruption (or loss of data).

Just a halfway educated guess...

> best regards,
> Timo Lindfors
  nils faerber

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