From: Matt Hsu Select the correct EINT configuration register when configuring the external interrupt level/edge type. Signed-off-by: Matt Hsu [ben-linux@fluff.org: description improvement] Signed-off-by: Ben Dooks --- arch/arm/plat-s3c64xx/irq-eint.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) Index: linux.git/arch/arm/plat-s3c64xx/irq-eint.c =================================================================== --- linux.git.orig/arch/arm/plat-s3c64xx/irq-eint.c 2008-11-20 11:40:22.000000000 +0000 +++ linux.git/arch/arm/plat-s3c64xx/irq-eint.c 2008-12-02 19:00:11.000000000 +0000 @@ -82,7 +82,7 @@ static int s3c_irq_eint_set_type(unsigne if (offs > 27) return -EINVAL; - if (offs > 15) + if (offs <= 15) reg = S3C64XX_EINT0CON0; else reg = S3C64XX_EINT0CON1; -- Ben (ben@fluff.org, http://www.fluff.org/) 'a smiley only costs 4 bytes'