r2358 - trunk/src/host/qemu-neo1973/hw
andrew at sita.openmoko.org
andrew at sita.openmoko.org
Mon Jul 2 23:11:53 CEST 2007
Author: andrew
Date: 2007-07-02 23:11:52 +0200 (Mon, 02 Jul 2007)
New Revision: 2358
Added:
trunk/src/host/qemu-neo1973/hw/jazz_led.c
trunk/src/host/qemu-neo1973/hw/pl031.c
Log:
Add files missing in last merge.
Added: trunk/src/host/qemu-neo1973/hw/jazz_led.c
===================================================================
--- trunk/src/host/qemu-neo1973/hw/jazz_led.c 2007-07-02 20:51:15 UTC (rev 2357)
+++ trunk/src/host/qemu-neo1973/hw/jazz_led.c 2007-07-02 21:11:52 UTC (rev 2358)
@@ -0,0 +1,303 @@
+/*
+ * QEMU JAZZ LED emulator.
+ *
+ * Copyright (c) 2007 Hervé Poussineau
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "vl.h"
+#include "pixel_ops.h"
+
+//#define DEBUG_LED
+
+typedef enum {
+ REDRAW_NONE = 0, REDRAW_SEGMENTS = 1, REDRAW_BACKGROUND = 2,
+} screen_state_t;
+
+typedef struct LedState {
+ target_phys_addr_t base;
+ uint8_t segments;
+ DisplayState *ds;
+ screen_state_t state;
+} LedState;
+
+static uint32_t led_readb(void *opaque, target_phys_addr_t addr)
+{
+ LedState *s = opaque;
+ int relative_addr = addr - s->base;
+ uint32_t val;
+
+ switch (relative_addr) {
+ case 0:
+ val = s->segments;
+ break;
+ default:
+#ifdef DEBUG_LED
+ printf("jazz led: invalid read [0x%x]\n", relative_addr);
+#endif
+ val = 0;
+ }
+
+ return val;
+}
+
+static uint32_t led_readw(void *opaque, target_phys_addr_t addr)
+{
+ uint32_t v;
+#ifdef TARGET_WORDS_BIGENDIAN
+ v = led_readb(opaque, addr) << 8;
+ v |= led_readb(opaque, addr + 1);
+#else
+ v = led_readb(opaque, addr);
+ v |= led_readb(opaque, addr + 1) << 8;
+#endif
+ return v;
+}
+
+static uint32_t led_readl(void *opaque, target_phys_addr_t addr)
+{
+ uint32_t v;
+#ifdef TARGET_WORDS_BIGENDIAN
+ v = led_readb(opaque, addr) << 24;
+ v |= led_readb(opaque, addr + 1) << 16;
+ v |= led_readb(opaque, addr + 2) << 8;
+ v |= led_readb(opaque, addr + 3);
+#else
+ v = led_readb(opaque, addr);
+ v |= led_readb(opaque, addr + 1) << 8;
+ v |= led_readb(opaque, addr + 2) << 16;
+ v |= led_readb(opaque, addr + 3) << 24;
+#endif
+ return v;
+}
+
+static void led_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+ LedState *s = opaque;
+ int relative_addr = addr - s->base;
+
+ switch (relative_addr) {
+ case 0:
+ s->segments = val;
+ s->state |= REDRAW_SEGMENTS;
+ break;
+ default:
+#ifdef DEBUG_LED
+ printf("jazz led: invalid write of 0x%02x at [0x%x]\n", val, relative_addr);
+#endif
+ break;
+ }
+}
+
+static void led_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ led_writeb(opaque, addr, (val >> 8) & 0xff);
+ led_writeb(opaque, addr + 1, val & 0xff);
+#else
+ led_writeb(opaque, addr, val & 0xff);
+ led_writeb(opaque, addr + 1, (val >> 8) & 0xff);
+#endif
+}
+
+static void led_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ led_writeb(opaque, addr, (val >> 24) & 0xff);
+ led_writeb(opaque, addr + 1, (val >> 16) & 0xff);
+ led_writeb(opaque, addr + 2, (val >> 8) & 0xff);
+ led_writeb(opaque, addr + 3, val & 0xff);
+#else
+ led_writeb(opaque, addr, val & 0xff);
+ led_writeb(opaque, addr + 1, (val >> 8) & 0xff);
+ led_writeb(opaque, addr + 2, (val >> 16) & 0xff);
+ led_writeb(opaque, addr + 3, (val >> 24) & 0xff);
+#endif
+}
+
+static CPUReadMemoryFunc *led_read[3] = {
+ led_readb,
+ led_readw,
+ led_readl,
+};
+
+static CPUWriteMemoryFunc *led_write[3] = {
+ led_writeb,
+ led_writew,
+ led_writel,
+};
+
+/***********************************************************/
+/* jazz_led display */
+
+static void draw_horizontal_line(DisplayState *ds, int posy, int posx1, int posx2, uint32_t color)
+{
+ uint8_t *d;
+ int x, bpp;
+
+ bpp = (ds->depth + 7) >> 3;
+ d = ds->data + ds->linesize * posy + bpp * posx1;
+ switch(bpp) {
+ case 1:
+ for (x = posx1; x <= posx2; x++) {
+ *((uint8_t *)d) = color;
+ d++;
+ }
+ break;
+ case 2:
+ for (x = posx1; x <= posx2; x++) {
+ *((uint16_t *)d) = color;
+ d += 2;
+ }
+ break;
+ case 4:
+ for (x = posx1; x <= posx2; x++) {
+ *((uint32_t *)d) = color;
+ d += 4;
+ }
+ break;
+ }
+}
+
+static void draw_vertical_line(DisplayState *ds, int posx, int posy1, int posy2, uint32_t color)
+{
+ uint8_t *d;
+ int y, bpp;
+
+ bpp = (ds->depth + 7) >> 3;
+ d = ds->data + ds->linesize * posy1 + bpp * posx;
+ switch(bpp) {
+ case 1:
+ for (y = posy1; y <= posy2; y++) {
+ *((uint8_t *)d) = color;
+ d += ds->linesize;
+ }
+ break;
+ case 2:
+ for (y = posy1; y <= posy2; y++) {
+ *((uint16_t *)d) = color;
+ d += ds->linesize;
+ }
+ break;
+ case 4:
+ for (y = posy1; y <= posy2; y++) {
+ *((uint32_t *)d) = color;
+ d += ds->linesize;
+ }
+ break;
+ }
+}
+
+static void jazz_led_update_display(void *opaque)
+{
+ LedState *s = opaque;
+ DisplayState *ds = s->ds;
+ uint8_t *d1;
+ uint32_t color_segment, color_led;
+ int y, bpp;
+
+ if (s->state & REDRAW_BACKGROUND) {
+ /* clear screen */
+ bpp = (ds->depth + 7) >> 3;
+ d1 = ds->data;
+ for (y = 0; y < ds->height; y++) {
+ memset(d1, 0x00, ds->width * bpp);
+ d1 += ds->linesize;
+ }
+ }
+
+ if (s->state & REDRAW_SEGMENTS) {
+ /* set colors according to bpp */
+ switch (ds->depth) {
+ case 8:
+ color_segment = rgb_to_pixel8(0xaa, 0xaa, 0xaa);
+ color_led = rgb_to_pixel8(0x00, 0xff, 0x00);
+ break;
+ case 15:
+ color_segment = rgb_to_pixel15(0xaa, 0xaa, 0xaa);
+ color_led = rgb_to_pixel15(0x00, 0xff, 0x00);
+ break;
+ case 16:
+ color_segment = rgb_to_pixel16(0xaa, 0xaa, 0xaa);
+ color_led = rgb_to_pixel16(0x00, 0xff, 0x00);
+ case 24:
+ color_segment = rgb_to_pixel24(0xaa, 0xaa, 0xaa);
+ color_led = rgb_to_pixel24(0x00, 0xff, 0x00);
+ break;
+ case 32:
+ color_segment = rgb_to_pixel32(0xaa, 0xaa, 0xaa);
+ color_led = rgb_to_pixel32(0x00, 0xff, 0x00);
+ break;
+ default:
+ return;
+ }
+
+ /* display segments */
+ draw_horizontal_line(ds, 40, 10, 40, (s->segments & 0x02) ? color_segment : 0);
+ draw_vertical_line(ds, 10, 10, 40, (s->segments & 0x04) ? color_segment : 0);
+ draw_vertical_line(ds, 10, 40, 70, (s->segments & 0x08) ? color_segment : 0);
+ draw_horizontal_line(ds, 70, 10, 40, (s->segments & 0x10) ? color_segment : 0);
+ draw_vertical_line(ds, 40, 40, 70, (s->segments & 0x20) ? color_segment : 0);
+ draw_vertical_line(ds, 40, 10, 40, (s->segments & 0x40) ? color_segment : 0);
+ draw_horizontal_line(ds, 10, 10, 40, (s->segments & 0x80) ? color_segment : 0);
+
+ /* display led */
+ if (!(s->segments & 0x01))
+ color_led = 0; /* black */
+ draw_horizontal_line(ds, 68, 50, 50, color_led);
+ draw_horizontal_line(ds, 69, 49, 51, color_led);
+ draw_horizontal_line(ds, 70, 48, 52, color_led);
+ draw_horizontal_line(ds, 71, 49, 51, color_led);
+ draw_horizontal_line(ds, 72, 50, 50, color_led);
+ }
+
+ s->state = REDRAW_NONE;
+ dpy_update(ds, 0, 0, ds->width, ds->height);
+}
+
+static void jazz_led_invalidate_display(void *opaque)
+{
+ LedState *s = opaque;
+ s->state |= REDRAW_SEGMENTS | REDRAW_BACKGROUND;
+}
+
+static void jazz_led_screen_dump(void *opaque, const char *filename)
+{
+ printf("jazz_led_screen_dump() not implemented\n");
+}
+
+void jazz_led_init(DisplayState *ds, target_phys_addr_t base)
+{
+ LedState *s;
+ int io;
+
+ s = qemu_mallocz(sizeof(LedState));
+ if (!s)
+ return;
+
+ s->base = base;
+ s->ds = ds;
+ s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
+
+ io = cpu_register_io_memory(0, led_read, led_write, s);
+ cpu_register_physical_memory(s->base, 1, io);
+
+ graphic_console_init(ds, jazz_led_update_display, jazz_led_invalidate_display, jazz_led_screen_dump, s);
+}
Added: trunk/src/host/qemu-neo1973/hw/pl031.c
===================================================================
--- trunk/src/host/qemu-neo1973/hw/pl031.c 2007-07-02 20:51:15 UTC (rev 2357)
+++ trunk/src/host/qemu-neo1973/hw/pl031.c 2007-07-02 21:11:52 UTC (rev 2358)
@@ -0,0 +1,219 @@
+/*
+ * ARM AMBA PrimeCell PL031 RTC
+ *
+ * Copyright (c) 2007 CodeSourcery
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include"vl.h"
+
+//#define DEBUG_PL031
+
+#ifdef DEBUG_PL031
+#define DPRINTF(fmt, args...) \
+do { printf("pl031: " fmt , ##args); } while (0)
+#else
+#define DPRINTF(fmt, args...) do {} while(0)
+#endif
+
+#define RTC_DR 0x00 /* Data read register */
+#define RTC_MR 0x04 /* Match register */
+#define RTC_LR 0x08 /* Data load register */
+#define RTC_CR 0x0c /* Control register */
+#define RTC_IMSC 0x10 /* Interrupt mask and set register */
+#define RTC_RIS 0x14 /* Raw interrupt status register */
+#define RTC_MIS 0x18 /* Masked interrupt status register */
+#define RTC_ICR 0x1c /* Interrupt clear register */
+
+typedef struct {
+ QEMUTimer *timer;
+ qemu_irq irq;
+ uint32_t base;
+
+ uint64_t start_time;
+ uint32_t tick_offset;
+
+ uint32_t mr;
+ uint32_t lr;
+ uint32_t cr;
+ uint32_t im;
+ uint32_t is;
+} pl031_state;
+
+static const unsigned char pl031_id[] = {
+ 0x31, 0x10, 0x14, 0x00, /* Device ID */
+ 0x0d, 0xf0, 0x05, 0xb1 /* Cell ID */
+};
+
+static void pl031_update(pl031_state *s)
+{
+ qemu_set_irq(s->irq, s->is & s->im);
+}
+
+static void pl031_interrupt(void * opaque)
+{
+ pl031_state *s = (pl031_state *)opaque;
+
+ s->im = 1;
+ DPRINTF("Alarm raised\n");
+ pl031_update(s);
+}
+
+static uint32_t pl031_get_count(pl031_state *s)
+{
+ /* This assumes qemu_get_clock returns the time since the machine was
+ created. */
+ return s->tick_offset + qemu_get_clock(vm_clock) / ticks_per_sec;
+}
+
+static void pl031_set_alarm(pl031_state *s)
+{
+ int64_t now;
+ uint32_t ticks;
+
+ now = qemu_get_clock(vm_clock);
+ ticks = s->tick_offset + now / ticks_per_sec;
+
+ /* The timer wraps around. This subtraction also wraps in the same way,
+ and gives correct results when alarm < now_ticks. */
+ ticks = s->mr - ticks;
+ DPRINTF("Alarm set in %ud ticks\n", ticks);
+ if (ticks == 0) {
+ qemu_del_timer(s->timer);
+ pl031_interrupt(s);
+ } else {
+ qemu_mod_timer(s->timer, now + (int64_t)ticks * ticks_per_sec);
+ }
+}
+
+static uint32_t pl031_read(void *opaque, target_phys_addr_t offset)
+{
+ pl031_state *s = (pl031_state *)opaque;
+
+ offset -= s->base;
+
+ if (offset >= 0xfe0 && offset < 0x1000)
+ return pl031_id[(offset - 0xfe0) >> 2];
+
+ switch (offset) {
+ case RTC_DR:
+ return pl031_get_count(s);
+ case RTC_MR:
+ return s->mr;
+ case RTC_IMSC:
+ return s->im;
+ case RTC_RIS:
+ return s->is;
+ case RTC_LR:
+ return s->lr;
+ case RTC_CR:
+ /* RTC is permanently enabled. */
+ return 1;
+ case RTC_MIS:
+ return s->is & s->im;
+ case RTC_ICR:
+ fprintf(stderr, "qemu: pl031_read: Unexpected offset 0x%x\n",
+ (int)offset);
+ break;
+ default:
+ cpu_abort(cpu_single_env, "pl031_read: Bad offset 0x%x\n",
+ (int)offset);
+ break;
+ }
+
+ return 0;
+}
+
+static void pl031_write(void * opaque, target_phys_addr_t offset,
+ uint32_t value)
+{
+ pl031_state *s = (pl031_state *)opaque;
+
+ offset -= s->base;
+
+ switch (offset) {
+ case RTC_LR:
+ s->tick_offset += value - pl031_get_count(s);
+ pl031_set_alarm(s);
+ break;
+ case RTC_MR:
+ s->mr = value;
+ pl031_set_alarm(s);
+ break;
+ case RTC_IMSC:
+ s->im = value & 1;
+ DPRINTF("Interrupt mask %d\n", s->im);
+ pl031_update(s);
+ break;
+ case RTC_ICR:
+ /* The PL031 documentation (DDI0224B) states that the interupt is
+ cleared when bit 0 of the written value is set. However the
+ arm926e documentation (DDI0287B) states that the interrupt is
+ cleared when any value is written. */
+ DPRINTF("Interrupt cleared");
+ s->is = 0;
+ pl031_update(s);
+ break;
+ case RTC_CR:
+ /* Written value is ignored. */
+ break;
+
+ case RTC_DR:
+ case RTC_MIS:
+ case RTC_RIS:
+ fprintf(stderr, "qemu: pl031_write: Unexpected offset 0x%x\n",
+ (int)offset);
+ break;
+
+ default:
+ cpu_abort(cpu_single_env, "pl031_write: Bad offset 0x%x\n",
+ (int)offset);
+ break;
+ }
+}
+
+static CPUWriteMemoryFunc * pl031_writefn[] = {
+ pl031_write,
+ pl031_write,
+ pl031_write
+};
+
+static CPUReadMemoryFunc * pl031_readfn[] = {
+ pl031_read,
+ pl031_read,
+ pl031_read
+};
+
+void pl031_init(uint32_t base, qemu_irq irq)
+{
+ int iomemtype;
+ pl031_state *s;
+ time_t ti;
+ struct tm *tm;
+
+ s = qemu_mallocz(sizeof(pl031_state));
+ if (!s)
+ cpu_abort(cpu_single_env, "pl031_init: Out of memory\n");
+
+ iomemtype = cpu_register_io_memory(0, pl031_readfn, pl031_writefn, s);
+ if (iomemtype == -1)
+ cpu_abort(cpu_single_env, "pl031_init: Can't register I/O memory\n");
+
+ cpu_register_physical_memory(base, 0x00001000, iomemtype);
+
+ s->base = base;
+ s->irq = irq;
+ /* ??? We assume vm_clock is zero at this point. */
+ time(&ti);
+ if (rtc_utc)
+ tm = gmtime(&ti);
+ else
+ tm = localtime(&ti);
+ s->tick_offset = mktime(tm);
+
+ s->timer = qemu_new_timer(vm_clock, pl031_interrupt, s);
+}
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