r4004 - branches/src/target/kernel/2.6.24.x/patches

werner at sita.openmoko.org werner at sita.openmoko.org
Fri Feb 1 01:50:21 CET 2008


Author: werner
Date: 2008-02-01 01:50:14 +0100 (Fri, 01 Feb 2008)
New Revision: 4004

Added:
   branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-basis.patch
   branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-migrate-vibrator-gta02-only.patch
   branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-use-timer3-as-source.patch
Modified:
   branches/src/target/kernel/2.6.24.x/patches/series
Log:
introduce-fiq-basis.patch: adds a C-based FIQ ISR, Implemented as a platform
  device and driver.
  
introduce-fiq-use-timer3-as-source.patch: makes the FIQ stuff specific to one
  of the timers on the s3c244x and adds the platform stuff for fiq in the GTA02
  init.
  
introduce-fiq-migrate-vibrator-gta02-only.patch: on GTA02, use FIQ to manage
  the vibrator I/O.
  
series: add introduce-fiq-basis.patch,
  introduce-fiq-use-timer3-as-source.patch, and
  introduce-fiq-migrate-vibrator-gta02-only.patch

series: updated status of montour-audio.patch



Added: branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-basis.patch
===================================================================
--- branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-basis.patch	2008-02-01 00:02:16 UTC (rev 4003)
+++ branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-basis.patch	2008-02-01 00:50:14 UTC (rev 4004)
@@ -0,0 +1,588 @@
+[ Two issues to look into later:
+
+- include/asm-arm/arch-s3c2410/irqs.h shouldn't contain device-specific
+  changes (this is not a problem introduced by the FIQ patch per se, but
+  shows up here as well)
+
+- "struct _fiq_ipc" in include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+  isn't really just the usual "internal use only" declaration, so it
+  should probably be "struct _fiq_ipc". In general, I think we should
+  try to keep the number of _xxx or (better) __xxx items low and
+  perhaps try to limit them to cases where there's a related xxx.
+
+- Werner ]
+
+Adds a C-based FIQ ISR which is very convenient (and unusual --
+normally you have to do FIQ ISR in assembler only).
+Based on my article:
+
+http://warmcat.com/_wp/2007/09/17/at91rm9200-fiq-faq-and-simple-example-code-patch/
+
+Implemented as a platform device and driver.
+
+Suspend / resume is tested and works.
+
+Signed-off-by: Andy Green <andy at warmcat.com>
+
+Index: linux-2.6.24/arch/arm/mach-s3c2440/Kconfig
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/Kconfig
++++ linux-2.6.24/arch/arm/mach-s3c2440/Kconfig
+@@ -22,6 +22,13 @@
+ 	help
+ 	  Support for S3C2440 specific DMA code5A
+ 
++config S3C2440_C_FIQ
++	bool "FIQ ISR support in C"
++	depends on ARCH_S3C2410
++	select FIQ
++	help
++	  Support for S3C2440 FIQ support in C -- see
++	  ./arch/arm/macs3c2440/fiq_c_isr.c
+ 
+ menu "S3C2440 Machines"
+ 
+Index: linux-2.6.24/arch/arm/mach-s3c2440/Makefile
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/Makefile
++++ linux-2.6.24/arch/arm/mach-s3c2440/Makefile
+@@ -13,6 +13,7 @@
+ obj-$(CONFIG_CPU_S3C2440)	+= irq.o
+ obj-$(CONFIG_CPU_S3C2440)	+= clock.o
+ obj-$(CONFIG_S3C2440_DMA)	+= dma.o
++obj-$(CONFIG_S3C2440_C_FIQ)	+= fiq_c_isr.o
+ 
+ # Machine support
+ 
+Index: linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+===================================================================
+--- /dev/null
++++ linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+@@ -0,0 +1,250 @@
++/*
++ * Copyright 2007  Andy Green <andy at warmcat.com>
++ * S3C modfifications
++ * Copyright 2008 Andy Green <andy at openmoko.com>
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <asm/hardware.h>
++#include <asm/fiq.h>
++#include "fiq_c_isr.h"
++#include <linux/sysfs.h>
++#include <linux/device.h>
++#include <linux/platform_device.h>
++
++#include <asm/io.h>
++
++#include <asm/plat-s3c24xx/cpu.h>
++#include <asm/plat-s3c24xx/irq.h>
++
++/*
++ * Major Caveats for using FIQ
++ * ---------------------------
++ *
++ * 1) it CANNOT touch any vmalloc()'d memory, only memory
++ *    that was kmalloc()'d.  Static allocations in the monolithic kernel
++ *    are kmalloc()'d so they are okay.  You can touch memory-mapped IO, but
++ *    the pointer for it has to have been stored in kmalloc'd memory.  The
++ *    reason for this is simple: every now and then Linux turns off interrupts
++ *    and reorders the paging tables.  If a FIQ happens during this time, the
++ *    virtual memory space can be partly or entirely disordered or missing.
++ *
++ * 2) Because vmalloc() is used when a module is inserted, THIS FIQ
++ *    ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module.  But the way
++ *    it is set up, you can all to enable and disable it from your module
++ *    and intercommunicate with it through struct fiq_ipc
++ *    fiq_ipc which you can define in
++ *    asm/archfiq_ipc_type.h.  The reason is the same as above, a
++ *    FIQ could happen while even the ISR is not present in virtual memory
++ *    space due to pagetables being changed at the time.
++ *
++ * 3) You can't call any Linux API code except simple macros
++ *    - understand that FIQ can come in at any time, no matter what
++ *      state of undress the kernel may privately be in, thinking it
++ *      locked the door by turning off interrupts... FIQ is an
++ *      unstoppable monster force (which is its value)
++ *    - they are not vmalloc()'d memory safe
++ *    - they might do crazy stuff like sleep: FIQ pisses fire and
++ *      is not interested in 'sleep' that the weak seem to need
++ *    - calling APIs from FIQ can re-enter un-renterable things
++ *    - summary: you cannot interoperate with linux APIs directly in the FIQ ISR
++ *
++ * If you follow these rules, it is fantastic, an extremely powerful, solid,
++ * genuine hard realtime feature.
++ *
++ */
++
++/* more than enough to cover our jump instruction to the isr */
++#define SIZEOF_FIQ_JUMP 8
++/* more than enough to cover s3c2440_fiq_isr() in 4K blocks */
++#define SIZEOF_FIQ_ISR 0x2000
++/* increase the size of the stack that is active during FIQ as needed */
++static u8 u8aFiqStack[4096];
++
++/* only one FIQ ISR possible, okay to do these here */
++u32 _fiq_ack_mask; /* used by isr exit define */
++unsigned long _fiq_count_fiqs; /* used by isr exit define */
++static int _fiq_irq; /* private ; irq index we were started with, or 0 */
++
++/* this function must live in the monolithic kernel somewhere!  A module is
++ * NOT good enough!
++ */
++extern void __attribute__ ((naked)) s3c2440_fiq_isr(void);
++
++/* this is copied into the hard FIQ vector during init */
++
++static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void)
++{
++	asm __volatile__ (
++		"mov pc, r8 ; "
++	);
++}
++
++/* sysfs */
++
++static ssize_t show_count(struct device *dev, struct device_attribute *attr,
++			 char *buf)
++{
++	return sprintf(buf, "%ld\n", _fiq_count_fiqs);
++}
++
++static DEVICE_ATTR(count, 0444, show_count, NULL);
++
++static struct attribute *s3c2440_fiq_sysfs_entries[] = {
++	&dev_attr_count.attr,
++	NULL
++};
++
++static struct attribute_group s3c2440_fiq_attr_group = {
++	.name	= "fiq",
++	.attrs	= s3c2440_fiq_sysfs_entries,
++};
++
++/*
++ * call this from your kernel module to set up the FIQ ISR to service FIQs,
++ * You need to have configured your FIQ input pin before anything will happen
++ *
++ * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h
++ *
++ * you still need to clear the source interrupt in S3C2410_INTMSK to get
++ * anything good happening
++ */
++static void fiq_init_irq_source(int irq_index_fiq)
++{
++	if (!irq_index_fiq) /* no interrupt */
++		return;
++
++	printk(KERN_INFO"Enabling FIQ using int idx %d\n",
++	       irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
++	local_fiq_disable();
++
++	_fiq_irq = irq_index_fiq;
++	_fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
++
++	/* let our selected interrupt be a magic FIQ interrupt */
++	__raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
++
++	/* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
++	local_fiq_enable();
++}
++
++
++/* call this from your kernel module to disable generation of FIQ actions */
++static void fiq_disable_irq_source(void)
++{
++	/* nothing makes FIQ any more */
++	__raw_writel(0, S3C2410_INTMOD);
++	local_fiq_disable();
++	_fiq_irq = 0; /* no active source interrupt now either */
++}
++
++/* this starts FIQ timer events... they continue until the FIQ ISR sees that
++ * its work is done and it turns off the timer.  After setting up the fiq_ipc
++ * struct with new work, you call this to start FIQ timer actions up again.
++ * Only the FIQ ISR decides when it is done and controls turning off the
++ * timer events.
++ */
++void fiq_kick(void)
++{
++	unsigned long flags;
++
++	/* we have to take care about FIQ because this modification is
++	 * non-atomic, FIQ could come in after the read and before the
++	 * writeback and its changes to the register would be lost
++	 * (platform INTMSK mod code is taken care of already)
++	 */
++	local_save_flags(flags);
++	local_fiq_disable();
++	__raw_writel(__raw_readl(S3C2410_INTMSK) &
++		     ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
++		     S3C2410_INTMSK);
++	local_irq_restore(flags);
++}
++EXPORT_SYMBOL_GPL(fiq_kick);
++
++
++
++static int __init sc32440_fiq_probe(struct platform_device *pdev)
++{
++	struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
++
++	if (!r)
++		return -EIO;
++	/* configure for the interrupt we are meant to use */
++	fiq_init_irq_source(r->start);
++
++	return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
++}
++
++static int sc32440_fiq_remove(struct platform_device *pdev)
++{
++	fiq_disable_irq_source();
++	sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
++	return 0;
++}
++
++static void fiq_set_vector_and_regs(void)
++{
++	struct pt_regs regs;
++
++	/* prep the special FIQ mode regs */
++	memset(&regs, 0, sizeof(regs));
++	regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr;
++	regs.ARM_sp = (unsigned long)u8aFiqStack + sizeof(u8aFiqStack) - 4;
++	/* set up the special FIQ-mode-only registers from our regs */
++	set_fiq_regs(&regs);
++	/* copy our jump to the real ISR into the hard vector address */
++	set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP);
++}
++
++#ifdef CONFIG_PM
++static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	/* nothing makes FIQ any more */
++	__raw_writel(0, S3C2410_INTMOD);
++	local_fiq_disable();
++
++	return 0;
++}
++
++static int sc32440_fiq_resume(struct platform_device *pdev)
++{
++	fiq_set_vector_and_regs();
++	fiq_init_irq_source(_fiq_irq);
++	return 0;
++}
++#else
++#define sc32440_fiq_suspend	NULL
++#define sc32440_fiq_resume	NULL
++#endif
++
++static struct platform_driver sc32440_fiq_driver = {
++	.driver = {
++		.name	= "sc32440_fiq",
++		.owner	= THIS_MODULE,
++	},
++
++	.probe	 = sc32440_fiq_probe,
++	.remove	 = __devexit_p(sc32440_fiq_remove),
++	.suspend = sc32440_fiq_suspend,
++	.resume	 = sc32440_fiq_resume,
++};
++
++static int __init sc32440_fiq_init(void)
++{
++	fiq_set_vector_and_regs();
++
++	return platform_driver_register(&sc32440_fiq_driver);
++}
++
++static void __exit sc32440_fiq_exit(void)
++{
++	fiq_disable_irq_source();
++}
++
++MODULE_AUTHOR("Andy Green <andy at openmoko.com>");
++MODULE_LICENSE("GPL");
++
++module_init(sc32440_fiq_init);
++module_exit(sc32440_fiq_exit);
+Index: linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.h
+===================================================================
+--- /dev/null
++++ linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.h
+@@ -0,0 +1,64 @@
++#ifndef _LINUX_FIQ_C_ISR_H
++#define _LINUX_FIQ_C_ISR_H
++
++#include <asm/arch-s3c2410/regs-irq.h>
++
++extern unsigned long _fiq_count_fiqs;
++extern u32 _fiq_ack_mask;
++
++/* This CANNOT be implemented in a module -- it has to be used in code
++ * included in the monolithic kernel
++ */
++
++#define FIQ_HANDLER_START() \
++void __attribute__ ((naked)) s3c2440_fiq_isr(void) \
++{\
++	/*\
++	 * you can declare local vars here, take care to set the frame size\
++	 *  below accordingly if there are more than a few dozen bytes of them\
++	 */\
++
++/* stick your locals here :-)
++ * Do NOT initialize them here!  define them and initialize them after
++ * FIQ_HANDLER_ENTRY() is done.
++ */
++
++#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \
++	const int _FIQ_FRAME_SIZE = FRAME; \
++	/* entry takes care to store registers we will be treading on here */\
++	asm __volatile__ (\
++		"mov     ip, sp ;"\
++		/* stash FIQ and r0-r8 normal regs */\
++		"stmdb	sp!, {r0-r12, lr};"\
++		/* allow SP to get some space */\
++		"sub     sp, sp, %1 ;"\
++		/* !! THIS SETS THE FRAME, adjust to > sizeof locals */\
++		"sub     fp, sp, %0 ;"\
++		:\
++		: "rI" (LOCALS), "rI" (FRAME)\
++		:"r9"\
++	);
++
++/* stick your ISR code here and then end with... */
++
++#define FIQ_HANDLER_END() \
++	_fiq_count_fiqs++;\
++	__raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\
++\
++	/* exit back to normal mode restoring everything */\
++	asm __volatile__ (\
++		/* pop our allocation */\
++		"add     sp, sp, %0 ;"\
++		/* return FIQ regs back to pristine state\
++		 * and get normal regs back\
++		 */\
++		"ldmia	sp!, {r0-r12, lr};"\
++\
++		/* return */\
++		"subs	pc, lr, #4;"\
++		: \
++		: "rI" (_FIQ_FRAME_SIZE) \
++	);\
++}
++
++#endif /* _LINUX_FIQ_C_ISR_H */
+Index: linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/mach-gta02.c
++++ linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+@@ -78,6 +78,28 @@
+ 
+ #include <linux/glamofb.h>
+ 
++#include <asm/arch/fiq_ipc_gta02.h>
++#include "fiq_c_isr.h"
++
++/* define FIQ IPC struct */
++/*
++ * contains stuff FIQ ISR modifies and normal kernel code can see and use
++ * this is defined in <asm/arch/fiq_ipc_gta02.h>, you should customize
++ * the definition in there and include the same definition in your kernel
++ * module that wants to interoperate with your FIQ code.
++ */
++struct _fiq_ipc fiq_ipc;
++EXPORT_SYMBOL(fiq_ipc);
++
++/* define FIQ ISR */
++
++FIQ_HANDLER_START()
++/* define your locals here -- no initializers though */
++FIQ_HANDLER_ENTRY(256, 512)
++/* Your ISR here :-) */
++FIQ_HANDLER_END()
++
++
+ static struct map_desc gta02_iodesc[] __initdata = {
+ 	{
+ 		.virtual	= 0xe0000000,
+Index: linux-2.6.24/arch/arm/plat-s3c24xx/irq.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/plat-s3c24xx/irq.c
++++ linux-2.6.24/arch/arm/plat-s3c24xx/irq.c
+@@ -133,12 +133,20 @@
+ s3c_irq_mask(unsigned int irqno)
+ {
+ 	unsigned long mask;
+-
++#ifdef CONFIG_S3C2440_C_FIQ
++	unsigned long flags;
++#endif
+ 	irqno -= IRQ_EINT0;
+-
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_save_flags(flags);
++	local_fiq_disable();
++#endif
+ 	mask = __raw_readl(S3C2410_INTMSK);
+ 	mask |= 1UL << irqno;
+ 	__raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_irq_restore(flags);
++#endif
+ }
+ 
+ static inline void
+@@ -155,9 +163,19 @@
+ {
+ 	unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
+ 	unsigned long mask;
++#ifdef CONFIG_S3C2440_C_FIQ
++	unsigned long flags;
++#endif
+ 
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_save_flags(flags);
++	local_fiq_disable();
++#endif
+ 	mask = __raw_readl(S3C2410_INTMSK);
+ 	__raw_writel(mask|bitval, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_irq_restore(flags);
++#endif
+ 
+ 	__raw_writel(bitval, S3C2410_SRCPND);
+ 	__raw_writel(bitval, S3C2410_INTPND);
+@@ -168,15 +186,25 @@
+ s3c_irq_unmask(unsigned int irqno)
+ {
+ 	unsigned long mask;
++#ifdef CONFIG_S3C2440_C_FIQ
++	unsigned long flags;
++#endif
+ 
+ 	if (irqno != IRQ_TIMER4 && irqno != IRQ_EINT8t23)
+ 		irqdbf2("s3c_irq_unmask %d\n", irqno);
+ 
+ 	irqno -= IRQ_EINT0;
+ 
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_save_flags(flags);
++	local_fiq_disable();
++#endif
+ 	mask = __raw_readl(S3C2410_INTMSK);
+ 	mask &= ~(1UL << irqno);
+ 	__raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_irq_restore(flags);
++#endif
+ }
+ 
+ struct irq_chip s3c_irq_level_chip = {
+Index: linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+===================================================================
+--- /dev/null
++++ linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+@@ -0,0 +1,28 @@
++#ifndef _LINUX_FIQ_IPC_H
++#define _LINUX_FIQ_IPC_H
++
++/*
++ * this defines the struct which is used to communicate between the FIQ
++ * world and the normal linux kernel world.  One of these structs is
++ * statically defined for you in the monolithic kernel so the FIQ ISR code
++ * can safely touch it any any time.
++ *
++ * You also want to include this file in your kernel module that wants to
++ * communicate with your FIQ code.  Add any kinds of vars that are used by
++ * the FIQ ISR and the module in here.
++ *
++ * To get you started there is just an int that is incremented every FIQ
++ * you can remove this when you are ready to customize, but it is useful
++ * for testing
++ */
++
++struct _fiq_ipc {
++	u8 u8a[0]; /* placeholder */
++};
++
++/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
++extern struct _fiq_ipc fiq_ipc;
++
++extern void fiq_kick(void);  /* provoke a FIQ "immediately" */
++
++#endif /* _LINUX_FIQ_IPC_H */
+Index: linux-2.6.24/include/asm-arm/arch-s3c2410/irqs.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-s3c2410/irqs.h
++++ linux-2.6.24/include/asm-arm/arch-s3c2410/irqs.h
+@@ -188,4 +188,8 @@
+ #define IRQ_GLAMO_MMC		IRQ_GLAMO(7)
+ #define IRQ_GLAMO_RISC		IRQ_GLAMO(8)
+ 
++/* offset for FIQ IRQ numbers - used by arm fiq.c */
++
++#define FIQ_START 0
++
+ #endif /* __ASM_ARCH_IRQ_H */
+Index: linux-2.6.24/include/asm-arm/plat-s3c24xx/irq.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/plat-s3c24xx/irq.h
++++ linux-2.6.24/include/asm-arm/plat-s3c24xx/irq.h
+@@ -23,8 +23,15 @@
+ {
+ 	unsigned long mask;
+ 	unsigned long submask;
++#ifdef CONFIG_S3C2440_C_FIQ
++	unsigned long flags;
++#endif
+ 
+ 	submask = __raw_readl(S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_save_flags(flags);
++	local_fiq_disable();
++#endif
+ 	mask = __raw_readl(S3C2410_INTMSK);
+ 
+ 	submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
+@@ -37,6 +44,9 @@
+ 
+ 	/* write back masks */
+ 	__raw_writel(submask, S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_irq_restore(flags);
++#endif
+ 
+ }
+ 
+@@ -45,8 +55,15 @@
+ {
+ 	unsigned long mask;
+ 	unsigned long submask;
++#ifdef CONFIG_S3C2440_C_FIQ
++	unsigned long flags;
++#endif
+ 
+ 	submask = __raw_readl(S3C2410_INTSUBMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_save_flags(flags);
++	local_fiq_disable();
++#endif
+ 	mask = __raw_readl(S3C2410_INTMSK);
+ 
+ 	submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
+@@ -55,6 +72,9 @@
+ 	/* write back masks */
+ 	__raw_writel(submask, S3C2410_INTSUBMSK);
+ 	__raw_writel(mask, S3C2410_INTMSK);
++#ifdef CONFIG_S3C2440_C_FIQ
++	local_irq_restore(flags);
++#endif
+ }
+ 
+ 

Added: branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-migrate-vibrator-gta02-only.patch
===================================================================
--- branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-migrate-vibrator-gta02-only.patch	2008-02-01 00:02:16 UTC (rev 4003)
+++ branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-migrate-vibrator-gta02-only.patch	2008-02-01 00:50:14 UTC (rev 4004)
@@ -0,0 +1,232 @@
+introduce-fiq-migrate-vibrator-gta02-only.patch
+
+From: warmcat <andy at openmoko.com>
+
+On GTA02 we use FIQ to manage the vibrator IO now.  That
+is necessary because we stole timer3 from doing hw pwm
+for vibrator.  This keeps the same UI in /sys but does
+"bitbang pwm" on the same vibrator GPIO
+
+From: Andy Green <andy at openmoko.com>
+Signed-off-by: Andy Green <andy at openmoko.com>
+
+Index: linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/fiq_c_isr.c
++++ linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+@@ -79,6 +79,7 @@
+  */
+ extern void __attribute__ ((naked)) s3c2440_fiq_isr(void);
+ 
++
+ /* this is copied into the hard FIQ vector during init */
+ 
+ static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void)
+@@ -128,7 +129,7 @@
+ 
+ 	_fiq_irq = irq_index_fiq;
+ 	_fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
+-	timer_index = (irq_index_fiq - IRQ_TIMER0);
++	_fiq_timer_index = (irq_index_fiq - IRQ_TIMER0);
+ 
+ 	/* set up the timer to operate as a pwm device */
+ 
+@@ -136,12 +137,11 @@
+ 	if (rc)
+ 		goto bail;
+ 
+-	pwm_timer_fiq.timerid = PWM0 + timer_index;
++	pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index;
+ 	pwm_timer_fiq.prescaler = (6 - 1) / 2;
+ 	pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2;
+ 	/* default rate == ~32us */
+-	pwm_timer_fiq.counter = pwm_timer_fiq.comparer =
+-					timer_divisor = 64;
++	pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000;
+ 
+ 	rc = s3c2410_pwm_enable(&pwm_timer_fiq);
+ 	if (rc)
+@@ -149,6 +149,8 @@
+ 
+ 	s3c2410_pwm_start(&pwm_timer_fiq);
+ 
++	_fiq_timer_divisor = 0xffff; /* so kick will work initially */
++
+ 	/* let our selected interrupt be a magic FIQ interrupt */
+ 	__raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
+ 
+@@ -189,7 +191,7 @@
+ 		     S3C2410_INTMSK);
+ 	tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
+ 	/* fake the timer to a count of 1 */
+-	__raw_writel(1, S3C2410_TCNTB(timer_index));
++	__raw_writel(1, S3C2410_TCNTB(_fiq_timer_index));
+ 	__raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
+ 	__raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
+ 		     S3C2410_TCON);
+@@ -207,6 +209,7 @@
+ 
+ 	if (!r)
+ 		return -EIO;
++
+ 	/* configure for the interrupt we are meant to use */
+ 	printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start);
+ 
+Index: linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/mach-gta02.c
++++ linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+@@ -92,12 +92,50 @@
+ struct _fiq_ipc fiq_ipc;
+ EXPORT_SYMBOL(fiq_ipc);
+ 
++#define DIVISOR_FROM_US(x) ((x) << 1)
++
++#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100)
++
+ /* define FIQ ISR */
+ 
+ FIQ_HANDLER_START()
+ /* define your locals here -- no initializers though */
++	u16 divisor;
+ FIQ_HANDLER_ENTRY(256, 512)
+ /* Your ISR here :-) */
++	divisor = 0xffff;
++
++	/* Vibrator servicing */
++
++	if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */
++		if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched)
++			s3c2410_gpio_setpin(fiq_ipc.vib_gpio_pin, 0);
++		if (((u8)_fiq_count_fiqs) == 0) {
++			fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm;
++			if (fiq_ipc.vib_pwm_latched)
++				s3c2410_gpio_setpin(fiq_ipc.vib_gpio_pin, 1);
++		}
++		divisor = FIQ_DIVISOR_VIBRATOR;
++	}
++
++	/* TODO: HDQ servicing */
++
++
++
++	/* disable further timer interrupts if nobody has any work
++	 * or adjust rate according to who still has work
++	 *
++	 * CAUTION: it means forground code must disable FIQ around
++	 * its own non-atomic S3C2410_INTMSK changes... not common
++	 * thankfully and taken care of by the fiq-basis patch
++	 */
++	if (divisor == 0xffff) /* mask the fiq irq source */
++		__raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask,
++			     S3C2410_INTMSK);
++	else /* still working, maybe at a different rate */
++		__raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index));
++	_fiq_timer_divisor = divisor;
++
+ FIQ_HANDLER_END()
+ 
+ 
+Index: linux-2.6.24/drivers/leds/Kconfig
+===================================================================
+--- linux-2.6.24.orig/drivers/leds/Kconfig
++++ linux-2.6.24/drivers/leds/Kconfig
+@@ -117,6 +117,7 @@
+ config LEDS_NEO1973_VIBRATOR
+ 	tristate "Vibrator Support for the FIC Neo1973 GSM phone"
+ 	depends on LEDS_CLASS && MACH_NEO1973
++	select S3C2440_C_FIQ
+ 	help
+ 	  This option enables support for the vibrator on the FIC Neo1973.
+ 
+Index: linux-2.6.24/drivers/leds/leds-neo1973-vibrator.c
+===================================================================
+--- linux-2.6.24.orig/drivers/leds/leds-neo1973-vibrator.c
++++ linux-2.6.24/drivers/leds/leds-neo1973-vibrator.c
+@@ -23,6 +23,8 @@
+ #include <asm/arch/gta01.h>
+ #include <asm/plat-s3c/regs-timer.h>
+ 
++#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
++
+ #define COUNTER 64
+ 
+ struct neo1973_vib_priv {
+@@ -39,6 +41,11 @@
+ 	struct neo1973_vib_priv *vp =
+ 		container_of(led_cdev, struct neo1973_vib_priv, cdev);
+ 
++	if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
++		fiq_ipc.vib_pwm = value; /* set it for FIQ */
++		fiq_kick(); /* start up FIQs if not already going */
++		return;
++	}
+ 	/*
+ 	 * value == 255 -> 99% duty cycle (full power)
+ 	 * value == 128 -> 50% duty cycle (medium power)
+@@ -46,7 +53,7 @@
+ 	 */
+ 	mutex_lock(&vp->mutex);
+ 	if (vp->has_pwm)
+-		s3c2410_pwm_duty_cycle(value/4, &vp->pwm);
++		s3c2410_pwm_duty_cycle(value / 4, &vp->pwm);
+ 	else {
+ 		if (value)
+ 			s3c2410_gpio_setpin(vp->gpio, 1);
+@@ -123,6 +130,15 @@
+ 	neo1973_vib_led.gpio = r->start;
+ 	platform_set_drvdata(pdev, &neo1973_vib_led);
+ 
++	if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
++		s3c2410_gpio_setpin(neo1973_vib_led.gpio, 0); /* off */
++		s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPIO_OUTPUT);
++		/* safe, kmalloc'd copy needed for FIQ ISR */
++		fiq_ipc.vib_gpio_pin = neo1973_vib_led.gpio;
++		fiq_ipc.vib_pwm = 0; /* off */
++		goto configured;
++	}
++
+ 	/* TOUT3 */
+ 	if (neo1973_vib_led.gpio == S3C2410_GPB3) {
+ 		rc = neo1973_vib_init_hw(&neo1973_vib_led);
+@@ -133,7 +149,7 @@
+ 		s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPB3_TOUT3);
+ 		neo1973_vib_led.has_pwm = 1;
+ 	}
+-
++configured:
+ 	mutex_init(&neo1973_vib_led.mutex);
+ 
+ 	return led_classdev_register(&pdev->dev, &neo1973_vib_led.cdev);
+@@ -141,6 +157,10 @@
+ 
+ static int neo1973_vib_remove(struct platform_device *pdev)
+ {
++	if (machine_is_neo1973_gta02()) /* use FIQ to control GPIO */
++		fiq_ipc.vib_pwm = 0; /* off */
++	/* would only need kick if already off so no kick needed */
++
+ 	if (neo1973_vib_led.has_pwm)
+ 		s3c2410_pwm_disable(&neo1973_vib_led.pwm);
+ 
+Index: linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
++++ linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+@@ -16,8 +16,15 @@
+  * for testing
+  */
+ 
++#include <asm/arch/pwm.h>
++#include <asm/plat-s3c/regs-timer.h>
++
++
+ struct _fiq_ipc {
+-	u8 u8a[0]; /* placeholder */
++	/* vibrator */
++	unsigned long vib_gpio_pin; /* which pin to meddle with */
++	u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
++	u8 vib_pwm_latched;
+ };
+ 
+ /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */

Added: branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-use-timer3-as-source.patch
===================================================================
--- branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-use-timer3-as-source.patch	2008-02-01 00:02:16 UTC (rev 4003)
+++ branches/src/target/kernel/2.6.24.x/patches/introduce-fiq-use-timer3-as-source.patch	2008-02-01 00:50:14 UTC (rev 4004)
@@ -0,0 +1,210 @@
+introduce-fiq-use-timer3-as-source.patch
+
+From: warmcat <andy at openmoko.com>
+
+This makes the FIQ stuff specific to one of the timers on the
+s3c244x and adds the platform stuff for fiq in the gta02 init
+
+Currently one sysfs node is exposed, a count of FIQ events
+
+cat /sys/devices/platform/sc32440_fiq.0/fiq/count
+
+From: Andy Green <andy at openmoko.com>
+Signed-off-by: Andy Green <andy at openmoko.com>
+
+Index: linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/fiq_c_isr.c
++++ linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.c
+@@ -18,6 +18,9 @@
+ #include <asm/plat-s3c24xx/cpu.h>
+ #include <asm/plat-s3c24xx/irq.h>
+ 
++#include <asm/arch/pwm.h>
++#include <asm/plat-s3c/regs-timer.h>
++
+ /*
+  * Major Caveats for using FIQ
+  * ---------------------------
+@@ -66,6 +69,10 @@
+ u32 _fiq_ack_mask; /* used by isr exit define */
+ unsigned long _fiq_count_fiqs; /* used by isr exit define */
+ static int _fiq_irq; /* private ; irq index we were started with, or 0 */
++struct s3c2410_pwm pwm_timer_fiq;
++int _fiq_timer_index;
++u16 _fiq_timer_divisor;
++
+ 
+ /* this function must live in the monolithic kernel somewhere!  A module is
+  * NOT good enough!
+@@ -110,23 +117,45 @@
+  * you still need to clear the source interrupt in S3C2410_INTMSK to get
+  * anything good happening
+  */
+-static void fiq_init_irq_source(int irq_index_fiq)
++static int fiq_init_irq_source(int irq_index_fiq)
+ {
++	int rc = 0;
++
+ 	if (!irq_index_fiq) /* no interrupt */
+-		return;
++		goto bail;
+ 
+-	printk(KERN_INFO"Enabling FIQ using int idx %d\n",
+-	       irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
+ 	local_fiq_disable();
+ 
+ 	_fiq_irq = irq_index_fiq;
+ 	_fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
++	timer_index = (irq_index_fiq - IRQ_TIMER0);
++
++	/* set up the timer to operate as a pwm device */
++
++	rc = s3c2410_pwm_init(&pwm_timer_fiq);
++	if (rc)
++		goto bail;
++
++	pwm_timer_fiq.timerid = PWM0 + timer_index;
++	pwm_timer_fiq.prescaler = (6 - 1) / 2;
++	pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2;
++	/* default rate == ~32us */
++	pwm_timer_fiq.counter = pwm_timer_fiq.comparer =
++					timer_divisor = 64;
++
++	rc = s3c2410_pwm_enable(&pwm_timer_fiq);
++	if (rc)
++		goto bail;
++
++	s3c2410_pwm_start(&pwm_timer_fiq);
+ 
+ 	/* let our selected interrupt be a magic FIQ interrupt */
+ 	__raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
+ 
+ 	/* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
+ 	local_fiq_enable();
++bail:
++	return rc;
+ }
+ 
+ 
+@@ -139,15 +168,13 @@
+ 	_fiq_irq = 0; /* no active source interrupt now either */
+ }
+ 
+-/* this starts FIQ timer events... they continue until the FIQ ISR sees that
+- * its work is done and it turns off the timer.  After setting up the fiq_ipc
+- * struct with new work, you call this to start FIQ timer actions up again.
+- * Only the FIQ ISR decides when it is done and controls turning off the
+- * timer events.
++/*
++ * fiq_kick() forces a FIQ event to happen shortly after leaving the routine
+  */
+ void fiq_kick(void)
+ {
+ 	unsigned long flags;
++	u32 tcon;
+ 
+ 	/* we have to take care about FIQ because this modification is
+ 	 * non-atomic, FIQ could come in after the read and before the
+@@ -156,15 +183,24 @@
+ 	 */
+ 	local_save_flags(flags);
+ 	local_fiq_disable();
++	/* allow FIQs to resume */
+ 	__raw_writel(__raw_readl(S3C2410_INTMSK) &
+ 		     ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
+ 		     S3C2410_INTMSK);
++	tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
++	/* fake the timer to a count of 1 */
++	__raw_writel(1, S3C2410_TCNTB(timer_index));
++	__raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
++	__raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
++		     S3C2410_TCON);
++	__raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON);
+ 	local_irq_restore(flags);
+ }
+ EXPORT_SYMBOL_GPL(fiq_kick);
+ 
+ 
+ 
++
+ static int __init sc32440_fiq_probe(struct platform_device *pdev)
+ {
+ 	struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+@@ -172,6 +208,8 @@
+ 	if (!r)
+ 		return -EIO;
+ 	/* configure for the interrupt we are meant to use */
++	printk(KERN_INFO"Enabling FIQ using irq %d\n", r->start);
++
+ 	fiq_init_irq_source(r->start);
+ 
+ 	return sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
+Index: linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.h
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/fiq_c_isr.h
++++ linux-2.6.24/arch/arm/mach-s3c2440/fiq_c_isr.h
+@@ -5,6 +5,8 @@
+ 
+ extern unsigned long _fiq_count_fiqs;
+ extern u32 _fiq_ack_mask;
++extern int _fiq_timer_index;
++extern u16 _fiq_timer_divisor;
+ 
+ /* This CANNOT be implemented in a module -- it has to be used in code
+  * included in the monolithic kernel
+Index: linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+===================================================================
+--- linux-2.6.24.orig/arch/arm/mach-s3c2440/mach-gta02.c
++++ linux-2.6.24/arch/arm/mach-s3c2440/mach-gta02.c
+@@ -57,6 +57,7 @@
+ #include <asm/irq.h>
+ #include <asm/mach-types.h>
+ 
++#include <asm/arch-s3c2410/regs-irq.h>
+ #include <asm/arch/regs-gpio.h>
+ #include <asm/arch/regs-gpioj.h>
+ #include <asm/arch/fb.h>
+@@ -331,6 +332,21 @@
+ 	},
+ };
+ 
++/* FIQ */
++
++static struct resource sc32440_fiq_resources[] = {
++	[0] = {
++		.flags	= IORESOURCE_IRQ,
++		.start	= IRQ_TIMER3,
++		.end	= IRQ_TIMER3,
++	},
++};
++
++struct platform_device sc32440_fiq_device = {
++	.name 		= "sc32440_fiq",
++	.num_resources	= 1,
++	.resource	= sc32440_fiq_resources,
++};
+ 
+ /* NOR Flash */
+ 
+@@ -398,6 +414,7 @@
+ 	&s3c_device_nand,
+ 	&s3c_device_ts,
+ 	&gta02_nor_flash,
++	&sc32440_fiq_device,
+ };
+ 
+ static struct s3c2410_nand_set gta02_nand_sets[] = {
+Index: linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+===================================================================
+--- linux-2.6.24.orig/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
++++ linux-2.6.24/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+@@ -22,7 +22,7 @@
+ 
+ /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
+ extern struct _fiq_ipc fiq_ipc;
+-
++extern unsigned long _fiq_count_fiqs;
+ extern void fiq_kick(void);  /* provoke a FIQ "immediately" */
+ 
+ #endif /* _LINUX_FIQ_IPC_H */

Modified: branches/src/target/kernel/2.6.24.x/patches/series
===================================================================
--- branches/src/target/kernel/2.6.24.x/patches/series	2008-02-01 00:02:16 UTC (rev 4003)
+++ branches/src/target/kernel/2.6.24.x/patches/series	2008-02-01 00:50:14 UTC (rev 4004)
@@ -69,9 +69,14 @@
 # local hack
 fail-unless-uimage.patch
 
-# upstream issue
+# also pushed upstream - remove when it trickled back down
 montour-audio.patch
 
+# FIQ code
+introduce-fiq-basis.patch
+introduce-fiq-use-timer3-as-source.patch
+introduce-fiq-migrate-vibrator-gta02-only.patch
+
 # OE patches
 fix-EVIOCGRAB-semantics.patch
 iis-suspend.patch





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