DRM/DRI Update

Lars-Peter Clausen lars at metafoo.de
Wed May 6 14:13:28 CEST 2009

Hash: SHA1

Thomas White wrote:
> Hi all,
> I thought I'd present a bit of an update about how things are progressing
> with getting the direct rendering infrastructure working on our hardware.
> Some people may have noticed a lot of activity in the drm-tracking
branch of
> the kernel.  [...]
Hi Tom

Yeay! Thats great to hear :)

The non-drm xf86-video-glamo is in a state which I consider quite
stable and reasonable fast. I want to finish the hardware cursor
acceleration implementation and if thats done I guess it's time for a
0.0.1 release.
The next logical step then would be to join our efforts and
concentrate on the drm enabled driver.
I've also been experimenting with exporting the glamo interrupts to
userspace through a device file. Currently when under load the driver
spends most time busy looping and waiting for the glamo to finish the
blit operations. I guess for the new interface we would need some kind
of blocking ioctl to put userspace to sleep until the bliting
operations have been completed and the cmdq is empty. What's your
opinion on this?

In my opinion instead of exa we should use uxa which is exa without
memory management. And thats also whats intel is using now.

And another question is do you know if it's possible to tell the s3c
to do a dma transfer of the cmdq buffer in the background instead of
iowriting it and blocking the cpu?

- - Lars

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