Fwd: s3c2442 component drawing

[Dave Ball]

Werner Almesberger wrote:
> I finally got to start reviewing it. Sorry for taking so long.
>   
Not a problem - Thanks for the review.

> - EINT3/GPF3 (T26) is missing
> - s/IICSL/IICSCL/
> - AF17 should be VSSQ_SDRAM, not VDDQ_SDRAM
> - VDDALIVE (K5) is missing
> - there is no VDDIARM (AE14).
> - rename VD13/GPD6 to VD13/GPD5
> - rename VD17/GPD10/SPICLK1 to VD18/...
>   
Committed.

> - I think it would be good to make the "D" unit a bit wider, so
>   that it has the same width as the rest and also to give the
>   text on the left side a bit of space from the edge.
>   
Committed.

> - We have a number of EINTs that are grouped with some other
>   subsystem because the pin has a secondary function from that
>   subsystem. The exception to this rule are the EINT+ pins,
>   which are grouped with EINT-only. I think it might be better
>   to group them with their secondary functions as well.
>   
I wasn't sure about this. Most pins are grouped by how we intend to use 
them - i.e. VD8/GPD0/nSPICS1 is with the LCD interface not GPD or SPI. 
The EINT+ pins seem to be used in their primary function (GPIO for NAND 
attribute selection) rather than their secondary function. I can see 
three options for these EINT & EINT+ pins:

1 - leave them grouped in an EINT subsystem
2 - group by their secondary function even where we use them as GPIO
3 - move them to the subsystems that they're used alongside (i.e. 
EINT4/GPF4 could be alongside IIS as it's used in the audio circuit, 
EINT5/GPF5 with SPI for WLAN etc.)

Thoughts?

> - I think it would be nice to keep incrementing GPEx, I'd swap
>   I2SSDO/GPE4 and I2SSDI/GPE3
>   
Committed.


Cheers,
Dave