[PATCH] fix-glamo-reissue-memory-settings-during-resume.patch

[Werner Almesberger]

Andy Green wrote:
> This patch rewrites a subset of registers in that area on resume
> (reinitializing them all destroys the video output action) and
> removes the black snow issue.

Excellent, thanks ! Applied in revision 4244, with slight differences
(see below).

Are the changes below also related to the black snow ?

>  static struct glamo_script glamo_init_script[] = {
>  	{ GLAMO_REG_CLOCK_HOST,		0x1000 },
> -		{ 0xfffe, 1 },
> +		{ 0xfffe, 2 },
>  	{ GLAMO_REG_CLOCK_MEMORY, 	0x1000 },
>  	{ GLAMO_REG_CLOCK_MEMORY,	0x2000 },
>  	{ GLAMO_REG_CLOCK_LCD,		0x1000 },
> @@ -638,8 +650,8 @@ static struct glamo_script glamo_init_script[] = {
>  	{ GLAMO_REG_CLOCK_RISC1,	0x1000 },
>  	{ GLAMO_REG_CLOCK_MPEG,		0x3000 },
>  	{ GLAMO_REG_CLOCK_MPEG,		0x3000 },
> -	{ GLAMO_REG_CLOCK_MPROC,	0x100f },
> -		{ 0xfffe, 1 },
> +	{ GLAMO_REG_CLOCK_MPROC,	0x1000 /*0x100f*/ },
> +		{ 0xfffe, 2 },
>  	{ GLAMO_REG_CLOCK_HOST,		0x0000 },
>  	{ GLAMO_REG_CLOCK_MEMORY,	0x0000 },
>  	{ GLAMO_REG_CLOCK_LCD,		0x0000 },
> @@ -657,11 +669,9 @@ static struct glamo_script glamo_init_script[] = {
>  	{ GLAMO_REG_CLOCK_MPEG,		0x0000 },
>  	{ GLAMO_REG_CLOCK_MPEG,		0x0000 },
>  #endif
> -	{ GLAMO_REG_CLOCK_MPROC,	0x000f },
> -		{ 0xfffe, 1 },
>  	{ GLAMO_REG_PLL_GEN1,		0x05db },	/* 48MHz */
>  	{ GLAMO_REG_PLL_GEN3,		0x09c3 },	/* 80MHz */
> -		{ 0xfffe, 50 },
> +		{ 0xfffd, 0 },
>  	/*
>  	 * b9 of this register MUST be zero to get any interrupts on INT#
>  	 * the other set bits enable all the engine interrupt sources


I already had the following hunk:

> @@ -676,13 +686,9 @@ static struct glamo_script glamo_init_script[] = {
>  	{ 0x212,	0x0000 },
>  	{ 0x214,	0x4000 },
>  	{ 0x216,	0xf00e },
> -	{ GLAMO_REG_MEM_TYPE,		0x0874 /*0x0874 */ }, /* 8MB, 16 word pg wr+rd */
> -	{ GLAMO_REG_MEM_GEN,		0xff8f /*0xafaf*/ }, /* 63 grants min + max */
> -	/*
> -	 * the register below originally 0x0108 makes unreliable Glamo MMC
> -	 * write operations.  Cranked to 0x05ad to add a wait state, the
> -	 * unreliability is not seen after 4GB of write / read testing
> -	 */
> +	{ GLAMO_REG_MEM_TYPE,		0x0874 }, /* 8MB, 16 word pg wr+rd */
> +	{ GLAMO_REG_MEM_GEN,		0xafaf }, /* 63 grants min + max */
> +
>  	{ GLAMO_REG_MEM_TIMING1,	0x0108 },
>  	{ GLAMO_REG_MEM_TIMING2,	0x0010 }, /* Taa = 3 MCLK */
>  	{ GLAMO_REG_MEM_TIMING3,	0x0000 },


And I also had this bit:

> @@ -791,10 +837,10 @@ static void glamo_power(struct glamo_core *glamo,
>  				   GLAMO_MEM_DRAM2_DEEP_PWRDOWN, 0x0000);
>  		__reg_set_bit_mask(glamo, GLAMO_REG_MEM_DRAM1,
>  				   GLAMO_MEM_DRAM1_SELF_REFRESH, 0x0000);
> -		/* FIXME: reset pll's */
> -		/* spin until PLL1 lock */
> -		while (!(__reg_read(glamo, GLAMO_REG_PLL_GEN5) & 1))
> -			;

... except for the removal of "/* FIXME: reset pll's */".

Besides these two areas, the patch applied cleanly and the kernel
builds fine.

Thanks,
- Werner