[s3c6410 BSP] Funnies and questions

[Ben Dooks]

On Mon, Nov 03, 2008 at 02:38:20PM +0000, Andy Green wrote:
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> Somebody in the thread at some point said:
> 
> | That's something your bootloader should really setup, all this code
> | is doing is reading the current settings for where the clocks are
> | sourced from. Either set this in the bootloader, or it should be
> | allowable to set these registers early in the machine specific
> | setup.
> 
> |> [1] This nearly caused a heart attack when I noticed it yesterday since
> |> it looked like the iROM was using the (NC on GTA03) 27MHz source, but I
> |> verified in bootloader it's EPll.
> |
> | Hmm, iirc the EPLL is selected via the mmc_bus clock, it might be using
> | the HCLK fed into the unit which is another possible clock source?
> 
> CLK_SRC is 0x00002007 early in the bootloader, b19b18 = 00 = MMC0 =
> MOUTepll; 11 there would be 27MHz source.  I didn't spot where the
> bootloader MMC stuff changes the clock source to 27MHz, so something is
> fishy somewhere.

I'll double check the code to see if we've not got something wrong with
decoding CLK_SRC.
 
> - -Andy
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-- 
-- 
Ben

Q:      What's a light-year?
A:      One-third less calories than a regular year.