[PATCH 0/3] RFC: fix bug http://docs.openmoko.org/trac/ticket/1884

matt_hsu matt_hsu at openmoko.org
Tue Nov 18 09:23:32 CET 2008


>
> [2] By setting IRQ_DISABLED, ...
>
>     kernel/irq/manage.c:disable_irq
>         kernel/irq/manage.c:disable_irq_nosync
> 	  chip->disable() = kernel/irq/chip.c:default_disable
>
>     ... so the next interrupt will go through mask_ack_irq.
>
> Now, looking at arch/arm/plat-s3c24xx/irq.c:s3c24xx_init_irq, I see
> that IRQ_EINT4 through IRQ_EINT23 are set to handle_edge_irq, not
> handle_level_irq. I wonder if this could explain the problem ?
>   
    Hi Werner,

    According to your suggestion, I did a little test to see this could 
resolve problem if we set EINT9 as
    level_handle.

============= cut here =========================
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index f0ed85c..1b727fa 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -779,7 +779,8 @@ void __init s3c24xx_init_irq(void)
        for (irqno = IRQ_EINT4; irqno <= IRQ_EINT23; irqno++) {
                irqdbf("registering irq %d (extended s3c irq)\n", irqno);
                set_irq_chip(irqno, &s3c_irqext_chip);
-               set_irq_handler(irqno, handle_edge_irq);
+               //set_irq_handler(irqno, handle_edge_irq);
+               set_irq_handler(irqno, handle_level_irq);
                set_irq_flags(irqno, IRQF_VALID);
        }
 
============================================
    The gdb told me:

    (gdb) p irq_desc[53]
$1 = {irq = 0, handle_irq = 0xc007da1c <handle_level_irq>, chip = 
0xc0455530, msi_desc = 0x0, handler_data = 0x0, chip_data = 0x0,
  action = 0xc7993cc0, status = 1179656, depth = 0, wake_depth = 1, 
irq_count = 174, irqs_unhandled = 0, last_unhandled = 0, lock = {
    raw_lock = {slock = 1}, magic = 3735899821, owner_cpu = 4294967295, 
owner = 0xffffffff, dep_map = {key = 0xc045e4d0,
      class_cache = 0xc04f5834, name = 0xc03ef588 "irq_desc->lock", cpu 
= 0}}, dir = 0xc783c140, name = 0x0}
(gdb)

    When the system resumed, it is looped in handling low level IRQ, 
which is what I mentioned before, "the IRQ strom".
  
    Any thoughts?

    Matt



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