[UPSTREAM - RFC] pcf50633_use_regulator_api.patch

Balaji Rao balaji at raobalaji.com
Wed Oct 8 16:08:45 CEST 2008


pcf50633_use_regulator_api.patch

Modify pcf50633 driver to use the new regulator API.
---

 drivers/i2c/chips/Kconfig          |    1 
 drivers/i2c/chips/pcf50633.c       |  112 ++++++------
 drivers/i2c/chips/pcf50633.h       |  349 ------------------------------------
 drivers/regulator/Kconfig          |    4 
 drivers/regulator/Makefile         |    1 
 drivers/regulator/pcf50633.c       |  259 +++++++++++++++++++++++++++
 include/linux/pcf50633.h           |  340 +++++++++++++++++++++++++++++++++++
 include/linux/regulator/pcf50633.h |    3 
 8 files changed, 666 insertions(+), 403 deletions(-)
 delete mode 100644 drivers/i2c/chips/pcf50633.h
 create mode 100644 drivers/regulator/pcf50633.c
 create mode 100644 include/linux/regulator/pcf50633.h


diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
index b965a60..abdbfcb 100644
--- a/drivers/i2c/chips/Kconfig
+++ b/drivers/i2c/chips/Kconfig
@@ -64,6 +64,7 @@ config SENSORS_PCF50606
 config SENSORS_PCF50633
 	tristate "Philips PCF50633"
 	depends on I2C
+	select REGULATOR_PCF50633
 	help
 	  If you say yes here you get support for Philips PCF50633
 	  PMU (Power Management Unit) chips.
diff --git a/drivers/i2c/chips/pcf50633.c b/drivers/i2c/chips/pcf50633.c
index 0cb0e4e..187e28c 100644
--- a/drivers/i2c/chips/pcf50633.c
+++ b/drivers/i2c/chips/pcf50633.c
@@ -51,8 +51,8 @@
 
 #include <asm/mach-types.h>
 
-#include "pcf50633.h"
 #include <linux/pcf50633.h>
+#include <linux/regulator/pcf50633.h>
 #include <linux/resume-dependency.h>
 
 #if 1
@@ -208,7 +208,7 @@ static int __reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
 	return i2c_smbus_write_byte_data(pcf->client, reg, val);
 }
 
-static int reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
+int pcf50633_reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
 {
 	int ret;
 
@@ -218,6 +218,7 @@ static int reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
 
 	return ret;
 }
+EXPORT_SYMBOL(pcf50633_reg_write);
 
 static int32_t __reg_read(struct pcf50633_data *pcf, u_int8_t reg)
 {
@@ -232,7 +233,7 @@ static int32_t __reg_read(struct pcf50633_data *pcf, u_int8_t reg)
 	return ret;
 }
 
-static u_int8_t reg_read(struct pcf50633_data *pcf, u_int8_t reg)
+u_int8_t pcf50633_reg_read(struct pcf50633_data *pcf, u_int8_t reg)
 {
 	int32_t ret;
 
@@ -242,8 +243,9 @@ static u_int8_t reg_read(struct pcf50633_data *pcf, u_int8_t reg)
 
 	return ret & 0xff;
 }
+EXPORT_SYMBOL(pcf50633_reg_read);
 
-static int reg_set_bit_mask(struct pcf50633_data *pcf,
+int pcf50633_reg_set_bit_mask(struct pcf50633_data *pcf,
 			    u_int8_t reg, u_int8_t mask, u_int8_t val)
 {
 	int ret;
@@ -262,8 +264,9 @@ static int reg_set_bit_mask(struct pcf50633_data *pcf,
 
 	return ret;
 }
+EXPORT_SYMBOL(pcf50633_reg_set_bit_mask);
 
-static int reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
+int pcf50633_reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
 {
 	int ret;
 	u_int8_t tmp;
@@ -278,6 +281,7 @@ static int reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val)
 
 	return ret;
 }
+EXPORT_SYMBOL(pcf50633_reg_clear_bits);
 
 /* asynchronously setup reading one ADC channel */
 static void async_adc_read_setup(struct pcf50633_data *pcf,
@@ -390,9 +394,9 @@ int pcf50633_onoff_set(struct pcf50633_data *pcf,
 	addr = regulator_registers[reg] + 1;
 
 	if (on == 0)
-		reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, 0);
+		pcf50633_reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON, 0);
 	else
-		reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON,
+		pcf50633_reg_set_bit_mask(pcf, addr, PCF50633_REGULATOR_ON,
 				 PCF50633_REGULATOR_ON);
 
 	return 0;
@@ -409,7 +413,7 @@ int pcf50633_onoff_get(struct pcf50633_data *pcf,
 
 	/* the *ENA register is always one after the *OUT register */
 	addr = regulator_registers[reg] + 1;
-	val = reg_read(pcf, addr) & PCF50633_REGULATOR_ON;
+	val = pcf50633_reg_read(pcf, addr) & PCF50633_REGULATOR_ON;
 
 	return val;
 }
@@ -456,7 +460,7 @@ int pcf50633_voltage_set(struct pcf50633_data *pcf,
 		return -EINVAL;
 	}
 
-	return reg_write(pcf, regnr, volt_bits);
+	return pcf50633_reg_write(pcf, regnr, volt_bits);
 }
 EXPORT_SYMBOL_GPL(pcf50633_voltage_set);
 
@@ -471,7 +475,7 @@ unsigned int pcf50633_voltage_get(struct pcf50633_data *pcf,
 		return -EINVAL;
 
 	regnr = regulator_registers[reg];
-	volt_bits = reg_read(pcf, regnr);
+	volt_bits = pcf50633_reg_read(pcf, regnr);
 
 	switch (reg) {
 	case PCF50633_REGULATOR_AUTO:
@@ -503,7 +507,7 @@ EXPORT_SYMBOL_GPL(pcf50633_voltage_get);
 /* go into 'STANDBY' mode, i.e. power off the main CPU and peripherals */
 void pcf50633_go_standby(struct pcf50633_data *pcf)
 {
-	reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
 		  PCF50633_OOCSHDWN_GOSTDBY, PCF50633_OOCSHDWN_GOSTDBY);
 }
 EXPORT_SYMBOL_GPL(pcf50633_go_standby);
@@ -514,16 +518,16 @@ void pcf50633_gpio_set(struct pcf50633_data *pcf, enum pcf50633_gpio gpio,
 	u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
 
 	if (on)
-		reg_set_bit_mask(pcf, reg, 0x0f, 0x07);
+		pcf50633_reg_set_bit_mask(pcf, reg, 0x0f, 0x07);
 	else
-		reg_set_bit_mask(pcf, reg, 0x0f, 0x00);
+		pcf50633_reg_set_bit_mask(pcf, reg, 0x0f, 0x00);
 }
 EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
 
 int pcf50633_gpio_get(struct pcf50633_data *pcf, enum pcf50633_gpio gpio)
 {
 	u_int8_t reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
-	u_int8_t val = reg_read(pcf, reg) & 0x0f;
+	u_int8_t val = pcf50633_reg_read(pcf, reg) & 0x0f;
 
 	if (val == PCF50633_GPOCFG_GPOSEL_1 ||
 	    val == (PCF50633_GPOCFG_GPOSEL_0|PCF50633_GPOCFG_GPOSEL_INVERSE))
@@ -735,7 +739,7 @@ static void pcf50633_work_nobat(struct work_struct *work)
 			continue;
 
 		/* there's a battery in there now? */
-		if (reg_read(pcf, PCF50633_REG_MBCS3) & 0x40) {
+		if (pcf50633_reg_read(pcf, PCF50633_REG_MBCS3) & 0x40) {
 
 			pcf->jiffies_last_bat_ins = jiffies;
 
@@ -851,7 +855,7 @@ static void pcf50633_work(struct work_struct *work)
 
 		/* we used SECOND to kick ourselves started -- turn it off */
 		pcfirq[0] &= ~PCF50633_INT1_SECOND;
-		reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
+		pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
 					PCF50633_INT1_SECOND,
 					PCF50633_INT1_SECOND);
 
@@ -952,7 +956,7 @@ static void pcf50633_work(struct work_struct *work)
 		    pcf->flags & PCF50633_F_PWR_PRESSED) {
 			DEBUGP("ONKEY_SECONDS(%u, OOCSTAT=0x%02x) ",
 				pcf->onkey_seconds,
-				reg_read(pcf, PCF50633_REG_OOCSTAT));
+				pcf50633_reg_read(pcf, PCF50633_REG_OOCSTAT));
 			pcf->onkey_seconds++;
 			if (pcf->onkey_seconds >=
 			    pcf->pdata->onkey_seconds_sig_init) {
@@ -997,7 +1001,7 @@ static void pcf50633_work(struct work_struct *work)
 		/* disable SECOND interrupt in case RTC didn't
 		 * request it */
 		if (!(pcf->flags & PCF50633_F_RTC_SECOND))
-			reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
+			pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
 					 PCF50633_INT1_SECOND,
 					 PCF50633_INT1_SECOND);
 	}
@@ -1015,15 +1019,15 @@ static void pcf50633_work(struct work_struct *work)
 
 			DEBUGPC("*** Ignoring BATFULL ***\n");
 
-			ret = reg_read(pcf, PCF50633_REG_MBCC7) &
+			ret = pcf50633_reg_read(pcf, PCF50633_REG_MBCC7) &
 					PCF56033_MBCC7_USB_MASK;
 
 
-			reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
+			pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
 					 PCF56033_MBCC7_USB_MASK,
 					 PCF50633_MBCC7_USB_SUSPEND);
 
-			reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
+			pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC7,
 					 PCF56033_MBCC7_USB_MASK,
 					 ret);
 		} else {
@@ -1098,11 +1102,11 @@ static void pcf50633_work(struct work_struct *work)
 		pcf->onkey_seconds = 0;
 		DEBUGPC("ONKEY1S ");
 		/* Tell PMU we are taking care of this */
-		reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
+		pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
 				 PCF50633_OOCSHDWN_TOTRST,
 				 PCF50633_OOCSHDWN_TOTRST);
 		/* enable SECOND interrupt (hz tick) */
-		reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
+		pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
 	}
 
 	if (pcfirq[3] & (PCF50633_INT4_LOWBAT|PCF50633_INT4_LOWSYS)) {
@@ -1118,7 +1122,7 @@ static void pcf50633_work(struct work_struct *work)
 				pcf->pdata->cb(&pcf->client->dev,
 				       PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
 
-			reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
+			pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
 					PCF50633_MBCC1_RESUME,
 					PCF50633_MBCC1_RESUME);
 	
@@ -1172,7 +1176,7 @@ static void pcf50633_work(struct work_struct *work)
 		}
 
 		/* Tell PMU we are taking care of this */
-		reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
+		pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_OOCSHDWN,
 				 PCF50633_OOCSHDWN_TOTRST,
 				 PCF50633_OOCSHDWN_TOTRST);
 	}
@@ -1411,7 +1415,7 @@ static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma)
 		bits = PCF50633_MBCC7_USB_SUSPEND;
 
 	/* set the nearest charging limit */
-	reg_set_bit_mask(pcf, PCF50633_REG_MBCC7, PCF56033_MBCC7_USB_MASK,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC7, PCF56033_MBCC7_USB_MASK,
 			 bits);
 
 	/* with this charging limit, is charging actually meaningful? */
@@ -1434,13 +1438,13 @@ static void pcf50633_usb_curlim_set(struct pcf50633_data *pcf, int ma)
 	pcf50633_charge_enable(pcf, active);
 
 	/* clear batfull */
-	reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
 				PCF50633_MBCC1_AUTORES,
 				0);
-	reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
 				PCF50633_MBCC1_RESUME,
 				PCF50633_MBCC1_RESUME);
-	reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC1,
 				PCF50633_MBCC1_AUTORES,
 				PCF50633_MBCC1_AUTORES);
 
@@ -1451,7 +1455,7 @@ static ssize_t show_usblim(struct device *dev, struct device_attribute *attr,
 {
 	struct i2c_client *client = to_i2c_client(dev);
 	struct pcf50633_data *pcf = i2c_get_clientdata(client);
-	u_int8_t usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
+	u_int8_t usblim = pcf50633_reg_read(pcf, PCF50633_REG_MBCC7) &
 						PCF56033_MBCC7_USB_MASK;
 	unsigned int ma;
 
@@ -1482,7 +1486,7 @@ static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on)
 	if (on) {
 		pcf->flags |= PCF50633_F_CHG_ENABLED;
 		bits = PCF50633_MBCC1_CHGENA;
-		usblim = reg_read(pcf, PCF50633_REG_MBCC7) &
+		usblim = pcf50633_reg_read(pcf, PCF50633_REG_MBCC7) &
 							PCF56033_MBCC7_USB_MASK;
 		switch (usblim) {
 		case PCF50633_MBCC7_USB_1000mA:
@@ -1503,7 +1507,7 @@ static void pcf50633_charge_enable(struct pcf50633_data *pcf, int on)
 			pcf->pdata->cb(&pcf->client->dev,
 				       PCF50633_FEAT_MBC, PMU_EVT_CHARGER_IDLE);
 	}
-	reg_set_bit_mask(pcf, PCF50633_REG_MBCC1, PCF50633_MBCC1_CHGENA,
+	pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_MBCC1, PCF50633_MBCC1_CHGENA,
 			 bits);
 }
 
@@ -1560,7 +1564,7 @@ static ssize_t show_chgmode(struct device *dev, struct device_attribute *attr,
 {
 	struct i2c_client *client = to_i2c_client(dev);
 	struct pcf50633_data *pcf = i2c_get_clientdata(client);
-	u_int8_t mbcs2 = reg_read(pcf, PCF50633_REG_MBCS2);
+	u_int8_t mbcs2 = pcf50633_reg_read(pcf, PCF50633_REG_MBCS2);
 	u_int8_t chgmod = (mbcs2 & PCF50633_MBCS2_MBC_MASK);
 
 	return sprintf(buf, "%s\n", chgmode_names[chgmod]);
@@ -1664,23 +1668,23 @@ static int pcf50633_rtc_ioctl(struct device *dev, unsigned int cmd,
 	switch (cmd) {
 	case RTC_AIE_OFF:
 		/* disable the alarm interrupt */
-		reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
+		pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
 				 PCF50633_INT1_ALARM, PCF50633_INT1_ALARM);
 		return 0;
 	case RTC_AIE_ON:
 		/* enable the alarm interrupt */
-		reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_ALARM);
+		pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_ALARM);
 		return 0;
 	case RTC_PIE_OFF:
 		/* disable periodic interrupt (hz tick) */
 		pcf->flags &= ~PCF50633_F_RTC_SECOND;
-		reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
+		pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_INT1M,
 				 PCF50633_INT1_SECOND, PCF50633_INT1_SECOND);
 		return 0;
 	case RTC_PIE_ON:
 		/* ensable periodic interrupt (hz tick) */
 		pcf->flags |= PCF50633_F_RTC_SECOND;
-		reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
+		pcf50633_reg_clear_bits(pcf, PCF50633_REG_INT1M, PCF50633_INT1_SECOND);
 		return 0;
 	}
 	return -ENOIOCTLCMD;
@@ -1834,18 +1838,18 @@ static struct rtc_class_ops pcf50633_rtc_ops = {
 static int pcf50633bl_get_intensity(struct backlight_device *bd)
 {
 	struct pcf50633_data *pcf = bl_get_data(bd);
-	int intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
+	int intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
 
 	return intensity & 0x3f;
 }
 
 static int __pcf50633bl_set_intensity(struct pcf50633_data *pcf, int intensity)
 {
-	int old_intensity = reg_read(pcf, PCF50633_REG_LEDOUT);
+	int old_intensity = pcf50633_reg_read(pcf, PCF50633_REG_LEDOUT);
 	u_int8_t ledena = 2;
 	int ret;
 
-	if (!(reg_read(pcf, PCF50633_REG_LEDENA) & 1))
+	if (!(pcf50633_reg_read(pcf, PCF50633_REG_LEDENA) & 1))
 		old_intensity = 0;
 
 	if ((pcf->backlight->props.power != FB_BLANK_UNBLANK) ||
@@ -1858,18 +1862,18 @@ static int __pcf50633bl_set_intensity(struct pcf50633_data *pcf, int intensity)
 	 */
 
 	if (intensity != 0 && old_intensity == 0) {
-		ledena = reg_read(pcf, PCF50633_REG_LEDENA);
-		reg_write(pcf, PCF50633_REG_LEDENA, 0x00);
+		ledena = pcf50633_reg_read(pcf, PCF50633_REG_LEDENA);
+		pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, 0x00);
 	}
 
 	if (!intensity) /* illegal to set LEDOUT to 0 */
-		ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2);
+		ret = pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f, 2);
 	else
-		ret = reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
+		ret = pcf50633_reg_set_bit_mask(pcf, PCF50633_REG_LEDOUT, 0x3f,
 			       intensity);
 
 	if (intensity != 0 && old_intensity == 0)
-		reg_write(pcf, PCF50633_REG_LEDENA, ledena);
+		pcf50633_reg_write(pcf, PCF50633_REG_LEDENA, ledena);
 
 	return ret;
 }
@@ -1911,7 +1915,7 @@ static ssize_t show_charger_type(struct device *dev,
 		[PCF50633_MBCC7_USB_100mA] 	= "100mA",
 		[PCF50633_MBCC7_USB_SUSPEND] 	= "suspend",
 	};
-	int mode = reg_read(pcf, PCF50633_REG_MBCC7) & PCF56033_MBCC7_USB_MASK;
+	int mode = pcf50633_reg_read(pcf, PCF50633_REG_MBCC7) & PCF56033_MBCC7_USB_MASK;
 
 	return sprintf(buf, "%s mode %s\n",
 			    names_charger_type[pcf->charger_type],
@@ -1977,7 +1981,7 @@ static ssize_t show_dump_regs(struct device *dev, struct device_attribute *attr,
 				idx++;
 				dump[n1] = 0x00;
 			} else
-				dump[n1] = reg_read(pcf, n + n1);
+				dump[n1] = pcf50633_reg_read(pcf, n + n1);
 
 		hex_dump_to_buffer(dump, sizeof(dump), 16, 1, buf1, 128, 0);
 		buf1 += strlen(buf1);
@@ -2121,11 +2125,11 @@ static int pcf50633_probe(struct i2c_client *client, const struct i2c_device_id
 	/* configure interrupt mask */
 
 	/* we want SECOND to kick for the coldplug initialisation */
-	reg_write(pcf, PCF50633_REG_INT1M, 0x00);
-	reg_write(pcf, PCF50633_REG_INT2M, 0x00);
-	reg_write(pcf, PCF50633_REG_INT3M, 0x00);
-	reg_write(pcf, PCF50633_REG_INT4M, 0x00);
-	reg_write(pcf, PCF50633_REG_INT5M, 0x00);
+	pcf50633_reg_write(pcf, PCF50633_REG_INT1M, 0x00);
+	pcf50633_reg_write(pcf, PCF50633_REG_INT2M, 0x00);
+	pcf50633_reg_write(pcf, PCF50633_REG_INT3M, 0x00);
+	pcf50633_reg_write(pcf, PCF50633_REG_INT4M, 0x00);
+	pcf50633_reg_write(pcf, PCF50633_REG_INT5M, 0x00);
 
 	err = request_irq(irq, pcf50633_irq, IRQF_TRIGGER_FALLING,
 			  "pcf50633", pcf);
@@ -2164,6 +2168,8 @@ static int pcf50633_probe(struct i2c_client *client, const struct i2c_device_id
 	if (pcf->pdata->flag_use_apm_emulation)
 		apm_get_power_status = NULL;
 
+	pcf50633_regulator_init(pcf, irq);
+
 	pdata->pcf = pcf;
 	pcf->probe_completed = 1;
 	dev_info(&client->dev, "probe completed\n");
@@ -2446,7 +2452,7 @@ void pcf50633_backlight_resume(struct pcf50633_data *pcf)
 	dev_dbg(&pcf->client->dev, "pcf50633_backlight_resume\n");
 
 	/* platform defines resume ramp speed */
-	reg_write(pcf, PCF50633_REG_LEDDIM,
+	pcf50633_reg_write(pcf, PCF50633_REG_LEDDIM,
 				       pcf->pdata->resume_backlight_ramp_speed);
 
 	__pcf50633bl_set_intensity(pcf, pcf->backlight->props.brightness);
diff --git a/drivers/i2c/chips/pcf50633.h b/drivers/i2c/chips/pcf50633.h
deleted file mode 100644
index 5d54131..0000000
--- a/drivers/i2c/chips/pcf50633.h
+++ /dev/null
@@ -1,349 +0,0 @@
-#ifndef _PCF50633_H
-#define _PCF50633_H
-
-/* Philips PCF50633 Power Managemnt Unit (PMU) driver
- * (C) 2006-2007 by Openmoko, Inc.
- * Author: Harald Welte <laforge at openmoko.org>
- *
- */
-
-enum pfc50633_regs {
-	PCF50633_REG_VERSION	= 0x00,
-	PCF50633_REG_VARIANT	= 0x01,
-	PCF50633_REG_INT1	= 0x02,	/* Interrupt Status */
-	PCF50633_REG_INT2	= 0x03,	/* Interrupt Status */
-	PCF50633_REG_INT3	= 0x04,	/* Interrupt Status */
-	PCF50633_REG_INT4	= 0x05,	/* Interrupt Status */
-	PCF50633_REG_INT5	= 0x06,	/* Interrupt Status */
-	PCF50633_REG_INT1M	= 0x07,	/* Interrupt Mask */
-	PCF50633_REG_INT2M	= 0x08,	/* Interrupt Mask */
-	PCF50633_REG_INT3M	= 0x09,	/* Interrupt Mask */
-	PCF50633_REG_INT4M	= 0x0a,	/* Interrupt Mask */
-	PCF50633_REG_INT5M	= 0x0b,	/* Interrupt Mask */
-	PCF50633_REG_OOCSHDWN	= 0x0c,
-	PCF50633_REG_OOCWAKE	= 0x0d,
-	PCF50633_REG_OOCTIM1	= 0x0e,
-	PCF50633_REG_OOCTIM2	= 0x0f,
-	PCF50633_REG_OOCMODE	= 0x10,
-	PCF50633_REG_OOCCTL	= 0x11,
-	PCF50633_REG_OOCSTAT	= 0x12,
-	PCF50633_REG_GPIOCTL	= 0x13,
-	PCF50633_REG_GPIO1CFG	= 0x14,
-	PCF50633_REG_GPIO2CFG	= 0x15,
-	PCF50633_REG_GPIO3CFG	= 0x16,
-	PCF50633_REG_GPOCFG	= 0x17,
-	PCF50633_REG_BVMCTL	= 0x18,
-	PCF50633_REG_SVMCTL	= 0x19,
-	PCF50633_REG_AUTOOUT	= 0x1a,
-	PCF50633_REG_AUTOENA	= 0x1b,
-	PCF50633_REG_AUTOCTL	= 0x1c,
-	PCF50633_REG_AUTOMXC	= 0x1d,
-	PCF50633_REG_DOWN1OUT	= 0x1e,
-	PCF50633_REG_DOWN1ENA	= 0x1f,
-	PCF50633_REG_DOWN1CTL	= 0x20,
-	PCF50633_REG_DOWN1MXC	= 0x21,
-	PCF50633_REG_DOWN2OUT	= 0x22,
-	PCF50633_REG_DOWN2ENA	= 0x23,
-	PCF50633_REG_DOWN2CTL	= 0x24,
-	PCF50633_REG_DOWN2MXC	= 0x25,
-	PCF50633_REG_MEMLDOOUT	= 0x26,
-	PCF50633_REG_MEMLDOENA	= 0x27,
-	PCF50633_REG_LEDOUT	= 0x28,
-	PCF50633_REG_LEDENA	= 0x29,
-	PCF50633_REG_LEDCTL	= 0x2a,
-	PCF50633_REG_LEDDIM	= 0x2b,
-	/* reserved */
-	PCF50633_REG_LDO1OUT	= 0x2d,
-	PCF50633_REG_LDO1ENA	= 0x2e,
-	PCF50633_REG_LDO2OUT	= 0x2f,
-	PCF50633_REG_LDO2ENA	= 0x30,
-	PCF50633_REG_LDO3OUT	= 0x31,
-	PCF50633_REG_LDO3ENA	= 0x32,
-	PCF50633_REG_LDO4OUT	= 0x33,
-	PCF50633_REG_LDO4ENA	= 0x34,
-	PCF50633_REG_LDO5OUT	= 0x35,
-	PCF50633_REG_LDO5ENA	= 0x36,
-	PCF50633_REG_LDO6OUT	= 0x37,
-	PCF50633_REG_LDO6ENA	= 0x38,
-	PCF50633_REG_HCLDOOUT	= 0x39,
-	PCF50633_REG_HCLDOENA	= 0x3a,
-	PCF50633_REG_STBYCTL1	= 0x3b,
-	PCF50633_REG_STBYCTL2	= 0x3c,
-	PCF50633_REG_DEBPF1	= 0x3d,
-	PCF50633_REG_DEBPF2	= 0x3e,
-	PCF50633_REG_DEBPF3	= 0x3f,
-	PCF50633_REG_HCLDOOVL	= 0x40,
-	PCF50633_REG_DCDCSTAT	= 0x41,
-	PCF50633_REG_LDOSTAT	= 0x42,
-	PCF50633_REG_MBCC1	= 0x43,
-	PCF50633_REG_MBCC2	= 0x44,
-	PCF50633_REG_MBCC3	= 0x45,
-	PCF50633_REG_MBCC4	= 0x46,
-	PCF50633_REG_MBCC5	= 0x47,
-	PCF50633_REG_MBCC6	= 0x48,
-	PCF50633_REG_MBCC7	= 0x49,
-	PCF50633_REG_MBCC8	= 0x4a,
-	PCF50633_REG_MBCS1	= 0x4b,
-	PCF50633_REG_MBCS2	= 0x4c,
-	PCF50633_REG_MBCS3	= 0x4d,
-	PCF50633_REG_BBCCTL	= 0x4e,
-	PCF50633_REG_ALMGAIN	= 0x4f,
-	PCF50633_REG_ALMDATA	= 0x50,
-	/* reserved */
-	PCF50633_REG_ADCC3	= 0x52,
-	PCF50633_REG_ADCC2	= 0x53,
-	PCF50633_REG_ADCC1	= 0x54,
-	PCF50633_REG_ADCS1	= 0x55,
-	PCF50633_REG_ADCS2	= 0x56,
-	PCF50633_REG_ADCS3	= 0x57,
-	/* reserved */
-	PCF50633_REG_RTCSC	= 0x59,	/* Second */
-	PCF50633_REG_RTCMN	= 0x5a,	/* Minute */
-	PCF50633_REG_RTCHR	= 0x5b,	/* Hour */
-	PCF50633_REG_RTCWD	= 0x5c,	/* Weekday */
-	PCF50633_REG_RTCDT	= 0x5d,	/* Day */
-	PCF50633_REG_RTCMT	= 0x5e,	/* Month */
-	PCF50633_REG_RTCYR	= 0x5f,	/* Year */
-	PCF50633_REG_RTCSCA	= 0x60, /* Alarm Second */
-	PCF50633_REG_RTCMNA	= 0x61, /* Alarm Minute */
-	PCF50633_REG_RTCHRA	= 0x62, /* Alarm Hour */
-	PCF50633_REG_RTCWDA	= 0x63, /* Alarm Weekday */
-	PCF50633_REG_RTCDTA	= 0x64, /* Alarm Day */
-	PCF50633_REG_RTCMTA	= 0x65, /* Alarm Month */
-	PCF50633_REG_RTCYRA	= 0x66, /* Alarm Year */
-
-	PCF50633_REG_MEMBYTE0	= 0x67,
-	PCF50633_REG_MEMBYTE1	= 0x68,
-	PCF50633_REG_MEMBYTE2	= 0x69,
-	PCF50633_REG_MEMBYTE3	= 0x6a,
-	PCF50633_REG_MEMBYTE4	= 0x6b,
-	PCF50633_REG_MEMBYTE5	= 0x6c,
-	PCF50633_REG_MEMBYTE6	= 0x6d,
-	PCF50633_REG_MEMBYTE7	= 0x6e,
-	/* reserved */
-	PCF50633_REG_DCDCPFM	= 0x84,
-	__NUM_PCF50633_REGS
-};
-
-
-enum pcf50633_reg_oocshdwn {
-	PCF50633_OOCSHDWN_GOSTDBY	= 0x01,
-	PCF50633_OOCSHDWN_TOTRST	= 0x04,
-	PCF50633_OOCSHDWN_COLDBOOT	= 0x08,
-};
-
-enum pcf50633_reg_oocwake {
-	PCF50633_OOCWAKE_ONKEY		= 0x01,
-	PCF50633_OOCWAKE_EXTON1		= 0x02,
-	PCF50633_OOCWAKE_EXTON2		= 0x04,
-	PCF50633_OOCWAKE_EXTON3		= 0x08,
-	PCF50633_OOCWAKE_RTC		= 0x10,
-	/* reserved */
-	PCF50633_OOCWAKE_USB		= 0x40,
-	PCF50633_OOCWAKE_ADP		= 0x80,
-};
-
-enum pcf50633_reg_mbcc1 {
-	PCF50633_MBCC1_CHGENA		= 0x01,	/* Charger enable */
-	PCF50633_MBCC1_AUTOSTOP		= 0x02,
-	PCF50633_MBCC1_AUTORES		= 0x04, /* automatic resume */
-	PCF50633_MBCC1_RESUME		= 0x08, /* explicit resume cmd */
-	PCF50633_MBCC1_RESTART		= 0x10, /* restart charging */
-	PCF50633_MBCC1_PREWDTIME_60M	= 0x20,	/* max. precharging time */
-	PCF50633_MBCC1_WDTIME_1H	= 0x00,
-	PCF50633_MBCC1_WDTIME_2H	= 0x40,
-	PCF50633_MBCC1_WDTIME_4H	= 0x80,
-	PCF50633_MBCC1_WDTIME_6H	= 0xc0,
-};
-#define PCF50633_MBCC1_WDTIME_MASK	  0xc0
-
-enum pcf50633_reg_mbcc2 {
-	PCF50633_MBCC2_VBATCOND_2V7	= 0x00,
-	PCF50633_MBCC2_VBATCOND_2V85	= 0x01,
-	PCF50633_MBCC2_VBATCOND_3V0	= 0x02,
-	PCF50633_MBCC2_VBATCOND_3V15	= 0x03,
-	PCF50633_MBCC2_VMAX_4V		= 0x00,
-	PCF50633_MBCC2_VMAX_4V20	= 0x28,
-	PCF50633_MBCC2_VRESDEBTIME_64S	= 0x80,	/* debounce time (32/64sec) */
-};
-#define	PCF50633_MBCC2_VBATCOND_MASK	  0x03
-#define PCF50633_MBCC2_VMAX_MASK	  0x3c
-
-enum pcf50633_reg_adcc1 {
-	PCF50633_ADCC1_ADCSTART		= 0x01,
-	PCF50633_ADCC1_RES_10BIT	= 0x02,
-	PCF50633_ADCC1_AVERAGE_NO	= 0x00,
-	PCF50633_ADCC1_AVERAGE_4	= 0x04,
-	PCF50633_ADCC1_AVERAGE_8	= 0x08,
-	PCF50633_ADCC1_AVERAGE_16	= 0x0c,
-
-	PCF50633_ADCC1_MUX_BATSNS_RES	= 0x00,
-	PCF50633_ADCC1_MUX_BATSNS_SUBTR	= 0x10,
-	PCF50633_ADCC1_MUX_ADCIN2_RES	= 0x20,
-	PCF50633_ADCC1_MUX_ADCIN2_SUBTR	= 0x30,
-	PCF50633_ADCC1_MUX_BATTEMP	= 0x60,
-	PCF50633_ADCC1_MUX_ADCIN1	= 0x70,
-};
-#define PCF50633_ADCC1_AVERAGE_MASK	0x0c
-#define	PCF50633_ADCC1_ADCMUX_MASK	0xf0
-
-enum pcf50633_reg_adcc2 {
-	PCF50633_ADCC2_RATIO_NONE	= 0x00,
-	PCF50633_ADCC2_RATIO_BATTEMP	= 0x01,
-	PCF50633_ADCC2_RATIO_ADCIN1	= 0x02,
-	PCF50633_ADCC2_RATIO_BOTH	= 0x03,
-	PCF50633_ADCC2_RATIOSETTL_100US	= 0x04,
-};
-#define PCF50633_ADCC2_RATIO_MASK	0x03
-
-enum pcf50633_reg_adcc3 {
-	PCF50633_ADCC3_ACCSW_EN		= 0x01,
-	PCF50633_ADCC3_NTCSW_EN		= 0x04,
-	PCF50633_ADCC3_RES_DIV_TWO	= 0x10,
-	PCF50633_ADCC3_RES_DIV_THREE	= 0x00,
-};
-
-enum pcf50633_reg_adcs3 {
-	PCF50633_ADCS3_REF_NTCSW	= 0x00,
-	PCF50633_ADCS3_REF_ACCSW	= 0x10,
-	PCF50633_ADCS3_REF_2V0		= 0x20,
-	PCF50633_ADCS3_REF_VISA		= 0x30,
-	PCF50633_ADCS3_REF_2V0_2	= 0x70,
-	PCF50633_ADCS3_ADCRDY		= 0x80,
-};
-#define PCF50633_ADCS3_ADCDAT1L_MASK	0x03
-#define PCF50633_ADCS3_ADCDAT2L_MASK	0x0c
-#define PCF50633_ADCS3_ADCDAT2L_SHIFT	2
-#define PCF50633_ASCS3_REF_MASK		0x70
-
-enum pcf50633_regulator_enable {
-	PCF50633_REGULATOR_ON		= 0x01,
-	PCF50633_REGULATOR_ON_GPIO1	= 0x02,
-	PCF50633_REGULATOR_ON_GPIO2	= 0x04,
-	PCF50633_REGULATOR_ON_GPIO3	= 0x08,
-};
-#define PCF50633_REGULATOR_ON_MASK	0x0f
-
-enum pcf50633_regulator_phase {
-	PCF50633_REGULATOR_ACTPH1	= 0x00,
-	PCF50633_REGULATOR_ACTPH2	= 0x10,
-	PCF50633_REGULATOR_ACTPH3	= 0x20,
-	PCF50633_REGULATOR_ACTPH4	= 0x30,
-};
-#define PCF50633_REGULATOR_ACTPH_MASK	0x30
-
-enum pcf50633_reg_gpocfg {
-	PCF50633_GPOCFG_GPOSEL_0	= 0x00,
-	PCF50633_GPOCFG_GPOSEL_LED_NFET	= 0x01,
-	PCF50633_GPOCFG_GPOSEL_SYSxOK	= 0x02,
-	PCF50633_GPOCFG_GPOSEL_CLK32K	= 0x03,
-	PCF50633_GPOCFG_GPOSEL_ADAPUSB	= 0x04,
-	PCF50633_GPOCFG_GPOSEL_USBxOK	= 0x05,
-	PCF50633_GPOCFG_GPOSEL_ACTPH4	= 0x06,
-	PCF50633_GPOCFG_GPOSEL_1	= 0x07,
-	PCF50633_GPOCFG_GPOSEL_INVERSE	= 0x08,
-};
-#define PCF50633_GPOCFG_GPOSEL_MASK	0x07
-
-#if 0
-enum pcf50633_reg_mbcc1 {
-	PCF50633_MBCC1_CHGENA		= 0x01,
-	PCF50633_MBCC1_AUTOSTOP		= 0x02,
-	PCF50633_MBCC1_AUTORES		= 0x04,
-	PCF50633_MBCC1_RESUME		= 0x08,
-	PCF50633_MBCC1_RESTART		= 0x10,
-	PCF50633_MBCC1_PREWDTIME_30MIN	= 0x00,
-	PCF50633_MBCC1_PREWDTIME_60MIN	= 0x20,
-	PCF50633_MBCC1_WDTIME_2HRS	= 0x40,
-	PCF50633_MBCC1_WDTIME_4HRS	= 0x80,
-	PCF50633_MBCC1_WDTIME_6HRS	= 0xc0,
-};
-
-enum pcf50633_reg_mbcc2 {
-	PCF50633_MBCC2_VBATCOND_2V7	= 0x00,
-	PCF50633_MBCC2_VBATCOND_2V85	= 0x01,
-	PCF50633_MBCC2_VBATCOND_3V0	= 0x02,
-	PCF50633_MBCC2_VBATCOND_3V15	= 0x03,
-	PCF50633_MBCC2_VRESDEBTIME_64S	= 0x80,
-};
-#define PCF50633_MBCC2_VMAX_MASK	0x3c
-#endif
-
-enum pcf50633_reg_mbcc7 {
-	PCF50633_MBCC7_USB_100mA	= 0x00,
-	PCF50633_MBCC7_USB_500mA	= 0x01,
-	PCF50633_MBCC7_USB_1000mA	= 0x02,
-	PCF50633_MBCC7_USB_SUSPEND	= 0x03,
-	PCF50633_MBCC7_BATTEMP_EN	= 0x04,
-	PCF50633_MBCC7_BATSYSIMAX_1A6	= 0x00,
-	PCF50633_MBCC7_BATSYSIMAX_1A8	= 0x40,
-	PCF50633_MBCC7_BATSYSIMAX_2A0	= 0x80,
-	PCF50633_MBCC7_BATSYSIMAX_2A2	= 0xc0,
-};
-#define PCF56033_MBCC7_USB_MASK		0x03
-
-enum pcf50633_reg_mbcc8 {
-	PCF50633_MBCC8_USBENASUS	= 0x10,
-};
-
-enum pcf50633_reg_mbcs1 {
-	PCF50633_MBCS1_USBPRES		= 0x01,
-	PCF50633_MBCS1_USBOK		= 0x02,
-	PCF50633_MBCS1_ADAPTPRES	= 0x04,
-	PCF50633_MBCS1_ADAPTOK		= 0x08,
-	PCF50633_MBCS1_TBAT_OK		= 0x00,
-	PCF50633_MBCS1_TBAT_ABOVE	= 0x10,
-	PCF50633_MBCS1_TBAT_BELOW	= 0x20,
-	PCF50633_MBCS1_TBAT_UNDEF	= 0x30,
-	PCF50633_MBCS1_PREWDTEXP	= 0x40,
-	PCF50633_MBCS1_WDTEXP		= 0x80,
-};
-
-enum pcf50633_reg_mbcs2_mbcmod {
-	PCF50633_MBCS2_MBC_PLAY		= 0x00,
-	PCF50633_MBCS2_MBC_USB_PRE	= 0x01,
-	PCF50633_MBCS2_MBC_USB_PRE_WAIT	= 0x02,
-	PCF50633_MBCS2_MBC_USB_FAST	= 0x03,
-	PCF50633_MBCS2_MBC_USB_FAST_WAIT= 0x04,
-	PCF50633_MBCS2_MBC_USB_SUSPEND	= 0x05,
-	PCF50633_MBCS2_MBC_ADP_PRE	= 0x06,
-	PCF50633_MBCS2_MBC_ADP_PRE_WAIT	= 0x07,
-	PCF50633_MBCS2_MBC_ADP_FAST	= 0x08,
-	PCF50633_MBCS2_MBC_ADP_FAST_WAIT= 0x09,
-	PCF50633_MBCS2_MBC_BAT_FULL	= 0x0a,
-	PCF50633_MBCS2_MBC_HALT		= 0x0b,
-};
-#define PCF50633_MBCS2_MBC_MASK		0x0f
-enum pcf50633_reg_mbcs2_chgstat {
-	PCF50633_MBCS2_CHGS_NONE	= 0x00,
-	PCF50633_MBCS2_CHGS_ADAPTER	= 0x10,
-	PCF50633_MBCS2_CHGS_USB		= 0x20,
-	PCF50633_MBCS2_CHGS_BOTH	= 0x30,
-};
-#define PCF50633_MBCS2_RESSTAT_AUTO	0x40
-
-enum pcf50633_reg_mbcs3 {
-	PCF50633_MBCS3_USBLIM_PLAY	= 0x01,
-	PCF50633_MBCS3_USBLIM_CGH	= 0x02,
-	PCF50633_MBCS3_TLIM_PLAY	= 0x04,
-	PCF50633_MBCS3_TLIM_CHG		= 0x08,
-	PCF50633_MBCS3_ILIM		= 0x10,	/* 1: Ibat > Icutoff */
-	PCF50633_MBCS3_VLIM		= 0x20,	/* 1: Vbat == Vmax */
-	PCF50633_MBCS3_VBATSTAT		= 0x40,	/* 1: Vbat > Vbatcond */
-	PCF50633_MBCS3_VRES		= 0x80, /* 1: Vbat > Vth(RES) */
-};
-
-/* this is to be provided by the board implementation */
-extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS];
-
-void pcf50633_reg_write(u_int8_t reg, u_int8_t val);
-
-u_int8_t pcf50633_reg_read(u_int8_t reg);
-
-void pcf50633_reg_set_bit_mask(u_int8_t reg, u_int8_t mask, u_int8_t val);
-void pcf50633_reg_clear_bits(u_int8_t reg, u_int8_t bits);
-
-void pcf50633_charge_autofast(int on);
-
-#endif /* _PCF50606_H */
-
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index a656128..9f585f1 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -56,4 +56,8 @@ config REGULATOR_BQ24022
 	  charging select between 100 mA and 500 mA charging current
 	  limit.
 
+config REGULATOR_PCF50633
+	bool "PCF50633 regulator driver"
+	select REGULATOR
+
 endmenu
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index ac2c64e..6bdfb50 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -8,5 +8,6 @@ obj-$(CONFIG_REGULATOR_FIXED_VOLTAGE) += fixed.o
 obj-$(CONFIG_REGULATOR_VIRTUAL_CONSUMER) += virtual.o
 
 obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
+obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633.o 
 
 ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/pcf50633.c b/drivers/regulator/pcf50633.c
new file mode 100644
index 0000000..ea0588a
--- /dev/null
+++ b/drivers/regulator/pcf50633.c
@@ -0,0 +1,259 @@
+/*
+ * Regulator driver for pcf50633
+ */
+
+#include <linux/regulator/driver.h>
+#include <linux/pcf50633.h>
+
+#define PCF50633_REGULATOR(_name, _id) \
+	{				\
+		.name = _name, .id = _id, .ops = &pcf50633_reg_ops, \
+		.irq = 1, .type = REGULATOR_VOLTAGE, \
+		.owner = THIS_MODULE, \
+	}
+
+static const u_int8_t regulator_registers[__NUM_PCF50633_REGULATORS] = {
+	[PCF50633_REGULATOR_AUTO]	= PCF50633_REG_AUTOOUT,
+	[PCF50633_REGULATOR_DOWN1]	= PCF50633_REG_DOWN1OUT,
+	[PCF50633_REGULATOR_DOWN2]	= PCF50633_REG_DOWN2OUT,
+	[PCF50633_REGULATOR_MEMLDO]	= PCF50633_REG_MEMLDOOUT,
+	[PCF50633_REGULATOR_LDO1]	= PCF50633_REG_LDO1OUT,
+	[PCF50633_REGULATOR_LDO2]	= PCF50633_REG_LDO2OUT,
+	[PCF50633_REGULATOR_LDO3]	= PCF50633_REG_LDO3OUT,
+	[PCF50633_REGULATOR_LDO4]	= PCF50633_REG_LDO4OUT,
+	[PCF50633_REGULATOR_LDO5]	= PCF50633_REG_LDO5OUT,
+	[PCF50633_REGULATOR_LDO6]	= PCF50633_REG_LDO6OUT,
+	[PCF50633_REGULATOR_HCLDO]	= PCF50633_REG_HCLDOOUT,
+};
+
+/* Bits from voltage value */
+static u_int8_t auto_voltage_bits(unsigned int millivolts)
+{
+	if (millivolts < 1800)
+		return 0;
+	if (millivolts > 3800)
+		return 0xff;
+
+	millivolts -= 625;
+	return millivolts/25;
+}
+
+static u_int8_t down_voltage_bits(unsigned int millivolts)
+{
+	if (millivolts < 625)
+		return 0;
+	else if (millivolts > 3000)
+		return 0xff;
+
+	millivolts -= 625;
+	return millivolts/25;
+}
+
+static u_int8_t ldo_voltage_bits(unsigned int millivolts)
+{
+	if (millivolts < 900)
+		return 0;
+	else if (millivolts > 3600)
+		return 0x1f;
+
+	millivolts -= 900;
+	return millivolts/100;
+}
+
+/* Obtain voltage value from bits */
+
+static unsigned int auto_voltage_value(uint8_t bits)
+{
+	if (bits < 0x2f)
+		return 0;
+	return 625 + (bits * 25);
+}
+
+
+static unsigned int down_voltage_value(uint8_t bits)
+{
+	return 625 + (bits*25);
+}
+
+
+static unsigned int ldo_voltage_value(uint8_t bits)
+{
+	bits &= 0x1f;
+	return 900 + (bits * 100);
+}
+
+static int pcf50633_regulator_set_voltage(struct regulator_dev *rdev,
+			int min_uV, int max_uV)
+{
+	uint8_t volt_bits;
+	uint8_t regnr;
+	int regulator_id;
+	int millivolts;
+	struct pcf50633_data *pcf = rdev_get_drvdata(rdev);;
+
+	regulator_id = rdev_get_id(rdev);
+
+	if (regulator_id >= __NUM_PCF50633_REGULATORS)
+		return -EINVAL;
+
+	millivolts = min_uV / 1000;
+
+	regnr = regulator_registers[regulator_id];
+
+	switch (regulator_id) {
+	case PCF50633_REGULATOR_AUTO:
+		volt_bits = auto_voltage_bits(millivolts);
+		break;
+	case PCF50633_REGULATOR_DOWN1:
+		volt_bits = down_voltage_bits(millivolts);
+		break;
+	case PCF50633_REGULATOR_DOWN2:
+		volt_bits = down_voltage_bits(millivolts);
+		break;
+	case PCF50633_REGULATOR_LDO1:
+	case PCF50633_REGULATOR_LDO2:
+	case PCF50633_REGULATOR_LDO3:
+	case PCF50633_REGULATOR_LDO4:
+	case PCF50633_REGULATOR_LDO5:
+	case PCF50633_REGULATOR_LDO6:
+	case PCF50633_REGULATOR_HCLDO:
+		volt_bits = ldo_voltage_bits(millivolts);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return pcf50633_reg_write(pcf, regnr, volt_bits);
+}
+
+static int pcf50633_regulator_get_voltage(struct regulator_dev *rdev)
+{
+	uint8_t volt_bits;
+	uint8_t regnr;
+	unsigned int rc = 0;
+	int regulator_id = rdev_get_id(rdev);
+	struct pcf50633_data *pcf = rdev_get_drvdata(rdev);
+
+	if (regulator_id >= __NUM_PCF50633_REGULATORS)
+		return -EINVAL;
+
+	regnr = regulator_registers[regulator_id];
+	volt_bits = pcf50633_reg_read(pcf, regnr);
+
+	switch (regulator_id) {
+	case PCF50633_REGULATOR_AUTO:
+		rc = auto_voltage_value(volt_bits);
+		break;
+	case PCF50633_REGULATOR_DOWN1:
+		rc = down_voltage_value(volt_bits);
+		break;
+	case PCF50633_REGULATOR_DOWN2:
+		rc = down_voltage_value(volt_bits);
+		break;
+	case PCF50633_REGULATOR_LDO1:
+	case PCF50633_REGULATOR_LDO2:
+	case PCF50633_REGULATOR_LDO3:
+	case PCF50633_REGULATOR_LDO4:
+	case PCF50633_REGULATOR_LDO5:
+	case PCF50633_REGULATOR_LDO6:
+	case PCF50633_REGULATOR_HCLDO:
+		rc = ldo_voltage_value(volt_bits);
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	return rc;
+}
+
+static int pcf50633_regulator_enable(struct regulator_dev *rdev)
+{
+	uint8_t regnr;
+	int regulator_id = rdev_get_id(rdev);
+	struct pcf50633_data *pcf = rdev_get_drvdata(rdev);
+
+	if (regulator_id >= __NUM_PCF50633_REGULATORS)
+		return -EINVAL;
+
+	/* the *ENA register is always one after the *OUT register */
+	regnr = regulator_registers[regulator_id] + 1;
+
+	pcf50633_reg_set_bit_mask(pcf, regnr, PCF50633_REGULATOR_ON,
+		       PCF50633_REGULATOR_ON);
+
+	return 0;
+}
+
+static int pcf50633_regulator_disable(struct regulator_dev *rdev)
+{
+	uint8_t regnr;
+	int regulator_id = rdev_get_id(rdev);
+	struct pcf50633_data *pcf = rdev_get_drvdata(rdev);
+
+	if (regulator_id >= __NUM_PCF50633_REGULATORS)
+		return -EINVAL;
+
+	/* the *ENA register is always one after the *OUT register */
+	regnr = regulator_registers[regulator_id] + 1;
+
+	pcf50633_reg_set_bit_mask(pcf, regnr, PCF50633_REGULATOR_ON, 0);
+
+	return 0;
+}
+
+static int pcf50633_regulator_is_enabled(struct regulator_dev *rdev)
+{
+	uint8_t val, regnr;
+	int regulator_id = rdev_get_id(rdev);
+	struct pcf50633_data *pcf = rdev_get_drvdata(rdev);;
+
+	if (regulator_id >= __NUM_PCF50633_REGULATORS)
+		return -EINVAL;
+
+	/* the *ENA register is always one after the *OUT register */
+	regnr = regulator_registers[regulator_id] + 1;
+	val = pcf50633_reg_read(pcf, regnr) & PCF50633_REGULATOR_ON;
+
+	return val;
+}
+
+struct regulator_ops pcf50633_reg_ops = {
+	.set_voltage = pcf50633_regulator_set_voltage,
+	.get_voltage = pcf50633_regulator_get_voltage,
+	.enable = pcf50633_regulator_enable,
+	.disable = pcf50633_regulator_disable,
+	.is_enabled = pcf50633_regulator_is_enabled,
+};
+
+struct regulator_desc pcf50633_regulators[] = {
+	PCF50633_REGULATOR("auto", PCF50633_REGULATOR_AUTO),
+	PCF50633_REGULATOR("down1", PCF50633_REGULATOR_DOWN1),
+	PCF50633_REGULATOR("down2", PCF50633_REGULATOR_DOWN2),
+	PCF50633_REGULATOR("memldo", PCF50633_REGULATOR_MEMLDO),
+	PCF50633_REGULATOR("ldo1", PCF50633_REGULATOR_LDO1),
+	PCF50633_REGULATOR("ldo2", PCF50633_REGULATOR_LDO2),
+	PCF50633_REGULATOR("ldo3", PCF50633_REGULATOR_LDO3),
+	PCF50633_REGULATOR("ldo4", PCF50633_REGULATOR_LDO4),
+	PCF50633_REGULATOR("ldo5", PCF50633_REGULATOR_LDO5),
+	PCF50633_REGULATOR("ldo6", PCF50633_REGULATOR_LDO6),
+	PCF50633_REGULATOR("hcldo", PCF50633_REGULATOR_HCLDO),
+};
+
+/* 
+ * Initialize and register the regulator with the core.
+ */
+
+int pcf50633_regulator_init(struct pcf50633_data *pcf, int irq)
+{
+	int i;
+
+	printk("pcf50633 regulator init\n");
+
+	for (i = 0; i < ARRAY_SIZE(pcf50633_regulators); i++) {
+		pcf50633_regulators[i].irq = irq;
+		regulator_register(&pcf50633_regulators[i], pcf);
+	}
+
+	return 0;
+}
+
diff --git a/include/linux/pcf50633.h b/include/linux/pcf50633.h
index 1d44ebf..2dfda5e 100644
--- a/include/linux/pcf50633.h
+++ b/include/linux/pcf50633.h
@@ -4,7 +4,6 @@
 #include <linux/pcf506xx.h>
 #include <linux/resume-dependency.h>
 
-
 /* public in-kernel pcf50633 api */
 enum pcf50633_regulator_id {
 	PCF50633_REGULATOR_AUTO,
@@ -179,4 +178,343 @@ struct pcf50633_platform_data {
 	struct pcf50633_data *pcf;
 };
 
+enum pfc50633_regs {
+	PCF50633_REG_VERSION	= 0x00,
+	PCF50633_REG_VARIANT	= 0x01,
+	PCF50633_REG_INT1	= 0x02,	/* Interrupt Status */
+	PCF50633_REG_INT2	= 0x03,	/* Interrupt Status */
+	PCF50633_REG_INT3	= 0x04,	/* Interrupt Status */
+	PCF50633_REG_INT4	= 0x05,	/* Interrupt Status */
+	PCF50633_REG_INT5	= 0x06,	/* Interrupt Status */
+	PCF50633_REG_INT1M	= 0x07,	/* Interrupt Mask */
+	PCF50633_REG_INT2M	= 0x08,	/* Interrupt Mask */
+	PCF50633_REG_INT3M	= 0x09,	/* Interrupt Mask */
+	PCF50633_REG_INT4M	= 0x0a,	/* Interrupt Mask */
+	PCF50633_REG_INT5M	= 0x0b,	/* Interrupt Mask */
+	PCF50633_REG_OOCSHDWN	= 0x0c,
+	PCF50633_REG_OOCWAKE	= 0x0d,
+	PCF50633_REG_OOCTIM1	= 0x0e,
+	PCF50633_REG_OOCTIM2	= 0x0f,
+	PCF50633_REG_OOCMODE	= 0x10,
+	PCF50633_REG_OOCCTL	= 0x11,
+	PCF50633_REG_OOCSTAT	= 0x12,
+	PCF50633_REG_GPIOCTL	= 0x13,
+	PCF50633_REG_GPIO1CFG	= 0x14,
+	PCF50633_REG_GPIO2CFG	= 0x15,
+	PCF50633_REG_GPIO3CFG	= 0x16,
+	PCF50633_REG_GPOCFG	= 0x17,
+	PCF50633_REG_BVMCTL	= 0x18,
+	PCF50633_REG_SVMCTL	= 0x19,
+	PCF50633_REG_AUTOOUT	= 0x1a,
+	PCF50633_REG_AUTOENA	= 0x1b,
+	PCF50633_REG_AUTOCTL	= 0x1c,
+	PCF50633_REG_AUTOMXC	= 0x1d,
+	PCF50633_REG_DOWN1OUT	= 0x1e,
+	PCF50633_REG_DOWN1ENA	= 0x1f,
+	PCF50633_REG_DOWN1CTL	= 0x20,
+	PCF50633_REG_DOWN1MXC	= 0x21,
+	PCF50633_REG_DOWN2OUT	= 0x22,
+	PCF50633_REG_DOWN2ENA	= 0x23,
+	PCF50633_REG_DOWN2CTL	= 0x24,
+	PCF50633_REG_DOWN2MXC	= 0x25,
+	PCF50633_REG_MEMLDOOUT	= 0x26,
+	PCF50633_REG_MEMLDOENA	= 0x27,
+	PCF50633_REG_LEDOUT	= 0x28,
+	PCF50633_REG_LEDENA	= 0x29,
+	PCF50633_REG_LEDCTL	= 0x2a,
+	PCF50633_REG_LEDDIM	= 0x2b,
+	/* reserved */
+	PCF50633_REG_LDO1OUT	= 0x2d,
+	PCF50633_REG_LDO1ENA	= 0x2e,
+	PCF50633_REG_LDO2OUT	= 0x2f,
+	PCF50633_REG_LDO2ENA	= 0x30,
+	PCF50633_REG_LDO3OUT	= 0x31,
+	PCF50633_REG_LDO3ENA	= 0x32,
+	PCF50633_REG_LDO4OUT	= 0x33,
+	PCF50633_REG_LDO4ENA	= 0x34,
+	PCF50633_REG_LDO5OUT	= 0x35,
+	PCF50633_REG_LDO5ENA	= 0x36,
+	PCF50633_REG_LDO6OUT	= 0x37,
+	PCF50633_REG_LDO6ENA	= 0x38,
+	PCF50633_REG_HCLDOOUT	= 0x39,
+	PCF50633_REG_HCLDOENA	= 0x3a,
+	PCF50633_REG_STBYCTL1	= 0x3b,
+	PCF50633_REG_STBYCTL2	= 0x3c,
+	PCF50633_REG_DEBPF1	= 0x3d,
+	PCF50633_REG_DEBPF2	= 0x3e,
+	PCF50633_REG_DEBPF3	= 0x3f,
+	PCF50633_REG_HCLDOOVL	= 0x40,
+	PCF50633_REG_DCDCSTAT	= 0x41,
+	PCF50633_REG_LDOSTAT	= 0x42,
+	PCF50633_REG_MBCC1	= 0x43,
+	PCF50633_REG_MBCC2	= 0x44,
+	PCF50633_REG_MBCC3	= 0x45,
+	PCF50633_REG_MBCC4	= 0x46,
+	PCF50633_REG_MBCC5	= 0x47,
+	PCF50633_REG_MBCC6	= 0x48,
+	PCF50633_REG_MBCC7	= 0x49,
+	PCF50633_REG_MBCC8	= 0x4a,
+	PCF50633_REG_MBCS1	= 0x4b,
+	PCF50633_REG_MBCS2	= 0x4c,
+	PCF50633_REG_MBCS3	= 0x4d,
+	PCF50633_REG_BBCCTL	= 0x4e,
+	PCF50633_REG_ALMGAIN	= 0x4f,
+	PCF50633_REG_ALMDATA	= 0x50,
+	/* reserved */
+	PCF50633_REG_ADCC3	= 0x52,
+	PCF50633_REG_ADCC2	= 0x53,
+	PCF50633_REG_ADCC1	= 0x54,
+	PCF50633_REG_ADCS1	= 0x55,
+	PCF50633_REG_ADCS2	= 0x56,
+	PCF50633_REG_ADCS3	= 0x57,
+	/* reserved */
+	PCF50633_REG_RTCSC	= 0x59,	/* Second */
+	PCF50633_REG_RTCMN	= 0x5a,	/* Minute */
+	PCF50633_REG_RTCHR	= 0x5b,	/* Hour */
+	PCF50633_REG_RTCWD	= 0x5c,	/* Weekday */
+	PCF50633_REG_RTCDT	= 0x5d,	/* Day */
+	PCF50633_REG_RTCMT	= 0x5e,	/* Month */
+	PCF50633_REG_RTCYR	= 0x5f,	/* Year */
+	PCF50633_REG_RTCSCA	= 0x60, /* Alarm Second */
+	PCF50633_REG_RTCMNA	= 0x61, /* Alarm Minute */
+	PCF50633_REG_RTCHRA	= 0x62, /* Alarm Hour */
+	PCF50633_REG_RTCWDA	= 0x63, /* Alarm Weekday */
+	PCF50633_REG_RTCDTA	= 0x64, /* Alarm Day */
+	PCF50633_REG_RTCMTA	= 0x65, /* Alarm Month */
+	PCF50633_REG_RTCYRA	= 0x66, /* Alarm Year */
+
+	PCF50633_REG_MEMBYTE0	= 0x67,
+	PCF50633_REG_MEMBYTE1	= 0x68,
+	PCF50633_REG_MEMBYTE2	= 0x69,
+	PCF50633_REG_MEMBYTE3	= 0x6a,
+	PCF50633_REG_MEMBYTE4	= 0x6b,
+	PCF50633_REG_MEMBYTE5	= 0x6c,
+	PCF50633_REG_MEMBYTE6	= 0x6d,
+	PCF50633_REG_MEMBYTE7	= 0x6e,
+	/* reserved */
+	PCF50633_REG_DCDCPFM	= 0x84,
+	__NUM_PCF50633_REGS
+};
+
+
+enum pcf50633_reg_oocshdwn {
+	PCF50633_OOCSHDWN_GOSTDBY	= 0x01,
+	PCF50633_OOCSHDWN_TOTRST	= 0x04,
+	PCF50633_OOCSHDWN_COLDBOOT	= 0x08,
+};
+
+enum pcf50633_reg_oocwake {
+	PCF50633_OOCWAKE_ONKEY		= 0x01,
+	PCF50633_OOCWAKE_EXTON1		= 0x02,
+	PCF50633_OOCWAKE_EXTON2		= 0x04,
+	PCF50633_OOCWAKE_EXTON3		= 0x08,
+	PCF50633_OOCWAKE_RTC		= 0x10,
+	/* reserved */
+	PCF50633_OOCWAKE_USB		= 0x40,
+	PCF50633_OOCWAKE_ADP		= 0x80,
+};
+
+enum pcf50633_reg_mbcc1 {
+	PCF50633_MBCC1_CHGENA		= 0x01,	/* Charger enable */
+	PCF50633_MBCC1_AUTOSTOP		= 0x02,
+	PCF50633_MBCC1_AUTORES		= 0x04, /* automatic resume */
+	PCF50633_MBCC1_RESUME		= 0x08, /* explicit resume cmd */
+	PCF50633_MBCC1_RESTART		= 0x10, /* restart charging */
+	PCF50633_MBCC1_PREWDTIME_60M	= 0x20,	/* max. precharging time */
+	PCF50633_MBCC1_WDTIME_1H	= 0x00,
+	PCF50633_MBCC1_WDTIME_2H	= 0x40,
+	PCF50633_MBCC1_WDTIME_4H	= 0x80,
+	PCF50633_MBCC1_WDTIME_6H	= 0xc0,
+};
+#define PCF50633_MBCC1_WDTIME_MASK	  0xc0
+
+enum pcf50633_reg_mbcc2 {
+	PCF50633_MBCC2_VBATCOND_2V7	= 0x00,
+	PCF50633_MBCC2_VBATCOND_2V85	= 0x01,
+	PCF50633_MBCC2_VBATCOND_3V0	= 0x02,
+	PCF50633_MBCC2_VBATCOND_3V15	= 0x03,
+	PCF50633_MBCC2_VMAX_4V		= 0x00,
+	PCF50633_MBCC2_VMAX_4V20	= 0x28,
+	PCF50633_MBCC2_VRESDEBTIME_64S	= 0x80,	/* debounce time (32/64sec) */
+};
+#define	PCF50633_MBCC2_VBATCOND_MASK	  0x03
+#define PCF50633_MBCC2_VMAX_MASK	  0x3c
+
+enum pcf50633_reg_adcc1 {
+	PCF50633_ADCC1_ADCSTART		= 0x01,
+	PCF50633_ADCC1_RES_10BIT	= 0x02,
+	PCF50633_ADCC1_AVERAGE_NO	= 0x00,
+	PCF50633_ADCC1_AVERAGE_4	= 0x04,
+	PCF50633_ADCC1_AVERAGE_8	= 0x08,
+	PCF50633_ADCC1_AVERAGE_16	= 0x0c,
+
+	PCF50633_ADCC1_MUX_BATSNS_RES	= 0x00,
+	PCF50633_ADCC1_MUX_BATSNS_SUBTR	= 0x10,
+	PCF50633_ADCC1_MUX_ADCIN2_RES	= 0x20,
+	PCF50633_ADCC1_MUX_ADCIN2_SUBTR	= 0x30,
+	PCF50633_ADCC1_MUX_BATTEMP	= 0x60,
+	PCF50633_ADCC1_MUX_ADCIN1	= 0x70,
+};
+#define PCF50633_ADCC1_AVERAGE_MASK	0x0c
+#define	PCF50633_ADCC1_ADCMUX_MASK	0xf0
+
+enum pcf50633_reg_adcc2 {
+	PCF50633_ADCC2_RATIO_NONE	= 0x00,
+	PCF50633_ADCC2_RATIO_BATTEMP	= 0x01,
+	PCF50633_ADCC2_RATIO_ADCIN1	= 0x02,
+	PCF50633_ADCC2_RATIO_BOTH	= 0x03,
+	PCF50633_ADCC2_RATIOSETTL_100US	= 0x04,
+};
+#define PCF50633_ADCC2_RATIO_MASK	0x03
+
+enum pcf50633_reg_adcc3 {
+	PCF50633_ADCC3_ACCSW_EN		= 0x01,
+	PCF50633_ADCC3_NTCSW_EN		= 0x04,
+	PCF50633_ADCC3_RES_DIV_TWO	= 0x10,
+	PCF50633_ADCC3_RES_DIV_THREE	= 0x00,
+};
+
+enum pcf50633_reg_adcs3 {
+	PCF50633_ADCS3_REF_NTCSW	= 0x00,
+	PCF50633_ADCS3_REF_ACCSW	= 0x10,
+	PCF50633_ADCS3_REF_2V0		= 0x20,
+	PCF50633_ADCS3_REF_VISA		= 0x30,
+	PCF50633_ADCS3_REF_2V0_2	= 0x70,
+	PCF50633_ADCS3_ADCRDY		= 0x80,
+};
+#define PCF50633_ADCS3_ADCDAT1L_MASK	0x03
+#define PCF50633_ADCS3_ADCDAT2L_MASK	0x0c
+#define PCF50633_ADCS3_ADCDAT2L_SHIFT	2
+#define PCF50633_ASCS3_REF_MASK		0x70
+
+enum pcf50633_regulator_enable {
+	PCF50633_REGULATOR_ON		= 0x01,
+	PCF50633_REGULATOR_ON_GPIO1	= 0x02,
+	PCF50633_REGULATOR_ON_GPIO2	= 0x04,
+	PCF50633_REGULATOR_ON_GPIO3	= 0x08,
+};
+#define PCF50633_REGULATOR_ON_MASK	0x0f
+
+enum pcf50633_regulator_phase {
+	PCF50633_REGULATOR_ACTPH1	= 0x00,
+	PCF50633_REGULATOR_ACTPH2	= 0x10,
+	PCF50633_REGULATOR_ACTPH3	= 0x20,
+	PCF50633_REGULATOR_ACTPH4	= 0x30,
+};
+#define PCF50633_REGULATOR_ACTPH_MASK	0x30
+
+enum pcf50633_reg_gpocfg {
+	PCF50633_GPOCFG_GPOSEL_0	= 0x00,
+	PCF50633_GPOCFG_GPOSEL_LED_NFET	= 0x01,
+	PCF50633_GPOCFG_GPOSEL_SYSxOK	= 0x02,
+	PCF50633_GPOCFG_GPOSEL_CLK32K	= 0x03,
+	PCF50633_GPOCFG_GPOSEL_ADAPUSB	= 0x04,
+	PCF50633_GPOCFG_GPOSEL_USBxOK	= 0x05,
+	PCF50633_GPOCFG_GPOSEL_ACTPH4	= 0x06,
+	PCF50633_GPOCFG_GPOSEL_1	= 0x07,
+	PCF50633_GPOCFG_GPOSEL_INVERSE	= 0x08,
+};
+#define PCF50633_GPOCFG_GPOSEL_MASK	0x07
+
+#if 0
+enum pcf50633_reg_mbcc1 {
+	PCF50633_MBCC1_CHGENA		= 0x01,
+	PCF50633_MBCC1_AUTOSTOP		= 0x02,
+	PCF50633_MBCC1_AUTORES		= 0x04,
+	PCF50633_MBCC1_RESUME		= 0x08,
+	PCF50633_MBCC1_RESTART		= 0x10,
+	PCF50633_MBCC1_PREWDTIME_30MIN	= 0x00,
+	PCF50633_MBCC1_PREWDTIME_60MIN	= 0x20,
+	PCF50633_MBCC1_WDTIME_2HRS	= 0x40,
+	PCF50633_MBCC1_WDTIME_4HRS	= 0x80,
+	PCF50633_MBCC1_WDTIME_6HRS	= 0xc0,
+};
+
+enum pcf50633_reg_mbcc2 {
+	PCF50633_MBCC2_VBATCOND_2V7	= 0x00,
+	PCF50633_MBCC2_VBATCOND_2V85	= 0x01,
+	PCF50633_MBCC2_VBATCOND_3V0	= 0x02,
+	PCF50633_MBCC2_VBATCOND_3V15	= 0x03,
+	PCF50633_MBCC2_VRESDEBTIME_64S	= 0x80,
+};
+#define PCF50633_MBCC2_VMAX_MASK	0x3c
+#endif
+
+enum pcf50633_reg_mbcc7 {
+	PCF50633_MBCC7_USB_100mA	= 0x00,
+	PCF50633_MBCC7_USB_500mA	= 0x01,
+	PCF50633_MBCC7_USB_1000mA	= 0x02,
+	PCF50633_MBCC7_USB_SUSPEND	= 0x03,
+	PCF50633_MBCC7_BATTEMP_EN	= 0x04,
+	PCF50633_MBCC7_BATSYSIMAX_1A6	= 0x00,
+	PCF50633_MBCC7_BATSYSIMAX_1A8	= 0x40,
+	PCF50633_MBCC7_BATSYSIMAX_2A0	= 0x80,
+	PCF50633_MBCC7_BATSYSIMAX_2A2	= 0xc0,
+};
+#define PCF56033_MBCC7_USB_MASK		0x03
+
+enum pcf50633_reg_mbcc8 {
+	PCF50633_MBCC8_USBENASUS	= 0x10,
+};
+
+enum pcf50633_reg_mbcs1 {
+	PCF50633_MBCS1_USBPRES		= 0x01,
+	PCF50633_MBCS1_USBOK		= 0x02,
+	PCF50633_MBCS1_ADAPTPRES	= 0x04,
+	PCF50633_MBCS1_ADAPTOK		= 0x08,
+	PCF50633_MBCS1_TBAT_OK		= 0x00,
+	PCF50633_MBCS1_TBAT_ABOVE	= 0x10,
+	PCF50633_MBCS1_TBAT_BELOW	= 0x20,
+	PCF50633_MBCS1_TBAT_UNDEF	= 0x30,
+	PCF50633_MBCS1_PREWDTEXP	= 0x40,
+	PCF50633_MBCS1_WDTEXP		= 0x80,
+};
+
+enum pcf50633_reg_mbcs2_mbcmod {
+	PCF50633_MBCS2_MBC_PLAY		= 0x00,
+	PCF50633_MBCS2_MBC_USB_PRE	= 0x01,
+	PCF50633_MBCS2_MBC_USB_PRE_WAIT	= 0x02,
+	PCF50633_MBCS2_MBC_USB_FAST	= 0x03,
+	PCF50633_MBCS2_MBC_USB_FAST_WAIT= 0x04,
+	PCF50633_MBCS2_MBC_USB_SUSPEND	= 0x05,
+	PCF50633_MBCS2_MBC_ADP_PRE	= 0x06,
+	PCF50633_MBCS2_MBC_ADP_PRE_WAIT	= 0x07,
+	PCF50633_MBCS2_MBC_ADP_FAST	= 0x08,
+	PCF50633_MBCS2_MBC_ADP_FAST_WAIT= 0x09,
+	PCF50633_MBCS2_MBC_BAT_FULL	= 0x0a,
+	PCF50633_MBCS2_MBC_HALT		= 0x0b,
+};
+#define PCF50633_MBCS2_MBC_MASK		0x0f
+enum pcf50633_reg_mbcs2_chgstat {
+	PCF50633_MBCS2_CHGS_NONE	= 0x00,
+	PCF50633_MBCS2_CHGS_ADAPTER	= 0x10,
+	PCF50633_MBCS2_CHGS_USB		= 0x20,
+	PCF50633_MBCS2_CHGS_BOTH	= 0x30,
+};
+#define PCF50633_MBCS2_RESSTAT_AUTO	0x40
+
+enum pcf50633_reg_mbcs3 {
+	PCF50633_MBCS3_USBLIM_PLAY	= 0x01,
+	PCF50633_MBCS3_USBLIM_CGH	= 0x02,
+	PCF50633_MBCS3_TLIM_PLAY	= 0x04,
+	PCF50633_MBCS3_TLIM_CHG		= 0x08,
+	PCF50633_MBCS3_ILIM		= 0x10,	/* 1: Ibat > Icutoff */
+	PCF50633_MBCS3_VLIM		= 0x20,	/* 1: Vbat == Vmax */
+	PCF50633_MBCS3_VBATSTAT		= 0x40,	/* 1: Vbat > Vbatcond */
+	PCF50633_MBCS3_VRES		= 0x80, /* 1: Vbat > Vth(RES) */
+};
+
+/* this is to be provided by the board implementation */
+extern const u_int8_t pcf50633_initial_regs[__NUM_PCF50633_REGS];
+
+int pcf50633_reg_write(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t val);
+
+u_int8_t pcf50633_reg_read(struct pcf50633_data *pcf, u_int8_t reg);
+
+int pcf50633_reg_set_bit_mask(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t mask, u_int8_t val);
+int pcf50633_reg_clear_bits(struct pcf50633_data *pcf, u_int8_t reg, u_int8_t bits);
+
+void pcf50633_charge_autofast(int on);
+
 #endif /* _PCF50633_H */
+
diff --git a/include/linux/regulator/pcf50633.h b/include/linux/regulator/pcf50633.h
new file mode 100644
index 0000000..5ca74a6
--- /dev/null
+++ b/include/linux/regulator/pcf50633.h
@@ -0,0 +1,3 @@
+#include <linux/pcf50633.h>
+
+int pcf50633_regulator_init(struct pcf50633_data *, int);



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