[PATCH 07/12] Move asm/arch/fiq_ipc_gta02.h to mach/fiq_ipc_gta02.h
Jonas Bonn
jonas.bonn at gmail.com
Wed Oct 15 22:41:47 CEST 2008
Signed-off-by: Jonas Bonn <jonas.bonn at gmail.com>
---
arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h | 60 ++++++++++++++++++++
arch/arm/mach-s3c2440/mach-gta02.c | 4 +-
drivers/leds/leds-neo1973-vibrator.c | 2 +-
drivers/power/gta02_hdq.c | 2 +-
include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 60 --------------------
5 files changed, 64 insertions(+), 64 deletions(-)
create mode 100644 arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h
delete mode 100644 include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
diff --git a/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h b/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h
new file mode 100644
index 0000000..8f7744e
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h
@@ -0,0 +1,60 @@
+#ifndef _LINUX_FIQ_IPC_H
+#define _LINUX_FIQ_IPC_H
+
+/*
+ * this defines the struct which is used to communicate between the FIQ
+ * world and the normal linux kernel world. One of these structs is
+ * statically defined for you in the monolithic kernel so the FIQ ISR code
+ * can safely touch it any any time.
+ *
+ * You also want to include this file in your kernel module that wants to
+ * communicate with your FIQ code. Add any kinds of vars that are used by
+ * the FIQ ISR and the module in here.
+ *
+ * To get you started there is just an int that is incremented every FIQ
+ * you can remove this when you are ready to customize, but it is useful
+ * for testing
+ */
+
+#include <mach/pwm.h>
+#include <asm/plat-s3c/regs-timer.h>
+
+extern u8 fiq_ready;
+
+enum hdq_bitbang_states {
+ HDQB_IDLE = 0,
+ HDQB_TX_BREAK,
+ HDQB_TX_BREAK_RECOVERY,
+ HDQB_ADS_CALC,
+ HDQB_ADS_LOW,
+ HDQB_ADS_HIGH,
+ HDQB_WAIT_RX,
+ HDQB_DATA_RX_LOW,
+ HDQB_DATA_RX_HIGH,
+ HDQB_WAIT_TX,
+};
+
+struct fiq_ipc {
+ /* vibrator */
+ unsigned long vib_gpio_pin; /* which pin to meddle with */
+ u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
+ u8 vib_pwm_latched;
+
+ /* hdq */
+ u8 hdq_probed; /* nonzero after HDQ driver probed */
+ struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */
+ unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */
+ u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */
+ u8 hdq_tx_data; /* data to tx for write action */
+ u8 hdq_rx_data; /* data received in read action */
+ u8 hdq_request_ctr; /* incremented by "user" to request a transfer */
+ u8 hdq_transaction_ctr; /* incremented after each transfer */
+ u8 hdq_error; /* 0 = no error */
+};
+
+/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
+extern struct fiq_ipc fiq_ipc;
+extern unsigned long _fiq_count_fiqs;
+extern void fiq_kick(void); /* provoke a FIQ "immediately" */
+
+#endif /* _LINUX_FIQ_IPC_H */
diff --git a/arch/arm/mach-s3c2440/mach-gta02.c b/arch/arm/mach-s3c2440/mach-gta02.c
index 3c1cb83..a5d3389 100644
--- a/arch/arm/mach-s3c2440/mach-gta02.c
+++ b/arch/arm/mach-s3c2440/mach-gta02.c
@@ -83,7 +83,7 @@
#include <linux/glamofb.h>
-#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
+#include <mach/fiq_ipc_gta02.h>
#include "fiq_c_isr.h"
#include <linux/gta02_hdq.h>
#include <linux/bq27000_battery.h>
@@ -109,7 +109,7 @@ static int gta02_charger_active_status;
/* define FIQ IPC struct */
/*
* contains stuff FIQ ISR modifies and normal kernel code can see and use
- * this is defined in <asm/arch/fiq_ipc_gta02.h>, you should customize
+ * this is defined in <arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h>, you should customize
* the definition in there and include the same definition in your kernel
* module that wants to interoperate with your FIQ code.
*/
diff --git a/drivers/leds/leds-neo1973-vibrator.c b/drivers/leds/leds-neo1973-vibrator.c
index f9247ba..cbbc330 100644
--- a/drivers/leds/leds-neo1973-vibrator.c
+++ b/drivers/leds/leds-neo1973-vibrator.c
@@ -24,7 +24,7 @@
#include <asm/plat-s3c/regs-timer.h>
#ifdef CONFIG_MACH_NEO1973_GTA02
-#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
+#include <mach/fiq_ipc_gta02.h>
#endif
#include <asm/plat-s3c24xx/neo1973.h>
diff --git a/drivers/power/gta02_hdq.c b/drivers/power/gta02_hdq.c
index 9760673..89fd3fa 100644
--- a/drivers/power/gta02_hdq.c
+++ b/drivers/power/gta02_hdq.c
@@ -18,7 +18,7 @@
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <mach/gta02.h>
-#include <asm/arch-s3c2410/fiq_ipc_gta02.h>
+#include <mach/fiq_ipc_gta02.h>
diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
deleted file mode 100644
index 8f7744e..0000000
--- a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _LINUX_FIQ_IPC_H
-#define _LINUX_FIQ_IPC_H
-
-/*
- * this defines the struct which is used to communicate between the FIQ
- * world and the normal linux kernel world. One of these structs is
- * statically defined for you in the monolithic kernel so the FIQ ISR code
- * can safely touch it any any time.
- *
- * You also want to include this file in your kernel module that wants to
- * communicate with your FIQ code. Add any kinds of vars that are used by
- * the FIQ ISR and the module in here.
- *
- * To get you started there is just an int that is incremented every FIQ
- * you can remove this when you are ready to customize, but it is useful
- * for testing
- */
-
-#include <mach/pwm.h>
-#include <asm/plat-s3c/regs-timer.h>
-
-extern u8 fiq_ready;
-
-enum hdq_bitbang_states {
- HDQB_IDLE = 0,
- HDQB_TX_BREAK,
- HDQB_TX_BREAK_RECOVERY,
- HDQB_ADS_CALC,
- HDQB_ADS_LOW,
- HDQB_ADS_HIGH,
- HDQB_WAIT_RX,
- HDQB_DATA_RX_LOW,
- HDQB_DATA_RX_HIGH,
- HDQB_WAIT_TX,
-};
-
-struct fiq_ipc {
- /* vibrator */
- unsigned long vib_gpio_pin; /* which pin to meddle with */
- u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
- u8 vib_pwm_latched;
-
- /* hdq */
- u8 hdq_probed; /* nonzero after HDQ driver probed */
- struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */
- unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */
- u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */
- u8 hdq_tx_data; /* data to tx for write action */
- u8 hdq_rx_data; /* data received in read action */
- u8 hdq_request_ctr; /* incremented by "user" to request a transfer */
- u8 hdq_transaction_ctr; /* incremented after each transfer */
- u8 hdq_error; /* 0 = no error */
-};
-
-/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
-extern struct fiq_ipc fiq_ipc;
-extern unsigned long _fiq_count_fiqs;
-extern void fiq_kick(void); /* provoke a FIQ "immediately" */
-
-#endif /* _LINUX_FIQ_IPC_H */
--
1.5.6.3
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