kernel defconfig, CONFIG_MTD_NAND_VERIFY_WRITE

[Nelson Castillo]

On Wed, Oct 6, 2010 at 5:13 PM, Gennady Kupava <gb at bsdmn.com> wrote:
> В Срд, 06/01/2010 в 13:53 -0500, Nelson Castillo пишет:
>> On Wed, Oct 6, 2010 at 3:57 PM, Gennady Kupava <gb at bsdmn.com> wrote:
>> > Hi, patryk
>> >
>> > В Срд, 06/01/2010 в 16:16 +0100, Patryk Benderz пишет:
>> >> >
>> >> Well, if this test was repeated several times with similar results, it
>> >> might be worth to disable this option IMHO. Only one thing makes me
>> >> dither. Will this be safe?
>> >
>> > I am not 100% sure, as I am not mtd dev, but in other configs have this
>> > option sometimes disabled. also we have some kind of hw ecc.
>>
>> I don't know the details but HW ecc is disabled in the FR.
>>
>> static struct s3c2410_platform_nand gta02_nand_info = {
>>         .tacls          = 0,
>>         .twrph0         = 25,
>>         .twrph1         = 15,
>>         .nr_sets        = ARRAY_SIZE(gta02_nand_sets),
>>         .sets           = gta02_nand_sets,
>>         .software_ecc   = 1,
>> };
>>
>> Check drivers/mtd/nand/s3c2410.c if in doubt.
>
> First, Paul already committed patch,
>
> second,
>
> strange, but in config it is enabled:
> CONFIG_MTD_NAND_S3C2410_HWECC=y

Check s3c2410.c to see what this option does.

#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
static int hardware_ecc = 1;
#else
static int hardware_ecc = 0;
#endif


AFAIK this is not doing anything in the more OM recent kernels
(>2.6.31) because the NAND configuration in mach-gta02.c overrides
this setting.

See s3c2410.c:
if (!info->platform->software_ecc && hardware_ecc) {
 ...
}

> even more interesting, why it is disabled? according to datasheet
> SC32442B have one. next thing for investigation.

You might want to search old discussions here in the mailing list to
check why things were done this way.
It's the same in andy-tracking (with different code).